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path: root/drivers/mfd/twl4030-irq.c
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Diffstat (limited to 'drivers/mfd/twl4030-irq.c')
-rw-r--r--drivers/mfd/twl4030-irq.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index b9fda7018cef..5d3a1478004b 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -35,6 +35,7 @@
35 35
36#include <linux/i2c/twl.h> 36#include <linux/i2c/twl.h>
37 37
38#include "twl-core.h"
38 39
39/* 40/*
40 * TWL4030 IRQ handling has two stages in hardware, and thus in software. 41 * TWL4030 IRQ handling has two stages in hardware, and thus in software.
@@ -144,6 +145,7 @@ static const struct sih sih_modules_twl4030[6] = {
144 .name = "bci", 145 .name = "bci",
145 .module = TWL4030_MODULE_INTERRUPTS, 146 .module = TWL4030_MODULE_INTERRUPTS,
146 .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL, 147 .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL,
148 .set_cor = true,
147 .bits = 12, 149 .bits = 12,
148 .bytes_ixr = 2, 150 .bytes_ixr = 2,
149 .edr_offset = TWL4030_INTERRUPTS_BCIEDR1, 151 .edr_offset = TWL4030_INTERRUPTS_BCIEDR1,
@@ -408,7 +410,7 @@ static int twl4030_init_sih_modules(unsigned line)
408 * set Clear-On-Read (COR) bit. 410 * set Clear-On-Read (COR) bit.
409 * 411 *
410 * NOTE that sometimes COR polarity is documented as being 412 * NOTE that sometimes COR polarity is documented as being
411 * inverted: for MADC and BCI, COR=1 means "clear on write". 413 * inverted: for MADC, COR=1 means "clear on write".
412 * And for PWR_INT it's not documented... 414 * And for PWR_INT it's not documented...
413 */ 415 */
414 if (sih->set_cor) { 416 if (sih->set_cor) {