diff options
Diffstat (limited to 'drivers/mfd/dbx500-prcmu-regs.h')
-rw-r--r-- | drivers/mfd/dbx500-prcmu-regs.h | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h index 439254d23d56..d14836ed2114 100644 --- a/drivers/mfd/dbx500-prcmu-regs.h +++ b/drivers/mfd/dbx500-prcmu-regs.h | |||
@@ -74,33 +74,11 @@ | |||
74 | #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN BIT(0) | 74 | #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN BIT(0) |
75 | #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN BIT(1) | 75 | #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN BIT(1) |
76 | 76 | ||
77 | /* ARM WFI Standby signal register */ | ||
78 | #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) | ||
79 | #define PRCM_ARM_WFI_STANDBY_WFI0 0x08 | ||
80 | #define PRCM_ARM_WFI_STANDBY_WFI1 0x10 | ||
81 | #define PRCM_IOCR (prcmu_base + 0x310) | ||
82 | #define PRCM_IOCR_IOFORCE 0x1 | ||
83 | |||
84 | /* CPU mailbox registers */ | 77 | /* CPU mailbox registers */ |
85 | #define PRCM_MBOX_CPU_VAL (prcmu_base + 0x0fc) | 78 | #define PRCM_MBOX_CPU_VAL (prcmu_base + 0x0fc) |
86 | #define PRCM_MBOX_CPU_SET (prcmu_base + 0x100) | 79 | #define PRCM_MBOX_CPU_SET (prcmu_base + 0x100) |
87 | #define PRCM_MBOX_CPU_CLR (prcmu_base + 0x104) | 80 | #define PRCM_MBOX_CPU_CLR (prcmu_base + 0x104) |
88 | 81 | ||
89 | /* Dual A9 core interrupt management unit registers */ | ||
90 | #define PRCM_A9_MASK_REQ (prcmu_base + 0x328) | ||
91 | #define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1 | ||
92 | |||
93 | #define PRCM_A9_MASK_ACK (prcmu_base + 0x32c) | ||
94 | #define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c) | ||
95 | #define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120) | ||
96 | #define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124) | ||
97 | #define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128) | ||
98 | #define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C) | ||
99 | #define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260) | ||
100 | #define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264) | ||
101 | #define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268) | ||
102 | #define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C) | ||
103 | |||
104 | #define PRCM_HOSTACCESS_REQ (prcmu_base + 0x334) | 82 | #define PRCM_HOSTACCESS_REQ (prcmu_base + 0x334) |
105 | #define PRCM_HOSTACCESS_REQ_HOSTACCESS_REQ 0x1 | 83 | #define PRCM_HOSTACCESS_REQ_HOSTACCESS_REQ 0x1 |
106 | #define PRCM_HOSTACCESS_REQ_WAKE_REQ BIT(16) | 84 | #define PRCM_HOSTACCESS_REQ_WAKE_REQ BIT(16) |