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path: root/drivers/mfd/dbx500-prcmu-regs.h
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Diffstat (limited to 'drivers/mfd/dbx500-prcmu-regs.h')
-rw-r--r--drivers/mfd/dbx500-prcmu-regs.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h
index 23108a6e3167..79c76ebdba52 100644
--- a/drivers/mfd/dbx500-prcmu-regs.h
+++ b/drivers/mfd/dbx500-prcmu-regs.h
@@ -61,7 +61,8 @@
61#define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2 61#define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3 0x2
62 62
63#define PRCM_ARM_CHGCLKREQ (_PRCMU_BASE + 0x114) 63#define PRCM_ARM_CHGCLKREQ (_PRCMU_BASE + 0x114)
64#define PRCM_ARM_CHGCLKREQ_PRCM_ARM_CHGCLKREQ 0x1 64#define PRCM_ARM_CHGCLKREQ_PRCM_ARM_CHGCLKREQ BIT(0)
65#define PRCM_ARM_CHGCLKREQ_PRCM_ARM_DIVSEL BIT(16)
65 66
66#define PRCM_PLLARM_ENABLE (_PRCMU_BASE + 0x98) 67#define PRCM_PLLARM_ENABLE (_PRCMU_BASE + 0x98)
67#define PRCM_PLLARM_ENABLE_PRCM_PLLARM_ENABLE 0x1 68#define PRCM_PLLARM_ENABLE_PRCM_PLLARM_ENABLE 0x1
@@ -140,6 +141,7 @@
140/* PRCMU clock/PLL/reset registers */ 141/* PRCMU clock/PLL/reset registers */
141#define PRCM_PLLSOC0_FREQ (_PRCMU_BASE + 0x080) 142#define PRCM_PLLSOC0_FREQ (_PRCMU_BASE + 0x080)
142#define PRCM_PLLSOC1_FREQ (_PRCMU_BASE + 0x084) 143#define PRCM_PLLSOC1_FREQ (_PRCMU_BASE + 0x084)
144#define PRCM_PLLARM_FREQ (_PRCMU_BASE + 0x088)
143#define PRCM_PLLDDR_FREQ (_PRCMU_BASE + 0x08C) 145#define PRCM_PLLDDR_FREQ (_PRCMU_BASE + 0x08C)
144#define PRCM_PLL_FREQ_D_SHIFT 0 146#define PRCM_PLL_FREQ_D_SHIFT 0
145#define PRCM_PLL_FREQ_D_MASK BITS(0, 7) 147#define PRCM_PLL_FREQ_D_MASK BITS(0, 7)