diff options
Diffstat (limited to 'drivers/message/i2o/iop.c')
| -rw-r--r-- | drivers/message/i2o/iop.c | 356 | 
1 files changed, 150 insertions, 206 deletions
| diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c index 4eb53258842e..492167446936 100644 --- a/drivers/message/i2o/iop.c +++ b/drivers/message/i2o/iop.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | #include "core.h" | 32 | #include "core.h" | 
| 33 | 33 | ||
| 34 | #define OSM_NAME "i2o" | 34 | #define OSM_NAME "i2o" | 
| 35 | #define OSM_VERSION "1.288" | 35 | #define OSM_VERSION "1.325" | 
| 36 | #define OSM_DESCRIPTION "I2O subsystem" | 36 | #define OSM_DESCRIPTION "I2O subsystem" | 
| 37 | 37 | ||
| 38 | /* global I2O controller list */ | 38 | /* global I2O controller list */ | 
| @@ -47,27 +47,6 @@ static struct i2o_dma i2o_systab; | |||
| 47 | static int i2o_hrt_get(struct i2o_controller *c); | 47 | static int i2o_hrt_get(struct i2o_controller *c); | 
| 48 | 48 | ||
| 49 | /** | 49 | /** | 
| 50 | * i2o_msg_nop - Returns a message which is not used | ||
| 51 | * @c: I2O controller from which the message was created | ||
| 52 | * @m: message which should be returned | ||
| 53 | * | ||
| 54 | * If you fetch a message via i2o_msg_get, and can't use it, you must | ||
| 55 | * return the message with this function. Otherwise the message frame | ||
| 56 | * is lost. | ||
| 57 | */ | ||
| 58 | void i2o_msg_nop(struct i2o_controller *c, u32 m) | ||
| 59 | { | ||
| 60 | struct i2o_message __iomem *msg = i2o_msg_in_to_virt(c, m); | ||
| 61 | |||
| 62 | writel(THREE_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | ||
| 63 | writel(I2O_CMD_UTIL_NOP << 24 | HOST_TID << 12 | ADAPTER_TID, | ||
| 64 | &msg->u.head[1]); | ||
| 65 | writel(0, &msg->u.head[2]); | ||
| 66 | writel(0, &msg->u.head[3]); | ||
| 67 | i2o_msg_post(c, m); | ||
| 68 | }; | ||
| 69 | |||
| 70 | /** | ||
| 71 | * i2o_msg_get_wait - obtain an I2O message from the IOP | 50 | * i2o_msg_get_wait - obtain an I2O message from the IOP | 
| 72 | * @c: I2O controller | 51 | * @c: I2O controller | 
| 73 | * @msg: pointer to a I2O message pointer | 52 | * @msg: pointer to a I2O message pointer | 
| @@ -81,22 +60,21 @@ void i2o_msg_nop(struct i2o_controller *c, u32 m) | |||
| 81 | * address from the read port (see the i2o spec). If no message is | 60 | * address from the read port (see the i2o spec). If no message is | 
| 82 | * available returns I2O_QUEUE_EMPTY and msg is leaved untouched. | 61 | * available returns I2O_QUEUE_EMPTY and msg is leaved untouched. | 
| 83 | */ | 62 | */ | 
| 84 | u32 i2o_msg_get_wait(struct i2o_controller *c, | 63 | struct i2o_message *i2o_msg_get_wait(struct i2o_controller *c, int wait) | 
| 85 | struct i2o_message __iomem ** msg, int wait) | ||
| 86 | { | 64 | { | 
| 87 | unsigned long timeout = jiffies + wait * HZ; | 65 | unsigned long timeout = jiffies + wait * HZ; | 
| 88 | u32 m; | 66 | struct i2o_message *msg; | 
| 89 | 67 | ||
| 90 | while ((m = i2o_msg_get(c, msg)) == I2O_QUEUE_EMPTY) { | 68 | while (IS_ERR(msg = i2o_msg_get(c))) { | 
| 91 | if (time_after(jiffies, timeout)) { | 69 | if (time_after(jiffies, timeout)) { | 
| 92 | osm_debug("%s: Timeout waiting for message frame.\n", | 70 | osm_debug("%s: Timeout waiting for message frame.\n", | 
| 93 | c->name); | 71 | c->name); | 
| 94 | return I2O_QUEUE_EMPTY; | 72 | return ERR_PTR(-ETIMEDOUT); | 
| 95 | } | 73 | } | 
| 96 | schedule_timeout_uninterruptible(1); | 74 | schedule_timeout_uninterruptible(1); | 
| 97 | } | 75 | } | 
| 98 | 76 | ||
| 99 | return m; | 77 | return msg; | 
| 100 | }; | 78 | }; | 
| 101 | 79 | ||
| 102 | #if BITS_PER_LONG == 64 | 80 | #if BITS_PER_LONG == 64 | 
| @@ -301,8 +279,7 @@ struct i2o_device *i2o_iop_find_device(struct i2o_controller *c, u16 tid) | |||
| 301 | */ | 279 | */ | 
| 302 | static int i2o_iop_quiesce(struct i2o_controller *c) | 280 | static int i2o_iop_quiesce(struct i2o_controller *c) | 
| 303 | { | 281 | { | 
| 304 | struct i2o_message __iomem *msg; | 282 | struct i2o_message *msg; | 
| 305 | u32 m; | ||
| 306 | i2o_status_block *sb = c->status_block.virt; | 283 | i2o_status_block *sb = c->status_block.virt; | 
| 307 | int rc; | 284 | int rc; | 
| 308 | 285 | ||
| @@ -313,16 +290,17 @@ static int i2o_iop_quiesce(struct i2o_controller *c) | |||
| 313 | (sb->iop_state != ADAPTER_STATE_OPERATIONAL)) | 290 | (sb->iop_state != ADAPTER_STATE_OPERATIONAL)) | 
| 314 | return 0; | 291 | return 0; | 
| 315 | 292 | ||
| 316 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 293 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 317 | if (m == I2O_QUEUE_EMPTY) | 294 | if (IS_ERR(msg)) | 
| 318 | return -ETIMEDOUT; | 295 | return PTR_ERR(msg); | 
| 319 | 296 | ||
| 320 | writel(FOUR_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | 297 | msg->u.head[0] = cpu_to_le32(FOUR_WORD_MSG_SIZE | SGL_OFFSET_0); | 
| 321 | writel(I2O_CMD_SYS_QUIESCE << 24 | HOST_TID << 12 | ADAPTER_TID, | 298 | msg->u.head[1] = | 
| 322 | &msg->u.head[1]); | 299 | cpu_to_le32(I2O_CMD_SYS_QUIESCE << 24 | HOST_TID << 12 | | 
| 300 | ADAPTER_TID); | ||
| 323 | 301 | ||
| 324 | /* Long timeout needed for quiesce if lots of devices */ | 302 | /* Long timeout needed for quiesce if lots of devices */ | 
| 325 | if ((rc = i2o_msg_post_wait(c, m, 240))) | 303 | if ((rc = i2o_msg_post_wait(c, msg, 240))) | 
| 326 | osm_info("%s: Unable to quiesce (status=%#x).\n", c->name, -rc); | 304 | osm_info("%s: Unable to quiesce (status=%#x).\n", c->name, -rc); | 
| 327 | else | 305 | else | 
| 328 | osm_debug("%s: Quiesced.\n", c->name); | 306 | osm_debug("%s: Quiesced.\n", c->name); | 
| @@ -342,8 +320,7 @@ static int i2o_iop_quiesce(struct i2o_controller *c) | |||
| 342 | */ | 320 | */ | 
| 343 | static int i2o_iop_enable(struct i2o_controller *c) | 321 | static int i2o_iop_enable(struct i2o_controller *c) | 
| 344 | { | 322 | { | 
| 345 | struct i2o_message __iomem *msg; | 323 | struct i2o_message *msg; | 
| 346 | u32 m; | ||
| 347 | i2o_status_block *sb = c->status_block.virt; | 324 | i2o_status_block *sb = c->status_block.virt; | 
| 348 | int rc; | 325 | int rc; | 
| 349 | 326 | ||
| @@ -353,16 +330,17 @@ static int i2o_iop_enable(struct i2o_controller *c) | |||
| 353 | if (sb->iop_state != ADAPTER_STATE_READY) | 330 | if (sb->iop_state != ADAPTER_STATE_READY) | 
| 354 | return -EINVAL; | 331 | return -EINVAL; | 
| 355 | 332 | ||
| 356 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 333 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 357 | if (m == I2O_QUEUE_EMPTY) | 334 | if (IS_ERR(msg)) | 
| 358 | return -ETIMEDOUT; | 335 | return PTR_ERR(msg); | 
| 359 | 336 | ||
| 360 | writel(FOUR_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | 337 | msg->u.head[0] = cpu_to_le32(FOUR_WORD_MSG_SIZE | SGL_OFFSET_0); | 
| 361 | writel(I2O_CMD_SYS_ENABLE << 24 | HOST_TID << 12 | ADAPTER_TID, | 338 | msg->u.head[1] = | 
| 362 | &msg->u.head[1]); | 339 | cpu_to_le32(I2O_CMD_SYS_ENABLE << 24 | HOST_TID << 12 | | 
| 340 | ADAPTER_TID); | ||
| 363 | 341 | ||
| 364 | /* How long of a timeout do we need? */ | 342 | /* How long of a timeout do we need? */ | 
| 365 | if ((rc = i2o_msg_post_wait(c, m, 240))) | 343 | if ((rc = i2o_msg_post_wait(c, msg, 240))) | 
| 366 | osm_err("%s: Could not enable (status=%#x).\n", c->name, -rc); | 344 | osm_err("%s: Could not enable (status=%#x).\n", c->name, -rc); | 
| 367 | else | 345 | else | 
| 368 | osm_debug("%s: Enabled.\n", c->name); | 346 | osm_debug("%s: Enabled.\n", c->name); | 
| @@ -413,22 +391,22 @@ static inline void i2o_iop_enable_all(void) | |||
| 413 | */ | 391 | */ | 
| 414 | static int i2o_iop_clear(struct i2o_controller *c) | 392 | static int i2o_iop_clear(struct i2o_controller *c) | 
| 415 | { | 393 | { | 
| 416 | struct i2o_message __iomem *msg; | 394 | struct i2o_message *msg; | 
| 417 | u32 m; | ||
| 418 | int rc; | 395 | int rc; | 
| 419 | 396 | ||
| 420 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 397 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 421 | if (m == I2O_QUEUE_EMPTY) | 398 | if (IS_ERR(msg)) | 
| 422 | return -ETIMEDOUT; | 399 | return PTR_ERR(msg); | 
| 423 | 400 | ||
| 424 | /* Quiesce all IOPs first */ | 401 | /* Quiesce all IOPs first */ | 
| 425 | i2o_iop_quiesce_all(); | 402 | i2o_iop_quiesce_all(); | 
| 426 | 403 | ||
| 427 | writel(FOUR_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | 404 | msg->u.head[0] = cpu_to_le32(FOUR_WORD_MSG_SIZE | SGL_OFFSET_0); | 
| 428 | writel(I2O_CMD_ADAPTER_CLEAR << 24 | HOST_TID << 12 | ADAPTER_TID, | 405 | msg->u.head[1] = | 
| 429 | &msg->u.head[1]); | 406 | cpu_to_le32(I2O_CMD_ADAPTER_CLEAR << 24 | HOST_TID << 12 | | 
| 407 | ADAPTER_TID); | ||
| 430 | 408 | ||
| 431 | if ((rc = i2o_msg_post_wait(c, m, 30))) | 409 | if ((rc = i2o_msg_post_wait(c, msg, 30))) | 
| 432 | osm_info("%s: Unable to clear (status=%#x).\n", c->name, -rc); | 410 | osm_info("%s: Unable to clear (status=%#x).\n", c->name, -rc); | 
| 433 | else | 411 | else | 
| 434 | osm_debug("%s: Cleared.\n", c->name); | 412 | osm_debug("%s: Cleared.\n", c->name); | 
| @@ -446,13 +424,13 @@ static int i2o_iop_clear(struct i2o_controller *c) | |||
| 446 | * Clear and (re)initialize IOP's outbound queue and post the message | 424 | * Clear and (re)initialize IOP's outbound queue and post the message | 
| 447 | * frames to the IOP. | 425 | * frames to the IOP. | 
| 448 | * | 426 | * | 
| 449 | * Returns 0 on success or a negative errno code on failure. | 427 | * Returns 0 on success or negative error code on failure. | 
| 450 | */ | 428 | */ | 
| 451 | static int i2o_iop_init_outbound_queue(struct i2o_controller *c) | 429 | static int i2o_iop_init_outbound_queue(struct i2o_controller *c) | 
| 452 | { | 430 | { | 
| 453 | volatile u8 *status = c->status.virt; | ||
| 454 | u32 m; | 431 | u32 m; | 
| 455 | struct i2o_message __iomem *msg; | 432 | volatile u8 *status = c->status.virt; | 
| 433 | struct i2o_message *msg; | ||
| 456 | ulong timeout; | 434 | ulong timeout; | 
| 457 | int i; | 435 | int i; | 
| 458 | 436 | ||
| @@ -460,23 +438,24 @@ static int i2o_iop_init_outbound_queue(struct i2o_controller *c) | |||
| 460 | 438 | ||
| 461 | memset(c->status.virt, 0, 4); | 439 | memset(c->status.virt, 0, 4); | 
| 462 | 440 | ||
| 463 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 441 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 464 | if (m == I2O_QUEUE_EMPTY) | 442 | if (IS_ERR(msg)) | 
| 465 | return -ETIMEDOUT; | 443 | return PTR_ERR(msg); | 
| 466 | 444 | ||
| 467 | writel(EIGHT_WORD_MSG_SIZE | SGL_OFFSET_6, &msg->u.head[0]); | 445 | msg->u.head[0] = cpu_to_le32(EIGHT_WORD_MSG_SIZE | SGL_OFFSET_6); | 
| 468 | writel(I2O_CMD_OUTBOUND_INIT << 24 | HOST_TID << 12 | ADAPTER_TID, | 446 | msg->u.head[1] = | 
| 469 | &msg->u.head[1]); | 447 | cpu_to_le32(I2O_CMD_OUTBOUND_INIT << 24 | HOST_TID << 12 | | 
| 470 | writel(i2o_exec_driver.context, &msg->u.s.icntxt); | 448 | ADAPTER_TID); | 
| 471 | writel(0x00000000, &msg->u.s.tcntxt); | 449 | msg->u.s.icntxt = cpu_to_le32(i2o_exec_driver.context); | 
| 472 | writel(PAGE_SIZE, &msg->body[0]); | 450 | msg->u.s.tcntxt = cpu_to_le32(0x00000000); | 
| 451 | msg->body[0] = cpu_to_le32(PAGE_SIZE); | ||
| 473 | /* Outbound msg frame size in words and Initcode */ | 452 | /* Outbound msg frame size in words and Initcode */ | 
| 474 | writel(I2O_OUTBOUND_MSG_FRAME_SIZE << 16 | 0x80, &msg->body[1]); | 453 | msg->body[1] = cpu_to_le32(I2O_OUTBOUND_MSG_FRAME_SIZE << 16 | 0x80); | 
| 475 | writel(0xd0000004, &msg->body[2]); | 454 | msg->body[2] = cpu_to_le32(0xd0000004); | 
| 476 | writel(i2o_dma_low(c->status.phys), &msg->body[3]); | 455 | msg->body[3] = cpu_to_le32(i2o_dma_low(c->status.phys)); | 
| 477 | writel(i2o_dma_high(c->status.phys), &msg->body[4]); | 456 | msg->body[4] = cpu_to_le32(i2o_dma_high(c->status.phys)); | 
| 478 | 457 | ||
| 479 | i2o_msg_post(c, m); | 458 | i2o_msg_post(c, msg); | 
| 480 | 459 | ||
| 481 | timeout = jiffies + I2O_TIMEOUT_INIT_OUTBOUND_QUEUE * HZ; | 460 | timeout = jiffies + I2O_TIMEOUT_INIT_OUTBOUND_QUEUE * HZ; | 
| 482 | while (*status <= I2O_CMD_IN_PROGRESS) { | 461 | while (*status <= I2O_CMD_IN_PROGRESS) { | 
| @@ -511,34 +490,34 @@ static int i2o_iop_init_outbound_queue(struct i2o_controller *c) | |||
| 511 | static int i2o_iop_reset(struct i2o_controller *c) | 490 | static int i2o_iop_reset(struct i2o_controller *c) | 
| 512 | { | 491 | { | 
| 513 | volatile u8 *status = c->status.virt; | 492 | volatile u8 *status = c->status.virt; | 
| 514 | struct i2o_message __iomem *msg; | 493 | struct i2o_message *msg; | 
| 515 | u32 m; | ||
| 516 | unsigned long timeout; | 494 | unsigned long timeout; | 
| 517 | i2o_status_block *sb = c->status_block.virt; | 495 | i2o_status_block *sb = c->status_block.virt; | 
| 518 | int rc = 0; | 496 | int rc = 0; | 
| 519 | 497 | ||
| 520 | osm_debug("%s: Resetting controller\n", c->name); | 498 | osm_debug("%s: Resetting controller\n", c->name); | 
| 521 | 499 | ||
| 522 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 500 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 523 | if (m == I2O_QUEUE_EMPTY) | 501 | if (IS_ERR(msg)) | 
| 524 | return -ETIMEDOUT; | 502 | return PTR_ERR(msg); | 
| 525 | 503 | ||
| 526 | memset(c->status_block.virt, 0, 8); | 504 | memset(c->status_block.virt, 0, 8); | 
| 527 | 505 | ||
| 528 | /* Quiesce all IOPs first */ | 506 | /* Quiesce all IOPs first */ | 
| 529 | i2o_iop_quiesce_all(); | 507 | i2o_iop_quiesce_all(); | 
| 530 | 508 | ||
| 531 | writel(EIGHT_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | 509 | msg->u.head[0] = cpu_to_le32(EIGHT_WORD_MSG_SIZE | SGL_OFFSET_0); | 
| 532 | writel(I2O_CMD_ADAPTER_RESET << 24 | HOST_TID << 12 | ADAPTER_TID, | 510 | msg->u.head[1] = | 
| 533 | &msg->u.head[1]); | 511 | cpu_to_le32(I2O_CMD_ADAPTER_RESET << 24 | HOST_TID << 12 | | 
| 534 | writel(i2o_exec_driver.context, &msg->u.s.icntxt); | 512 | ADAPTER_TID); | 
| 535 | writel(0, &msg->u.s.tcntxt); //FIXME: use reasonable transaction context | 513 | msg->u.s.icntxt = cpu_to_le32(i2o_exec_driver.context); | 
| 536 | writel(0, &msg->body[0]); | 514 | msg->u.s.tcntxt = cpu_to_le32(0x00000000); | 
| 537 | writel(0, &msg->body[1]); | 515 | msg->body[0] = cpu_to_le32(0x00000000); | 
| 538 | writel(i2o_dma_low(c->status.phys), &msg->body[2]); | 516 | msg->body[1] = cpu_to_le32(0x00000000); | 
| 539 | writel(i2o_dma_high(c->status.phys), &msg->body[3]); | 517 | msg->body[2] = cpu_to_le32(i2o_dma_low(c->status.phys)); | 
| 518 | msg->body[3] = cpu_to_le32(i2o_dma_high(c->status.phys)); | ||
| 540 | 519 | ||
| 541 | i2o_msg_post(c, m); | 520 | i2o_msg_post(c, msg); | 
| 542 | 521 | ||
| 543 | /* Wait for a reply */ | 522 | /* Wait for a reply */ | 
| 544 | timeout = jiffies + I2O_TIMEOUT_RESET * HZ; | 523 | timeout = jiffies + I2O_TIMEOUT_RESET * HZ; | 
| @@ -567,18 +546,15 @@ static int i2o_iop_reset(struct i2o_controller *c) | |||
| 567 | osm_debug("%s: Reset in progress, waiting for reboot...\n", | 546 | osm_debug("%s: Reset in progress, waiting for reboot...\n", | 
| 568 | c->name); | 547 | c->name); | 
| 569 | 548 | ||
| 570 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_RESET); | 549 | while (IS_ERR(msg = i2o_msg_get_wait(c, I2O_TIMEOUT_RESET))) { | 
| 571 | while (m == I2O_QUEUE_EMPTY) { | ||
| 572 | if (time_after(jiffies, timeout)) { | 550 | if (time_after(jiffies, timeout)) { | 
| 573 | osm_err("%s: IOP reset timeout.\n", c->name); | 551 | osm_err("%s: IOP reset timeout.\n", c->name); | 
| 574 | rc = -ETIMEDOUT; | 552 | rc = PTR_ERR(msg); | 
| 575 | goto exit; | 553 | goto exit; | 
| 576 | } | 554 | } | 
| 577 | schedule_timeout_uninterruptible(1); | 555 | schedule_timeout_uninterruptible(1); | 
| 578 | |||
| 579 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_RESET); | ||
| 580 | } | 556 | } | 
| 581 | i2o_msg_nop(c, m); | 557 | i2o_msg_nop(c, msg); | 
| 582 | 558 | ||
| 583 | /* from here all quiesce commands are safe */ | 559 | /* from here all quiesce commands are safe */ | 
| 584 | c->no_quiesce = 0; | 560 | c->no_quiesce = 0; | 
| @@ -686,8 +662,7 @@ static int i2o_iop_activate(struct i2o_controller *c) | |||
| 686 | */ | 662 | */ | 
| 687 | static int i2o_iop_systab_set(struct i2o_controller *c) | 663 | static int i2o_iop_systab_set(struct i2o_controller *c) | 
| 688 | { | 664 | { | 
| 689 | struct i2o_message __iomem *msg; | 665 | struct i2o_message *msg; | 
| 690 | u32 m; | ||
| 691 | i2o_status_block *sb = c->status_block.virt; | 666 | i2o_status_block *sb = c->status_block.virt; | 
| 692 | struct device *dev = &c->pdev->dev; | 667 | struct device *dev = &c->pdev->dev; | 
| 693 | struct resource *root; | 668 | struct resource *root; | 
| @@ -735,41 +710,38 @@ static int i2o_iop_systab_set(struct i2o_controller *c) | |||
| 735 | } | 710 | } | 
| 736 | } | 711 | } | 
| 737 | 712 | ||
| 738 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 713 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 739 | if (m == I2O_QUEUE_EMPTY) | 714 | if (IS_ERR(msg)) | 
| 740 | return -ETIMEDOUT; | 715 | return PTR_ERR(msg); | 
| 741 | 716 | ||
| 742 | i2o_systab.phys = dma_map_single(dev, i2o_systab.virt, i2o_systab.len, | 717 | i2o_systab.phys = dma_map_single(dev, i2o_systab.virt, i2o_systab.len, | 
| 743 | PCI_DMA_TODEVICE); | 718 | PCI_DMA_TODEVICE); | 
| 744 | if (!i2o_systab.phys) { | 719 | if (!i2o_systab.phys) { | 
| 745 | i2o_msg_nop(c, m); | 720 | i2o_msg_nop(c, msg); | 
| 746 | return -ENOMEM; | 721 | return -ENOMEM; | 
| 747 | } | 722 | } | 
| 748 | 723 | ||
| 749 | writel(I2O_MESSAGE_SIZE(12) | SGL_OFFSET_6, &msg->u.head[0]); | 724 | msg->u.head[0] = cpu_to_le32(I2O_MESSAGE_SIZE(12) | SGL_OFFSET_6); | 
| 750 | writel(I2O_CMD_SYS_TAB_SET << 24 | HOST_TID << 12 | ADAPTER_TID, | 725 | msg->u.head[1] = | 
| 751 | &msg->u.head[1]); | 726 | cpu_to_le32(I2O_CMD_SYS_TAB_SET << 24 | HOST_TID << 12 | | 
| 727 | ADAPTER_TID); | ||
| 752 | 728 | ||
| 753 | /* | 729 | /* | 
| 754 | * Provide three SGL-elements: | 730 | * Provide three SGL-elements: | 
| 755 | * System table (SysTab), Private memory space declaration and | 731 | * System table (SysTab), Private memory space declaration and | 
| 756 | * Private i/o space declaration | 732 | * Private i/o space declaration | 
| 757 | * | ||
| 758 | * FIXME: is this still true? | ||
| 759 | * Nasty one here. We can't use dma_alloc_coherent to send the | ||
| 760 | * same table to everyone. We have to go remap it for them all | ||
| 761 | */ | 733 | */ | 
| 762 | 734 | ||
| 763 | writel(c->unit + 2, &msg->body[0]); | 735 | msg->body[0] = cpu_to_le32(c->unit + 2); | 
| 764 | writel(0, &msg->body[1]); | 736 | msg->body[1] = cpu_to_le32(0x00000000); | 
| 765 | writel(0x54000000 | i2o_systab.len, &msg->body[2]); | 737 | msg->body[2] = cpu_to_le32(0x54000000 | i2o_systab.len); | 
| 766 | writel(i2o_systab.phys, &msg->body[3]); | 738 | msg->body[3] = cpu_to_le32(i2o_systab.phys); | 
| 767 | writel(0x54000000 | sb->current_mem_size, &msg->body[4]); | 739 | msg->body[4] = cpu_to_le32(0x54000000 | sb->current_mem_size); | 
| 768 | writel(sb->current_mem_base, &msg->body[5]); | 740 | msg->body[5] = cpu_to_le32(sb->current_mem_base); | 
| 769 | writel(0xd4000000 | sb->current_io_size, &msg->body[6]); | 741 | msg->body[6] = cpu_to_le32(0xd4000000 | sb->current_io_size); | 
| 770 | writel(sb->current_io_base, &msg->body[6]); | 742 | msg->body[6] = cpu_to_le32(sb->current_io_base); | 
| 771 | 743 | ||
| 772 | rc = i2o_msg_post_wait(c, m, 120); | 744 | rc = i2o_msg_post_wait(c, msg, 120); | 
| 773 | 745 | ||
| 774 | dma_unmap_single(dev, i2o_systab.phys, i2o_systab.len, | 746 | dma_unmap_single(dev, i2o_systab.phys, i2o_systab.len, | 
| 775 | PCI_DMA_TODEVICE); | 747 | PCI_DMA_TODEVICE); | 
| @@ -780,8 +752,6 @@ static int i2o_iop_systab_set(struct i2o_controller *c) | |||
| 780 | else | 752 | else | 
| 781 | osm_debug("%s: SysTab set.\n", c->name); | 753 | osm_debug("%s: SysTab set.\n", c->name); | 
| 782 | 754 | ||
| 783 | i2o_status_get(c); // Entered READY state | ||
| 784 | |||
| 785 | return rc; | 755 | return rc; | 
| 786 | } | 756 | } | 
| 787 | 757 | ||
| @@ -791,7 +761,7 @@ static int i2o_iop_systab_set(struct i2o_controller *c) | |||
| 791 | * | 761 | * | 
| 792 | * Send the system table and enable the I2O controller. | 762 | * Send the system table and enable the I2O controller. | 
| 793 | * | 763 | * | 
| 794 | * Returns 0 on success or negativer error code on failure. | 764 | * Returns 0 on success or negative error code on failure. | 
| 795 | */ | 765 | */ | 
| 796 | static int i2o_iop_online(struct i2o_controller *c) | 766 | static int i2o_iop_online(struct i2o_controller *c) | 
| 797 | { | 767 | { | 
| @@ -830,7 +800,6 @@ void i2o_iop_remove(struct i2o_controller *c) | |||
| 830 | list_for_each_entry_safe(dev, tmp, &c->devices, list) | 800 | list_for_each_entry_safe(dev, tmp, &c->devices, list) | 
| 831 | i2o_device_remove(dev); | 801 | i2o_device_remove(dev); | 
| 832 | 802 | ||
| 833 | class_device_unregister(c->classdev); | ||
| 834 | device_del(&c->device); | 803 | device_del(&c->device); | 
| 835 | 804 | ||
| 836 | /* Ask the IOP to switch to RESET state */ | 805 | /* Ask the IOP to switch to RESET state */ | 
| @@ -869,12 +838,11 @@ static int i2o_systab_build(void) | |||
| 869 | i2o_systab.len = sizeof(struct i2o_sys_tbl) + num_controllers * | 838 | i2o_systab.len = sizeof(struct i2o_sys_tbl) + num_controllers * | 
| 870 | sizeof(struct i2o_sys_tbl_entry); | 839 | sizeof(struct i2o_sys_tbl_entry); | 
| 871 | 840 | ||
| 872 | systab = i2o_systab.virt = kmalloc(i2o_systab.len, GFP_KERNEL); | 841 | systab = i2o_systab.virt = kzalloc(i2o_systab.len, GFP_KERNEL); | 
| 873 | if (!systab) { | 842 | if (!systab) { | 
| 874 | osm_err("unable to allocate memory for System Table\n"); | 843 | osm_err("unable to allocate memory for System Table\n"); | 
| 875 | return -ENOMEM; | 844 | return -ENOMEM; | 
| 876 | } | 845 | } | 
| 877 | memset(systab, 0, i2o_systab.len); | ||
| 878 | 846 | ||
| 879 | systab->version = I2OVERSION; | 847 | systab->version = I2OVERSION; | 
| 880 | systab->change_ind = change_ind + 1; | 848 | systab->change_ind = change_ind + 1; | 
| @@ -952,30 +920,30 @@ static int i2o_parse_hrt(struct i2o_controller *c) | |||
| 952 | */ | 920 | */ | 
| 953 | int i2o_status_get(struct i2o_controller *c) | 921 | int i2o_status_get(struct i2o_controller *c) | 
| 954 | { | 922 | { | 
| 955 | struct i2o_message __iomem *msg; | 923 | struct i2o_message *msg; | 
| 956 | u32 m; | ||
| 957 | volatile u8 *status_block; | 924 | volatile u8 *status_block; | 
| 958 | unsigned long timeout; | 925 | unsigned long timeout; | 
| 959 | 926 | ||
| 960 | status_block = (u8 *) c->status_block.virt; | 927 | status_block = (u8 *) c->status_block.virt; | 
| 961 | memset(c->status_block.virt, 0, sizeof(i2o_status_block)); | 928 | memset(c->status_block.virt, 0, sizeof(i2o_status_block)); | 
| 962 | 929 | ||
| 963 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 930 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 964 | if (m == I2O_QUEUE_EMPTY) | 931 | if (IS_ERR(msg)) | 
| 965 | return -ETIMEDOUT; | 932 | return PTR_ERR(msg); | 
| 966 | 933 | ||
| 967 | writel(NINE_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | 934 | msg->u.head[0] = cpu_to_le32(NINE_WORD_MSG_SIZE | SGL_OFFSET_0); | 
| 968 | writel(I2O_CMD_STATUS_GET << 24 | HOST_TID << 12 | ADAPTER_TID, | 935 | msg->u.head[1] = | 
| 969 | &msg->u.head[1]); | 936 | cpu_to_le32(I2O_CMD_STATUS_GET << 24 | HOST_TID << 12 | | 
| 970 | writel(i2o_exec_driver.context, &msg->u.s.icntxt); | 937 | ADAPTER_TID); | 
| 971 | writel(0, &msg->u.s.tcntxt); // FIXME: use resonable transaction context | 938 | msg->u.s.icntxt = cpu_to_le32(i2o_exec_driver.context); | 
| 972 | writel(0, &msg->body[0]); | 939 | msg->u.s.tcntxt = cpu_to_le32(0x00000000); | 
| 973 | writel(0, &msg->body[1]); | 940 | msg->body[0] = cpu_to_le32(0x00000000); | 
| 974 | writel(i2o_dma_low(c->status_block.phys), &msg->body[2]); | 941 | msg->body[1] = cpu_to_le32(0x00000000); | 
| 975 | writel(i2o_dma_high(c->status_block.phys), &msg->body[3]); | 942 | msg->body[2] = cpu_to_le32(i2o_dma_low(c->status_block.phys)); | 
| 976 | writel(sizeof(i2o_status_block), &msg->body[4]); /* always 88 bytes */ | 943 | msg->body[3] = cpu_to_le32(i2o_dma_high(c->status_block.phys)); | 
| 944 | msg->body[4] = cpu_to_le32(sizeof(i2o_status_block)); /* always 88 bytes */ | ||
| 977 | 945 | ||
| 978 | i2o_msg_post(c, m); | 946 | i2o_msg_post(c, msg); | 
| 979 | 947 | ||
| 980 | /* Wait for a reply */ | 948 | /* Wait for a reply */ | 
| 981 | timeout = jiffies + I2O_TIMEOUT_STATUS_GET * HZ; | 949 | timeout = jiffies + I2O_TIMEOUT_STATUS_GET * HZ; | 
| @@ -1002,7 +970,7 @@ int i2o_status_get(struct i2o_controller *c) | |||
| 1002 | * The HRT contains information about possible hidden devices but is | 970 | * The HRT contains information about possible hidden devices but is | 
| 1003 | * mostly useless to us. | 971 | * mostly useless to us. | 
| 1004 | * | 972 | * | 
| 1005 | * Returns 0 on success or negativer error code on failure. | 973 | * Returns 0 on success or negative error code on failure. | 
| 1006 | */ | 974 | */ | 
| 1007 | static int i2o_hrt_get(struct i2o_controller *c) | 975 | static int i2o_hrt_get(struct i2o_controller *c) | 
| 1008 | { | 976 | { | 
| @@ -1013,20 +981,20 @@ static int i2o_hrt_get(struct i2o_controller *c) | |||
| 1013 | struct device *dev = &c->pdev->dev; | 981 | struct device *dev = &c->pdev->dev; | 
| 1014 | 982 | ||
| 1015 | for (i = 0; i < I2O_HRT_GET_TRIES; i++) { | 983 | for (i = 0; i < I2O_HRT_GET_TRIES; i++) { | 
| 1016 | struct i2o_message __iomem *msg; | 984 | struct i2o_message *msg; | 
| 1017 | u32 m; | ||
| 1018 | 985 | ||
| 1019 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 986 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 1020 | if (m == I2O_QUEUE_EMPTY) | 987 | if (IS_ERR(msg)) | 
| 1021 | return -ETIMEDOUT; | 988 | return PTR_ERR(msg); | 
| 1022 | 989 | ||
| 1023 | writel(SIX_WORD_MSG_SIZE | SGL_OFFSET_4, &msg->u.head[0]); | 990 | msg->u.head[0] = cpu_to_le32(SIX_WORD_MSG_SIZE | SGL_OFFSET_4); | 
| 1024 | writel(I2O_CMD_HRT_GET << 24 | HOST_TID << 12 | ADAPTER_TID, | 991 | msg->u.head[1] = | 
| 1025 | &msg->u.head[1]); | 992 | cpu_to_le32(I2O_CMD_HRT_GET << 24 | HOST_TID << 12 | | 
| 1026 | writel(0xd0000000 | c->hrt.len, &msg->body[0]); | 993 | ADAPTER_TID); | 
| 1027 | writel(c->hrt.phys, &msg->body[1]); | 994 | msg->body[0] = cpu_to_le32(0xd0000000 | c->hrt.len); | 
| 995 | msg->body[1] = cpu_to_le32(c->hrt.phys); | ||
| 1028 | 996 | ||
| 1029 | rc = i2o_msg_post_wait_mem(c, m, 20, &c->hrt); | 997 | rc = i2o_msg_post_wait_mem(c, msg, 20, &c->hrt); | 
| 1030 | 998 | ||
| 1031 | if (rc < 0) { | 999 | if (rc < 0) { | 
| 1032 | osm_err("%s: Unable to get HRT (status=%#x)\n", c->name, | 1000 | osm_err("%s: Unable to get HRT (status=%#x)\n", c->name, | 
| @@ -1051,15 +1019,6 @@ static int i2o_hrt_get(struct i2o_controller *c) | |||
| 1051 | } | 1019 | } | 
| 1052 | 1020 | ||
| 1053 | /** | 1021 | /** | 
| 1054 | * i2o_iop_free - Free the i2o_controller struct | ||
| 1055 | * @c: I2O controller to free | ||
| 1056 | */ | ||
| 1057 | void i2o_iop_free(struct i2o_controller *c) | ||
| 1058 | { | ||
| 1059 | kfree(c); | ||
| 1060 | }; | ||
| 1061 | |||
| 1062 | /** | ||
| 1063 | * i2o_iop_release - release the memory for a I2O controller | 1022 | * i2o_iop_release - release the memory for a I2O controller | 
| 1064 | * @dev: I2O controller which should be released | 1023 | * @dev: I2O controller which should be released | 
| 1065 | * | 1024 | * | 
| @@ -1073,14 +1032,11 @@ static void i2o_iop_release(struct device *dev) | |||
| 1073 | i2o_iop_free(c); | 1032 | i2o_iop_free(c); | 
| 1074 | }; | 1033 | }; | 
| 1075 | 1034 | ||
| 1076 | /* I2O controller class */ | ||
| 1077 | static struct class *i2o_controller_class; | ||
| 1078 | |||
| 1079 | /** | 1035 | /** | 
| 1080 | * i2o_iop_alloc - Allocate and initialize a i2o_controller struct | 1036 | * i2o_iop_alloc - Allocate and initialize a i2o_controller struct | 
| 1081 | * | 1037 | * | 
| 1082 | * Allocate the necessary memory for a i2o_controller struct and | 1038 | * Allocate the necessary memory for a i2o_controller struct and | 
| 1083 | * initialize the lists. | 1039 | * initialize the lists and message mempool. | 
| 1084 | * | 1040 | * | 
| 1085 | * Returns a pointer to the I2O controller or a negative error code on | 1041 | * Returns a pointer to the I2O controller or a negative error code on | 
| 1086 | * failure. | 1042 | * failure. | 
| @@ -1089,20 +1045,29 @@ struct i2o_controller *i2o_iop_alloc(void) | |||
| 1089 | { | 1045 | { | 
| 1090 | static int unit = 0; /* 0 and 1 are NULL IOP and Local Host */ | 1046 | static int unit = 0; /* 0 and 1 are NULL IOP and Local Host */ | 
| 1091 | struct i2o_controller *c; | 1047 | struct i2o_controller *c; | 
| 1048 | char poolname[32]; | ||
| 1092 | 1049 | ||
| 1093 | c = kmalloc(sizeof(*c), GFP_KERNEL); | 1050 | c = kzalloc(sizeof(*c), GFP_KERNEL); | 
| 1094 | if (!c) { | 1051 | if (!c) { | 
| 1095 | osm_err("i2o: Insufficient memory to allocate a I2O controller." | 1052 | osm_err("i2o: Insufficient memory to allocate a I2O controller." | 
| 1096 | "\n"); | 1053 | "\n"); | 
| 1097 | return ERR_PTR(-ENOMEM); | 1054 | return ERR_PTR(-ENOMEM); | 
| 1098 | } | 1055 | } | 
| 1099 | memset(c, 0, sizeof(*c)); | 1056 | |
| 1057 | c->unit = unit++; | ||
| 1058 | sprintf(c->name, "iop%d", c->unit); | ||
| 1059 | |||
| 1060 | snprintf(poolname, sizeof(poolname), "i2o_%s_msg_inpool", c->name); | ||
| 1061 | if (i2o_pool_alloc | ||
| 1062 | (&c->in_msg, poolname, I2O_INBOUND_MSG_FRAME_SIZE * 4, | ||
| 1063 | I2O_MSG_INPOOL_MIN)) { | ||
| 1064 | kfree(c); | ||
| 1065 | return ERR_PTR(-ENOMEM); | ||
| 1066 | }; | ||
| 1100 | 1067 | ||
| 1101 | INIT_LIST_HEAD(&c->devices); | 1068 | INIT_LIST_HEAD(&c->devices); | 
| 1102 | spin_lock_init(&c->lock); | 1069 | spin_lock_init(&c->lock); | 
| 1103 | init_MUTEX(&c->lct_lock); | 1070 | init_MUTEX(&c->lct_lock); | 
| 1104 | c->unit = unit++; | ||
| 1105 | sprintf(c->name, "iop%d", c->unit); | ||
| 1106 | 1071 | ||
| 1107 | device_initialize(&c->device); | 1072 | device_initialize(&c->device); | 
| 1108 | 1073 | ||
| @@ -1137,36 +1102,29 @@ int i2o_iop_add(struct i2o_controller *c) | |||
| 1137 | goto iop_reset; | 1102 | goto iop_reset; | 
| 1138 | } | 1103 | } | 
| 1139 | 1104 | ||
| 1140 | c->classdev = class_device_create(i2o_controller_class, NULL, MKDEV(0,0), | ||
| 1141 | &c->device, "iop%d", c->unit); | ||
| 1142 | if (IS_ERR(c->classdev)) { | ||
| 1143 | osm_err("%s: could not add controller class\n", c->name); | ||
| 1144 | goto device_del; | ||
| 1145 | } | ||
| 1146 | |||
| 1147 | osm_info("%s: Activating I2O controller...\n", c->name); | 1105 | osm_info("%s: Activating I2O controller...\n", c->name); | 
| 1148 | osm_info("%s: This may take a few minutes if there are many devices\n", | 1106 | osm_info("%s: This may take a few minutes if there are many devices\n", | 
| 1149 | c->name); | 1107 | c->name); | 
| 1150 | 1108 | ||
| 1151 | if ((rc = i2o_iop_activate(c))) { | 1109 | if ((rc = i2o_iop_activate(c))) { | 
| 1152 | osm_err("%s: could not activate controller\n", c->name); | 1110 | osm_err("%s: could not activate controller\n", c->name); | 
| 1153 | goto class_del; | 1111 | goto device_del; | 
| 1154 | } | 1112 | } | 
| 1155 | 1113 | ||
| 1156 | osm_debug("%s: building sys table...\n", c->name); | 1114 | osm_debug("%s: building sys table...\n", c->name); | 
| 1157 | 1115 | ||
| 1158 | if ((rc = i2o_systab_build())) | 1116 | if ((rc = i2o_systab_build())) | 
| 1159 | goto class_del; | 1117 | goto device_del; | 
| 1160 | 1118 | ||
| 1161 | osm_debug("%s: online controller...\n", c->name); | 1119 | osm_debug("%s: online controller...\n", c->name); | 
| 1162 | 1120 | ||
| 1163 | if ((rc = i2o_iop_online(c))) | 1121 | if ((rc = i2o_iop_online(c))) | 
| 1164 | goto class_del; | 1122 | goto device_del; | 
| 1165 | 1123 | ||
| 1166 | osm_debug("%s: getting LCT...\n", c->name); | 1124 | osm_debug("%s: getting LCT...\n", c->name); | 
| 1167 | 1125 | ||
| 1168 | if ((rc = i2o_exec_lct_get(c))) | 1126 | if ((rc = i2o_exec_lct_get(c))) | 
| 1169 | goto class_del; | 1127 | goto device_del; | 
| 1170 | 1128 | ||
| 1171 | list_add(&c->list, &i2o_controllers); | 1129 | list_add(&c->list, &i2o_controllers); | 
| 1172 | 1130 | ||
| @@ -1176,9 +1134,6 @@ int i2o_iop_add(struct i2o_controller *c) | |||
| 1176 | 1134 | ||
| 1177 | return 0; | 1135 | return 0; | 
| 1178 | 1136 | ||
| 1179 | class_del: | ||
| 1180 | class_device_unregister(c->classdev); | ||
| 1181 | |||
| 1182 | device_del: | 1137 | device_del: | 
| 1183 | device_del(&c->device); | 1138 | device_del(&c->device); | 
| 1184 | 1139 | ||
| @@ -1199,28 +1154,27 @@ int i2o_iop_add(struct i2o_controller *c) | |||
| 1199 | * is waited for, or expected. If you do not want further notifications, | 1154 | * is waited for, or expected. If you do not want further notifications, | 
| 1200 | * call the i2o_event_register again with a evt_mask of 0. | 1155 | * call the i2o_event_register again with a evt_mask of 0. | 
| 1201 | * | 1156 | * | 
| 1202 | * Returns 0 on success or -ETIMEDOUT if no message could be fetched for | 1157 | * Returns 0 on success or negative error code on failure. | 
| 1203 | * sending the request. | ||
| 1204 | */ | 1158 | */ | 
| 1205 | int i2o_event_register(struct i2o_device *dev, struct i2o_driver *drv, | 1159 | int i2o_event_register(struct i2o_device *dev, struct i2o_driver *drv, | 
| 1206 | int tcntxt, u32 evt_mask) | 1160 | int tcntxt, u32 evt_mask) | 
| 1207 | { | 1161 | { | 
| 1208 | struct i2o_controller *c = dev->iop; | 1162 | struct i2o_controller *c = dev->iop; | 
| 1209 | struct i2o_message __iomem *msg; | 1163 | struct i2o_message *msg; | 
| 1210 | u32 m; | ||
| 1211 | 1164 | ||
| 1212 | m = i2o_msg_get_wait(c, &msg, I2O_TIMEOUT_MESSAGE_GET); | 1165 | msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); | 
| 1213 | if (m == I2O_QUEUE_EMPTY) | 1166 | if (IS_ERR(msg)) | 
| 1214 | return -ETIMEDOUT; | 1167 | return PTR_ERR(msg); | 
| 1215 | 1168 | ||
| 1216 | writel(FIVE_WORD_MSG_SIZE | SGL_OFFSET_0, &msg->u.head[0]); | 1169 | msg->u.head[0] = cpu_to_le32(FIVE_WORD_MSG_SIZE | SGL_OFFSET_0); | 
| 1217 | writel(I2O_CMD_UTIL_EVT_REGISTER << 24 | HOST_TID << 12 | dev->lct_data. | 1170 | msg->u.head[1] = | 
| 1218 | tid, &msg->u.head[1]); | 1171 | cpu_to_le32(I2O_CMD_UTIL_EVT_REGISTER << 24 | HOST_TID << 12 | dev-> | 
| 1219 | writel(drv->context, &msg->u.s.icntxt); | 1172 | lct_data.tid); | 
| 1220 | writel(tcntxt, &msg->u.s.tcntxt); | 1173 | msg->u.s.icntxt = cpu_to_le32(drv->context); | 
| 1221 | writel(evt_mask, &msg->body[0]); | 1174 | msg->u.s.tcntxt = cpu_to_le32(tcntxt); | 
| 1175 | msg->body[0] = cpu_to_le32(evt_mask); | ||
| 1222 | 1176 | ||
| 1223 | i2o_msg_post(c, m); | 1177 | i2o_msg_post(c, msg); | 
| 1224 | 1178 | ||
| 1225 | return 0; | 1179 | return 0; | 
| 1226 | }; | 1180 | }; | 
| @@ -1239,14 +1193,8 @@ static int __init i2o_iop_init(void) | |||
| 1239 | 1193 | ||
| 1240 | printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n"); | 1194 | printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n"); | 
| 1241 | 1195 | ||
| 1242 | i2o_controller_class = class_create(THIS_MODULE, "i2o_controller"); | ||
| 1243 | if (IS_ERR(i2o_controller_class)) { | ||
| 1244 | osm_err("can't register class i2o_controller\n"); | ||
| 1245 | goto exit; | ||
| 1246 | } | ||
| 1247 | |||
| 1248 | if ((rc = i2o_driver_init())) | 1196 | if ((rc = i2o_driver_init())) | 
| 1249 | goto class_exit; | 1197 | goto exit; | 
| 1250 | 1198 | ||
| 1251 | if ((rc = i2o_exec_init())) | 1199 | if ((rc = i2o_exec_init())) | 
| 1252 | goto driver_exit; | 1200 | goto driver_exit; | 
| @@ -1262,9 +1210,6 @@ static int __init i2o_iop_init(void) | |||
| 1262 | driver_exit: | 1210 | driver_exit: | 
| 1263 | i2o_driver_exit(); | 1211 | i2o_driver_exit(); | 
| 1264 | 1212 | ||
| 1265 | class_exit: | ||
| 1266 | class_destroy(i2o_controller_class); | ||
| 1267 | |||
| 1268 | exit: | 1213 | exit: | 
| 1269 | return rc; | 1214 | return rc; | 
| 1270 | } | 1215 | } | 
| @@ -1279,7 +1224,6 @@ static void __exit i2o_iop_exit(void) | |||
| 1279 | i2o_pci_exit(); | 1224 | i2o_pci_exit(); | 
| 1280 | i2o_exec_exit(); | 1225 | i2o_exec_exit(); | 
| 1281 | i2o_driver_exit(); | 1226 | i2o_driver_exit(); | 
| 1282 | class_destroy(i2o_controller_class); | ||
| 1283 | }; | 1227 | }; | 
| 1284 | 1228 | ||
| 1285 | module_init(i2o_iop_init); | 1229 | module_init(i2o_iop_init); | 
