aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/message/fusion/lsi/mpi_cnfg.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/message/fusion/lsi/mpi_cnfg.h')
-rw-r--r--drivers/message/fusion/lsi/mpi_cnfg.h1007
1 files changed, 826 insertions, 181 deletions
diff --git a/drivers/message/fusion/lsi/mpi_cnfg.h b/drivers/message/fusion/lsi/mpi_cnfg.h
index a5680d864bf0..15b12b06799d 100644
--- a/drivers/message/fusion/lsi/mpi_cnfg.h
+++ b/drivers/message/fusion/lsi/mpi_cnfg.h
@@ -1,12 +1,12 @@
1/* 1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation. 2 * Copyright (c) 2000-2005 LSI Logic Corporation.
3 * 3 *
4 * 4 *
5 * Name: mpi_cnfg.h 5 * Name: mpi_cnfg.h
6 * Title: MPI Config message, structures, and Pages 6 * Title: MPI Config message, structures, and Pages
7 * Creation Date: July 27, 2000 7 * Creation Date: July 27, 2000
8 * 8 *
9 * mpi_cnfg.h Version: 01.05.xx 9 * mpi_cnfg.h Version: 01.05.08
10 * 10 *
11 * Version History 11 * Version History
12 * --------------- 12 * ---------------
@@ -145,6 +145,93 @@
145 * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field 145 * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
146 * with ADISCHardALPA. 146 * with ADISCHardALPA.
147 * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define. 147 * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
148 * 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout
149 * fields and related defines to CONFIG_PAGE_FC_PORT_1.
150 * Added define for
151 * MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
152 * Added new fields to the substructures of
153 * CONFIG_PAGE_FC_PORT_10.
154 * 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0,
155 * CONFIG_PAGE_SCSI_DEVICE_0, and
156 * CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for
157 * these pages.
158 * 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0.
159 * 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config
160 * pages.
161 * Added a new structure for extended config page header.
162 * Added new extended config pages types and structures for
163 * SAS IO Unit, SAS Expander, SAS Device, and SAS PHY.
164 * Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4
165 * to add a Flags field.
166 * Two new Manufacturing config pages (5 and 6).
167 * Two new bits defined for IO Unit Page 1 Flags field.
168 * Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields
169 * to specify the BIOS boot device.
170 * Four new Flags bits defined for IO Unit Page 2.
171 * Added IO Unit Page 4.
172 * Added EEDP Flags settings to IOC Page 1.
173 * Added new BIOS Page 1 config page.
174 * 10-05-04 01.05.02 Added define for
175 * MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE.
176 * Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and
177 * associated defines.
178 * Added more defines for SAS IO Unit Page 0
179 * DiscoveryStatus field.
180 * Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK
181 * and MPI_SAS_IOUNIT0_DS_TABLE_LINK.
182 * Added defines for Physical Mapping Modes to SAS IO Unit
183 * Page 2.
184 * Added define for
185 * MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH.
186 * 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode.
187 * Added defines for MaxTargetSpinUp to BIOS Page 1.
188 * Added 5 new ControlFlags defines for SAS IO Unit
189 * Page 1.
190 * Added MaxNumPhysicalMappedIDs field to SAS IO Unit
191 * Page 2.
192 * Added AccessStatus field to SAS Device Page 0 and added
193 * new Flags bits for supported SATA features.
194 * 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID
195 * Volume Page 1, and RAID Physical Disk Page 1.
196 * Replaced IO Unit Page 1 BootTargetID,BootBus, and
197 * BootAdapterNum with reserved field.
198 * Added DataScrubRate and ResyncRate to RAID Volume
199 * Page 0.
200 * Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT
201 * define.
202 * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
203 * Flags field.
204 * Added Auto Port Config flag define for SAS IOUNIT
205 * Page 1 ControlFlags.
206 * Added Disabled bad Phy define to Expander Page 1
207 * Discovery Info field.
208 * Added SAS/SATA device support to SAS IOUnit Page 1
209 * ControlFlags.
210 * Added Unsupported device to SAS Dev Page 0 Flags field
211 * Added disable use SATA Hash Address for SAS IOUNIT
212 * page 1 in ControlFields.
213 * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to
214 * Manufacturing Page 4.
215 * Added new defines for BIOS Page 1 IOCSettings field.
216 * Added ExtDiskIdentifier field to RAID Physical Disk
217 * Page 0.
218 * Added new defines for SAS IO Unit Page 1 ControlFlags
219 * and to SAS Device Page 0 Flags to control SATA devices.
220 * Added defines and structures for the new Log Page 0, a
221 * new type of configuration page.
222 * 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0.
223 * Added WWID field to RAID Volume Page 1.
224 * Added PhysicalPort field to SAS Expander pages 0 and 1.
225 * 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1.
226 * Added Enclosure/Slot boot device format to BIOS Page 2.
227 * New status value for RAID Volume Page 0 VolumeStatus
228 * (VolumeState subfield).
229 * New value for RAID Physical Page 0 InactiveStatus.
230 * Added Inactive Volume Member flag RAID Physical Disk
231 * Page 0 PhysDiskStatus field.
232 * New physical mapping mode in SAS IO Unit Page 2.
233 * Added CONFIG_PAGE_SAS_ENCLOSURE_0.
234 * Added Slot and Enclosure fields to SAS Device Page 0.
148 * -------------------------------------------------------------------------- 235 * --------------------------------------------------------------------------
149 */ 236 */
150 237
@@ -164,7 +251,7 @@ typedef struct _CONFIG_PAGE_HEADER
164 U8 PageLength; /* 01h */ 251 U8 PageLength; /* 01h */
165 U8 PageNumber; /* 02h */ 252 U8 PageNumber; /* 02h */
166 U8 PageType; /* 03h */ 253 U8 PageType; /* 03h */
167} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER, 254} CONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
168 ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t; 255 ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
169 256
170typedef union _CONFIG_PAGE_HEADER_UNION 257typedef union _CONFIG_PAGE_HEADER_UNION
@@ -174,7 +261,7 @@ typedef union _CONFIG_PAGE_HEADER_UNION
174 U16 Word16[2]; 261 U16 Word16[2];
175 U32 Word32; 262 U32 Word32;
176} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion, 263} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
177 fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION; 264 CONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
178 265
179typedef struct _CONFIG_EXTENDED_PAGE_HEADER 266typedef struct _CONFIG_EXTENDED_PAGE_HEADER
180{ 267{
@@ -185,7 +272,7 @@ typedef struct _CONFIG_EXTENDED_PAGE_HEADER
185 U16 ExtPageLength; /* 04h */ 272 U16 ExtPageLength; /* 04h */
186 U8 ExtPageType; /* 06h */ 273 U8 ExtPageType; /* 06h */
187 U8 Reserved2; /* 07h */ 274 U8 Reserved2; /* 07h */
188} fCONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER, 275} CONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
189 ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t; 276 ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t;
190 277
191 278
@@ -224,6 +311,8 @@ typedef struct _CONFIG_EXTENDED_PAGE_HEADER
224#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11) 311#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
225#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12) 312#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
226#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13) 313#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
314#define MPI_CONFIG_EXTPAGETYPE_LOG (0x14)
315#define MPI_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
227 316
228 317
229/**************************************************************************** 318/****************************************************************************
@@ -231,10 +320,19 @@ typedef struct _CONFIG_EXTENDED_PAGE_HEADER
231****************************************************************************/ 320****************************************************************************/
232#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF) 321#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
233 322
323#define MPI_SCSI_DEVICE_FORM_MASK (0xF0000000)
324#define MPI_SCSI_DEVICE_FORM_BUS_TID (0x00000000)
234#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF) 325#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
235#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0) 326#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
236#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00) 327#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
237#define MPI_SCSI_DEVICE_BUS_SHIFT (8) 328#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
329#define MPI_SCSI_DEVICE_FORM_TARGET_MODE (0x10000000)
330#define MPI_SCSI_DEVICE_TM_RESPOND_ID_MASK (0x000000FF)
331#define MPI_SCSI_DEVICE_TM_RESPOND_ID_SHIFT (0)
332#define MPI_SCSI_DEVICE_TM_BUS_MASK (0x0000FF00)
333#define MPI_SCSI_DEVICE_TM_BUS_SHIFT (8)
334#define MPI_SCSI_DEVICE_TM_INIT_ID_MASK (0x00FF0000)
335#define MPI_SCSI_DEVICE_TM_INIT_ID_SHIFT (16)
238 336
239#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000) 337#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
240#define MPI_FC_PORT_PGAD_PORT_SHIFT (28) 338#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
@@ -260,6 +358,20 @@ typedef struct _CONFIG_EXTENDED_PAGE_HEADER
260#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) 358#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
261#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0) 359#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
262 360
361#define MPI_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000)
362#define MPI_SAS_EXPAND_PGAD_FORM_SHIFT (28)
363#define MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
364#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM (0x00000001)
365#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE (0x00000002)
366#define MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE (0x0000FFFF)
367#define MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE (0)
368#define MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY (0x00FF0000)
369#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY (16)
370#define MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE (0x0000FFFF)
371#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE (0)
372#define MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE (0x0000FFFF)
373#define MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE (0)
374
263#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000) 375#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
264#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28) 376#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28)
265#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 377#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
@@ -274,10 +386,24 @@ typedef struct _CONFIG_EXTENDED_PAGE_HEADER
274#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF) 386#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF)
275#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0) 387#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0)
276 388
277#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x00FF0000) 389#define MPI_SAS_PHY_PGAD_FORM_MASK (0xF0000000)
278#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (16) 390#define MPI_SAS_PHY_PGAD_FORM_SHIFT (28)
279#define MPI_SAS_PHY_PGAD_DEVHANDLE_MASK (0x0000FFFF) 391#define MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x0)
280#define MPI_SAS_PHY_PGAD_DEVHANDLE_SHIFT (0) 392#define MPI_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x1)
393#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF)
394#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (0)
395#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF)
396#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_SHIFT (0)
397
398#define MPI_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000)
399#define MPI_SAS_ENCLOS_PGAD_FORM_SHIFT (28)
400#define MPI_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
401#define MPI_SAS_ENCLOS_PGAD_FORM_HANDLE (0x00000001)
402#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
403#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_SHIFT (0)
404#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_MASK (0x0000FFFF)
405#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_SHIFT (0)
406
281 407
282 408
283/**************************************************************************** 409/****************************************************************************
@@ -294,7 +420,7 @@ typedef struct _MSG_CONFIG
294 U8 MsgFlags; /* 07h */ 420 U8 MsgFlags; /* 07h */
295 U32 MsgContext; /* 08h */ 421 U32 MsgContext; /* 08h */
296 U8 Reserved2[8]; /* 0Ch */ 422 U8 Reserved2[8]; /* 0Ch */
297 fCONFIG_PAGE_HEADER Header; /* 14h */ 423 CONFIG_PAGE_HEADER Header; /* 14h */
298 U32 PageAddress; /* 18h */ 424 U32 PageAddress; /* 18h */
299 SGE_IO_UNION PageBufferSGE; /* 1Ch */ 425 SGE_IO_UNION PageBufferSGE; /* 1Ch */
300} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG, 426} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
@@ -327,7 +453,7 @@ typedef struct _MSG_CONFIG_REPLY
327 U8 Reserved2[2]; /* 0Ch */ 453 U8 Reserved2[2]; /* 0Ch */
328 U16 IOCStatus; /* 0Eh */ 454 U16 IOCStatus; /* 0Eh */
329 U32 IOCLogInfo; /* 10h */ 455 U32 IOCLogInfo; /* 10h */
330 fCONFIG_PAGE_HEADER Header; /* 14h */ 456 CONFIG_PAGE_HEADER Header; /* 14h */
331} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY, 457} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
332 ConfigReply_t, MPI_POINTER pConfigReply_t; 458 ConfigReply_t, MPI_POINTER pConfigReply_t;
333 459
@@ -349,6 +475,8 @@ typedef struct _MSG_CONFIG_REPLY
349#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622) 475#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
350#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628) 476#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
351#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626) 477#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
478#define MPI_MANUFACTPAGE_DEVICEID_FC939X (0x0642)
479#define MPI_MANUFACTPAGE_DEVICEID_FC949X (0x0640)
352/* SCSI */ 480/* SCSI */
353#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030) 481#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
354#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031) 482#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
@@ -358,18 +486,25 @@ typedef struct _MSG_CONFIG_REPLY
358#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041) 486#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
359/* SAS */ 487/* SAS */
360#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050) 488#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050)
489#define MPI_MANUFACTPAGE_DEVID_SAS1064A (0x005C)
490#define MPI_MANUFACTPAGE_DEVID_SAS1064E (0x0056)
491#define MPI_MANUFACTPAGE_DEVID_SAS1066 (0x005E)
492#define MPI_MANUFACTPAGE_DEVID_SAS1066E (0x005A)
493#define MPI_MANUFACTPAGE_DEVID_SAS1068 (0x0054)
494#define MPI_MANUFACTPAGE_DEVID_SAS1068E (0x0058)
495#define MPI_MANUFACTPAGE_DEVID_SAS1078 (0x0060)
361 496
362 497
363typedef struct _CONFIG_PAGE_MANUFACTURING_0 498typedef struct _CONFIG_PAGE_MANUFACTURING_0
364{ 499{
365 fCONFIG_PAGE_HEADER Header; /* 00h */ 500 CONFIG_PAGE_HEADER Header; /* 00h */
366 U8 ChipName[16]; /* 04h */ 501 U8 ChipName[16]; /* 04h */
367 U8 ChipRevision[8]; /* 14h */ 502 U8 ChipRevision[8]; /* 14h */
368 U8 BoardName[16]; /* 1Ch */ 503 U8 BoardName[16]; /* 1Ch */
369 U8 BoardAssembly[16]; /* 2Ch */ 504 U8 BoardAssembly[16]; /* 2Ch */
370 U8 BoardTracerNumber[16]; /* 3Ch */ 505 U8 BoardTracerNumber[16]; /* 3Ch */
371 506
372} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0, 507} CONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
373 ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t; 508 ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
374 509
375#define MPI_MANUFACTURING0_PAGEVERSION (0x00) 510#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
@@ -377,9 +512,9 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_0
377 512
378typedef struct _CONFIG_PAGE_MANUFACTURING_1 513typedef struct _CONFIG_PAGE_MANUFACTURING_1
379{ 514{
380 fCONFIG_PAGE_HEADER Header; /* 00h */ 515 CONFIG_PAGE_HEADER Header; /* 00h */
381 U8 VPD[256]; /* 04h */ 516 U8 VPD[256]; /* 04h */
382} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1, 517} CONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
383 ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t; 518 ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
384 519
385#define MPI_MANUFACTURING1_PAGEVERSION (0x00) 520#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
@@ -404,10 +539,10 @@ typedef struct _MPI_CHIP_REVISION_ID
404 539
405typedef struct _CONFIG_PAGE_MANUFACTURING_2 540typedef struct _CONFIG_PAGE_MANUFACTURING_2
406{ 541{
407 fCONFIG_PAGE_HEADER Header; /* 00h */ 542 CONFIG_PAGE_HEADER Header; /* 00h */
408 MPI_CHIP_REVISION_ID ChipId; /* 04h */ 543 MPI_CHIP_REVISION_ID ChipId; /* 04h */
409 U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */ 544 U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
410} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2, 545} CONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
411 ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t; 546 ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
412 547
413#define MPI_MANUFACTURING2_PAGEVERSION (0x00) 548#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
@@ -423,10 +558,10 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_2
423 558
424typedef struct _CONFIG_PAGE_MANUFACTURING_3 559typedef struct _CONFIG_PAGE_MANUFACTURING_3
425{ 560{
426 fCONFIG_PAGE_HEADER Header; /* 00h */ 561 CONFIG_PAGE_HEADER Header; /* 00h */
427 MPI_CHIP_REVISION_ID ChipId; /* 04h */ 562 MPI_CHIP_REVISION_ID ChipId; /* 04h */
428 U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */ 563 U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
429} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3, 564} CONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
430 ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t; 565 ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
431 566
432#define MPI_MANUFACTURING3_PAGEVERSION (0x00) 567#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
@@ -434,7 +569,7 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_3
434 569
435typedef struct _CONFIG_PAGE_MANUFACTURING_4 570typedef struct _CONFIG_PAGE_MANUFACTURING_4
436{ 571{
437 fCONFIG_PAGE_HEADER Header; /* 00h */ 572 CONFIG_PAGE_HEADER Header; /* 00h */
438 U32 Reserved1; /* 04h */ 573 U32 Reserved1; /* 04h */
439 U8 InfoOffset0; /* 08h */ 574 U8 InfoOffset0; /* 08h */
440 U8 InfoSize0; /* 09h */ 575 U8 InfoSize0; /* 09h */
@@ -447,10 +582,23 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_4
447 U32 ISVolumeSettings; /* 48h */ 582 U32 ISVolumeSettings; /* 48h */
448 U32 IMEVolumeSettings; /* 4Ch */ 583 U32 IMEVolumeSettings; /* 4Ch */
449 U32 IMVolumeSettings; /* 50h */ 584 U32 IMVolumeSettings; /* 50h */
450} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4, 585 U32 Reserved3; /* 54h */
586 U32 Reserved4; /* 58h */
587 U8 ISDataScrubRate; /* 5Ch */
588 U8 ISResyncRate; /* 5Dh */
589 U16 Reserved5; /* 5Eh */
590 U8 IMEDataScrubRate; /* 60h */
591 U8 IMEResyncRate; /* 61h */
592 U16 Reserved6; /* 62h */
593 U8 IMDataScrubRate; /* 64h */
594 U8 IMResyncRate; /* 65h */
595 U16 Reserved7; /* 66h */
596 U32 Reserved8; /* 68h */
597 U32 Reserved9; /* 6Ch */
598} CONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
451 ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t; 599 ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
452 600
453#define MPI_MANUFACTURING4_PAGEVERSION (0x01) 601#define MPI_MANUFACTURING4_PAGEVERSION (0x02)
454 602
455/* defines for the Flags field */ 603/* defines for the Flags field */
456#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01) 604#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
@@ -458,19 +606,25 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_4
458 606
459typedef struct _CONFIG_PAGE_MANUFACTURING_5 607typedef struct _CONFIG_PAGE_MANUFACTURING_5
460{ 608{
461 fCONFIG_PAGE_HEADER Header; /* 00h */ 609 CONFIG_PAGE_HEADER Header; /* 00h */
462 U64 BaseWWID; /* 04h */ 610 U64 BaseWWID; /* 04h */
463} fCONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5, 611 U8 Flags; /* 0Ch */
612 U8 Reserved1; /* 0Dh */
613 U16 Reserved2; /* 0Eh */
614} CONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
464 ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t; 615 ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t;
465 616
466#define MPI_MANUFACTURING5_PAGEVERSION (0x00) 617#define MPI_MANUFACTURING5_PAGEVERSION (0x01)
618
619/* defines for the Flags field */
620#define MPI_MANPAGE5_TWO_WWID_PER_PHY (0x01)
467 621
468 622
469typedef struct _CONFIG_PAGE_MANUFACTURING_6 623typedef struct _CONFIG_PAGE_MANUFACTURING_6
470{ 624{
471 fCONFIG_PAGE_HEADER Header; /* 00h */ 625 CONFIG_PAGE_HEADER Header; /* 00h */
472 U32 ProductSpecificInfo;/* 04h */ 626 U32 ProductSpecificInfo;/* 04h */
473} fCONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6, 627} CONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
474 ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t; 628 ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t;
475 629
476#define MPI_MANUFACTURING6_PAGEVERSION (0x00) 630#define MPI_MANUFACTURING6_PAGEVERSION (0x00)
@@ -482,9 +636,9 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_6
482 636
483typedef struct _CONFIG_PAGE_IO_UNIT_0 637typedef struct _CONFIG_PAGE_IO_UNIT_0
484{ 638{
485 fCONFIG_PAGE_HEADER Header; /* 00h */ 639 CONFIG_PAGE_HEADER Header; /* 00h */
486 U64 UniqueValue; /* 04h */ 640 U64 UniqueValue; /* 04h */
487} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0, 641} CONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
488 IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t; 642 IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
489 643
490#define MPI_IOUNITPAGE0_PAGEVERSION (0x00) 644#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
@@ -492,9 +646,9 @@ typedef struct _CONFIG_PAGE_IO_UNIT_0
492 646
493typedef struct _CONFIG_PAGE_IO_UNIT_1 647typedef struct _CONFIG_PAGE_IO_UNIT_1
494{ 648{
495 fCONFIG_PAGE_HEADER Header; /* 00h */ 649 CONFIG_PAGE_HEADER Header; /* 00h */
496 U32 Flags; /* 04h */ 650 U32 Flags; /* 04h */
497} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1, 651} CONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
498 IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t; 652 IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
499 653
500#define MPI_IOUNITPAGE1_PAGEVERSION (0x01) 654#define MPI_IOUNITPAGE1_PAGEVERSION (0x01)
@@ -524,14 +678,15 @@ typedef struct _MPI_ADAPTER_INFO
524 678
525typedef struct _CONFIG_PAGE_IO_UNIT_2 679typedef struct _CONFIG_PAGE_IO_UNIT_2
526{ 680{
527 fCONFIG_PAGE_HEADER Header; /* 00h */ 681 CONFIG_PAGE_HEADER Header; /* 00h */
528 U32 Flags; /* 04h */ 682 U32 Flags; /* 04h */
529 U32 BiosVersion; /* 08h */ 683 U32 BiosVersion; /* 08h */
530 MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */ 684 MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
531} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2, 685 U32 Reserved1; /* 1Ch */
686} CONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
532 IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t; 687 IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
533 688
534#define MPI_IOUNITPAGE2_PAGEVERSION (0x00) 689#define MPI_IOUNITPAGE2_PAGEVERSION (0x02)
535 690
536#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002) 691#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
537#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004) 692#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
@@ -554,12 +709,12 @@ typedef struct _CONFIG_PAGE_IO_UNIT_2
554 709
555typedef struct _CONFIG_PAGE_IO_UNIT_3 710typedef struct _CONFIG_PAGE_IO_UNIT_3
556{ 711{
557 fCONFIG_PAGE_HEADER Header; /* 00h */ 712 CONFIG_PAGE_HEADER Header; /* 00h */
558 U8 GPIOCount; /* 04h */ 713 U8 GPIOCount; /* 04h */
559 U8 Reserved1; /* 05h */ 714 U8 Reserved1; /* 05h */
560 U16 Reserved2; /* 06h */ 715 U16 Reserved2; /* 06h */
561 U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */ 716 U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
562} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3, 717} CONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
563 IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t; 718 IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
564 719
565#define MPI_IOUNITPAGE3_PAGEVERSION (0x01) 720#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
@@ -570,13 +725,24 @@ typedef struct _CONFIG_PAGE_IO_UNIT_3
570#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01) 725#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
571 726
572 727
728typedef struct _CONFIG_PAGE_IO_UNIT_4
729{
730 CONFIG_PAGE_HEADER Header; /* 00h */
731 U32 Reserved1; /* 04h */
732 SGE_SIMPLE_UNION FWImageSGE; /* 08h */
733} CONFIG_PAGE_IO_UNIT_4, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_4,
734 IOUnitPage4_t, MPI_POINTER pIOUnitPage4_t;
735
736#define MPI_IOUNITPAGE4_PAGEVERSION (0x00)
737
738
573/**************************************************************************** 739/****************************************************************************
574* IOC Config Pages 740* IOC Config Pages
575****************************************************************************/ 741****************************************************************************/
576 742
577typedef struct _CONFIG_PAGE_IOC_0 743typedef struct _CONFIG_PAGE_IOC_0
578{ 744{
579 fCONFIG_PAGE_HEADER Header; /* 00h */ 745 CONFIG_PAGE_HEADER Header; /* 00h */
580 U32 TotalNVStore; /* 04h */ 746 U32 TotalNVStore; /* 04h */
581 U32 FreeNVStore; /* 08h */ 747 U32 FreeNVStore; /* 08h */
582 U16 VendorID; /* 0Ch */ 748 U16 VendorID; /* 0Ch */
@@ -586,7 +752,7 @@ typedef struct _CONFIG_PAGE_IOC_0
586 U32 ClassCode; /* 14h */ 752 U32 ClassCode; /* 14h */
587 U16 SubsystemVendorID; /* 18h */ 753 U16 SubsystemVendorID; /* 18h */
588 U16 SubsystemID; /* 1Ah */ 754 U16 SubsystemID; /* 1Ah */
589} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0, 755} CONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
590 IOCPage0_t, MPI_POINTER pIOCPage0_t; 756 IOCPage0_t, MPI_POINTER pIOCPage0_t;
591 757
592#define MPI_IOCPAGE0_PAGEVERSION (0x01) 758#define MPI_IOCPAGE0_PAGEVERSION (0x01)
@@ -594,23 +760,19 @@ typedef struct _CONFIG_PAGE_IOC_0
594 760
595typedef struct _CONFIG_PAGE_IOC_1 761typedef struct _CONFIG_PAGE_IOC_1
596{ 762{
597 fCONFIG_PAGE_HEADER Header; /* 00h */ 763 CONFIG_PAGE_HEADER Header; /* 00h */
598 U32 Flags; /* 04h */ 764 U32 Flags; /* 04h */
599 U32 CoalescingTimeout; /* 08h */ 765 U32 CoalescingTimeout; /* 08h */
600 U8 CoalescingDepth; /* 0Ch */ 766 U8 CoalescingDepth; /* 0Ch */
601 U8 PCISlotNum; /* 0Dh */ 767 U8 PCISlotNum; /* 0Dh */
602 U8 Reserved[2]; /* 0Eh */ 768 U8 Reserved[2]; /* 0Eh */
603} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1, 769} CONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
604 IOCPage1_t, MPI_POINTER pIOCPage1_t; 770 IOCPage1_t, MPI_POINTER pIOCPage1_t;
605 771
606#define MPI_IOCPAGE1_PAGEVERSION (0x01) 772#define MPI_IOCPAGE1_PAGEVERSION (0x02)
607 773
608/* defines for the Flags field */ 774/* defines for the Flags field */
609#define MPI_IOCPAGE1_EEDP_HOST_SUPPORTS_DIF (0x08000000) 775#define MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE (0x00000010)
610#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000)
611#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000)
612#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000)
613#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000)
614#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001) 776#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
615 777
616#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF) 778#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
@@ -625,7 +787,7 @@ typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
625 U8 VolumeType; /* 04h */ 787 U8 VolumeType; /* 04h */
626 U8 Flags; /* 05h */ 788 U8 Flags; /* 05h */
627 U16 Reserved3; /* 06h */ 789 U16 Reserved3; /* 06h */
628} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL, 790} CONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
629 ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t; 791 ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
630 792
631/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */ 793/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */
@@ -648,14 +810,14 @@ typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
648 810
649typedef struct _CONFIG_PAGE_IOC_2 811typedef struct _CONFIG_PAGE_IOC_2
650{ 812{
651 fCONFIG_PAGE_HEADER Header; /* 00h */ 813 CONFIG_PAGE_HEADER Header; /* 00h */
652 U32 CapabilitiesFlags; /* 04h */ 814 U32 CapabilitiesFlags; /* 04h */
653 U8 NumActiveVolumes; /* 08h */ 815 U8 NumActiveVolumes; /* 08h */
654 U8 MaxVolumes; /* 09h */ 816 U8 MaxVolumes; /* 09h */
655 U8 NumActivePhysDisks; /* 0Ah */ 817 U8 NumActivePhysDisks; /* 0Ah */
656 U8 MaxPhysDisks; /* 0Bh */ 818 U8 MaxPhysDisks; /* 0Bh */
657 fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */ 819 CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
658} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2, 820} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
659 IOCPage2_t, MPI_POINTER pIOCPage2_t; 821 IOCPage2_t, MPI_POINTER pIOCPage2_t;
660 822
661#define MPI_IOCPAGE2_PAGEVERSION (0x02) 823#define MPI_IOCPAGE2_PAGEVERSION (0x02)
@@ -689,12 +851,12 @@ typedef struct _IOC_3_PHYS_DISK
689 851
690typedef struct _CONFIG_PAGE_IOC_3 852typedef struct _CONFIG_PAGE_IOC_3
691{ 853{
692 fCONFIG_PAGE_HEADER Header; /* 00h */ 854 CONFIG_PAGE_HEADER Header; /* 00h */
693 U8 NumPhysDisks; /* 04h */ 855 U8 NumPhysDisks; /* 04h */
694 U8 Reserved1; /* 05h */ 856 U8 Reserved1; /* 05h */
695 U16 Reserved2; /* 06h */ 857 U16 Reserved2; /* 06h */
696 IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */ 858 IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */
697} fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3, 859} CONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
698 IOCPage3_t, MPI_POINTER pIOCPage3_t; 860 IOCPage3_t, MPI_POINTER pIOCPage3_t;
699 861
700#define MPI_IOCPAGE3_PAGEVERSION (0x00) 862#define MPI_IOCPAGE3_PAGEVERSION (0x00)
@@ -718,12 +880,12 @@ typedef struct _IOC_4_SEP
718 880
719typedef struct _CONFIG_PAGE_IOC_4 881typedef struct _CONFIG_PAGE_IOC_4
720{ 882{
721 fCONFIG_PAGE_HEADER Header; /* 00h */ 883 CONFIG_PAGE_HEADER Header; /* 00h */
722 U8 ActiveSEP; /* 04h */ 884 U8 ActiveSEP; /* 04h */
723 U8 MaxSEP; /* 05h */ 885 U8 MaxSEP; /* 05h */
724 U16 Reserved1; /* 06h */ 886 U16 Reserved1; /* 06h */
725 IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */ 887 IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */
726} fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4, 888} CONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
727 IOCPage4_t, MPI_POINTER pIOCPage4_t; 889 IOCPage4_t, MPI_POINTER pIOCPage4_t;
728 890
729#define MPI_IOCPAGE4_PAGEVERSION (0x00) 891#define MPI_IOCPAGE4_PAGEVERSION (0x00)
@@ -751,25 +913,25 @@ typedef struct _IOC_5_HOT_SPARE
751 913
752typedef struct _CONFIG_PAGE_IOC_5 914typedef struct _CONFIG_PAGE_IOC_5
753{ 915{
754 fCONFIG_PAGE_HEADER Header; /* 00h */ 916 CONFIG_PAGE_HEADER Header; /* 00h */
755 U32 Reserved1; /* 04h */ 917 U32 Reserved1; /* 04h */
756 U8 NumHotSpares; /* 08h */ 918 U8 NumHotSpares; /* 08h */
757 U8 Reserved2; /* 09h */ 919 U8 Reserved2; /* 09h */
758 U16 Reserved3; /* 0Ah */ 920 U16 Reserved3; /* 0Ah */
759 IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */ 921 IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */
760} fCONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5, 922} CONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5,
761 IOCPage5_t, MPI_POINTER pIOCPage5_t; 923 IOCPage5_t, MPI_POINTER pIOCPage5_t;
762 924
763#define MPI_IOCPAGE5_PAGEVERSION (0x00) 925#define MPI_IOCPAGE5_PAGEVERSION (0x00)
764 926
765 927
766/**************************************************************************** 928/****************************************************************************
767* BIOS Port Config Pages 929* BIOS Config Pages
768****************************************************************************/ 930****************************************************************************/
769 931
770typedef struct _CONFIG_PAGE_BIOS_1 932typedef struct _CONFIG_PAGE_BIOS_1
771{ 933{
772 fCONFIG_PAGE_HEADER Header; /* 00h */ 934 CONFIG_PAGE_HEADER Header; /* 00h */
773 U32 BiosOptions; /* 04h */ 935 U32 BiosOptions; /* 04h */
774 U32 IOCSettings; /* 08h */ 936 U32 IOCSettings; /* 08h */
775 U32 Reserved1; /* 0Ch */ 937 U32 Reserved1; /* 0Ch */
@@ -780,10 +942,10 @@ typedef struct _CONFIG_PAGE_BIOS_1
780 U16 IOTimeoutSequential; /* 1Ah */ 942 U16 IOTimeoutSequential; /* 1Ah */
781 U16 IOTimeoutOther; /* 1Ch */ 943 U16 IOTimeoutOther; /* 1Ch */
782 U16 IOTimeoutBlockDevicesRM; /* 1Eh */ 944 U16 IOTimeoutBlockDevicesRM; /* 1Eh */
783} fCONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1, 945} CONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1,
784 BIOSPage1_t, MPI_POINTER pBIOSPage1_t; 946 BIOSPage1_t, MPI_POINTER pBIOSPage1_t;
785 947
786#define MPI_BIOSPAGE1_PAGEVERSION (0x00) 948#define MPI_BIOSPAGE1_PAGEVERSION (0x01)
787 949
788/* values for the BiosOptions field */ 950/* values for the BiosOptions field */
789#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400) 951#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)
@@ -792,6 +954,13 @@ typedef struct _CONFIG_PAGE_BIOS_1
792#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001) 954#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
793 955
794/* values for the IOCSettings field */ 956/* values for the IOCSettings field */
957#define MPI_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)
958#define MPI_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000)
959#define MPI_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000)
960
961#define MPI_BIOSPAGE1_IOCSET_MASK_MAX_TARGET_SPIN_UP (0x0000F000)
962#define MPI_BIOSPAGE1_IOCSET_SHIFT_MAX_TARGET_SPIN_UP (12)
963
795#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00) 964#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00)
796#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8) 965#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8)
797 966
@@ -814,6 +983,191 @@ typedef struct _CONFIG_PAGE_BIOS_1
814#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002) 983#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)
815#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001) 984#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)
816 985
986typedef struct _MPI_BOOT_DEVICE_ADAPTER_ORDER
987{
988 U32 Reserved1; /* 00h */
989 U32 Reserved2; /* 04h */
990 U32 Reserved3; /* 08h */
991 U32 Reserved4; /* 0Ch */
992 U32 Reserved5; /* 10h */
993 U32 Reserved6; /* 14h */
994 U32 Reserved7; /* 18h */
995 U32 Reserved8; /* 1Ch */
996 U32 Reserved9; /* 20h */
997 U32 Reserved10; /* 24h */
998 U32 Reserved11; /* 28h */
999 U32 Reserved12; /* 2Ch */
1000 U32 Reserved13; /* 30h */
1001 U32 Reserved14; /* 34h */
1002 U32 Reserved15; /* 38h */
1003 U32 Reserved16; /* 3Ch */
1004 U32 Reserved17; /* 40h */
1005} MPI_BOOT_DEVICE_ADAPTER_ORDER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_ORDER;
1006
1007typedef struct _MPI_BOOT_DEVICE_ADAPTER_NUMBER
1008{
1009 U8 TargetID; /* 00h */
1010 U8 Bus; /* 01h */
1011 U8 AdapterNumber; /* 02h */
1012 U8 Reserved1; /* 03h */
1013 U32 Reserved2; /* 04h */
1014 U32 Reserved3; /* 08h */
1015 U32 Reserved4; /* 0Ch */
1016 U8 LUN[8]; /* 10h */
1017 U32 Reserved5; /* 18h */
1018 U32 Reserved6; /* 1Ch */
1019 U32 Reserved7; /* 20h */
1020 U32 Reserved8; /* 24h */
1021 U32 Reserved9; /* 28h */
1022 U32 Reserved10; /* 2Ch */
1023 U32 Reserved11; /* 30h */
1024 U32 Reserved12; /* 34h */
1025 U32 Reserved13; /* 38h */
1026 U32 Reserved14; /* 3Ch */
1027 U32 Reserved15; /* 40h */
1028} MPI_BOOT_DEVICE_ADAPTER_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_NUMBER;
1029
1030typedef struct _MPI_BOOT_DEVICE_PCI_ADDRESS
1031{
1032 U8 TargetID; /* 00h */
1033 U8 Bus; /* 01h */
1034 U16 PCIAddress; /* 02h */
1035 U32 Reserved1; /* 04h */
1036 U32 Reserved2; /* 08h */
1037 U32 Reserved3; /* 0Ch */
1038 U8 LUN[8]; /* 10h */
1039 U32 Reserved4; /* 18h */
1040 U32 Reserved5; /* 1Ch */
1041 U32 Reserved6; /* 20h */
1042 U32 Reserved7; /* 24h */
1043 U32 Reserved8; /* 28h */
1044 U32 Reserved9; /* 2Ch */
1045 U32 Reserved10; /* 30h */
1046 U32 Reserved11; /* 34h */
1047 U32 Reserved12; /* 38h */
1048 U32 Reserved13; /* 3Ch */
1049 U32 Reserved14; /* 40h */
1050} MPI_BOOT_DEVICE_PCI_ADDRESS, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_ADDRESS;
1051
1052typedef struct _MPI_BOOT_DEVICE_SLOT_NUMBER
1053{
1054 U8 TargetID; /* 00h */
1055 U8 Bus; /* 01h */
1056 U8 PCISlotNumber; /* 02h */
1057 U8 Reserved1; /* 03h */
1058 U32 Reserved2; /* 04h */
1059 U32 Reserved3; /* 08h */
1060 U32 Reserved4; /* 0Ch */
1061 U8 LUN[8]; /* 10h */
1062 U32 Reserved5; /* 18h */
1063 U32 Reserved6; /* 1Ch */
1064 U32 Reserved7; /* 20h */
1065 U32 Reserved8; /* 24h */
1066 U32 Reserved9; /* 28h */
1067 U32 Reserved10; /* 2Ch */
1068 U32 Reserved11; /* 30h */
1069 U32 Reserved12; /* 34h */
1070 U32 Reserved13; /* 38h */
1071 U32 Reserved14; /* 3Ch */
1072 U32 Reserved15; /* 40h */
1073} MPI_BOOT_DEVICE_PCI_SLOT_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_SLOT_NUMBER;
1074
1075typedef struct _MPI_BOOT_DEVICE_FC_WWN
1076{
1077 U64 WWPN; /* 00h */
1078 U32 Reserved1; /* 08h */
1079 U32 Reserved2; /* 0Ch */
1080 U8 LUN[8]; /* 10h */
1081 U32 Reserved3; /* 18h */
1082 U32 Reserved4; /* 1Ch */
1083 U32 Reserved5; /* 20h */
1084 U32 Reserved6; /* 24h */
1085 U32 Reserved7; /* 28h */
1086 U32 Reserved8; /* 2Ch */
1087 U32 Reserved9; /* 30h */
1088 U32 Reserved10; /* 34h */
1089 U32 Reserved11; /* 38h */
1090 U32 Reserved12; /* 3Ch */
1091 U32 Reserved13; /* 40h */
1092} MPI_BOOT_DEVICE_FC_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_FC_WWN;
1093
1094typedef struct _MPI_BOOT_DEVICE_SAS_WWN
1095{
1096 U64 SASAddress; /* 00h */
1097 U32 Reserved1; /* 08h */
1098 U32 Reserved2; /* 0Ch */
1099 U8 LUN[8]; /* 10h */
1100 U32 Reserved3; /* 18h */
1101 U32 Reserved4; /* 1Ch */
1102 U32 Reserved5; /* 20h */
1103 U32 Reserved6; /* 24h */
1104 U32 Reserved7; /* 28h */
1105 U32 Reserved8; /* 2Ch */
1106 U32 Reserved9; /* 30h */
1107 U32 Reserved10; /* 34h */
1108 U32 Reserved11; /* 38h */
1109 U32 Reserved12; /* 3Ch */
1110 U32 Reserved13; /* 40h */
1111} MPI_BOOT_DEVICE_SAS_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_SAS_WWN;
1112
1113typedef struct _MPI_BOOT_DEVICE_ENCLOSURE_SLOT
1114{
1115 U64 EnclosureLogicalID; /* 00h */
1116 U32 Reserved1; /* 08h */
1117 U32 Reserved2; /* 0Ch */
1118 U8 LUN[8]; /* 10h */
1119 U16 SlotNumber; /* 18h */
1120 U16 Reserved3; /* 1Ah */
1121 U32 Reserved4; /* 1Ch */
1122 U32 Reserved5; /* 20h */
1123 U32 Reserved6; /* 24h */
1124 U32 Reserved7; /* 28h */
1125 U32 Reserved8; /* 2Ch */
1126 U32 Reserved9; /* 30h */
1127 U32 Reserved10; /* 34h */
1128 U32 Reserved11; /* 38h */
1129 U32 Reserved12; /* 3Ch */
1130 U32 Reserved13; /* 40h */
1131} MPI_BOOT_DEVICE_ENCLOSURE_SLOT,
1132 MPI_POINTER PTR_MPI_BOOT_DEVICE_ENCLOSURE_SLOT;
1133
1134typedef union _MPI_BIOSPAGE2_BOOT_DEVICE
1135{
1136 MPI_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder;
1137 MPI_BOOT_DEVICE_ADAPTER_NUMBER AdapterNumber;
1138 MPI_BOOT_DEVICE_PCI_ADDRESS PCIAddress;
1139 MPI_BOOT_DEVICE_PCI_SLOT_NUMBER PCISlotNumber;
1140 MPI_BOOT_DEVICE_FC_WWN FcWwn;
1141 MPI_BOOT_DEVICE_SAS_WWN SasWwn;
1142 MPI_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot;
1143} MPI_BIOSPAGE2_BOOT_DEVICE, MPI_POINTER PTR_MPI_BIOSPAGE2_BOOT_DEVICE;
1144
1145typedef struct _CONFIG_PAGE_BIOS_2
1146{
1147 CONFIG_PAGE_HEADER Header; /* 00h */
1148 U32 Reserved1; /* 04h */
1149 U32 Reserved2; /* 08h */
1150 U32 Reserved3; /* 0Ch */
1151 U32 Reserved4; /* 10h */
1152 U32 Reserved5; /* 14h */
1153 U32 Reserved6; /* 18h */
1154 U8 BootDeviceForm; /* 1Ch */
1155 U8 Reserved7; /* 1Dh */
1156 U16 Reserved8; /* 1Eh */
1157 MPI_BIOSPAGE2_BOOT_DEVICE BootDevice; /* 20h */
1158} CONFIG_PAGE_BIOS_2, MPI_POINTER PTR_CONFIG_PAGE_BIOS_2,
1159 BIOSPage2_t, MPI_POINTER pBIOSPage2_t;
1160
1161#define MPI_BIOSPAGE2_PAGEVERSION (0x01)
1162
1163#define MPI_BIOSPAGE2_FORM_MASK (0x0F)
1164#define MPI_BIOSPAGE2_FORM_ADAPTER_ORDER (0x00)
1165#define MPI_BIOSPAGE2_FORM_ADAPTER_NUMBER (0x01)
1166#define MPI_BIOSPAGE2_FORM_PCI_ADDRESS (0x02)
1167#define MPI_BIOSPAGE2_FORM_PCI_SLOT_NUMBER (0x03)
1168#define MPI_BIOSPAGE2_FORM_FC_WWN (0x04)
1169#define MPI_BIOSPAGE2_FORM_SAS_WWN (0x05)
1170
817 1171
818/**************************************************************************** 1172/****************************************************************************
819* SCSI Port Config Pages 1173* SCSI Port Config Pages
@@ -821,13 +1175,13 @@ typedef struct _CONFIG_PAGE_BIOS_1
821 1175
822typedef struct _CONFIG_PAGE_SCSI_PORT_0 1176typedef struct _CONFIG_PAGE_SCSI_PORT_0
823{ 1177{
824 fCONFIG_PAGE_HEADER Header; /* 00h */ 1178 CONFIG_PAGE_HEADER Header; /* 00h */
825 U32 Capabilities; /* 04h */ 1179 U32 Capabilities; /* 04h */
826 U32 PhysicalInterface; /* 08h */ 1180 U32 PhysicalInterface; /* 08h */
827} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0, 1181} CONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
828 SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t; 1182 SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
829 1183
830#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01) 1184#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x02)
831 1185
832#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001) 1186#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)
833#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002) 1187#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)
@@ -854,6 +1208,7 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_0
854 ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MAX_SYNC_OFFSET) \ 1208 ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MAX_SYNC_OFFSET) \
855 >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET \ 1209 >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET \
856 ) 1210 )
1211#define MPI_SCSIPORTPAGE0_CAP_IDP (0x08000000)
857#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000) 1212#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)
858#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000) 1213#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)
859 1214
@@ -869,13 +1224,13 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_0
869 1224
870typedef struct _CONFIG_PAGE_SCSI_PORT_1 1225typedef struct _CONFIG_PAGE_SCSI_PORT_1
871{ 1226{
872 fCONFIG_PAGE_HEADER Header; /* 00h */ 1227 CONFIG_PAGE_HEADER Header; /* 00h */
873 U32 Configuration; /* 04h */ 1228 U32 Configuration; /* 04h */
874 U32 OnBusTimerValue; /* 08h */ 1229 U32 OnBusTimerValue; /* 08h */
875 U8 TargetConfig; /* 0Ch */ 1230 U8 TargetConfig; /* 0Ch */
876 U8 Reserved1; /* 0Dh */ 1231 U8 Reserved1; /* 0Dh */
877 U16 IDConfig; /* 0Eh */ 1232 U16 IDConfig; /* 0Eh */
878} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1, 1233} CONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
879 SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t; 1234 SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
880 1235
881#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x03) 1236#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x03)
@@ -900,11 +1255,11 @@ typedef struct _MPI_DEVICE_INFO
900 1255
901typedef struct _CONFIG_PAGE_SCSI_PORT_2 1256typedef struct _CONFIG_PAGE_SCSI_PORT_2
902{ 1257{
903 fCONFIG_PAGE_HEADER Header; /* 00h */ 1258 CONFIG_PAGE_HEADER Header; /* 00h */
904 U32 PortFlags; /* 04h */ 1259 U32 PortFlags; /* 04h */
905 U32 PortSettings; /* 08h */ 1260 U32 PortSettings; /* 08h */
906 MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */ 1261 MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
907} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2, 1262} CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
908 SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t; 1263 SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
909 1264
910#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02) 1265#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02)
@@ -953,13 +1308,13 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_2
953 1308
954typedef struct _CONFIG_PAGE_SCSI_DEVICE_0 1309typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
955{ 1310{
956 fCONFIG_PAGE_HEADER Header; /* 00h */ 1311 CONFIG_PAGE_HEADER Header; /* 00h */
957 U32 NegotiatedParameters; /* 04h */ 1312 U32 NegotiatedParameters; /* 04h */
958 U32 Information; /* 08h */ 1313 U32 Information; /* 08h */
959} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0, 1314} CONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
960 SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t; 1315 SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
961 1316
962#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x03) 1317#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x04)
963 1318
964#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001) 1319#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001)
965#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002) 1320#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002)
@@ -973,6 +1328,7 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
973#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD (8) 1328#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD (8)
974#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000) 1329#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000)
975#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_OFFSET (16) 1330#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_OFFSET (16)
1331#define MPI_SCSIDEVPAGE0_NP_IDP (0x08000000)
976#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000) 1332#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000)
977#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000) 1333#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000)
978 1334
@@ -984,14 +1340,14 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
984 1340
985typedef struct _CONFIG_PAGE_SCSI_DEVICE_1 1341typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
986{ 1342{
987 fCONFIG_PAGE_HEADER Header; /* 00h */ 1343 CONFIG_PAGE_HEADER Header; /* 00h */
988 U32 RequestedParameters; /* 04h */ 1344 U32 RequestedParameters; /* 04h */
989 U32 Reserved; /* 08h */ 1345 U32 Reserved; /* 08h */
990 U32 Configuration; /* 0Ch */ 1346 U32 Configuration; /* 0Ch */
991} fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1, 1347} CONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
992 SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t; 1348 SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
993 1349
994#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x04) 1350#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x05)
995 1351
996#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001) 1352#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
997#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002) 1353#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
@@ -1005,6 +1361,7 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
1005#define MPI_SCSIDEVPAGE1_RP_SHIFT_MIN_SYNC_PERIOD (8) 1361#define MPI_SCSIDEVPAGE1_RP_SHIFT_MIN_SYNC_PERIOD (8)
1006#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000) 1362#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
1007#define MPI_SCSIDEVPAGE1_RP_SHIFT_MAX_SYNC_OFFSET (16) 1363#define MPI_SCSIDEVPAGE1_RP_SHIFT_MAX_SYNC_OFFSET (16)
1364#define MPI_SCSIDEVPAGE1_RP_IDP (0x08000000)
1008#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000) 1365#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000)
1009#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000) 1366#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000)
1010 1367
@@ -1016,11 +1373,11 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
1016 1373
1017typedef struct _CONFIG_PAGE_SCSI_DEVICE_2 1374typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
1018{ 1375{
1019 fCONFIG_PAGE_HEADER Header; /* 00h */ 1376 CONFIG_PAGE_HEADER Header; /* 00h */
1020 U32 DomainValidation; /* 04h */ 1377 U32 DomainValidation; /* 04h */
1021 U32 ParityPipeSelect; /* 08h */ 1378 U32 ParityPipeSelect; /* 08h */
1022 U32 DataPipeSelect; /* 0Ch */ 1379 U32 DataPipeSelect; /* 0Ch */
1023} fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2, 1380} CONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
1024 SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t; 1381 SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
1025 1382
1026#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x01) 1383#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x01)
@@ -1057,12 +1414,12 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
1057 1414
1058typedef struct _CONFIG_PAGE_SCSI_DEVICE_3 1415typedef struct _CONFIG_PAGE_SCSI_DEVICE_3
1059{ 1416{
1060 fCONFIG_PAGE_HEADER Header; /* 00h */ 1417 CONFIG_PAGE_HEADER Header; /* 00h */
1061 U16 MsgRejectCount; /* 04h */ 1418 U16 MsgRejectCount; /* 04h */
1062 U16 PhaseErrorCount; /* 06h */ 1419 U16 PhaseErrorCount; /* 06h */
1063 U16 ParityErrorCount; /* 08h */ 1420 U16 ParityErrorCount; /* 08h */
1064 U16 Reserved; /* 0Ah */ 1421 U16 Reserved; /* 0Ah */
1065} fCONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3, 1422} CONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3,
1066 SCSIDevicePage3_t, MPI_POINTER pSCSIDevicePage3_t; 1423 SCSIDevicePage3_t, MPI_POINTER pSCSIDevicePage3_t;
1067 1424
1068#define MPI_SCSIDEVPAGE3_PAGEVERSION (0x00) 1425#define MPI_SCSIDEVPAGE3_PAGEVERSION (0x00)
@@ -1077,7 +1434,7 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_3
1077 1434
1078typedef struct _CONFIG_PAGE_FC_PORT_0 1435typedef struct _CONFIG_PAGE_FC_PORT_0
1079{ 1436{
1080 fCONFIG_PAGE_HEADER Header; /* 00h */ 1437 CONFIG_PAGE_HEADER Header; /* 00h */
1081 U32 Flags; /* 04h */ 1438 U32 Flags; /* 04h */
1082 U8 MPIPortNumber; /* 08h */ 1439 U8 MPIPortNumber; /* 08h */
1083 U8 LinkType; /* 09h */ 1440 U8 LinkType; /* 09h */
@@ -1098,7 +1455,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_0
1098 U8 MaxHardAliasesSupported; /* 49h */ 1455 U8 MaxHardAliasesSupported; /* 49h */
1099 U8 NumCurrentAliases; /* 4Ah */ 1456 U8 NumCurrentAliases; /* 4Ah */
1100 U8 Reserved1; /* 4Bh */ 1457 U8 Reserved1; /* 4Bh */
1101} fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0, 1458} CONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
1102 FCPortPage0_t, MPI_POINTER pFCPortPage0_t; 1459 FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
1103 1460
1104#define MPI_FCPORTPAGE0_PAGEVERSION (0x02) 1461#define MPI_FCPORTPAGE0_PAGEVERSION (0x02)
@@ -1164,10 +1521,9 @@ typedef struct _CONFIG_PAGE_FC_PORT_0
1164#define MPI_FCPORTPAGE0_CURRENT_SPEED_NOT_NEGOTIATED (0x00008000) /* (SNIA)HBA_PORTSPEED_NOT_NEGOTIATED (1<<15) Speed not established */ 1521#define MPI_FCPORTPAGE0_CURRENT_SPEED_NOT_NEGOTIATED (0x00008000) /* (SNIA)HBA_PORTSPEED_NOT_NEGOTIATED (1<<15) Speed not established */
1165 1522
1166 1523
1167
1168typedef struct _CONFIG_PAGE_FC_PORT_1 1524typedef struct _CONFIG_PAGE_FC_PORT_1
1169{ 1525{
1170 fCONFIG_PAGE_HEADER Header; /* 00h */ 1526 CONFIG_PAGE_HEADER Header; /* 00h */
1171 U32 Flags; /* 04h */ 1527 U32 Flags; /* 04h */
1172 U64 NoSEEPROMWWNN; /* 08h */ 1528 U64 NoSEEPROMWWNN; /* 08h */
1173 U64 NoSEEPROMWWPN; /* 10h */ 1529 U64 NoSEEPROMWWPN; /* 10h */
@@ -1179,7 +1535,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_1
1179 U8 RR_TOV; /* 1Dh */ 1535 U8 RR_TOV; /* 1Dh */
1180 U8 InitiatorDeviceTimeout; /* 1Eh */ 1536 U8 InitiatorDeviceTimeout; /* 1Eh */
1181 U8 InitiatorIoPendTimeout; /* 1Fh */ 1537 U8 InitiatorIoPendTimeout; /* 1Fh */
1182} fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1, 1538} CONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
1183 FCPortPage1_t, MPI_POINTER pFCPortPage1_t; 1539 FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
1184 1540
1185#define MPI_FCPORTPAGE1_PAGEVERSION (0x06) 1541#define MPI_FCPORTPAGE1_PAGEVERSION (0x06)
@@ -1191,6 +1547,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_1
1191#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000) 1547#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
1192#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000) 1548#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000)
1193#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000) 1549#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000)
1550#define MPI_FCPORTPAGE1_FLAGS_TARGET_LARGE_CDB_ENABLE (0x00000080)
1194#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070) 1551#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
1195#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008) 1552#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008)
1196#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004) 1553#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004)
@@ -1227,14 +1584,15 @@ typedef struct _CONFIG_PAGE_FC_PORT_1
1227#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00) 1584#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00)
1228 1585
1229#define MPI_FCPORTPAGE1_INITIATOR_DEV_TIMEOUT_MASK (0x7F) 1586#define MPI_FCPORTPAGE1_INITIATOR_DEV_TIMEOUT_MASK (0x7F)
1587#define MPI_FCPORTPAGE1_INITIATOR_DEV_UNIT_16 (0x80)
1230 1588
1231 1589
1232typedef struct _CONFIG_PAGE_FC_PORT_2 1590typedef struct _CONFIG_PAGE_FC_PORT_2
1233{ 1591{
1234 fCONFIG_PAGE_HEADER Header; /* 00h */ 1592 CONFIG_PAGE_HEADER Header; /* 00h */
1235 U8 NumberActive; /* 04h */ 1593 U8 NumberActive; /* 04h */
1236 U8 ALPA[127]; /* 05h */ 1594 U8 ALPA[127]; /* 05h */
1237} fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2, 1595} CONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
1238 FCPortPage2_t, MPI_POINTER pFCPortPage2_t; 1596 FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
1239 1597
1240#define MPI_FCPORTPAGE2_PAGEVERSION (0x01) 1598#define MPI_FCPORTPAGE2_PAGEVERSION (0x01)
@@ -1280,9 +1638,9 @@ typedef struct _FC_PORT_PERSISTENT
1280 1638
1281typedef struct _CONFIG_PAGE_FC_PORT_3 1639typedef struct _CONFIG_PAGE_FC_PORT_3
1282{ 1640{
1283 fCONFIG_PAGE_HEADER Header; /* 00h */ 1641 CONFIG_PAGE_HEADER Header; /* 00h */
1284 FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */ 1642 FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */
1285} fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3, 1643} CONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
1286 FCPortPage3_t, MPI_POINTER pFCPortPage3_t; 1644 FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
1287 1645
1288#define MPI_FCPORTPAGE3_PAGEVERSION (0x01) 1646#define MPI_FCPORTPAGE3_PAGEVERSION (0x01)
@@ -1290,10 +1648,10 @@ typedef struct _CONFIG_PAGE_FC_PORT_3
1290 1648
1291typedef struct _CONFIG_PAGE_FC_PORT_4 1649typedef struct _CONFIG_PAGE_FC_PORT_4
1292{ 1650{
1293 fCONFIG_PAGE_HEADER Header; /* 00h */ 1651 CONFIG_PAGE_HEADER Header; /* 00h */
1294 U32 PortFlags; /* 04h */ 1652 U32 PortFlags; /* 04h */
1295 U32 PortSettings; /* 08h */ 1653 U32 PortSettings; /* 08h */
1296} fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4, 1654} CONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
1297 FCPortPage4_t, MPI_POINTER pFCPortPage4_t; 1655 FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
1298 1656
1299#define MPI_FCPORTPAGE4_PAGEVERSION (0x00) 1657#define MPI_FCPORTPAGE4_PAGEVERSION (0x00)
@@ -1316,15 +1674,15 @@ typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
1316 U16 Reserved; /* 02h */ 1674 U16 Reserved; /* 02h */
1317 U64 AliasWWNN; /* 04h */ 1675 U64 AliasWWNN; /* 04h */
1318 U64 AliasWWPN; /* 0Ch */ 1676 U64 AliasWWPN; /* 0Ch */
1319} fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO, 1677} CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
1320 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO, 1678 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
1321 FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t; 1679 FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
1322 1680
1323typedef struct _CONFIG_PAGE_FC_PORT_5 1681typedef struct _CONFIG_PAGE_FC_PORT_5
1324{ 1682{
1325 fCONFIG_PAGE_HEADER Header; /* 00h */ 1683 CONFIG_PAGE_HEADER Header; /* 00h */
1326 fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */ 1684 CONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */
1327} fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5, 1685} CONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
1328 FCPortPage5_t, MPI_POINTER pFCPortPage5_t; 1686 FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
1329 1687
1330#define MPI_FCPORTPAGE5_PAGEVERSION (0x02) 1688#define MPI_FCPORTPAGE5_PAGEVERSION (0x02)
@@ -1337,7 +1695,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_5
1337 1695
1338typedef struct _CONFIG_PAGE_FC_PORT_6 1696typedef struct _CONFIG_PAGE_FC_PORT_6
1339{ 1697{
1340 fCONFIG_PAGE_HEADER Header; /* 00h */ 1698 CONFIG_PAGE_HEADER Header; /* 00h */
1341 U32 Reserved; /* 04h */ 1699 U32 Reserved; /* 04h */
1342 U64 TimeSinceReset; /* 08h */ 1700 U64 TimeSinceReset; /* 08h */
1343 U64 TxFrames; /* 10h */ 1701 U64 TxFrames; /* 10h */
@@ -1355,7 +1713,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_6
1355 U64 InvalidTxWordCount; /* 70h */ 1713 U64 InvalidTxWordCount; /* 70h */
1356 U64 InvalidCrcCount; /* 78h */ 1714 U64 InvalidCrcCount; /* 78h */
1357 U64 FcpInitiatorIoCount; /* 80h */ 1715 U64 FcpInitiatorIoCount; /* 80h */
1358} fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6, 1716} CONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
1359 FCPortPage6_t, MPI_POINTER pFCPortPage6_t; 1717 FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
1360 1718
1361#define MPI_FCPORTPAGE6_PAGEVERSION (0x00) 1719#define MPI_FCPORTPAGE6_PAGEVERSION (0x00)
@@ -1363,10 +1721,10 @@ typedef struct _CONFIG_PAGE_FC_PORT_6
1363 1721
1364typedef struct _CONFIG_PAGE_FC_PORT_7 1722typedef struct _CONFIG_PAGE_FC_PORT_7
1365{ 1723{
1366 fCONFIG_PAGE_HEADER Header; /* 00h */ 1724 CONFIG_PAGE_HEADER Header; /* 00h */
1367 U32 Reserved; /* 04h */ 1725 U32 Reserved; /* 04h */
1368 U8 PortSymbolicName[256]; /* 08h */ 1726 U8 PortSymbolicName[256]; /* 08h */
1369} fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7, 1727} CONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
1370 FCPortPage7_t, MPI_POINTER pFCPortPage7_t; 1728 FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
1371 1729
1372#define MPI_FCPORTPAGE7_PAGEVERSION (0x00) 1730#define MPI_FCPORTPAGE7_PAGEVERSION (0x00)
@@ -1374,9 +1732,9 @@ typedef struct _CONFIG_PAGE_FC_PORT_7
1374 1732
1375typedef struct _CONFIG_PAGE_FC_PORT_8 1733typedef struct _CONFIG_PAGE_FC_PORT_8
1376{ 1734{
1377 fCONFIG_PAGE_HEADER Header; /* 00h */ 1735 CONFIG_PAGE_HEADER Header; /* 00h */
1378 U32 BitVector[8]; /* 04h */ 1736 U32 BitVector[8]; /* 04h */
1379} fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8, 1737} CONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
1380 FCPortPage8_t, MPI_POINTER pFCPortPage8_t; 1738 FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
1381 1739
1382#define MPI_FCPORTPAGE8_PAGEVERSION (0x00) 1740#define MPI_FCPORTPAGE8_PAGEVERSION (0x00)
@@ -1384,7 +1742,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_8
1384 1742
1385typedef struct _CONFIG_PAGE_FC_PORT_9 1743typedef struct _CONFIG_PAGE_FC_PORT_9
1386{ 1744{
1387 fCONFIG_PAGE_HEADER Header; /* 00h */ 1745 CONFIG_PAGE_HEADER Header; /* 00h */
1388 U32 Reserved; /* 04h */ 1746 U32 Reserved; /* 04h */
1389 U64 GlobalWWPN; /* 08h */ 1747 U64 GlobalWWPN; /* 08h */
1390 U64 GlobalWWNN; /* 10h */ 1748 U64 GlobalWWNN; /* 10h */
@@ -1396,7 +1754,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_9
1396 U8 IPAddress[16]; /* 28h */ 1754 U8 IPAddress[16]; /* 28h */
1397 U16 Reserved1; /* 38h */ 1755 U16 Reserved1; /* 38h */
1398 U16 TopologyDiscoveryFlags; /* 3Ah */ 1756 U16 TopologyDiscoveryFlags; /* 3Ah */
1399} fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9, 1757} CONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
1400 FCPortPage9_t, MPI_POINTER pFCPortPage9_t; 1758 FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
1401 1759
1402#define MPI_FCPORTPAGE9_PAGEVERSION (0x00) 1760#define MPI_FCPORTPAGE9_PAGEVERSION (0x00)
@@ -1422,10 +1780,10 @@ typedef struct _CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA
1422 U8 VendorOUI[3]; /* 35h */ 1780 U8 VendorOUI[3]; /* 35h */
1423 U8 VendorPN[16]; /* 38h */ 1781 U8 VendorPN[16]; /* 38h */
1424 U8 VendorRev[4]; /* 48h */ 1782 U8 VendorRev[4]; /* 48h */
1425 U16 Reserved4; /* 4Ch */ 1783 U16 Wavelength; /* 4Ch */
1426 U8 Reserved5; /* 4Eh */ 1784 U8 Reserved4; /* 4Eh */
1427 U8 CC_BASE; /* 4Fh */ 1785 U8 CC_BASE; /* 4Fh */
1428} fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA, 1786} CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1429 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA, 1787 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1430 FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t; 1788 FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t;
1431 1789
@@ -1481,9 +1839,11 @@ typedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
1481 U8 BitRateMin; /* 53h */ 1839 U8 BitRateMin; /* 53h */
1482 U8 VendorSN[16]; /* 54h */ 1840 U8 VendorSN[16]; /* 54h */
1483 U8 DateCode[8]; /* 64h */ 1841 U8 DateCode[8]; /* 64h */
1484 U8 Reserved5[3]; /* 6Ch */ 1842 U8 DiagMonitoringType; /* 6Ch */
1843 U8 EnhancedOptions; /* 6Dh */
1844 U8 SFF8472Compliance; /* 6Eh */
1485 U8 CC_EXT; /* 6Fh */ 1845 U8 CC_EXT; /* 6Fh */
1486} fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA, 1846} CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1487 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA, 1847 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1488 FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t; 1848 FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t;
1489 1849
@@ -1496,19 +1856,19 @@ typedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
1496 1856
1497typedef struct _CONFIG_PAGE_FC_PORT_10 1857typedef struct _CONFIG_PAGE_FC_PORT_10
1498{ 1858{
1499 fCONFIG_PAGE_HEADER Header; /* 00h */ 1859 CONFIG_PAGE_HEADER Header; /* 00h */
1500 U8 Flags; /* 04h */ 1860 U8 Flags; /* 04h */
1501 U8 Reserved1; /* 05h */ 1861 U8 Reserved1; /* 05h */
1502 U16 Reserved2; /* 06h */ 1862 U16 Reserved2; /* 06h */
1503 U32 HwConfig1; /* 08h */ 1863 U32 HwConfig1; /* 08h */
1504 U32 HwConfig2; /* 0Ch */ 1864 U32 HwConfig2; /* 0Ch */
1505 fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */ 1865 CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
1506 fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */ 1866 CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
1507 U8 VendorSpecific[32]; /* 70h */ 1867 U8 VendorSpecific[32]; /* 70h */
1508} fCONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10, 1868} CONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
1509 FCPortPage10_t, MPI_POINTER pFCPortPage10_t; 1869 FCPortPage10_t, MPI_POINTER pFCPortPage10_t;
1510 1870
1511#define MPI_FCPORTPAGE10_PAGEVERSION (0x00) 1871#define MPI_FCPORTPAGE10_PAGEVERSION (0x01)
1512 1872
1513/* standard MODDEF pin definitions (from GBIC spec.) */ 1873/* standard MODDEF pin definitions (from GBIC spec.) */
1514#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007) 1874#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007)
@@ -1534,7 +1894,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_10
1534 1894
1535typedef struct _CONFIG_PAGE_FC_DEVICE_0 1895typedef struct _CONFIG_PAGE_FC_DEVICE_0
1536{ 1896{
1537 fCONFIG_PAGE_HEADER Header; /* 00h */ 1897 CONFIG_PAGE_HEADER Header; /* 00h */
1538 U64 WWNN; /* 04h */ 1898 U64 WWNN; /* 04h */
1539 U64 WWPN; /* 0Ch */ 1899 U64 WWPN; /* 0Ch */
1540 U32 PortIdentifier; /* 14h */ 1900 U32 PortIdentifier; /* 14h */
@@ -1548,7 +1908,7 @@ typedef struct _CONFIG_PAGE_FC_DEVICE_0
1548 U8 FcPhHighestVersion; /* 21h */ 1908 U8 FcPhHighestVersion; /* 21h */
1549 U8 CurrentTargetID; /* 22h */ 1909 U8 CurrentTargetID; /* 22h */
1550 U8 CurrentBus; /* 23h */ 1910 U8 CurrentBus; /* 23h */
1551} fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0, 1911} CONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
1552 FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t; 1912 FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
1553 1913
1554#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03) 1914#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03)
@@ -1606,6 +1966,7 @@ typedef struct _RAID_VOL0_STATUS
1606#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00) 1966#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00)
1607#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01) 1967#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01)
1608#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02) 1968#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02)
1969#define MPI_RAIDVOL0_STATUS_STATE_MISSING (0x03)
1609 1970
1610typedef struct _RAID_VOL0_SETTINGS 1971typedef struct _RAID_VOL0_SETTINGS
1611{ 1972{
@@ -1616,11 +1977,11 @@ typedef struct _RAID_VOL0_SETTINGS
1616 RaidVol0Settings, MPI_POINTER pRaidVol0Settings; 1977 RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
1617 1978
1618/* RAID Volume Page 0 VolumeSettings defines */ 1979/* RAID Volume Page 0 VolumeSettings defines */
1619
1620#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001) 1980#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001)
1621#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002) 1981#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002)
1622#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004) 1982#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004)
1623#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008) 1983#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008)
1984#define MPI_RAIDVOL0_SETTING_FAST_DATA_SCRUBBING_0102 (0x0020) /* obsolete */
1624#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010) 1985#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010)
1625#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000) 1986#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000)
1626 1987
@@ -1644,7 +2005,7 @@ typedef struct _RAID_VOL0_SETTINGS
1644 2005
1645typedef struct _CONFIG_PAGE_RAID_VOL_0 2006typedef struct _CONFIG_PAGE_RAID_VOL_0
1646{ 2007{
1647 fCONFIG_PAGE_HEADER Header; /* 00h */ 2008 CONFIG_PAGE_HEADER Header; /* 00h */
1648 U8 VolumeID; /* 04h */ 2009 U8 VolumeID; /* 04h */
1649 U8 VolumeBus; /* 05h */ 2010 U8 VolumeBus; /* 05h */
1650 U8 VolumeIOC; /* 06h */ 2011 U8 VolumeIOC; /* 06h */
@@ -1657,13 +2018,41 @@ typedef struct _CONFIG_PAGE_RAID_VOL_0
1657 U32 Reserved2; /* 1Ch */ 2018 U32 Reserved2; /* 1Ch */
1658 U32 Reserved3; /* 20h */ 2019 U32 Reserved3; /* 20h */
1659 U8 NumPhysDisks; /* 24h */ 2020 U8 NumPhysDisks; /* 24h */
1660 U8 Reserved4; /* 25h */ 2021 U8 DataScrubRate; /* 25h */
1661 U16 Reserved5; /* 26h */ 2022 U8 ResyncRate; /* 26h */
2023 U8 InactiveStatus; /* 27h */
1662 RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */ 2024 RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
1663} fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0, 2025} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
1664 RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t; 2026 RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
1665 2027
1666#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01) 2028#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x04)
2029
2030/* values for RAID Volume Page 0 InactiveStatus field */
2031#define MPI_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00)
2032#define MPI_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01)
2033#define MPI_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02)
2034#define MPI_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03)
2035#define MPI_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04)
2036#define MPI_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05)
2037#define MPI_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06)
2038
2039
2040typedef struct _CONFIG_PAGE_RAID_VOL_1
2041{
2042 CONFIG_PAGE_HEADER Header; /* 00h */
2043 U8 VolumeID; /* 01h */
2044 U8 VolumeBus; /* 02h */
2045 U8 VolumeIOC; /* 03h */
2046 U8 Reserved0; /* 04h */
2047 U8 GUID[24]; /* 05h */
2048 U8 Name[32]; /* 20h */
2049 U64 WWID; /* 40h */
2050 U32 Reserved1; /* 48h */
2051 U32 Reserved2; /* 4Ch */
2052} CONFIG_PAGE_RAID_VOL_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_1,
2053 RaidVolumePage1_t, MPI_POINTER pRaidVolumePage1_t;
2054
2055#define MPI_RAIDVOLPAGE1_PAGEVERSION (0x01)
1667 2056
1668 2057
1669/**************************************************************************** 2058/****************************************************************************
@@ -1714,6 +2103,7 @@ typedef struct _RAID_PHYS_DISK0_STATUS
1714 2103
1715#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01) 2104#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01)
1716#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02) 2105#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02)
2106#define MPI_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x04)
1717 2107
1718#define MPI_PHYSDISK0_STATUS_ONLINE (0x00) 2108#define MPI_PHYSDISK0_STATUS_ONLINE (0x00)
1719#define MPI_PHYSDISK0_STATUS_MISSING (0x01) 2109#define MPI_PHYSDISK0_STATUS_MISSING (0x01)
@@ -1726,24 +2116,54 @@ typedef struct _RAID_PHYS_DISK0_STATUS
1726 2116
1727typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0 2117typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
1728{ 2118{
1729 fCONFIG_PAGE_HEADER Header; /* 00h */ 2119 CONFIG_PAGE_HEADER Header; /* 00h */
1730 U8 PhysDiskID; /* 04h */ 2120 U8 PhysDiskID; /* 04h */
1731 U8 PhysDiskBus; /* 05h */ 2121 U8 PhysDiskBus; /* 05h */
1732 U8 PhysDiskIOC; /* 06h */ 2122 U8 PhysDiskIOC; /* 06h */
1733 U8 PhysDiskNum; /* 07h */ 2123 U8 PhysDiskNum; /* 07h */
1734 RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */ 2124 RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */
1735 U32 Reserved1; /* 0Ch */ 2125 U32 Reserved1; /* 0Ch */
1736 U32 Reserved2; /* 10h */ 2126 U8 ExtDiskIdentifier[8]; /* 10h */
1737 U32 Reserved3; /* 14h */
1738 U8 DiskIdentifier[16]; /* 18h */ 2127 U8 DiskIdentifier[16]; /* 18h */
1739 RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */ 2128 RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */
1740 RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */ 2129 RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */
1741 U32 MaxLBA; /* 68h */ 2130 U32 MaxLBA; /* 68h */
1742 RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */ 2131 RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */
1743} fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0, 2132} CONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
1744 RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t; 2133 RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
1745 2134
1746#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00) 2135#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x01)
2136
2137
2138typedef struct _RAID_PHYS_DISK1_PATH
2139{
2140 U8 PhysDiskID; /* 00h */
2141 U8 PhysDiskBus; /* 01h */
2142 U16 Reserved1; /* 02h */
2143 U64 WWID; /* 04h */
2144 U64 OwnerWWID; /* 0Ch */
2145 U8 OwnerIdentifier; /* 14h */
2146 U8 Reserved2; /* 15h */
2147 U16 Flags; /* 16h */
2148} RAID_PHYS_DISK1_PATH, MPI_POINTER PTR_RAID_PHYS_DISK1_PATH,
2149 RaidPhysDisk1Path_t, MPI_POINTER pRaidPhysDisk1Path_t;
2150
2151/* RAID Physical Disk Page 1 Flags field defines */
2152#define MPI_RAID_PHYSDISK1_FLAG_BROKEN (0x0002)
2153#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
2154
2155typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
2156{
2157 CONFIG_PAGE_HEADER Header; /* 00h */
2158 U8 NumPhysDiskPaths; /* 04h */
2159 U8 PhysDiskNum; /* 05h */
2160 U16 Reserved2; /* 06h */
2161 U32 Reserved1; /* 08h */
2162 RAID_PHYS_DISK1_PATH Path[1]; /* 0Ch */
2163} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1,
2164 RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t;
2165
2166#define MPI_RAIDPHYSDISKPAGE1_PAGEVERSION (0x00)
1747 2167
1748 2168
1749/**************************************************************************** 2169/****************************************************************************
@@ -1756,7 +2176,7 @@ typedef struct _CONFIG_PAGE_LAN_0
1756 U16 TxRxModes; /* 04h */ 2176 U16 TxRxModes; /* 04h */
1757 U16 Reserved; /* 06h */ 2177 U16 Reserved; /* 06h */
1758 U32 PacketPrePad; /* 08h */ 2178 U32 PacketPrePad; /* 08h */
1759} fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0, 2179} CONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
1760 LANPage0_t, MPI_POINTER pLANPage0_t; 2180 LANPage0_t, MPI_POINTER pLANPage0_t;
1761 2181
1762#define MPI_LAN_PAGE0_PAGEVERSION (0x01) 2182#define MPI_LAN_PAGE0_PAGEVERSION (0x01)
@@ -1781,7 +2201,7 @@ typedef struct _CONFIG_PAGE_LAN_1
1781 U32 MaxReplySize; /* 24h */ 2201 U32 MaxReplySize; /* 24h */
1782 U32 NegWireSpeedLow; /* 28h */ 2202 U32 NegWireSpeedLow; /* 28h */
1783 U32 NegWireSpeedHigh; /* 2Ch */ 2203 U32 NegWireSpeedHigh; /* 2Ch */
1784} fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1, 2204} CONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
1785 LANPage1_t, MPI_POINTER pLANPage1_t; 2205 LANPage1_t, MPI_POINTER pLANPage1_t;
1786 2206
1787#define MPI_LAN_PAGE1_PAGEVERSION (0x03) 2207#define MPI_LAN_PAGE1_PAGEVERSION (0x03)
@@ -1796,11 +2216,11 @@ typedef struct _CONFIG_PAGE_LAN_1
1796 2216
1797typedef struct _CONFIG_PAGE_INBAND_0 2217typedef struct _CONFIG_PAGE_INBAND_0
1798{ 2218{
1799 fCONFIG_PAGE_HEADER Header; /* 00h */ 2219 CONFIG_PAGE_HEADER Header; /* 00h */
1800 MPI_VERSION_FORMAT InbandVersion; /* 04h */ 2220 MPI_VERSION_FORMAT InbandVersion; /* 04h */
1801 U16 MaximumBuffers; /* 08h */ 2221 U16 MaximumBuffers; /* 08h */
1802 U16 Reserved1; /* 0Ah */ 2222 U16 Reserved1; /* 0Ah */
1803} fCONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0, 2223} CONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0,
1804 InbandPage0_t, MPI_POINTER pInbandPage0_t; 2224 InbandPage0_t, MPI_POINTER pInbandPage0_t;
1805 2225
1806#define MPI_INBAND_PAGEVERSION (0x00) 2226#define MPI_INBAND_PAGEVERSION (0x00)
@@ -1820,7 +2240,7 @@ typedef struct _MPI_SAS_IO_UNIT0_PHY_DATA
1820 U32 ControllerPhyDeviceInfo;/* 04h */ 2240 U32 ControllerPhyDeviceInfo;/* 04h */
1821 U16 AttachedDeviceHandle; /* 08h */ 2241 U16 AttachedDeviceHandle; /* 08h */
1822 U16 ControllerDevHandle; /* 0Ah */ 2242 U16 ControllerDevHandle; /* 0Ah */
1823 U32 Reserved2; /* 0Ch */ 2243 U32 DiscoveryStatus; /* 0Ch */
1824} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA, 2244} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA,
1825 SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData; 2245 SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData;
1826 2246
@@ -1834,22 +2254,21 @@ typedef struct _MPI_SAS_IO_UNIT0_PHY_DATA
1834 2254
1835typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0 2255typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
1836{ 2256{
1837 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2257 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1838 U32 Reserved1; /* 08h */ 2258 U32 Reserved1; /* 08h */
1839 U8 NumPhys; /* 0Ch */ 2259 U8 NumPhys; /* 0Ch */
1840 U8 Reserved2; /* 0Dh */ 2260 U8 Reserved2; /* 0Dh */
1841 U16 Reserved3; /* 0Eh */ 2261 U16 Reserved3; /* 0Eh */
1842 MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */ 2262 MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */
1843} fCONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0, 2263} CONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0,
1844 SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t; 2264 SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t;
1845 2265
1846#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x00) 2266#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x02)
1847 2267
1848/* values for SAS IO Unit Page 0 PortFlags */ 2268/* values for SAS IO Unit Page 0 PortFlags */
1849#define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS (0x08) 2269#define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS (0x08)
1850#define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM (0x00) 2270#define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
1851#define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM (0x04) 2271#define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
1852#define MPI_SAS_IOUNIT0_PORT_FLAGS_WAIT_FOR_PORTENABLE (0x02)
1853#define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) 2272#define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
1854 2273
1855/* values for SAS IO Unit Page 0 PhyFlags */ 2274/* values for SAS IO Unit Page 0 PhyFlags */
@@ -1867,6 +2286,20 @@ typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
1867 2286
1868/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */ 2287/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
1869 2288
2289/* values for SAS IO Unit Page 0 DiscoveryStatus */
2290#define MPI_SAS_IOUNIT0_DS_LOOP_DETECTED (0x00000001)
2291#define MPI_SAS_IOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002)
2292#define MPI_SAS_IOUNIT0_DS_MULTIPLE_PORTS (0x00000004)
2293#define MPI_SAS_IOUNIT0_DS_EXPANDER_ERR (0x00000008)
2294#define MPI_SAS_IOUNIT0_DS_SMP_TIMEOUT (0x00000010)
2295#define MPI_SAS_IOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020)
2296#define MPI_SAS_IOUNIT0_DS_INDEX_NOT_EXIST (0x00000040)
2297#define MPI_SAS_IOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080)
2298#define MPI_SAS_IOUNIT0_DS_SMP_CRC_ERROR (0x00000100)
2299#define MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200)
2300#define MPI_SAS_IOUNIT0_DS_TABLE_LINK (0x00000400)
2301#define MPI_SAS_IOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800)
2302
1870 2303
1871typedef struct _MPI_SAS_IO_UNIT1_PHY_DATA 2304typedef struct _MPI_SAS_IO_UNIT1_PHY_DATA
1872{ 2305{
@@ -1889,52 +2322,75 @@ typedef struct _MPI_SAS_IO_UNIT1_PHY_DATA
1889 2322
1890typedef struct _CONFIG_PAGE_SAS_IO_UNIT_1 2323typedef struct _CONFIG_PAGE_SAS_IO_UNIT_1
1891{ 2324{
1892 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2325 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1893 U32 Reserved1; /* 08h */ 2326 U16 ControlFlags; /* 08h */
1894 U8 NumPhys; /* 0Ch */ 2327 U16 MaxNumSATATargets; /* 0Ah */
1895 U8 Reserved2; /* 0Dh */ 2328 U32 Reserved1; /* 0Ch */
1896 U16 Reserved3; /* 0Eh */ 2329 U8 NumPhys; /* 10h */
1897 MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 10h */ 2330 U8 SATAMaxQDepth; /* 11h */
1898} fCONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1, 2331 U16 Reserved2; /* 12h */
2332 MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 14h */
2333} CONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1,
1899 SasIOUnitPage1_t, MPI_POINTER pSasIOUnitPage1_t; 2334 SasIOUnitPage1_t, MPI_POINTER pSasIOUnitPage1_t;
1900 2335
1901#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x00) 2336#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x04)
1902 2337
1903/* values for SAS IO Unit Page 0 PortFlags */ 2338/* values for SAS IO Unit Page 1 ControlFlags */
1904#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00) 2339#define MPI_SAS_IOUNIT1_CONTROL_SATA_3_0_MAX (0x4000)
1905#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04) 2340#define MPI_SAS_IOUNIT1_CONTROL_SATA_1_5_MAX (0x2000)
1906#define MPI_SAS_IOUNIT1_PORT_FLAGS_WAIT_FOR_PORTENABLE (0x02) 2341#define MPI_SAS_IOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000)
1907#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) 2342#define MPI_SAS_IOUNIT1_CONTROL_DISABLE_SAS_HASH (0x0800)
2343
2344#define MPI_SAS_IOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600)
2345#define MPI_SAS_IOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9)
2346#define MPI_SAS_IOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x00)
2347#define MPI_SAS_IOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x01)
2348#define MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x10)
2349
2350#define MPI_SAS_IOUNIT1_CONTROL_AUTO_PORT_SAME_SAS_ADDR (0x0100)
2351#define MPI_SAS_IOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080)
2352#define MPI_SAS_IOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040)
2353#define MPI_SAS_IOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020)
2354#define MPI_SAS_IOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010)
2355#define MPI_SAS_IOUNIT1_CONTROL_PHY_ENABLE_ORDER_HIGH (0x0008)
2356#define MPI_SAS_IOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004)
2357#define MPI_SAS_IOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002)
2358#define MPI_SAS_IOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001)
2359
2360/* values for SAS IO Unit Page 1 PortFlags */
2361#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
2362#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
2363#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
1908 2364
1909/* values for SAS IO Unit Page 0 PhyFlags */ 2365/* values for SAS IO Unit Page 0 PhyFlags */
1910#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04) 2366#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04)
1911#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02) 2367#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02)
1912#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01) 2368#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01)
1913 2369
1914/* values for SAS IO Unit Page 0 MaxMinLinkRate */ 2370/* values for SAS IO Unit Page 0 MaxMinLinkRate */
1915#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0) 2371#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0)
1916#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80) 2372#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80)
1917#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90) 2373#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90)
1918#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F) 2374#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F)
1919#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08) 2375#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08)
1920#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09) 2376#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09)
1921 2377
1922/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */ 2378/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
1923 2379
1924 2380
1925typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2 2381typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
1926{ 2382{
1927 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2383 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1928 U32 Reserved1; /* 08h */ 2384 U32 Reserved1; /* 08h */
1929 U16 MaxPersistentIDs; /* 0Ch */ 2385 U16 MaxPersistentIDs; /* 0Ch */
1930 U16 NumPersistentIDsUsed; /* 0Eh */ 2386 U16 NumPersistentIDsUsed; /* 0Eh */
1931 U8 Status; /* 10h */ 2387 U8 Status; /* 10h */
1932 U8 Flags; /* 11h */ 2388 U8 Flags; /* 11h */
1933 U16 Reserved2; /* 12h */ 2389 U16 MaxNumPhysicalMappedIDs;/* 12h */ /* 12h */
1934} fCONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2, 2390} CONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
1935 SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t; 2391 SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t;
1936 2392
1937#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x00) 2393#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x03)
1938 2394
1939/* values for SAS IO Unit Page 2 Status field */ 2395/* values for SAS IO Unit Page 2 Status field */
1940#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02) 2396#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02)
@@ -1942,11 +2398,19 @@ typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
1942 2398
1943/* values for SAS IO Unit Page 2 Flags field */ 2399/* values for SAS IO Unit Page 2 Flags field */
1944#define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS (0x01) 2400#define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS (0x01)
2401/* Physical Mapping Modes */
2402#define MPI_SAS_IOUNIT2_FLAGS_MASK_PHYS_MAP_MODE (0x0E)
2403#define MPI_SAS_IOUNIT2_FLAGS_SHIFT_PHYS_MAP_MODE (1)
2404#define MPI_SAS_IOUNIT2_FLAGS_NO_PHYS_MAP (0x00)
2405#define MPI_SAS_IOUNIT2_FLAGS_DIRECT_ATTACH_PHYS_MAP (0x01)
2406#define MPI_SAS_IOUNIT2_FLAGS_ENCLOSURE_SLOT_PHYS_MAP (0x02)
2407
2408#define MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT (0x10)
1945 2409
1946 2410
1947typedef struct _CONFIG_PAGE_SAS_IO_UNIT_3 2411typedef struct _CONFIG_PAGE_SAS_IO_UNIT_3
1948{ 2412{
1949 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2413 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1950 U32 Reserved1; /* 08h */ 2414 U32 Reserved1; /* 08h */
1951 U32 MaxInvalidDwordCount; /* 0Ch */ 2415 U32 MaxInvalidDwordCount; /* 0Ch */
1952 U32 InvalidDwordCountTime; /* 10h */ 2416 U32 InvalidDwordCountTime; /* 10h */
@@ -1956,18 +2420,24 @@ typedef struct _CONFIG_PAGE_SAS_IO_UNIT_3
1956 U32 LossDwordSynchCountTime; /* 20h */ 2420 U32 LossDwordSynchCountTime; /* 20h */
1957 U32 MaxPhyResetProblemCount; /* 24h */ 2421 U32 MaxPhyResetProblemCount; /* 24h */
1958 U32 PhyResetProblemTime; /* 28h */ 2422 U32 PhyResetProblemTime; /* 28h */
1959} fCONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3, 2423} CONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3,
1960 SasIOUnitPage3_t, MPI_POINTER pSasIOUnitPage3_t; 2424 SasIOUnitPage3_t, MPI_POINTER pSasIOUnitPage3_t;
1961 2425
1962#define MPI_SASIOUNITPAGE3_PAGEVERSION (0x00) 2426#define MPI_SASIOUNITPAGE3_PAGEVERSION (0x00)
1963 2427
1964 2428
2429/****************************************************************************
2430* SAS Expander Config Pages
2431****************************************************************************/
2432
1965typedef struct _CONFIG_PAGE_SAS_EXPANDER_0 2433typedef struct _CONFIG_PAGE_SAS_EXPANDER_0
1966{ 2434{
1967 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2435 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1968 U32 Reserved1; /* 08h */ 2436 U8 PhysicalPort; /* 08h */
2437 U8 Reserved1; /* 09h */
2438 U16 Reserved2; /* 0Ah */
1969 U64 SASAddress; /* 0Ch */ 2439 U64 SASAddress; /* 0Ch */
1970 U32 Reserved2; /* 14h */ 2440 U32 DiscoveryStatus; /* 14h */
1971 U16 DevHandle; /* 18h */ 2441 U16 DevHandle; /* 18h */
1972 U16 ParentDevHandle; /* 1Ah */ 2442 U16 ParentDevHandle; /* 1Ah */
1973 U16 ExpanderChangeCount; /* 1Ch */ 2443 U16 ExpanderChangeCount; /* 1Ch */
@@ -1976,45 +2446,127 @@ typedef struct _CONFIG_PAGE_SAS_EXPANDER_0
1976 U8 SASLevel; /* 21h */ 2446 U8 SASLevel; /* 21h */
1977 U8 Flags; /* 22h */ 2447 U8 Flags; /* 22h */
1978 U8 Reserved3; /* 23h */ 2448 U8 Reserved3; /* 23h */
1979} fCONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0, 2449} CONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0,
1980 SasExpanderPage0_t, MPI_POINTER pSasExpanderPage0_t; 2450 SasExpanderPage0_t, MPI_POINTER pSasExpanderPage0_t;
1981 2451
1982#define MPI_SASEXPANDER0_PAGEVERSION (0x00) 2452#define MPI_SASEXPANDER0_PAGEVERSION (0x02)
2453
2454/* values for SAS Expander Page 0 DiscoveryStatus field */
2455#define MPI_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001)
2456#define MPI_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002)
2457#define MPI_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004)
2458#define MPI_SAS_EXPANDER0_DS_EXPANDER_ERR (0x00000008)
2459#define MPI_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010)
2460#define MPI_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020)
2461#define MPI_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040)
2462#define MPI_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080)
2463#define MPI_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100)
2464#define MPI_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200)
2465#define MPI_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400)
2466#define MPI_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800)
1983 2467
1984/* values for SAS Expander Page 0 Flags field */ 2468/* values for SAS Expander Page 0 Flags field */
1985#define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x02) 2469#define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x02)
1986#define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x01) 2470#define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x01)
1987 2471
1988 2472
2473typedef struct _CONFIG_PAGE_SAS_EXPANDER_1
2474{
2475 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2476 U8 PhysicalPort; /* 08h */
2477 U8 Reserved1; /* 09h */
2478 U16 Reserved2; /* 0Ah */
2479 U8 NumPhys; /* 0Ch */
2480 U8 Phy; /* 0Dh */
2481 U16 NumTableEntriesProgrammed; /* 0Eh */
2482 U8 ProgrammedLinkRate; /* 10h */
2483 U8 HwLinkRate; /* 11h */
2484 U16 AttachedDevHandle; /* 12h */
2485 U32 PhyInfo; /* 14h */
2486 U32 AttachedDeviceInfo; /* 18h */
2487 U16 OwnerDevHandle; /* 1Ch */
2488 U8 ChangeCount; /* 1Eh */
2489 U8 NegotiatedLinkRate; /* 1Fh */
2490 U8 PhyIdentifier; /* 20h */
2491 U8 AttachedPhyIdentifier; /* 21h */
2492 U8 NumTableEntriesProg; /* 22h */
2493 U8 DiscoveryInfo; /* 23h */
2494 U32 Reserved3; /* 24h */
2495} CONFIG_PAGE_SAS_EXPANDER_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_1,
2496 SasExpanderPage1_t, MPI_POINTER pSasExpanderPage1_t;
2497
2498#define MPI_SASEXPANDER1_PAGEVERSION (0x01)
2499
2500/* use MPI_SAS_PHY0_PRATE_ defines for ProgrammedLinkRate */
2501
2502/* use MPI_SAS_PHY0_HWRATE_ defines for HwLinkRate */
2503
2504/* use MPI_SAS_PHY0_PHYINFO_ defines for PhyInfo */
2505
2506/* see mpi_sas.h for values for SAS Expander Page 1 AttachedDeviceInfo values */
2507
2508/* values for SAS Expander Page 1 DiscoveryInfo field */
2509#define MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY DISABLED (0x04)
2510#define MPI_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02)
2511#define MPI_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01)
2512
2513/* values for SAS Expander Page 1 NegotiatedLinkRate field */
2514#define MPI_SAS_EXPANDER1_NEG_RATE_UNKNOWN (0x00)
2515#define MPI_SAS_EXPANDER1_NEG_RATE_PHY_DISABLED (0x01)
2516#define MPI_SAS_EXPANDER1_NEG_RATE_FAILED_NEGOTIATION (0x02)
2517#define MPI_SAS_EXPANDER1_NEG_RATE_SATA_OOB_COMPLETE (0x03)
2518#define MPI_SAS_EXPANDER1_NEG_RATE_1_5 (0x08)
2519#define MPI_SAS_EXPANDER1_NEG_RATE_3_0 (0x09)
2520
2521
2522/****************************************************************************
2523* SAS Device Config Pages
2524****************************************************************************/
2525
1989typedef struct _CONFIG_PAGE_SAS_DEVICE_0 2526typedef struct _CONFIG_PAGE_SAS_DEVICE_0
1990{ 2527{
1991 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2528 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1992 U32 Reserved1; /* 08h */ 2529 U16 Slot; /* 08h */
2530 U16 EnclosureHandle; /* 0Ah */
1993 U64 SASAddress; /* 0Ch */ 2531 U64 SASAddress; /* 0Ch */
1994 U32 Reserved2; /* 14h */ 2532 U16 ParentDevHandle; /* 14h */
2533 U8 PhyNum; /* 16h */
2534 U8 AccessStatus; /* 17h */
1995 U16 DevHandle; /* 18h */ 2535 U16 DevHandle; /* 18h */
1996 U8 TargetID; /* 1Ah */ 2536 U8 TargetID; /* 1Ah */
1997 U8 Bus; /* 1Bh */ 2537 U8 Bus; /* 1Bh */
1998 U32 DeviceInfo; /* 1Ch */ 2538 U32 DeviceInfo; /* 1Ch */
1999 U16 Flags; /* 20h */ 2539 U16 Flags; /* 20h */
2000 U8 PhysicalPort; /* 22h */ 2540 U8 PhysicalPort; /* 22h */
2001 U8 Reserved3; /* 23h */ 2541 U8 Reserved2; /* 23h */
2002} fCONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0, 2542} CONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0,
2003 SasDevicePage0_t, MPI_POINTER pSasDevicePage0_t; 2543 SasDevicePage0_t, MPI_POINTER pSasDevicePage0_t;
2004 2544
2005#define MPI_SASDEVICE0_PAGEVERSION (0x00) 2545#define MPI_SASDEVICE0_PAGEVERSION (0x04)
2546
2547/* values for SAS Device Page 0 AccessStatus field */
2548#define MPI_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00)
2549#define MPI_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01)
2550#define MPI_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02)
2006 2551
2007/* values for SAS Device Page 0 Flags field */ 2552/* values for SAS Device Page 0 Flags field */
2008#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x04) 2553#define MPI_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200)
2009#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x02) 2554#define MPI_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100)
2010#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x01) 2555#define MPI_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080)
2556#define MPI_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040)
2557#define MPI_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020)
2558#define MPI_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010)
2559#define MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008)
2560#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x0004)
2561#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x0002)
2562#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001)
2011 2563
2012/* see mpi_sas.h for values for SAS Device Page 0 DeviceInfo values */ 2564/* see mpi_sas.h for values for SAS Device Page 0 DeviceInfo values */
2013 2565
2014 2566
2015typedef struct _CONFIG_PAGE_SAS_DEVICE_1 2567typedef struct _CONFIG_PAGE_SAS_DEVICE_1
2016{ 2568{
2017 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2569 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2018 U32 Reserved1; /* 08h */ 2570 U32 Reserved1; /* 08h */
2019 U64 SASAddress; /* 0Ch */ 2571 U64 SASAddress; /* 0Ch */
2020 U32 Reserved2; /* 14h */ 2572 U32 Reserved2; /* 14h */
@@ -2022,15 +2574,30 @@ typedef struct _CONFIG_PAGE_SAS_DEVICE_1
2022 U8 TargetID; /* 1Ah */ 2574 U8 TargetID; /* 1Ah */
2023 U8 Bus; /* 1Bh */ 2575 U8 Bus; /* 1Bh */
2024 U8 InitialRegDeviceFIS[20];/* 1Ch */ 2576 U8 InitialRegDeviceFIS[20];/* 1Ch */
2025} fCONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1, 2577} CONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1,
2026 SasDevicePage1_t, MPI_POINTER pSasDevicePage1_t; 2578 SasDevicePage1_t, MPI_POINTER pSasDevicePage1_t;
2027 2579
2028#define MPI_SASDEVICE1_PAGEVERSION (0x00) 2580#define MPI_SASDEVICE1_PAGEVERSION (0x00)
2029 2581
2030 2582
2583typedef struct _CONFIG_PAGE_SAS_DEVICE_2
2584{
2585 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2586 U64 PhysicalIdentifier; /* 08h */
2587 U32 Reserved1; /* 10h */
2588} CONFIG_PAGE_SAS_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_2,
2589 SasDevicePage2_t, MPI_POINTER pSasDevicePage2_t;
2590
2591#define MPI_SASDEVICE2_PAGEVERSION (0x00)
2592
2593
2594/****************************************************************************
2595* SAS PHY Config Pages
2596****************************************************************************/
2597
2031typedef struct _CONFIG_PAGE_SAS_PHY_0 2598typedef struct _CONFIG_PAGE_SAS_PHY_0
2032{ 2599{
2033 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2600 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2034 U32 Reserved1; /* 08h */ 2601 U32 Reserved1; /* 08h */
2035 U64 SASAddress; /* 0Ch */ 2602 U64 SASAddress; /* 0Ch */
2036 U16 AttachedDevHandle; /* 14h */ 2603 U16 AttachedDevHandle; /* 14h */
@@ -2042,7 +2609,7 @@ typedef struct _CONFIG_PAGE_SAS_PHY_0
2042 U8 ChangeCount; /* 22h */ 2609 U8 ChangeCount; /* 22h */
2043 U8 Reserved3; /* 23h */ 2610 U8 Reserved3; /* 23h */
2044 U32 PhyInfo; /* 24h */ 2611 U32 PhyInfo; /* 24h */
2045} fCONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0, 2612} CONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0,
2046 SasPhyPage0_t, MPI_POINTER pSasPhyPage0_t; 2613 SasPhyPage0_t, MPI_POINTER pSasPhyPage0_t;
2047 2614
2048#define MPI_SASPHY0_PAGEVERSION (0x00) 2615#define MPI_SASPHY0_PAGEVERSION (0x00)
@@ -2089,17 +2656,95 @@ typedef struct _CONFIG_PAGE_SAS_PHY_0
2089 2656
2090typedef struct _CONFIG_PAGE_SAS_PHY_1 2657typedef struct _CONFIG_PAGE_SAS_PHY_1
2091{ 2658{
2092 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2659 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2093 U32 Reserved1; /* 08h */ 2660 U32 Reserved1; /* 08h */
2094 U32 InvalidDwordCount; /* 0Ch */ 2661 U32 InvalidDwordCount; /* 0Ch */
2095 U32 RunningDisparityErrorCount; /* 10h */ 2662 U32 RunningDisparityErrorCount; /* 10h */
2096 U32 LossDwordSynchCount; /* 14h */ 2663 U32 LossDwordSynchCount; /* 14h */
2097 U32 PhyResetProblemCount; /* 18h */ 2664 U32 PhyResetProblemCount; /* 18h */
2098} fCONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1, 2665} CONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1,
2099 SasPhyPage1_t, MPI_POINTER pSasPhyPage1_t; 2666 SasPhyPage1_t, MPI_POINTER pSasPhyPage1_t;
2100 2667
2101#define MPI_SASPHY1_PAGEVERSION (0x00) 2668#define MPI_SASPHY1_PAGEVERSION (0x00)
2102 2669
2103 2670
2671/****************************************************************************
2672* SAS Enclosure Config Pages
2673****************************************************************************/
2674
2675typedef struct _CONFIG_PAGE_SAS_ENCLOSURE_0
2676{
2677 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2678 U32 Reserved1; /* 08h */
2679 U64 EnclosureLogicalID; /* 0Ch */
2680 U16 Flags; /* 14h */
2681 U16 EnclosureHandle; /* 16h */
2682 U16 NumSlots; /* 18h */
2683 U16 StartSlot; /* 1Ah */
2684 U8 StartTargetID; /* 1Ch */
2685 U8 StartBus; /* 1Dh */
2686 U8 SEPTargetID; /* 1Eh */
2687 U8 SEPBus; /* 1Fh */
2688 U32 Reserved2; /* 20h */
2689 U32 Reserved3; /* 24h */
2690} CONFIG_PAGE_SAS_ENCLOSURE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_ENCLOSURE_0,
2691 SasEnclosurePage0_t, MPI_POINTER pSasEnclosurePage0_t;
2692
2693#define MPI_SASENCLOSURE0_PAGEVERSION (0x00)
2694
2695/* values for SAS Enclosure Page 0 Flags field */
2696#define MPI_SAS_ENCLS0_FLAGS_SEP_BUS_ID_VALID (0x0020)
2697#define MPI_SAS_ENCLS0_FLAGS_START_BUS_ID_VALID (0x0010)
2698
2699#define MPI_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F)
2700#define MPI_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000)
2701#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001)
2702#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002)
2703#define MPI_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003)
2704#define MPI_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004)
2705
2706
2707/****************************************************************************
2708* Log Config Pages
2709****************************************************************************/
2710/*
2711 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
2712 * one and check NumLogEntries at runtime.
2713 */
2714#ifndef MPI_LOG_0_NUM_LOG_ENTRIES
2715#define MPI_LOG_0_NUM_LOG_ENTRIES (1)
2716#endif
2717
2718#define MPI_LOG_0_LOG_DATA_LENGTH (20)
2719
2720typedef struct _MPI_LOG_0_ENTRY
2721{
2722 U64 WWID; /* 00h */
2723 U32 TimeStamp; /* 08h */
2724 U32 Reserved1; /* 0Ch */
2725 U16 LogSequence; /* 10h */
2726 U16 LogEntryQualifier; /* 12h */
2727 U8 LogData[MPI_LOG_0_LOG_DATA_LENGTH]; /* 14h */
2728} MPI_LOG_0_ENTRY, MPI_POINTER PTR_MPI_LOG_0_ENTRY,
2729 MpiLog0Entry_t, MPI_POINTER pMpiLog0Entry_t;
2730
2731/* values for Log Page 0 LogEntry LogEntryQualifier field */
2732#define MPI_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000)
2733#define MPI_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001)
2734
2735typedef struct _CONFIG_PAGE_LOG_0
2736{
2737 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2738 U32 Reserved1; /* 08h */
2739 U32 Reserved2; /* 0Ch */
2740 U16 NumLogEntries; /* 10h */
2741 U16 Reserved3; /* 12h */
2742 MPI_LOG_0_ENTRY LogEntry[MPI_LOG_0_NUM_LOG_ENTRIES]; /* 14h */
2743} CONFIG_PAGE_LOG_0, MPI_POINTER PTR_CONFIG_PAGE_LOG_0,
2744 LogPage0_t, MPI_POINTER pLogPage0_t;
2745
2746#define MPI_LOG_0_PAGEVERSION (0x00)
2747
2748
2104#endif 2749#endif
2105 2750
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-17 15:53:24 -0500