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path: root/drivers/memstick/host/tifm_ms.c
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Diffstat (limited to 'drivers/memstick/host/tifm_ms.c')
-rw-r--r--drivers/memstick/host/tifm_ms.c569
1 files changed, 279 insertions, 290 deletions
diff --git a/drivers/memstick/host/tifm_ms.c b/drivers/memstick/host/tifm_ms.c
index 4fb24215bd95..2b5bf52a8302 100644
--- a/drivers/memstick/host/tifm_ms.c
+++ b/drivers/memstick/host/tifm_ms.c
@@ -20,293 +20,315 @@
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22#define DRIVER_NAME "tifm_ms" 22#define DRIVER_NAME "tifm_ms"
23#define DRIVER_VERSION "0.1"
24 23
25static int no_dma; 24static int no_dma;
26module_param(no_dma, bool, 0644); 25module_param(no_dma, bool, 0644);
27 26
28#define TIFM_MS_TIMEOUT 0x00100 27/*
29#define TIFM_MS_BADCRC 0x00200 28 * Some control bits of TIFM appear to conform to Sony's reference design,
30#define TIFM_MS_EOTPC 0x01000 29 * so I'm just assuming they all are.
31#define TIFM_MS_INT 0x02000 30 */
32
33/* The meaning of the bit majority in this constant is unknown. */
34#define TIFM_MS_SERIAL 0x04010
35 31
36#define TIFM_MS_SYS_LATCH 0x00100 32#define TIFM_MS_STAT_DRQ 0x04000
37#define TIFM_MS_SYS_NOT_RDY 0x00800 33#define TIFM_MS_STAT_MSINT 0x02000
38#define TIFM_MS_SYS_DATA 0x10000 34#define TIFM_MS_STAT_RDY 0x01000
35#define TIFM_MS_STAT_CRC 0x00200
36#define TIFM_MS_STAT_TOE 0x00100
37#define TIFM_MS_STAT_EMP 0x00020
38#define TIFM_MS_STAT_FUL 0x00010
39#define TIFM_MS_STAT_CED 0x00008
40#define TIFM_MS_STAT_ERR 0x00004
41#define TIFM_MS_STAT_BRQ 0x00002
42#define TIFM_MS_STAT_CNK 0x00001
43
44#define TIFM_MS_SYS_DMA 0x10000
45#define TIFM_MS_SYS_RESET 0x08000
46#define TIFM_MS_SYS_SRAC 0x04000
47#define TIFM_MS_SYS_INTEN 0x02000
48#define TIFM_MS_SYS_NOCRC 0x01000
49#define TIFM_MS_SYS_INTCLR 0x00800
50#define TIFM_MS_SYS_MSIEN 0x00400
51#define TIFM_MS_SYS_FCLR 0x00200
52#define TIFM_MS_SYS_FDIR 0x00100
53#define TIFM_MS_SYS_DAM 0x00080
54#define TIFM_MS_SYS_DRM 0x00040
55#define TIFM_MS_SYS_DRQSL 0x00020
56#define TIFM_MS_SYS_REI 0x00010
57#define TIFM_MS_SYS_REO 0x00008
58#define TIFM_MS_SYS_BSY_MASK 0x00007
59
60#define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \
61 | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK)
39 62
40/* Hardware flags */ 63/* Hardware flags */
41enum { 64enum {
42 CMD_READY = 0x0001, 65 CMD_READY = 0x01,
43 FIFO_READY = 0x0002, 66 FIFO_READY = 0x02,
44 CARD_READY = 0x0004, 67 CARD_INT = 0x04
45 DATA_CARRY = 0x0008
46}; 68};
47 69
48struct tifm_ms { 70struct tifm_ms {
49 struct tifm_dev *dev; 71 struct tifm_dev *dev;
50 unsigned short eject:1, 72 struct timer_list timer;
51 no_dma:1; 73 struct memstick_request *req;
52 unsigned short cmd_flags;
53 unsigned int mode_mask; 74 unsigned int mode_mask;
54 unsigned int block_pos; 75 unsigned int block_pos;
55 unsigned long timeout_jiffies; 76 unsigned long timeout_jiffies;
56 77 unsigned char eject:1,
57 struct timer_list timer; 78 use_dma:1;
58 struct memstick_request *req; 79 unsigned char cmd_flags;
80 unsigned char io_pos;
59 unsigned int io_word; 81 unsigned int io_word;
60}; 82};
61 83
62static void tifm_ms_read_fifo(struct tifm_ms *host, unsigned int fifo_offset, 84static unsigned int tifm_ms_read_data(struct tifm_ms *host,
63 struct page *pg, unsigned int page_off, 85 unsigned char *buf, unsigned int length)
64 unsigned int length)
65{ 86{
66 struct tifm_dev *sock = host->dev; 87 struct tifm_dev *sock = host->dev;
67 unsigned int cnt = 0, off = 0; 88 unsigned int off = 0;
68 unsigned char *buf = kmap_atomic(pg, KM_BIO_DST_IRQ) + page_off; 89
90 while (host->io_pos && length) {
91 buf[off++] = host->io_word & 0xff;
92 host->io_word >>= 8;
93 length--;
94 host->io_pos--;
95 }
69 96
70 if (host->cmd_flags & DATA_CARRY) { 97 if (!length)
71 while ((fifo_offset & 3) && length) { 98 return off;
99
100 while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
101 if (length < 4)
102 break;
103 *(unsigned int *)(buf + off) = __raw_readl(sock->addr
104 + SOCK_MS_DATA);
105 length -= 4;
106 off += 4;
107 }
108
109 if (length
110 && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
111 host->io_word = readl(sock->addr + SOCK_MS_DATA);
112 for (host->io_pos = 4; host->io_pos; --host->io_pos) {
72 buf[off++] = host->io_word & 0xff; 113 buf[off++] = host->io_word & 0xff;
73 host->io_word >>= 8; 114 host->io_word >>= 8;
74 length--; 115 length--;
75 fifo_offset++; 116 if (!length)
117 break;
76 } 118 }
77 if (!(fifo_offset & 3))
78 host->cmd_flags &= ~DATA_CARRY;
79 if (!length)
80 return;
81 } 119 }
82 120
83 do { 121 return off;
84 host->io_word = readl(sock->addr + SOCK_FIFO_ACCESS
85 + fifo_offset);
86 cnt = 4;
87 while (length && cnt) {
88 buf[off++] = (host->io_word >> 8) & 0xff;
89 cnt--;
90 length--;
91 }
92 fifo_offset += 4 - cnt;
93 } while (length);
94
95 if (cnt)
96 host->cmd_flags |= DATA_CARRY;
97
98 kunmap_atomic(buf - page_off, KM_BIO_DST_IRQ);
99} 122}
100 123
101static void tifm_ms_write_fifo(struct tifm_ms *host, unsigned int fifo_offset, 124static unsigned int tifm_ms_write_data(struct tifm_ms *host,
102 struct page *pg, unsigned int page_off, 125 unsigned char *buf, unsigned int length)
103 unsigned int length)
104{ 126{
105 struct tifm_dev *sock = host->dev; 127 struct tifm_dev *sock = host->dev;
106 unsigned int cnt = 0, off = 0; 128 unsigned int off = 0;
107 unsigned char *buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + page_off;
108 129
109 if (host->cmd_flags & DATA_CARRY) { 130 if (host->io_pos) {
110 while (fifo_offset & 3) { 131 while (host->io_pos < 4 && length) {
111 host->io_word |= buf[off++] << (8 * (fifo_offset & 3)); 132 host->io_word |= buf[off++] << (host->io_pos * 8);
133 host->io_pos++;
112 length--; 134 length--;
113 fifo_offset++;
114 } 135 }
115 if (!(fifo_offset & 3)) {
116 writel(host->io_word, sock->addr + SOCK_FIFO_ACCESS
117 + fifo_offset - 4);
118
119 host->cmd_flags &= ~DATA_CARRY;
120 }
121 if (!length)
122 return;
123 } 136 }
124 137
125 do { 138 if (host->io_pos == 4
126 cnt = 4; 139 && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
140 writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
141 sock->addr + SOCK_MS_SYSTEM);
142 writel(host->io_word, sock->addr + SOCK_MS_DATA);
143 host->io_pos = 0;
127 host->io_word = 0; 144 host->io_word = 0;
128 while (length && cnt) { 145 } else if (host->io_pos) {
129 host->io_word |= buf[off++] << (4 - cnt); 146 return off;
130 cnt--; 147 }
131 length--;
132 }
133 fifo_offset += 4 - cnt;
134 if (!cnt)
135 writel(host->io_word, sock->addr + SOCK_FIFO_ACCESS
136 + fifo_offset - 4);
137
138 } while (length);
139
140 if (cnt)
141 host->cmd_flags |= DATA_CARRY;
142 148
143 kunmap_atomic(buf - page_off, KM_BIO_SRC_IRQ); 149 if (!length)
144} 150 return off;
145 151
146static void tifm_ms_move_block(struct tifm_ms *host, unsigned int length) 152 while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
147{ 153 if (length < 4)
148 unsigned int t_size; 154 break;
149 unsigned int off = host->req->sg.offset + host->block_pos; 155 writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
150 unsigned int p_off, p_cnt; 156 sock->addr + SOCK_MS_SYSTEM);
151 struct page *pg; 157 __raw_writel(*(unsigned int *)(buf + off),
152 unsigned long flags; 158 sock->addr + SOCK_MS_DATA);
159 length -= 4;
160 off += 4;
161 }
153 162
154 dev_dbg(&host->dev->dev, "moving block\n"); 163 switch (length) {
155 local_irq_save(flags); 164 case 3:
156 t_size = length; 165 host->io_word |= buf[off + 2] << 16;
157 while (t_size) { 166 host->io_pos++;
158 pg = nth_page(sg_page(&host->req->sg), off >> PAGE_SHIFT); 167 case 2:
159 p_off = offset_in_page(off); 168 host->io_word |= buf[off + 1] << 8;
160 p_cnt = PAGE_SIZE - p_off; 169 host->io_pos++;
161 p_cnt = min(p_cnt, t_size); 170 case 1:
171 host->io_word |= buf[off];
172 host->io_pos++;
173 }
162 174
163 if (host->req->data_dir == WRITE) 175 off += host->io_pos;
164 tifm_ms_write_fifo(host, length - t_size,
165 pg, p_off, p_cnt);
166 else
167 tifm_ms_read_fifo(host, length - t_size,
168 pg, p_off, p_cnt);
169 176
170 t_size -= p_cnt; 177 return off;
171 }
172 local_irq_restore(flags);
173} 178}
174 179
175static int tifm_ms_transfer_data(struct tifm_ms *host, int skip) 180static unsigned int tifm_ms_transfer_data(struct tifm_ms *host)
176{ 181{
177 struct tifm_dev *sock = host->dev; 182 struct tifm_dev *sock = host->dev;
178 unsigned int length = host->req->sg.length - host->block_pos; 183 unsigned int length;
184 unsigned int off;
185 unsigned int t_size, p_off, p_cnt;
186 unsigned char *buf;
187 struct page *pg;
188 unsigned long flags = 0;
189
190 if (host->req->long_data) {
191 length = host->req->sg.length - host->block_pos;
192 off = host->req->sg.offset + host->block_pos;
193 } else {
194 length = host->req->data_len - host->block_pos;
195 off = 0;
196 }
197 dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length,
198 host->block_pos);
199
200 while (length) {
201 if (host->req->long_data) {
202 pg = nth_page(sg_page(&host->req->sg),
203 off >> PAGE_SHIFT);
204 p_off = offset_in_page(off);
205 p_cnt = PAGE_SIZE - p_off;
206 p_cnt = min(p_cnt, length);
207
208 local_irq_save(flags);
209 buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
210 } else {
211 buf = host->req->data + host->block_pos;
212 p_cnt = host->req->data_len - host->block_pos;
213 }
179 214
180 if (!length) 215 t_size = host->req->data_dir == WRITE
181 return 1; 216 ? tifm_ms_write_data(host, buf, p_cnt)
217 : tifm_ms_read_data(host, buf, p_cnt);
182 218
183 if (length > TIFM_FIFO_SIZE) 219 if (host->req->long_data) {
184 length = TIFM_FIFO_SIZE; 220 kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
221 local_irq_restore(flags);
222 }
185 223
186 if (!skip) { 224 if (!t_size)
187 tifm_ms_move_block(host, length); 225 break;
188 host->block_pos += length; 226 host->block_pos += t_size;
227 length -= t_size;
228 off += t_size;
189 } 229 }
190 230
191 if ((host->req->data_dir == READ) 231 dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length);
192 && (host->block_pos == host->req->sg.length)) 232 if (!length && (host->req->data_dir == WRITE)) {
193 return 1; 233 if (host->io_pos) {
194 234 writel(TIFM_MS_SYS_FDIR
195 writel(ilog2(length) - 2, sock->addr + SOCK_FIFO_PAGE_SIZE); 235 | readl(sock->addr + SOCK_MS_SYSTEM),
196 if (host->req->data_dir == WRITE) 236 sock->addr + SOCK_MS_SYSTEM);
197 writel((1 << 8) | TIFM_DMA_TX, sock->addr + SOCK_DMA_CONTROL); 237 writel(host->io_word, sock->addr + SOCK_MS_DATA);
198 else 238 }
199 writel((1 << 8), sock->addr + SOCK_DMA_CONTROL); 239 writel(TIFM_MS_SYS_FDIR
240 | readl(sock->addr + SOCK_MS_SYSTEM),
241 sock->addr + SOCK_MS_SYSTEM);
242 writel(0, sock->addr + SOCK_MS_DATA);
243 } else {
244 readl(sock->addr + SOCK_MS_DATA);
245 }
200 246
201 return 0; 247 return length;
202} 248}
203 249
204static int tifm_ms_issue_cmd(struct tifm_ms *host) 250static int tifm_ms_issue_cmd(struct tifm_ms *host)
205{ 251{
206 struct tifm_dev *sock = host->dev; 252 struct tifm_dev *sock = host->dev;
207 unsigned char *data; 253 unsigned char *data;
208 unsigned int data_len = 0, cmd = 0, cmd_mask = 0, cnt, tval = 0; 254 unsigned int data_len, cmd, sys_param;
209 255
210 host->cmd_flags = 0; 256 host->cmd_flags = 0;
257 host->block_pos = 0;
258 host->io_pos = 0;
259 host->io_word = 0;
260 host->cmd_flags = 0;
211 261
212 if (host->req->io_type == MEMSTICK_IO_SG) { 262 data = host->req->data;
213 if (!host->no_dma) {
214 if (1 != tifm_map_sg(sock, &host->req->sg, 1,
215 host->req->data_dir == READ
216 ? PCI_DMA_FROMDEVICE
217 : PCI_DMA_TODEVICE)) {
218 host->req->error = -ENOMEM;
219 return host->req->error;
220 }
221 data_len = sg_dma_len(&host->req->sg);
222 } else
223 data_len = host->req->sg.length;
224
225 writel(TIFM_FIFO_INT_SETALL,
226 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
227 writel(TIFM_FIFO_ENABLE,
228 sock->addr + SOCK_FIFO_CONTROL);
229 writel(TIFM_FIFO_INTMASK,
230 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
231 263
232 if (!host->no_dma) { 264 host->use_dma = !no_dma;
233 writel(ilog2(data_len) - 2,
234 sock->addr + SOCK_FIFO_PAGE_SIZE);
235 writel(sg_dma_address(&host->req->sg),
236 sock->addr + SOCK_DMA_ADDRESS);
237 if (host->req->data_dir == WRITE)
238 writel((1 << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
239 sock->addr + SOCK_DMA_CONTROL);
240 else
241 writel((1 << 8) | TIFM_DMA_EN,
242 sock->addr + SOCK_DMA_CONTROL);
243 } else {
244 tifm_ms_transfer_data(host,
245 host->req->data_dir == READ);
246 }
247 265
248 cmd_mask = readl(sock->addr + SOCK_MS_SYSTEM); 266 if (host->req->long_data) {
249 cmd_mask |= TIFM_MS_SYS_DATA | TIFM_MS_SYS_NOT_RDY; 267 data_len = host->req->sg.length;
250 writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM); 268 if (!is_power_of_2(data_len))
251 } else if (host->req->io_type == MEMSTICK_IO_VAL) { 269 host->use_dma = 0;
252 data = host->req->data; 270 } else {
253 data_len = host->req->data_len; 271 data_len = host->req->data_len;
272 host->use_dma = 0;
273 }
254 274
255 cmd_mask = host->mode_mask | 0x2607; /* unknown constant */ 275 writel(TIFM_FIFO_INT_SETALL,
256 276 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
257 if (host->req->data_dir == WRITE) { 277 writel(TIFM_FIFO_ENABLE,
258 cmd_mask |= TIFM_MS_SYS_LATCH; 278 sock->addr + SOCK_FIFO_CONTROL);
259 writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM); 279
260 for (cnt = 0; (data_len - cnt) >= 4; cnt += 4) { 280 if (host->use_dma) {
261 writel(TIFM_MS_SYS_LATCH 281 if (1 != tifm_map_sg(sock, &host->req->sg, 1,
262 | readl(sock->addr + SOCK_MS_SYSTEM), 282 host->req->data_dir == READ
263 sock->addr + SOCK_MS_SYSTEM); 283 ? PCI_DMA_FROMDEVICE
264 __raw_writel(*(unsigned int *)(data + cnt), 284 : PCI_DMA_TODEVICE)) {
265 sock->addr + SOCK_MS_DATA); 285 host->req->error = -ENOMEM;
266 dev_dbg(&sock->dev, "writing %x\n", 286 return host->req->error;
267 *(int *)(data + cnt)); 287 }
268 } 288 data_len = sg_dma_len(&host->req->sg);
269 switch (data_len - cnt) {
270 case 3:
271 tval |= data[cnt + 2] << 16;
272 case 2:
273 tval |= data[cnt + 1] << 8;
274 case 1:
275 tval |= data[cnt];
276 writel(TIFM_MS_SYS_LATCH
277 | readl(sock->addr + SOCK_MS_SYSTEM),
278 sock->addr + SOCK_MS_SYSTEM);
279 writel(tval, sock->addr + SOCK_MS_DATA);
280 dev_dbg(&sock->dev, "writing %x\n", tval);
281 }
282 289
283 writel(TIFM_MS_SYS_LATCH 290 writel(ilog2(data_len) - 2,
284 | readl(sock->addr + SOCK_MS_SYSTEM), 291 sock->addr + SOCK_FIFO_PAGE_SIZE);
285 sock->addr + SOCK_MS_SYSTEM); 292 writel(TIFM_FIFO_INTMASK,
286 writel(0, sock->addr + SOCK_MS_DATA); 293 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
287 dev_dbg(&sock->dev, "writing %x\n", 0); 294 sys_param = TIFM_DMA_EN | (1 << 8);
295 if (host->req->data_dir == WRITE)
296 sys_param |= TIFM_DMA_TX;
297
298 writel(TIFM_FIFO_INTMASK,
299 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
288 300
289 } else 301 writel(sg_dma_address(&host->req->sg),
290 writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM); 302 sock->addr + SOCK_DMA_ADDRESS);
303 writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
304 } else {
305 writel(host->mode_mask | TIFM_MS_SYS_FIFO,
306 sock->addr + SOCK_MS_SYSTEM);
291 307
292 cmd_mask = readl(sock->addr + SOCK_MS_SYSTEM); 308 writel(TIFM_FIFO_MORE,
293 cmd_mask &= ~TIFM_MS_SYS_DATA; 309 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
294 cmd_mask |= TIFM_MS_SYS_NOT_RDY; 310 }
295 dev_dbg(&sock->dev, "mask %x\n", cmd_mask);
296 writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM);
297 } else
298 BUG();
299 311
300 mod_timer(&host->timer, jiffies + host->timeout_jiffies); 312 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
301 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL), 313 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
302 sock->addr + SOCK_CONTROL); 314 sock->addr + SOCK_CONTROL);
303 host->req->error = 0; 315 host->req->error = 0;
304 316
317 sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
318 sys_param |= TIFM_MS_SYS_INTCLR;
319
320 if (host->use_dma)
321 sys_param |= TIFM_MS_SYS_DMA;
322 else
323 sys_param &= ~TIFM_MS_SYS_DMA;
324
325 writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
326
305 cmd = (host->req->tpc & 0xf) << 12; 327 cmd = (host->req->tpc & 0xf) << 12;
306 cmd |= data_len; 328 cmd |= data_len;
307 writel(cmd, sock->addr + SOCK_MS_COMMAND); 329 writel(cmd, sock->addr + SOCK_MS_COMMAND);
308 330
309 dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, cmd_mask); 331 dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param);
310 return 0; 332 return 0;
311} 333}
312 334
@@ -314,47 +336,20 @@ static void tifm_ms_complete_cmd(struct tifm_ms *host)
314{ 336{
315 struct tifm_dev *sock = host->dev; 337 struct tifm_dev *sock = host->dev;
316 struct memstick_host *msh = tifm_get_drvdata(sock); 338 struct memstick_host *msh = tifm_get_drvdata(sock);
317 unsigned int tval = 0, data_len;
318 unsigned char *data;
319 int rc; 339 int rc;
320 340
321 del_timer(&host->timer); 341 del_timer(&host->timer);
322 if (host->req->io_type == MEMSTICK_IO_SG) {
323 if (!host->no_dma)
324 tifm_unmap_sg(sock, &host->req->sg, 1,
325 host->req->data_dir == READ
326 ? PCI_DMA_FROMDEVICE
327 : PCI_DMA_TODEVICE);
328 } else if (host->req->io_type == MEMSTICK_IO_VAL) {
329 writel(~TIFM_MS_SYS_DATA & readl(sock->addr + SOCK_MS_SYSTEM),
330 sock->addr + SOCK_MS_SYSTEM);
331
332 data = host->req->data;
333 data_len = host->req->data_len;
334 342
335 if (host->req->data_dir == READ) { 343 if (host->use_dma)
336 for (rc = 0; (data_len - rc) >= 4; rc += 4) 344 tifm_unmap_sg(sock, &host->req->sg, 1,
337 *(int *)(data + rc) 345 host->req->data_dir == READ
338 = __raw_readl(sock->addr 346 ? PCI_DMA_FROMDEVICE
339 + SOCK_MS_DATA); 347 : PCI_DMA_TODEVICE);
340
341 if (data_len - rc)
342 tval = readl(sock->addr + SOCK_MS_DATA);
343 switch (data_len - rc) {
344 case 3:
345 data[rc + 2] = (tval >> 16) & 0xff;
346 case 2:
347 data[rc + 1] = (tval >> 8) & 0xff;
348 case 1:
349 data[rc] = tval & 0xff;
350 }
351 readl(sock->addr + SOCK_MS_DATA);
352 }
353 }
354 348
355 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL), 349 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
356 sock->addr + SOCK_CONTROL); 350 sock->addr + SOCK_CONTROL);
357 351
352 dev_dbg(&sock->dev, "TPC complete\n");
358 do { 353 do {
359 rc = memstick_next_req(msh, &host->req); 354 rc = memstick_next_req(msh, &host->req);
360 } while (!rc && tifm_ms_issue_cmd(host)); 355 } while (!rc && tifm_ms_issue_cmd(host));
@@ -365,11 +360,10 @@ static int tifm_ms_check_status(struct tifm_ms *host)
365 if (!host->req->error) { 360 if (!host->req->error) {
366 if (!(host->cmd_flags & CMD_READY)) 361 if (!(host->cmd_flags & CMD_READY))
367 return 1; 362 return 1;
368 if ((host->req->io_type == MEMSTICK_IO_SG) 363 if (!(host->cmd_flags & FIFO_READY))
369 && !(host->cmd_flags & FIFO_READY))
370 return 1; 364 return 1;
371 if (host->req->need_card_int 365 if (host->req->need_card_int
372 && !(host->cmd_flags & CARD_READY)) 366 && !(host->cmd_flags & CARD_INT))
373 return 1; 367 return 1;
374 } 368 }
375 return 0; 369 return 0;
@@ -379,18 +373,24 @@ static int tifm_ms_check_status(struct tifm_ms *host)
379static void tifm_ms_data_event(struct tifm_dev *sock) 373static void tifm_ms_data_event(struct tifm_dev *sock)
380{ 374{
381 struct tifm_ms *host; 375 struct tifm_ms *host;
382 unsigned int fifo_status = 0; 376 unsigned int fifo_status = 0, host_status = 0;
383 int rc = 1; 377 int rc = 1;
384 378
385 spin_lock(&sock->lock); 379 spin_lock(&sock->lock);
386 host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock)); 380 host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
387 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS); 381 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
388 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n", 382 host_status = readl(sock->addr + SOCK_MS_STATUS);
389 fifo_status, host->cmd_flags); 383 dev_dbg(&sock->dev,
384 "data event: fifo_status %x, host_status %x, flags %x\n",
385 fifo_status, host_status, host->cmd_flags);
390 386
391 if (host->req) { 387 if (host->req) {
392 if (fifo_status & TIFM_FIFO_READY) { 388 if (host->use_dma && (fifo_status & 1)) {
393 if (!host->no_dma || tifm_ms_transfer_data(host, 0)) { 389 host->cmd_flags |= FIFO_READY;
390 rc = tifm_ms_check_status(host);
391 }
392 if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) {
393 if (!tifm_ms_transfer_data(host)) {
394 host->cmd_flags |= FIFO_READY; 394 host->cmd_flags |= FIFO_READY;
395 rc = tifm_ms_check_status(host); 395 rc = tifm_ms_check_status(host);
396 } 396 }
@@ -419,9 +419,9 @@ static void tifm_ms_card_event(struct tifm_dev *sock)
419 host_status, host->cmd_flags); 419 host_status, host->cmd_flags);
420 420
421 if (host->req) { 421 if (host->req) {
422 if (host_status & TIFM_MS_TIMEOUT) 422 if (host_status & TIFM_MS_STAT_TOE)
423 host->req->error = -ETIME; 423 host->req->error = -ETIME;
424 else if (host_status & TIFM_MS_BADCRC) 424 else if (host_status & TIFM_MS_STAT_CRC)
425 host->req->error = -EILSEQ; 425 host->req->error = -EILSEQ;
426 426
427 if (host->req->error) { 427 if (host->req->error) {
@@ -430,18 +430,17 @@ static void tifm_ms_card_event(struct tifm_dev *sock)
430 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); 430 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
431 } 431 }
432 432
433 if (host_status & TIFM_MS_EOTPC) 433 if (host_status & TIFM_MS_STAT_RDY)
434 host->cmd_flags |= CMD_READY; 434 host->cmd_flags |= CMD_READY;
435 if (host_status & TIFM_MS_INT) 435
436 host->cmd_flags |= CARD_READY; 436 if (host_status & TIFM_MS_STAT_MSINT)
437 host->cmd_flags |= CARD_INT;
437 438
438 rc = tifm_ms_check_status(host); 439 rc = tifm_ms_check_status(host);
439 440
440 } 441 }
441 442
442 writel(TIFM_MS_SYS_NOT_RDY | readl(sock->addr + SOCK_MS_SYSTEM), 443 writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
443 sock->addr + SOCK_MS_SYSTEM);
444 writel((~TIFM_MS_SYS_DATA) & readl(sock->addr + SOCK_MS_SYSTEM),
445 sock->addr + SOCK_MS_SYSTEM); 444 sock->addr + SOCK_MS_SYSTEM);
446 445
447 if (!rc) 446 if (!rc)
@@ -497,15 +496,26 @@ static void tifm_ms_set_param(struct memstick_host *msh,
497 496
498 switch (param) { 497 switch (param) {
499 case MEMSTICK_POWER: 498 case MEMSTICK_POWER:
500 /* this is set by card detection mechanism */ 499 /* also affected by media detection mechanism */
500 if (value == MEMSTICK_POWER_ON) {
501 host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
502 writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
503 writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
504 sock->addr + SOCK_MS_SYSTEM);
505 writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
506 } else if (value == MEMSTICK_POWER_OFF) {
507 writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
508 sock->addr + SOCK_MS_SYSTEM);
509 writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
510 }
501 break; 511 break;
502 case MEMSTICK_INTERFACE: 512 case MEMSTICK_INTERFACE:
503 if (value == MEMSTICK_SERIAL) { 513 if (value == MEMSTICK_SERIAL) {
504 host->mode_mask = TIFM_MS_SERIAL; 514 host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
505 writel((~TIFM_CTRL_FAST_CLK) 515 writel((~TIFM_CTRL_FAST_CLK)
506 & readl(sock->addr + SOCK_CONTROL), 516 & readl(sock->addr + SOCK_CONTROL),
507 sock->addr + SOCK_CONTROL); 517 sock->addr + SOCK_CONTROL);
508 } else if (value == MEMSTICK_PARALLEL) { 518 } else if (value == MEMSTICK_PAR4) {
509 host->mode_mask = 0; 519 host->mode_mask = 0;
510 writel(TIFM_CTRL_FAST_CLK 520 writel(TIFM_CTRL_FAST_CLK
511 | readl(sock->addr + SOCK_CONTROL), 521 | readl(sock->addr + SOCK_CONTROL),
@@ -532,21 +542,6 @@ static void tifm_ms_abort(unsigned long data)
532 tifm_eject(host->dev); 542 tifm_eject(host->dev);
533} 543}
534 544
535static int tifm_ms_initialize_host(struct tifm_ms *host)
536{
537 struct tifm_dev *sock = host->dev;
538 struct memstick_host *msh = tifm_get_drvdata(sock);
539
540 host->mode_mask = TIFM_MS_SERIAL;
541 writel(0x8000, sock->addr + SOCK_MS_SYSTEM);
542 writel(0x0200 | TIFM_MS_SYS_NOT_RDY, sock->addr + SOCK_MS_SYSTEM);
543 writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
544 if (tifm_has_ms_pif(sock))
545 msh->caps |= MEMSTICK_CAP_PARALLEL;
546
547 return 0;
548}
549
550static int tifm_ms_probe(struct tifm_dev *sock) 545static int tifm_ms_probe(struct tifm_dev *sock)
551{ 546{
552 struct memstick_host *msh; 547 struct memstick_host *msh;
@@ -568,7 +563,6 @@ static int tifm_ms_probe(struct tifm_dev *sock)
568 tifm_set_drvdata(sock, msh); 563 tifm_set_drvdata(sock, msh);
569 host->dev = sock; 564 host->dev = sock;
570 host->timeout_jiffies = msecs_to_jiffies(1000); 565 host->timeout_jiffies = msecs_to_jiffies(1000);
571 host->no_dma = no_dma;
572 566
573 setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host); 567 setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
574 568
@@ -576,10 +570,10 @@ static int tifm_ms_probe(struct tifm_dev *sock)
576 msh->set_param = tifm_ms_set_param; 570 msh->set_param = tifm_ms_set_param;
577 sock->card_event = tifm_ms_card_event; 571 sock->card_event = tifm_ms_card_event;
578 sock->data_event = tifm_ms_data_event; 572 sock->data_event = tifm_ms_data_event;
579 rc = tifm_ms_initialize_host(host); 573 if (tifm_has_ms_pif(sock))
574 msh->caps |= MEMSTICK_CAP_PAR4;
580 575
581 if (!rc) 576 rc = memstick_add_host(msh);
582 rc = memstick_add_host(msh);
583 if (!rc) 577 if (!rc)
584 return 0; 578 return 0;
585 579
@@ -601,7 +595,7 @@ static void tifm_ms_remove(struct tifm_dev *sock)
601 writel(TIFM_FIFO_INT_SETALL, 595 writel(TIFM_FIFO_INT_SETALL,
602 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 596 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
603 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); 597 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
604 if ((host->req->io_type == MEMSTICK_IO_SG) && !host->no_dma) 598 if (host->use_dma)
605 tifm_unmap_sg(sock, &host->req->sg, 1, 599 tifm_unmap_sg(sock, &host->req->sg, 1,
606 host->req->data_dir == READ 600 host->req->data_dir == READ
607 ? PCI_DMA_TODEVICE 601 ? PCI_DMA_TODEVICE
@@ -617,10 +611,6 @@ static void tifm_ms_remove(struct tifm_dev *sock)
617 spin_unlock_irqrestore(&sock->lock, flags); 611 spin_unlock_irqrestore(&sock->lock, flags);
618 612
619 memstick_remove_host(msh); 613 memstick_remove_host(msh);
620
621 writel(0x0200 | TIFM_MS_SYS_NOT_RDY, sock->addr + SOCK_MS_SYSTEM);
622 writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
623
624 memstick_free_host(msh); 614 memstick_free_host(msh);
625} 615}
626 616
@@ -628,17 +618,17 @@ static void tifm_ms_remove(struct tifm_dev *sock)
628 618
629static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state) 619static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
630{ 620{
621 struct memstick_host *msh = tifm_get_drvdata(sock);
622
623 memstick_suspend_host(msh);
631 return 0; 624 return 0;
632} 625}
633 626
634static int tifm_ms_resume(struct tifm_dev *sock) 627static int tifm_ms_resume(struct tifm_dev *sock)
635{ 628{
636 struct memstick_host *msh = tifm_get_drvdata(sock); 629 struct memstick_host *msh = tifm_get_drvdata(sock);
637 struct tifm_ms *host = memstick_priv(msh);
638
639 tifm_ms_initialize_host(host);
640 memstick_detect_change(msh);
641 630
631 memstick_resume_host(msh);
642 return 0; 632 return 0;
643} 633}
644 634
@@ -679,7 +669,6 @@ MODULE_AUTHOR("Alex Dubov");
679MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver"); 669MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
680MODULE_LICENSE("GPL"); 670MODULE_LICENSE("GPL");
681MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl); 671MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
682MODULE_VERSION(DRIVER_VERSION);
683 672
684module_init(tifm_ms_init); 673module_init(tifm_ms_init);
685module_exit(tifm_ms_exit); 674module_exit(tifm_ms_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-21 07:27:07 -0500