diff options
Diffstat (limited to 'drivers/media')
87 files changed, 5989 insertions, 4457 deletions
diff --git a/drivers/media/common/saa7146_core.c b/drivers/media/common/saa7146_core.c index 50e8b8654018..cd5828b5e9e3 100644 --- a/drivers/media/common/saa7146_core.c +++ b/drivers/media/common/saa7146_core.c | |||
@@ -62,13 +62,15 @@ void saa7146_setgpio(struct saa7146_dev *dev, int port, u32 data) | |||
62 | int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop) | 62 | int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop) |
63 | { | 63 | { |
64 | unsigned long start; | 64 | unsigned long start; |
65 | int err; | ||
65 | 66 | ||
66 | /* wait for registers to be programmed */ | 67 | /* wait for registers to be programmed */ |
67 | start = jiffies; | 68 | start = jiffies; |
68 | while (1) { | 69 | while (1) { |
69 | if (saa7146_read(dev, MC2) & 2) | 70 | err = time_after(jiffies, start + HZ/20); |
70 | break; | 71 | if (saa7146_read(dev, MC2) & 2) |
71 | if (time_after(jiffies, start + HZ/20)) { | 72 | break; |
73 | if (err) { | ||
72 | DEB_S(("timed out while waiting for registers getting programmed\n")); | 74 | DEB_S(("timed out while waiting for registers getting programmed\n")); |
73 | return -ETIMEDOUT; | 75 | return -ETIMEDOUT; |
74 | } | 76 | } |
@@ -79,10 +81,11 @@ int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop) | |||
79 | /* wait for transfer to complete */ | 81 | /* wait for transfer to complete */ |
80 | start = jiffies; | 82 | start = jiffies; |
81 | while (1) { | 83 | while (1) { |
84 | err = time_after(jiffies, start + HZ/4); | ||
82 | if (!(saa7146_read(dev, PSR) & SPCI_DEBI_S)) | 85 | if (!(saa7146_read(dev, PSR) & SPCI_DEBI_S)) |
83 | break; | 86 | break; |
84 | saa7146_read(dev, MC2); | 87 | saa7146_read(dev, MC2); |
85 | if (time_after(jiffies, start + HZ/4)) { | 88 | if (err) { |
86 | DEB_S(("timed out while waiting for transfer completion\n")); | 89 | DEB_S(("timed out while waiting for transfer completion\n")); |
87 | return -ETIMEDOUT; | 90 | return -ETIMEDOUT; |
88 | } | 91 | } |
@@ -512,7 +515,7 @@ int saa7146_register_extension(struct saa7146_extension* ext) | |||
512 | ext->driver.remove = saa7146_remove_one; | 515 | ext->driver.remove = saa7146_remove_one; |
513 | 516 | ||
514 | printk("saa7146: register extension '%s'.\n",ext->name); | 517 | printk("saa7146: register extension '%s'.\n",ext->name); |
515 | return pci_module_init(&ext->driver); | 518 | return pci_register_driver(&ext->driver); |
516 | } | 519 | } |
517 | 520 | ||
518 | int saa7146_unregister_extension(struct saa7146_extension* ext) | 521 | int saa7146_unregister_extension(struct saa7146_extension* ext) |
diff --git a/drivers/media/dvb/Kconfig b/drivers/media/dvb/Kconfig index 01387f883cdf..3f0ec6be03ae 100644 --- a/drivers/media/dvb/Kconfig +++ b/drivers/media/dvb/Kconfig | |||
@@ -40,6 +40,10 @@ comment "Supported BT878 Adapters" | |||
40 | depends on DVB_CORE && PCI | 40 | depends on DVB_CORE && PCI |
41 | source "drivers/media/dvb/bt8xx/Kconfig" | 41 | source "drivers/media/dvb/bt8xx/Kconfig" |
42 | 42 | ||
43 | comment "Supported Pluto2 Adapters" | ||
44 | depends on DVB_CORE && PCI | ||
45 | source "drivers/media/dvb/pluto2/Kconfig" | ||
46 | |||
43 | comment "Supported DVB Frontends" | 47 | comment "Supported DVB Frontends" |
44 | depends on DVB_CORE | 48 | depends on DVB_CORE |
45 | source "drivers/media/dvb/frontends/Kconfig" | 49 | source "drivers/media/dvb/frontends/Kconfig" |
diff --git a/drivers/media/dvb/Makefile b/drivers/media/dvb/Makefile index 3c6ff1619103..a7ad0841e6fc 100644 --- a/drivers/media/dvb/Makefile +++ b/drivers/media/dvb/Makefile | |||
@@ -2,4 +2,4 @@ | |||
2 | # Makefile for the kernel multimedia device drivers. | 2 | # Makefile for the kernel multimedia device drivers. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := dvb-core/ frontends/ ttpci/ ttusb-dec/ ttusb-budget/ b2c2/ bt8xx/ cinergyT2/ dvb-usb/ | 5 | obj-y := dvb-core/ frontends/ ttpci/ ttusb-dec/ ttusb-budget/ b2c2/ bt8xx/ cinergyT2/ dvb-usb/ pluto2/ |
diff --git a/drivers/media/dvb/b2c2/Kconfig b/drivers/media/dvb/b2c2/Kconfig index fafd0ab3a28f..d7417eac2aba 100644 --- a/drivers/media/dvb/b2c2/Kconfig +++ b/drivers/media/dvb/b2c2/Kconfig | |||
@@ -35,17 +35,3 @@ config DVB_B2C2_FLEXCOP_DEBUG | |||
35 | help | 35 | help |
36 | Say Y if you want to enable the module option to control debug messages | 36 | Say Y if you want to enable the module option to control debug messages |
37 | of all B2C2 FlexCop drivers. | 37 | of all B2C2 FlexCop drivers. |
38 | |||
39 | config DVB_B2C2_SKYSTAR | ||
40 | tristate "B2C2/Technisat Air/Sky/CableStar 2 PCI" | ||
41 | depends on DVB_CORE && PCI | ||
42 | select DVB_STV0299 | ||
43 | select DVB_MT352 | ||
44 | select DVB_MT312 | ||
45 | select DVB_NXT2002 | ||
46 | help | ||
47 | Support for the Skystar2 PCI DVB card by Technisat, which | ||
48 | is equipped with the FlexCopII chipset by B2C2, and | ||
49 | for the B2C2/BBTI Air2PC-ATSC card. | ||
50 | |||
51 | Say Y if you own such a device and want to use it. | ||
diff --git a/drivers/media/dvb/b2c2/Makefile b/drivers/media/dvb/b2c2/Makefile index 7703812af34f..1a1c3bca55fa 100644 --- a/drivers/media/dvb/b2c2/Makefile +++ b/drivers/media/dvb/b2c2/Makefile | |||
@@ -9,6 +9,4 @@ obj-$(CONFIG_DVB_B2C2_FLEXCOP_PCI) += b2c2-flexcop-pci.o | |||
9 | b2c2-flexcop-usb-objs = flexcop-usb.o | 9 | b2c2-flexcop-usb-objs = flexcop-usb.o |
10 | obj-$(CONFIG_DVB_B2C2_FLEXCOP_USB) += b2c2-flexcop-usb.o | 10 | obj-$(CONFIG_DVB_B2C2_FLEXCOP_USB) += b2c2-flexcop-usb.o |
11 | 11 | ||
12 | obj-$(CONFIG_DVB_B2C2_SKYSTAR) += skystar2.o | ||
13 | |||
14 | EXTRA_CFLAGS = -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/ | 12 | EXTRA_CFLAGS = -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/ |
diff --git a/drivers/media/dvb/b2c2/flexcop-common.h b/drivers/media/dvb/b2c2/flexcop-common.h index 773d158032df..a94912ac1872 100644 --- a/drivers/media/dvb/b2c2/flexcop-common.h +++ b/drivers/media/dvb/b2c2/flexcop-common.h | |||
@@ -108,6 +108,8 @@ void flexcop_device_kfree(struct flexcop_device*); | |||
108 | int flexcop_device_initialize(struct flexcop_device*); | 108 | int flexcop_device_initialize(struct flexcop_device*); |
109 | void flexcop_device_exit(struct flexcop_device *fc); | 109 | void flexcop_device_exit(struct flexcop_device *fc); |
110 | 110 | ||
111 | void flexcop_reset_block_300(struct flexcop_device *fc); | ||
112 | |||
111 | /* from flexcop-dma.c */ | 113 | /* from flexcop-dma.c */ |
112 | int flexcop_dma_allocate(struct pci_dev *pdev, struct flexcop_dma *dma, u32 size); | 114 | int flexcop_dma_allocate(struct pci_dev *pdev, struct flexcop_dma *dma, u32 size); |
113 | void flexcop_dma_free(struct flexcop_dma *dma); | 115 | void flexcop_dma_free(struct flexcop_dma *dma); |
@@ -115,7 +117,8 @@ void flexcop_dma_free(struct flexcop_dma *dma); | |||
115 | int flexcop_dma_control_timer_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); | 117 | int flexcop_dma_control_timer_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); |
116 | int flexcop_dma_control_size_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); | 118 | int flexcop_dma_control_size_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); |
117 | int flexcop_dma_control_packet_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); | 119 | int flexcop_dma_control_packet_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); |
118 | int flexcop_dma_config(struct flexcop_device *fc, struct flexcop_dma *dma, flexcop_dma_index_t dma_idx,flexcop_dma_addr_index_t index); | 120 | int flexcop_dma_config(struct flexcop_device *fc, struct flexcop_dma *dma, flexcop_dma_index_t dma_idx); |
121 | int flexcop_dma_xfer_control(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, flexcop_dma_addr_index_t index, int onoff); | ||
119 | int flexcop_dma_config_timer(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 cycles); | 122 | int flexcop_dma_config_timer(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 cycles); |
120 | int flexcop_dma_config_packet_count(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 packets); | 123 | int flexcop_dma_config_packet_count(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 packets); |
121 | 124 | ||
@@ -151,6 +154,7 @@ int flexcop_sram_init(struct flexcop_device *fc); | |||
151 | /* from flexcop-misc.c */ | 154 | /* from flexcop-misc.c */ |
152 | void flexcop_determine_revision(struct flexcop_device *fc); | 155 | void flexcop_determine_revision(struct flexcop_device *fc); |
153 | void flexcop_device_name(struct flexcop_device *fc,const char *prefix,const char *suffix); | 156 | void flexcop_device_name(struct flexcop_device *fc,const char *prefix,const char *suffix); |
157 | void flexcop_dump_reg(struct flexcop_device *fc, flexcop_ibi_register reg, int num); | ||
154 | 158 | ||
155 | /* from flexcop-hw-filter.c */ | 159 | /* from flexcop-hw-filter.c */ |
156 | int flexcop_pid_feed_control(struct flexcop_device *fc, struct dvb_demux_feed *dvbdmxfeed, int onoff); | 160 | int flexcop_pid_feed_control(struct flexcop_device *fc, struct dvb_demux_feed *dvbdmxfeed, int onoff); |
diff --git a/drivers/media/dvb/b2c2/flexcop-dma.c b/drivers/media/dvb/b2c2/flexcop-dma.c index 8d2706075360..cf4ed1df6086 100644 --- a/drivers/media/dvb/b2c2/flexcop-dma.c +++ b/drivers/media/dvb/b2c2/flexcop-dma.c | |||
@@ -37,22 +37,90 @@ void flexcop_dma_free(struct flexcop_dma *dma) | |||
37 | } | 37 | } |
38 | EXPORT_SYMBOL(flexcop_dma_free); | 38 | EXPORT_SYMBOL(flexcop_dma_free); |
39 | 39 | ||
40 | int flexcop_dma_control_timer_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff) | 40 | int flexcop_dma_config(struct flexcop_device *fc, |
41 | struct flexcop_dma *dma, | ||
42 | flexcop_dma_index_t dma_idx) | ||
41 | { | 43 | { |
42 | flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); | 44 | flexcop_ibi_value v0x0,v0x4,v0xc; |
45 | v0x0.raw = v0x4.raw = v0xc.raw = 0; | ||
43 | 46 | ||
44 | if (no & FC_DMA_1) | 47 | v0x0.dma_0x0.dma_address0 = dma->dma_addr0 >> 2; |
45 | v.ctrl_208.DMA1_Timer_Enable_sig = onoff; | 48 | v0xc.dma_0xc.dma_address1 = dma->dma_addr1 >> 2; |
49 | v0x4.dma_0x4_write.dma_addr_size = dma->size / 4; | ||
46 | 50 | ||
47 | if (no & FC_DMA_2) | 51 | if ((dma_idx & FC_DMA_1) == dma_idx) { |
48 | v.ctrl_208.DMA2_Timer_Enable_sig = onoff; | 52 | fc->write_ibi_reg(fc,dma1_000,v0x0); |
53 | fc->write_ibi_reg(fc,dma1_004,v0x4); | ||
54 | fc->write_ibi_reg(fc,dma1_00c,v0xc); | ||
55 | } else if ((dma_idx & FC_DMA_2) == dma_idx) { | ||
56 | fc->write_ibi_reg(fc,dma2_010,v0x0); | ||
57 | fc->write_ibi_reg(fc,dma2_014,v0x4); | ||
58 | fc->write_ibi_reg(fc,dma2_01c,v0xc); | ||
59 | } else { | ||
60 | err("either DMA1 or DMA2 can be configured at the within one flexcop_dma_config call."); | ||
61 | return -EINVAL; | ||
62 | } | ||
49 | 63 | ||
50 | fc->write_ibi_reg(fc,ctrl_208,v); | ||
51 | return 0; | 64 | return 0; |
52 | } | 65 | } |
53 | EXPORT_SYMBOL(flexcop_dma_control_timer_irq); | 66 | EXPORT_SYMBOL(flexcop_dma_config); |
67 | |||
68 | /* start the DMA transfers, but not the DMA IRQs */ | ||
69 | int flexcop_dma_xfer_control(struct flexcop_device *fc, | ||
70 | flexcop_dma_index_t dma_idx, | ||
71 | flexcop_dma_addr_index_t index, | ||
72 | int onoff) | ||
73 | { | ||
74 | flexcop_ibi_value v0x0,v0xc; | ||
75 | flexcop_ibi_register r0x0,r0xc; | ||
76 | |||
77 | if ((dma_idx & FC_DMA_1) == dma_idx) { | ||
78 | r0x0 = dma1_000; | ||
79 | r0xc = dma1_00c; | ||
80 | } else if ((dma_idx & FC_DMA_2) == dma_idx) { | ||
81 | r0x0 = dma2_010; | ||
82 | r0xc = dma2_01c; | ||
83 | } else { | ||
84 | err("either transfer DMA1 or DMA2 can be started within one flexcop_dma_xfer_control call."); | ||
85 | return -EINVAL; | ||
86 | } | ||
87 | |||
88 | v0x0 = fc->read_ibi_reg(fc,r0x0); | ||
89 | v0xc = fc->read_ibi_reg(fc,r0xc); | ||
90 | |||
91 | deb_rdump("reg: %03x: %x\n",r0x0,v0x0.raw); | ||
92 | deb_rdump("reg: %03x: %x\n",r0xc,v0xc.raw); | ||
93 | |||
94 | if (index & FC_DMA_SUBADDR_0) | ||
95 | v0x0.dma_0x0.dma_0start = onoff; | ||
96 | |||
97 | if (index & FC_DMA_SUBADDR_1) | ||
98 | v0xc.dma_0xc.dma_1start = onoff; | ||
99 | |||
100 | fc->write_ibi_reg(fc,r0x0,v0x0); | ||
101 | fc->write_ibi_reg(fc,r0xc,v0xc); | ||
102 | |||
103 | deb_rdump("reg: %03x: %x\n",r0x0,v0x0.raw); | ||
104 | deb_rdump("reg: %03x: %x\n",r0xc,v0xc.raw); | ||
105 | return 0; | ||
106 | } | ||
107 | EXPORT_SYMBOL(flexcop_dma_xfer_control); | ||
108 | |||
109 | static int flexcop_dma_remap(struct flexcop_device *fc, | ||
110 | flexcop_dma_index_t dma_idx, | ||
111 | int onoff) | ||
112 | { | ||
113 | flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_00c : dma2_01c; | ||
114 | flexcop_ibi_value v = fc->read_ibi_reg(fc,r); | ||
115 | deb_info("%s\n",__FUNCTION__); | ||
116 | v.dma_0xc.remap_enable = onoff; | ||
117 | fc->write_ibi_reg(fc,r,v); | ||
118 | return 0; | ||
119 | } | ||
54 | 120 | ||
55 | int flexcop_dma_control_size_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff) | 121 | int flexcop_dma_control_size_irq(struct flexcop_device *fc, |
122 | flexcop_dma_index_t no, | ||
123 | int onoff) | ||
56 | { | 124 | { |
57 | flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); | 125 | flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); |
58 | 126 | ||
@@ -67,75 +135,64 @@ int flexcop_dma_control_size_irq(struct flexcop_device *fc, flexcop_dma_index_t | |||
67 | } | 135 | } |
68 | EXPORT_SYMBOL(flexcop_dma_control_size_irq); | 136 | EXPORT_SYMBOL(flexcop_dma_control_size_irq); |
69 | 137 | ||
70 | int flexcop_dma_control_packet_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff) | 138 | int flexcop_dma_control_timer_irq(struct flexcop_device *fc, |
139 | flexcop_dma_index_t no, | ||
140 | int onoff) | ||
71 | { | 141 | { |
72 | flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); | 142 | flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); |
73 | 143 | ||
74 | if (no & FC_DMA_1) | 144 | if (no & FC_DMA_1) |
75 | v.ctrl_208.DMA1_Size_IRQ_Enable_sig = onoff; | 145 | v.ctrl_208.DMA1_Timer_Enable_sig = onoff; |
76 | 146 | ||
77 | if (no & FC_DMA_2) | 147 | if (no & FC_DMA_2) |
78 | v.ctrl_208.DMA2_Size_IRQ_Enable_sig = onoff; | 148 | v.ctrl_208.DMA2_Timer_Enable_sig = onoff; |
79 | 149 | ||
80 | fc->write_ibi_reg(fc,ctrl_208,v); | 150 | fc->write_ibi_reg(fc,ctrl_208,v); |
81 | return 0; | 151 | return 0; |
82 | } | 152 | } |
83 | EXPORT_SYMBOL(flexcop_dma_control_packet_irq); | 153 | EXPORT_SYMBOL(flexcop_dma_control_timer_irq); |
84 | 154 | ||
85 | int flexcop_dma_config(struct flexcop_device *fc, struct flexcop_dma *dma, flexcop_dma_index_t dma_idx,flexcop_dma_addr_index_t index) | 155 | /* 1 cycles = 1.97 msec */ |
156 | int flexcop_dma_config_timer(struct flexcop_device *fc, | ||
157 | flexcop_dma_index_t dma_idx, | ||
158 | u8 cycles) | ||
86 | { | 159 | { |
160 | flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014; | ||
161 | flexcop_ibi_value v = fc->read_ibi_reg(fc,r); | ||
87 | 162 | ||
88 | flexcop_ibi_value v0x0,v0x4,v0xc; | 163 | flexcop_dma_remap(fc,dma_idx,0); |
89 | v0x0.raw = v0x4.raw = v0xc.raw = 0; | ||
90 | |||
91 | v0x0.dma_0x0.dma_address0 = dma->dma_addr0 >> 2; | ||
92 | v0xc.dma_0xc.dma_address1 = dma->dma_addr1 >> 2; | ||
93 | v0x4.dma_0x4_write.dma_addr_size = dma->size / 4; | ||
94 | |||
95 | if (index & FC_DMA_SUBADDR_0) | ||
96 | v0x0.dma_0x0.dma_0start = 1; | ||
97 | |||
98 | if (index & FC_DMA_SUBADDR_1) | ||
99 | v0xc.dma_0xc.dma_1start = 1; | ||
100 | |||
101 | if (dma_idx & FC_DMA_1) { | ||
102 | fc->write_ibi_reg(fc,dma1_000,v0x0); | ||
103 | fc->write_ibi_reg(fc,dma1_004,v0x4); | ||
104 | fc->write_ibi_reg(fc,dma1_00c,v0xc); | ||
105 | } else { /* (dma_idx & FC_DMA_2) */ | ||
106 | fc->write_ibi_reg(fc,dma2_010,v0x0); | ||
107 | fc->write_ibi_reg(fc,dma2_014,v0x4); | ||
108 | fc->write_ibi_reg(fc,dma2_01c,v0xc); | ||
109 | } | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | EXPORT_SYMBOL(flexcop_dma_config); | ||
114 | 164 | ||
115 | static int flexcop_dma_remap(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, int onoff) | 165 | deb_info("%s\n",__FUNCTION__); |
116 | { | 166 | v.dma_0x4_write.dmatimer = cycles; |
117 | flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_00c : dma2_01c; | ||
118 | flexcop_ibi_value v = fc->read_ibi_reg(fc,r); | ||
119 | v.dma_0xc.remap_enable = onoff; | ||
120 | fc->write_ibi_reg(fc,r,v); | 167 | fc->write_ibi_reg(fc,r,v); |
121 | return 0; | 168 | return 0; |
122 | } | 169 | } |
170 | EXPORT_SYMBOL(flexcop_dma_config_timer); | ||
123 | 171 | ||
124 | /* 1 cycles = 1.97 msec */ | 172 | /* packet IRQ does not exist in FCII or FCIIb - according to data book and tests */ |
125 | int flexcop_dma_config_timer(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 cycles) | 173 | int flexcop_dma_control_packet_irq(struct flexcop_device *fc, |
174 | flexcop_dma_index_t no, | ||
175 | int onoff) | ||
126 | { | 176 | { |
127 | flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014; | 177 | flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); |
128 | flexcop_ibi_value v = fc->read_ibi_reg(fc,r); | ||
129 | 178 | ||
130 | flexcop_dma_remap(fc,dma_idx,0); | 179 | deb_rdump("reg: %03x: %x\n",ctrl_208,v.raw); |
180 | if (no & FC_DMA_1) | ||
181 | v.ctrl_208.DMA1_Size_IRQ_Enable_sig = onoff; | ||
182 | |||
183 | if (no & FC_DMA_2) | ||
184 | v.ctrl_208.DMA2_Size_IRQ_Enable_sig = onoff; | ||
185 | |||
186 | fc->write_ibi_reg(fc,ctrl_208,v); | ||
187 | deb_rdump("reg: %03x: %x\n",ctrl_208,v.raw); | ||
131 | 188 | ||
132 | v.dma_0x4_write.dmatimer = cycles >> 1; | ||
133 | fc->write_ibi_reg(fc,r,v); | ||
134 | return 0; | 189 | return 0; |
135 | } | 190 | } |
136 | EXPORT_SYMBOL(flexcop_dma_config_timer); | 191 | EXPORT_SYMBOL(flexcop_dma_control_packet_irq); |
137 | 192 | ||
138 | int flexcop_dma_config_packet_count(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 packets) | 193 | int flexcop_dma_config_packet_count(struct flexcop_device *fc, |
194 | flexcop_dma_index_t dma_idx, | ||
195 | u8 packets) | ||
139 | { | 196 | { |
140 | flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014; | 197 | flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014; |
141 | flexcop_ibi_value v = fc->read_ibi_reg(fc,r); | 198 | flexcop_ibi_value v = fc->read_ibi_reg(fc,r); |
diff --git a/drivers/media/dvb/b2c2/flexcop-hw-filter.c b/drivers/media/dvb/b2c2/flexcop-hw-filter.c index 2baf43d3ce8f..75cf237196eb 100644 --- a/drivers/media/dvb/b2c2/flexcop-hw-filter.c +++ b/drivers/media/dvb/b2c2/flexcop-hw-filter.c | |||
@@ -10,6 +10,8 @@ | |||
10 | static void flexcop_rcv_data_ctrl(struct flexcop_device *fc, int onoff) | 10 | static void flexcop_rcv_data_ctrl(struct flexcop_device *fc, int onoff) |
11 | { | 11 | { |
12 | flexcop_set_ibi_value(ctrl_208,Rcv_Data_sig,onoff); | 12 | flexcop_set_ibi_value(ctrl_208,Rcv_Data_sig,onoff); |
13 | |||
14 | deb_ts("rcv_data is now: '%s'\n",onoff ? "on" : "off"); | ||
13 | } | 15 | } |
14 | 16 | ||
15 | void flexcop_smc_ctrl(struct flexcop_device *fc, int onoff) | 17 | void flexcop_smc_ctrl(struct flexcop_device *fc, int onoff) |
@@ -151,7 +153,7 @@ int flexcop_pid_feed_control(struct flexcop_device *fc, struct dvb_demux_feed *d | |||
151 | { | 153 | { |
152 | int max_pid_filter = 6 + fc->has_32_hw_pid_filter*32; | 154 | int max_pid_filter = 6 + fc->has_32_hw_pid_filter*32; |
153 | 155 | ||
154 | fc->feedcount += onoff ? 1 : -1; | 156 | fc->feedcount += onoff ? 1 : -1; /* the number of PIDs/Feed currently requested */ |
155 | if (dvbdmxfeed->index >= max_pid_filter) | 157 | if (dvbdmxfeed->index >= max_pid_filter) |
156 | fc->extra_feedcount += onoff ? 1 : -1; | 158 | fc->extra_feedcount += onoff ? 1 : -1; |
157 | 159 | ||
@@ -178,8 +180,14 @@ int flexcop_pid_feed_control(struct flexcop_device *fc, struct dvb_demux_feed *d | |||
178 | /* if it was the first or last feed request change the stream-status */ | 180 | /* if it was the first or last feed request change the stream-status */ |
179 | if (fc->feedcount == onoff) { | 181 | if (fc->feedcount == onoff) { |
180 | flexcop_rcv_data_ctrl(fc,onoff); | 182 | flexcop_rcv_data_ctrl(fc,onoff); |
181 | if (fc->stream_control) | 183 | if (fc->stream_control) /* device specific stream control */ |
182 | fc->stream_control(fc,onoff); | 184 | fc->stream_control(fc,onoff); |
185 | |||
186 | /* feeding stopped -> reset the flexcop filter*/ | ||
187 | if (onoff == 0) { | ||
188 | flexcop_reset_block_300(fc); | ||
189 | flexcop_hw_filter_init(fc); | ||
190 | } | ||
183 | } | 191 | } |
184 | 192 | ||
185 | return 0; | 193 | return 0; |
diff --git a/drivers/media/dvb/b2c2/flexcop-misc.c b/drivers/media/dvb/b2c2/flexcop-misc.c index 23082545651f..3a08d38b318a 100644 --- a/drivers/media/dvb/b2c2/flexcop-misc.c +++ b/drivers/media/dvb/b2c2/flexcop-misc.c | |||
@@ -65,3 +65,15 @@ void flexcop_device_name(struct flexcop_device *fc,const char *prefix,const | |||
65 | flexcop_device_names[fc->dev_type],flexcop_bus_names[fc->bus_type], | 65 | flexcop_device_names[fc->dev_type],flexcop_bus_names[fc->bus_type], |
66 | flexcop_revision_names[fc->rev],suffix); | 66 | flexcop_revision_names[fc->rev],suffix); |
67 | } | 67 | } |
68 | |||
69 | void flexcop_dump_reg(struct flexcop_device *fc, flexcop_ibi_register reg, int num) | ||
70 | { | ||
71 | flexcop_ibi_value v; | ||
72 | int i; | ||
73 | for (i = 0; i < num; i++) { | ||
74 | v = fc->read_ibi_reg(fc,reg+4*i); | ||
75 | deb_rdump("0x%03x: %08x, ",reg+4*i, v.raw); | ||
76 | } | ||
77 | deb_rdump("\n"); | ||
78 | } | ||
79 | EXPORT_SYMBOL(flexcop_dump_reg); | ||
diff --git a/drivers/media/dvb/b2c2/flexcop-pci.c b/drivers/media/dvb/b2c2/flexcop-pci.c index ed717c0073d5..2f76eb3fea40 100644 --- a/drivers/media/dvb/b2c2/flexcop-pci.c +++ b/drivers/media/dvb/b2c2/flexcop-pci.c | |||
@@ -13,6 +13,10 @@ static int enable_pid_filtering = 1; | |||
13 | module_param(enable_pid_filtering, int, 0444); | 13 | module_param(enable_pid_filtering, int, 0444); |
14 | MODULE_PARM_DESC(enable_pid_filtering, "enable hardware pid filtering: supported values: 0 (fullts), 1"); | 14 | MODULE_PARM_DESC(enable_pid_filtering, "enable hardware pid filtering: supported values: 0 (fullts), 1"); |
15 | 15 | ||
16 | static int irq_chk_intv; | ||
17 | module_param(irq_chk_intv, int, 0644); | ||
18 | MODULE_PARM_DESC(irq_chk_intv, "set the interval for IRQ watchdog (currently just debugging)."); | ||
19 | |||
16 | #ifdef CONFIG_DVB_B2C2_FLEXCOP_DEBUG | 20 | #ifdef CONFIG_DVB_B2C2_FLEXCOP_DEBUG |
17 | #define dprintk(level,args...) \ | 21 | #define dprintk(level,args...) \ |
18 | do { if ((debug & level)) printk(args); } while (0) | 22 | do { if ((debug & level)) printk(args); } while (0) |
@@ -26,6 +30,7 @@ MODULE_PARM_DESC(enable_pid_filtering, "enable hardware pid filtering: supported | |||
26 | #define deb_reg(args...) dprintk(0x02,args) | 30 | #define deb_reg(args...) dprintk(0x02,args) |
27 | #define deb_ts(args...) dprintk(0x04,args) | 31 | #define deb_ts(args...) dprintk(0x04,args) |
28 | #define deb_irq(args...) dprintk(0x08,args) | 32 | #define deb_irq(args...) dprintk(0x08,args) |
33 | #define deb_chk(args...) dprintk(0x10,args) | ||
29 | 34 | ||
30 | static int debug = 0; | 35 | static int debug = 0; |
31 | module_param(debug, int, 0644); | 36 | module_param(debug, int, 0644); |
@@ -56,6 +61,10 @@ struct flexcop_pci { | |||
56 | 61 | ||
57 | spinlock_t irq_lock; | 62 | spinlock_t irq_lock; |
58 | 63 | ||
64 | unsigned long last_irq; | ||
65 | |||
66 | struct work_struct irq_check_work; | ||
67 | |||
59 | struct flexcop_device *fc_dev; | 68 | struct flexcop_device *fc_dev; |
60 | }; | 69 | }; |
61 | 70 | ||
@@ -88,18 +97,55 @@ static int flexcop_pci_write_ibi_reg(struct flexcop_device *fc, flexcop_ibi_regi | |||
88 | return 0; | 97 | return 0; |
89 | } | 98 | } |
90 | 99 | ||
100 | static void flexcop_pci_irq_check_work(void *data) | ||
101 | { | ||
102 | struct flexcop_pci *fc_pci = data; | ||
103 | struct flexcop_device *fc = fc_pci->fc_dev; | ||
104 | |||
105 | flexcop_ibi_value v = fc->read_ibi_reg(fc,sram_dest_reg_714); | ||
106 | |||
107 | flexcop_dump_reg(fc_pci->fc_dev,dma1_000,4); | ||
108 | |||
109 | if (v.sram_dest_reg_714.net_ovflow_error) | ||
110 | deb_chk("sram net_ovflow_error\n"); | ||
111 | if (v.sram_dest_reg_714.media_ovflow_error) | ||
112 | deb_chk("sram media_ovflow_error\n"); | ||
113 | if (v.sram_dest_reg_714.cai_ovflow_error) | ||
114 | deb_chk("sram cai_ovflow_error\n"); | ||
115 | if (v.sram_dest_reg_714.cai_ovflow_error) | ||
116 | deb_chk("sram cai_ovflow_error\n"); | ||
117 | |||
118 | schedule_delayed_work(&fc_pci->irq_check_work, | ||
119 | msecs_to_jiffies(irq_chk_intv < 100 ? 100 : irq_chk_intv)); | ||
120 | } | ||
121 | |||
91 | /* When PID filtering is turned on, we use the timer IRQ, because small amounts | 122 | /* When PID filtering is turned on, we use the timer IRQ, because small amounts |
92 | * of data need to be passed to the user space instantly as well. When PID | 123 | * of data need to be passed to the user space instantly as well. When PID |
93 | * filtering is turned off, we use the page-change-IRQ */ | 124 | * filtering is turned off, we use the page-change-IRQ */ |
94 | static irqreturn_t flexcop_pci_irq(int irq, void *dev_id, struct pt_regs *regs) | 125 | static irqreturn_t flexcop_pci_isr(int irq, void *dev_id, struct pt_regs *regs) |
95 | { | 126 | { |
96 | struct flexcop_pci *fc_pci = dev_id; | 127 | struct flexcop_pci *fc_pci = dev_id; |
97 | struct flexcop_device *fc = fc_pci->fc_dev; | 128 | struct flexcop_device *fc = fc_pci->fc_dev; |
98 | flexcop_ibi_value v = fc->read_ibi_reg(fc,irq_20c); | 129 | flexcop_ibi_value v; |
99 | irqreturn_t ret = IRQ_HANDLED; | 130 | irqreturn_t ret = IRQ_HANDLED; |
100 | 131 | ||
101 | spin_lock_irq(&fc_pci->irq_lock); | 132 | spin_lock_irq(&fc_pci->irq_lock); |
102 | 133 | ||
134 | v = fc->read_ibi_reg(fc,irq_20c); | ||
135 | |||
136 | /* errors */ | ||
137 | if (v.irq_20c.Data_receiver_error) | ||
138 | deb_chk("data receiver error\n"); | ||
139 | if (v.irq_20c.Continuity_error_flag) | ||
140 | deb_chk("Contunuity error flag is set\n"); | ||
141 | if (v.irq_20c.LLC_SNAP_FLAG_set) | ||
142 | deb_chk("LLC_SNAP_FLAG_set is set\n"); | ||
143 | if (v.irq_20c.Transport_Error) | ||
144 | deb_chk("Transport error\n"); | ||
145 | |||
146 | if ((fc_pci->count % 1000) == 0) | ||
147 | deb_chk("%d valid irq took place so far\n",fc_pci->count); | ||
148 | |||
103 | if (v.irq_20c.DMA1_IRQ_Status == 1) { | 149 | if (v.irq_20c.DMA1_IRQ_Status == 1) { |
104 | if (fc_pci->active_dma1_addr == 0) | 150 | if (fc_pci->active_dma1_addr == 0) |
105 | flexcop_pass_dmx_packets(fc_pci->fc_dev,fc_pci->dma[0].cpu_addr0,fc_pci->dma[0].size / 188); | 151 | flexcop_pass_dmx_packets(fc_pci->fc_dev,fc_pci->dma[0].cpu_addr0,fc_pci->dma[0].size / 188); |
@@ -115,8 +161,9 @@ static irqreturn_t flexcop_pci_irq(int irq, void *dev_id, struct pt_regs *regs) | |||
115 | fc->read_ibi_reg(fc,dma1_008).dma_0x8.dma_cur_addr << 2; | 161 | fc->read_ibi_reg(fc,dma1_008).dma_0x8.dma_cur_addr << 2; |
116 | u32 cur_pos = cur_addr - fc_pci->dma[0].dma_addr0; | 162 | u32 cur_pos = cur_addr - fc_pci->dma[0].dma_addr0; |
117 | 163 | ||
118 | deb_irq("irq: %08x cur_addr: %08x: cur_pos: %08x, last_cur_pos: %08x ", | 164 | deb_irq("%u irq: %08x cur_addr: %08x: cur_pos: %08x, last_cur_pos: %08x ", |
119 | v.raw,cur_addr,cur_pos,fc_pci->last_dma1_cur_pos); | 165 | jiffies_to_usecs(jiffies - fc_pci->last_irq),v.raw,cur_addr,cur_pos,fc_pci->last_dma1_cur_pos); |
166 | fc_pci->last_irq = jiffies; | ||
120 | 167 | ||
121 | /* buffer end was reached, restarted from the beginning | 168 | /* buffer end was reached, restarted from the beginning |
122 | * pass the data from last_cur_pos to the buffer end to the demux | 169 | * pass the data from last_cur_pos to the buffer end to the demux |
@@ -127,7 +174,6 @@ static irqreturn_t flexcop_pci_irq(int irq, void *dev_id, struct pt_regs *regs) | |||
127 | fc_pci->dma[0].cpu_addr0 + fc_pci->last_dma1_cur_pos, | 174 | fc_pci->dma[0].cpu_addr0 + fc_pci->last_dma1_cur_pos, |
128 | (fc_pci->dma[0].size*2) - fc_pci->last_dma1_cur_pos); | 175 | (fc_pci->dma[0].size*2) - fc_pci->last_dma1_cur_pos); |
129 | fc_pci->last_dma1_cur_pos = 0; | 176 | fc_pci->last_dma1_cur_pos = 0; |
130 | fc_pci->count = 0; | ||
131 | } | 177 | } |
132 | 178 | ||
133 | if (cur_pos > fc_pci->last_dma1_cur_pos) { | 179 | if (cur_pos > fc_pci->last_dma1_cur_pos) { |
@@ -139,16 +185,14 @@ static irqreturn_t flexcop_pci_irq(int irq, void *dev_id, struct pt_regs *regs) | |||
139 | deb_irq("\n"); | 185 | deb_irq("\n"); |
140 | 186 | ||
141 | fc_pci->last_dma1_cur_pos = cur_pos; | 187 | fc_pci->last_dma1_cur_pos = cur_pos; |
142 | } else | 188 | fc_pci->count++; |
189 | } else { | ||
190 | deb_irq("isr for flexcop called, apparently without reason (%08x)\n",v.raw); | ||
143 | ret = IRQ_NONE; | 191 | ret = IRQ_NONE; |
192 | } | ||
144 | 193 | ||
145 | spin_unlock_irq(&fc_pci->irq_lock); | 194 | spin_unlock_irq(&fc_pci->irq_lock); |
146 | 195 | ||
147 | /* packet count would be ideal for hw filtering, but it isn't working. Either | ||
148 | * the data book is wrong, or I'm unable to read it correctly */ | ||
149 | |||
150 | /* if (v.irq_20c.DMA1_Size_IRQ_Status == 1) { packet counter */ | ||
151 | |||
152 | return ret; | 196 | return ret; |
153 | } | 197 | } |
154 | 198 | ||
@@ -156,30 +200,35 @@ static int flexcop_pci_stream_control(struct flexcop_device *fc, int onoff) | |||
156 | { | 200 | { |
157 | struct flexcop_pci *fc_pci = fc->bus_specific; | 201 | struct flexcop_pci *fc_pci = fc->bus_specific; |
158 | if (onoff) { | 202 | if (onoff) { |
159 | flexcop_dma_config(fc,&fc_pci->dma[0],FC_DMA_1,FC_DMA_SUBADDR_0 | FC_DMA_SUBADDR_1); | 203 | flexcop_dma_config(fc,&fc_pci->dma[0],FC_DMA_1); |
160 | flexcop_dma_config(fc,&fc_pci->dma[1],FC_DMA_2,FC_DMA_SUBADDR_0 | FC_DMA_SUBADDR_1); | 204 | flexcop_dma_config(fc,&fc_pci->dma[1],FC_DMA_2); |
161 | flexcop_dma_config_timer(fc,FC_DMA_1,1); | ||
162 | 205 | ||
163 | if (fc_pci->fc_dev->pid_filtering) { | 206 | flexcop_dma_config_timer(fc,FC_DMA_1,0); |
164 | fc_pci->last_dma1_cur_pos = 0; | ||
165 | flexcop_dma_control_timer_irq(fc,FC_DMA_1,1); | ||
166 | } else { | ||
167 | fc_pci->active_dma1_addr = 0; | ||
168 | flexcop_dma_control_size_irq(fc,FC_DMA_1,1); | ||
169 | } | ||
170 | 207 | ||
171 | /* flexcop_dma_config_packet_count(fc,FC_DMA_1,0xc0); | 208 | flexcop_dma_xfer_control(fc,FC_DMA_1,FC_DMA_SUBADDR_0 | FC_DMA_SUBADDR_1,1); |
172 | flexcop_dma_control_packet_irq(fc,FC_DMA_1,1); */ | 209 | deb_irq("DMA xfer enabled\n"); |
173 | 210 | ||
174 | deb_irq("irqs enabled\n"); | 211 | fc_pci->last_dma1_cur_pos = 0; |
212 | flexcop_dma_control_timer_irq(fc,FC_DMA_1,1); | ||
213 | deb_irq("IRQ enabled\n"); | ||
214 | |||
215 | // fc_pci->active_dma1_addr = 0; | ||
216 | // flexcop_dma_control_size_irq(fc,FC_DMA_1,1); | ||
217 | |||
218 | if (irq_chk_intv > 0) | ||
219 | schedule_delayed_work(&fc_pci->irq_check_work, | ||
220 | msecs_to_jiffies(irq_chk_intv < 100 ? 100 : irq_chk_intv)); | ||
175 | } else { | 221 | } else { |
176 | if (fc_pci->fc_dev->pid_filtering) | 222 | if (irq_chk_intv > 0) |
177 | flexcop_dma_control_timer_irq(fc,FC_DMA_1,0); | 223 | cancel_delayed_work(&fc_pci->irq_check_work); |
178 | else | 224 | |
179 | flexcop_dma_control_size_irq(fc,FC_DMA_1,0); | 225 | flexcop_dma_control_timer_irq(fc,FC_DMA_1,0); |
226 | deb_irq("IRQ disabled\n"); | ||
180 | 227 | ||
181 | // flexcop_dma_control_packet_irq(fc,FC_DMA_1,0); | 228 | // flexcop_dma_control_size_irq(fc,FC_DMA_1,0); |
182 | deb_irq("irqs disabled\n"); | 229 | |
230 | flexcop_dma_xfer_control(fc,FC_DMA_1,FC_DMA_SUBADDR_0 | FC_DMA_SUBADDR_1,0); | ||
231 | deb_irq("DMA xfer disabled\n"); | ||
183 | } | 232 | } |
184 | 233 | ||
185 | return 0; | 234 | return 0; |
@@ -198,6 +247,7 @@ static int flexcop_pci_dma_init(struct flexcop_pci *fc_pci) | |||
198 | flexcop_sram_set_dest(fc_pci->fc_dev,FC_SRAM_DEST_CAO | FC_SRAM_DEST_CAI, FC_SRAM_DEST_TARGET_DMA2); | 247 | flexcop_sram_set_dest(fc_pci->fc_dev,FC_SRAM_DEST_CAO | FC_SRAM_DEST_CAI, FC_SRAM_DEST_TARGET_DMA2); |
199 | 248 | ||
200 | fc_pci->init_state |= FC_PCI_DMA_INIT; | 249 | fc_pci->init_state |= FC_PCI_DMA_INIT; |
250 | |||
201 | goto success; | 251 | goto success; |
202 | dma1_free: | 252 | dma1_free: |
203 | flexcop_dma_free(&fc_pci->dma[0]); | 253 | flexcop_dma_free(&fc_pci->dma[0]); |
@@ -244,7 +294,7 @@ static int flexcop_pci_init(struct flexcop_pci *fc_pci) | |||
244 | 294 | ||
245 | pci_set_drvdata(fc_pci->pdev, fc_pci); | 295 | pci_set_drvdata(fc_pci->pdev, fc_pci); |
246 | 296 | ||
247 | if ((ret = request_irq(fc_pci->pdev->irq, flexcop_pci_irq, | 297 | if ((ret = request_irq(fc_pci->pdev->irq, flexcop_pci_isr, |
248 | SA_SHIRQ, DRIVER_NAME, fc_pci)) != 0) | 298 | SA_SHIRQ, DRIVER_NAME, fc_pci)) != 0) |
249 | goto err_pci_iounmap; | 299 | goto err_pci_iounmap; |
250 | 300 | ||
@@ -324,6 +374,8 @@ static int flexcop_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
324 | if ((ret = flexcop_pci_dma_init(fc_pci)) != 0) | 374 | if ((ret = flexcop_pci_dma_init(fc_pci)) != 0) |
325 | goto err_fc_exit; | 375 | goto err_fc_exit; |
326 | 376 | ||
377 | INIT_WORK(&fc_pci->irq_check_work, flexcop_pci_irq_check_work, fc_pci); | ||
378 | |||
327 | goto success; | 379 | goto success; |
328 | err_fc_exit: | 380 | err_fc_exit: |
329 | flexcop_device_exit(fc); | 381 | flexcop_device_exit(fc); |
@@ -350,17 +402,17 @@ static void flexcop_pci_remove(struct pci_dev *pdev) | |||
350 | 402 | ||
351 | static struct pci_device_id flexcop_pci_tbl[] = { | 403 | static struct pci_device_id flexcop_pci_tbl[] = { |
352 | { PCI_DEVICE(0x13d0, 0x2103) }, | 404 | { PCI_DEVICE(0x13d0, 0x2103) }, |
353 | /* { PCI_DEVICE(0x13d0, 0x2200) }, PCI FlexCopIII ? */ | 405 | /* { PCI_DEVICE(0x13d0, 0x2200) }, ? */ |
354 | { }, | 406 | { }, |
355 | }; | 407 | }; |
356 | 408 | ||
357 | MODULE_DEVICE_TABLE(pci, flexcop_pci_tbl); | 409 | MODULE_DEVICE_TABLE(pci, flexcop_pci_tbl); |
358 | 410 | ||
359 | static struct pci_driver flexcop_pci_driver = { | 411 | static struct pci_driver flexcop_pci_driver = { |
360 | .name = "Technisat/B2C2 FlexCop II/IIb/III PCI", | 412 | .name = "b2c2_flexcop_pci", |
361 | .id_table = flexcop_pci_tbl, | 413 | .id_table = flexcop_pci_tbl, |
362 | .probe = flexcop_pci_probe, | 414 | .probe = flexcop_pci_probe, |
363 | .remove = flexcop_pci_remove, | 415 | .remove = flexcop_pci_remove, |
364 | }; | 416 | }; |
365 | 417 | ||
366 | static int __init flexcop_pci_module_init(void) | 418 | static int __init flexcop_pci_module_init(void) |
diff --git a/drivers/media/dvb/b2c2/flexcop-reg.h b/drivers/media/dvb/b2c2/flexcop-reg.h index 75b50f21afe6..4ae1eb5bfe98 100644 --- a/drivers/media/dvb/b2c2/flexcop-reg.h +++ b/drivers/media/dvb/b2c2/flexcop-reg.h | |||
@@ -36,555 +36,21 @@ typedef enum { | |||
36 | extern const char *flexcop_device_names[]; | 36 | extern const char *flexcop_device_names[]; |
37 | 37 | ||
38 | /* FlexCop IBI Registers */ | 38 | /* FlexCop IBI Registers */ |
39 | #if defined(__LITTLE_ENDIAN) | ||
40 | #include "flexcop_ibi_value_le.h" | ||
41 | #elif defined(__BIG_ENDIAN) | ||
42 | #include "flexcop_ibi_value_be.h" | ||
43 | #else | ||
44 | #error no endian defined | ||
45 | #endif | ||
39 | 46 | ||
40 | /* flexcop_ibi_reg - a huge union representing the register structure */ | ||
41 | typedef union { | ||
42 | u32 raw; | ||
43 | |||
44 | /* DMA 0x000 to 0x01c | ||
45 | * DMA1 0x000 to 0x00c | ||
46 | * DMA2 0x010 to 0x01c | ||
47 | */ | ||
48 | struct { | ||
49 | u32 dma_0start : 1; /* set: data will be delivered to dma1_address0 */ | ||
50 | u32 dma_0No_update : 1; /* set: dma1_cur_address will be updated, unset: no update */ | ||
51 | u32 dma_address0 :30; /* physical/virtual host memory address0 DMA */ | ||
52 | } dma_0x0; | ||
53 | |||
54 | struct { | ||
55 | u32 DMA_maxpackets : 8; /* (remapped) PCI DMA1 Packet Count Interrupt. This variable | ||
56 | is able to be read and written while bit(1) of register | ||
57 | 0x00c (remap_enable) is set. This variable represents | ||
58 | the number of packets that will be transmitted to the PCI | ||
59 | host using PCI DMA1 before an interrupt to the PCI is | ||
60 | asserted. This functionality may be enabled using bit(20) | ||
61 | of register 0x208. N=0 disables the IRQ. */ | ||
62 | u32 dma_addr_size :24; /* size of memory buffer in DWORDs (bytesize / 4) for DMA */ | ||
63 | } dma_0x4_remap; | ||
64 | |||
65 | struct { | ||
66 | u32 dma1timer : 7; /* reading PCI DMA1 timer ... when remap_enable is 0 */ | ||
67 | u32 unused : 1; | ||
68 | u32 dma_addr_size :24; | ||
69 | } dma_0x4_read; | ||
70 | |||
71 | struct { | ||
72 | u32 unused : 1; | ||
73 | u32 dmatimer : 7; /* writing PCI DMA1 timer ... when remap_enable is 0 */ | ||
74 | u32 dma_addr_size :24; | ||
75 | } dma_0x4_write; | ||
76 | |||
77 | struct { | ||
78 | u32 unused : 2; | ||
79 | u32 dma_cur_addr :30; /* current physical host memory address pointer for DMA */ | ||
80 | } dma_0x8; | ||
81 | |||
82 | struct { | ||
83 | u32 dma_1start : 1; /* set: data will be delivered to dma_address1, when dma_address0 is full */ | ||
84 | u32 remap_enable : 1; /* remap enable for 0x0x4(7:0) */ | ||
85 | u32 dma_address1 :30; /* Physical/virtual address 1 on DMA */ | ||
86 | } dma_0xc; | ||
87 | |||
88 | /* Two-wire Serial Master and Clock 0x100-0x110 */ | ||
89 | struct { | ||
90 | // u32 slave_transmitter : 1; /* ???*/ | ||
91 | u32 chipaddr : 7; /* two-line serial address of the target slave */ | ||
92 | u32 reserved1 : 1; | ||
93 | u32 baseaddr : 8; /* address of the location of the read/write operation */ | ||
94 | u32 data1_reg : 8; /* first byte in two-line serial read/write operation */ | ||
95 | u32 working_start : 1; /* when doing a write operation this indicator is 0 when ready | ||
96 | * set to 1 when doing a write operation */ | ||
97 | u32 twoWS_rw : 1; /* read/write indicator (1 = read, 0 write) */ | ||
98 | u32 total_bytes : 2; /* number of data bytes in each two-line serial transaction (0 = 1 byte, 11 = 4byte)*/ | ||
99 | u32 twoWS_port_reg : 2; /* port selection: 01 - Front End/Demod, 10 - EEPROM, 11 - Tuner */ | ||
100 | u32 no_base_addr_ack_error : 1; /* writing: write-req: frame is produced w/o baseaddr, read-req: read-cycles w/o | ||
101 | * preceding address assignment write frame | ||
102 | * ACK_ERROR = 1 when no ACK from slave in the last transaction */ | ||
103 | u32 st_done : 1; /* indicator for transaction is done */ | ||
104 | } tw_sm_c_100; | ||
105 | |||
106 | struct { | ||
107 | u32 data2_reg : 8; /* 2nd data byte */ | ||
108 | u32 data3_reg : 8; /* 3rd data byte */ | ||
109 | u32 data4_reg : 8; /* 4th data byte */ | ||
110 | u32 exlicit_stops : 1; /* when set, transactions are produced w/o trailing STOP flag, then send isolated STOP flags */ | ||
111 | u32 force_stop : 1; /* isolated stop flag */ | ||
112 | u32 unused : 6; | ||
113 | } tw_sm_c_104; | ||
114 | |||
115 | /* Clock. The register allows the FCIII to convert an incoming Master clock | ||
116 | * (MCLK) signal into a lower frequency clock through the use of a LowCounter | ||
117 | * (TLO) and a High- Counter (THI). The time counts for THI and TLO are | ||
118 | * measured in MCLK; each count represents 4 MCLK input clock cycles. | ||
119 | * | ||
120 | * The default output for port #1 is set for Front End Demod communication. (0x108) | ||
121 | * The default output for port #2 is set for EEPROM communication. (0x10c) | ||
122 | * The default output for port #3 is set for Tuner communication. (0x110) | ||
123 | */ | ||
124 | struct { | ||
125 | u32 thi1 : 6; /* Thi for port #1 (def: 100110b; 38) */ | ||
126 | u32 reserved1 : 2; | ||
127 | u32 tlo1 : 5; /* Tlo for port #1 (def: 11100b; 28) */ | ||
128 | u32 reserved2 :19; | ||
129 | } tw_sm_c_108; | ||
130 | |||
131 | struct { | ||
132 | u32 thi1 : 6; /* Thi for port #2 (def: 111001b; 57) */ | ||
133 | u32 reserved1 : 2; | ||
134 | u32 tlo1 : 5; /* Tlo for port #2 (def: 11100b; 28) */ | ||
135 | u32 reserved2 :19; | ||
136 | } tw_sm_c_10c; | ||
137 | |||
138 | struct { | ||
139 | u32 thi1 : 6; /* Thi for port #3 (def: 111001b; 57) */ | ||
140 | u32 reserved1 : 2; | ||
141 | u32 tlo1 : 5; /* Tlo for port #3 (def: 11100b; 28) */ | ||
142 | u32 reserved2 :19; | ||
143 | } tw_sm_c_110; | ||
144 | |||
145 | /* LNB Switch Frequency 0x200 | ||
146 | * Clock that creates the LNB switch tone. The default is set to have a fixed | ||
147 | * low output (not oscillating) to the LNB_CTL line. | ||
148 | */ | ||
149 | struct { | ||
150 | u32 LNB_CTLHighCount_sig :15; /* It is the number of pre-scaled clock cycles that will be low. */ | ||
151 | u32 LNB_CTLLowCount_sig :15; /* For example, to obtain a 22KHz output given a 45 Mhz Master | ||
152 | Clock signal (MCLK), set PreScalar=01 and LowCounter value to 0x1ff. */ | ||
153 | u32 LNB_CTLPrescaler_sig : 2; /* pre-scaler divides MCLK: 00 (no division), 01 by 2, 10 by 4, 11 by 12 */ | ||
154 | } lnb_switch_freq_200; | ||
155 | |||
156 | /* ACPI, Peripheral Reset, LNB Polarity | ||
157 | * ACPI power conservation mode, LNB polarity selection (low or high voltage), | ||
158 | * and peripheral reset. | ||
159 | */ | ||
160 | struct { | ||
161 | u32 ACPI1_sig : 1; /* turn of the power of tuner and LNB, not implemented in FCIII */ | ||
162 | u32 ACPI3_sig : 1; /* turn of power of the complete satelite receiver board (except FCIII) */ | ||
163 | u32 LNB_L_H_sig : 1; /* low or high voltage for LNB. (0 = low, 1 = high) */ | ||
164 | u32 Per_reset_sig : 1; /* misc. init reset (default: 1), to reset set to low and back to high */ | ||
165 | u32 reserved :20; | ||
166 | u32 Rev_N_sig_revision_hi : 4;/* 0xc in case of FCIII */ | ||
167 | u32 Rev_N_sig_reserved1 : 2; | ||
168 | u32 Rev_N_sig_caps : 1; /* if 1, FCIII has 32 PID- and MAC-filters and is capable of IP multicast */ | ||
169 | u32 Rev_N_sig_reserved2 : 1; | ||
170 | } misc_204; | ||
171 | |||
172 | /* Control and Status 0x208 to 0x21c */ | ||
173 | /* Gross enable and disable control */ | ||
174 | struct { | ||
175 | u32 Stream1_filter_sig : 1; /* Stream1 PID filtering */ | ||
176 | u32 Stream2_filter_sig : 1; /* Stream2 PID filtering */ | ||
177 | u32 PCR_filter_sig : 1; /* PCR PID filter */ | ||
178 | u32 PMT_filter_sig : 1; /* PMT PID filter */ | ||
179 | |||
180 | u32 EMM_filter_sig : 1; /* EMM PID filter */ | ||
181 | u32 ECM_filter_sig : 1; /* ECM PID filter */ | ||
182 | u32 Null_filter_sig : 1; /* Filters null packets, PID=0x1fff. */ | ||
183 | u32 Mask_filter_sig : 1; /* mask PID filter */ | ||
184 | |||
185 | u32 WAN_Enable_sig : 1; /* WAN output line through V8 memory space is activated. */ | ||
186 | u32 WAN_CA_Enable_sig : 1; /* not in FCIII */ | ||
187 | u32 CA_Enable_sig : 1; /* not in FCIII */ | ||
188 | u32 SMC_Enable_sig : 1; /* CI stream data (CAI) goes directly to the smart card intf (opposed IBI 0x600 or SC-cmd buf). */ | ||
189 | |||
190 | u32 Per_CA_Enable_sig : 1; /* not in FCIII */ | ||
191 | u32 Multi2_Enable_sig : 1; /* ? */ | ||
192 | u32 MAC_filter_Mode_sig : 1; /* (MAC_filter_enable) Globally enables MAC filters for Net PID filteres. */ | ||
193 | u32 Rcv_Data_sig : 1; /* PID filtering module enable. When this bit is a one, the PID filter will | ||
194 | examine and process packets according to all other (individual) PID | ||
195 | filtering controls. If it a zero, no packet processing of any kind will | ||
196 | take place. All data from the tuner will be thrown away. */ | ||
197 | |||
198 | u32 DMA1_IRQ_Enable_sig : 1; /* When set, a DWORD counter is enabled on PCI DMA1 that asserts the PCI | ||
199 | * interrupt after the specified count for filling the buffer. */ | ||
200 | u32 DMA1_Timer_Enable_sig : 1; /* When set, a timer is enabled on PCI DMA1 that asserts the PCI interrupt | ||
201 | after a specified amount of time. */ | ||
202 | u32 DMA2_IRQ_Enable_sig : 1; /* same as DMA1_IRQ_Enable_sig but for DMA2 */ | ||
203 | u32 DMA2_Timer_Enable_sig : 1; /* same as DMA1_Timer_Enable_sig but for DMA2 */ | ||
204 | |||
205 | u32 DMA1_Size_IRQ_Enable_sig : 1; /* When set, a packet count detector is enabled on PCI DMA1 that asserts the PCI interrupt. */ | ||
206 | u32 DMA2_Size_IRQ_Enable_sig : 1; /* When set, a packet count detector is enabled on PCI DMA2 that asserts the PCI interrupt. */ | ||
207 | u32 Mailbox_from_V8_Enable_sig: 1; /* When set, writes to the mailbox register produce an interrupt to the | ||
208 | PCI host to indicate that mailbox data is available. */ | ||
209 | |||
210 | u32 unused : 9; | ||
211 | } ctrl_208; | ||
212 | |||
213 | /* General status. When a PCI interrupt occurs, this register is read to | ||
214 | * discover the reason for the interrupt. | ||
215 | */ | ||
216 | struct { | ||
217 | u32 DMA1_IRQ_Status : 1; /* When set(1) the DMA1 counter had generated an IRQ. Read Only. */ | ||
218 | u32 DMA1_Timer_Status : 1; /* When set(1) the DMA1 timer had generated an IRQ. Read Only. */ | ||
219 | u32 DMA2_IRQ_Status : 1; /* When set(1) the DMA2 counter had generated an IRQ. Read Only. */ | ||
220 | u32 DMA2_Timer_Status : 1; /* When set(1) the DMA2 timer had generated an IRQ. Read Only. */ | ||
221 | u32 DMA1_Size_IRQ_Status : 1; /* (Read only). This register is read after an interrupt to */ | ||
222 | u32 DMA2_Size_IRQ_Status : 1; /* find out why we had an IRQ. Reading this register will clear this bit. Packet count*/ | ||
223 | u32 Mailbox_from_V8_Status_sig: 1; /* Same as above. Reading this register will clear this bit. */ | ||
224 | u32 Data_receiver_error : 1; /* 1 indicate an error in the receiver Front End (Tuner module) */ | ||
225 | u32 Continuity_error_flag : 1; /* 1 indicates a continuity error in the TS stream. */ | ||
226 | u32 LLC_SNAP_FLAG_set : 1; /* 1 indicates that the LCC_SNAP_FLAG was set. */ | ||
227 | u32 Transport_Error : 1; /* When set indicates that an unexpected packet was received. */ | ||
228 | u32 reserved :21; | ||
229 | } irq_20c; | ||
230 | |||
231 | |||
232 | /* Software reset register */ | ||
233 | struct { | ||
234 | u32 reset_blocks : 8; /* Enabled when Block_reset_enable = 0xB2 and 0x208 bits 15:8 = 0x00. | ||
235 | Each bit location represents a 0x100 block of registers. Writing | ||
236 | a one in a bit location resets that block of registers and the logic | ||
237 | that it controls. */ | ||
238 | u32 Block_reset_enable : 8; /* This variable is set to 0xB2 when the register is written. */ | ||
239 | u32 Special_controls :16; /* Asserts Reset_V8 => 0xC258; Turns on pci encryption => 0xC25A; | ||
240 | Turns off pci encryption => 0xC259 Note: pci_encryption default | ||
241 | at power-up is ON. */ | ||
242 | } sw_reset_210; | ||
243 | |||
244 | struct { | ||
245 | u32 vuart_oe_sig : 1; /* When clear, the V8 processor has sole control of the serial UART | ||
246 | (RS-232 Smart Card interface). When set, the IBI interface | ||
247 | defined by register 0x600 controls the serial UART. */ | ||
248 | u32 v2WS_oe_sig : 1; /* When clear, the V8 processor has direct control of the Two-line | ||
249 | Serial Master EEPROM target. When set, the Two-line Serial Master | ||
250 | EEPROM target interface is controlled by IBI register 0x100. */ | ||
251 | u32 halt_V8_sig : 1; /* When set, contiguous wait states are applied to the V8-space | ||
252 | bus masters. Once this signal is cleared, normal V8-space | ||
253 | operations resume. */ | ||
254 | u32 section_pkg_enable_sig: 1; /* When set, this signal enables the front end translation circuitry | ||
255 | to process section packed transport streams. */ | ||
256 | u32 s2p_sel_sig : 1; /* Serial to parallel conversion. When set, polarized transport data | ||
257 | within the FlexCop3 front end circuitry is converted from a serial | ||
258 | stream into parallel data before downstream processing otherwise | ||
259 | interprets the data. */ | ||
260 | u32 unused1 : 3; | ||
261 | u32 polarity_PS_CLK_sig: 1; /* This signal is used to invert the input polarity of the tranport | ||
262 | stream CLOCK signal before any processing occurs on the transport | ||
263 | stream within FlexCop3. */ | ||
264 | u32 polarity_PS_VALID_sig: 1; /* This signal is used to invert the input polarity of the tranport | ||
265 | stream VALID signal before any processing occurs on the transport | ||
266 | stream within FlexCop3. */ | ||
267 | u32 polarity_PS_SYNC_sig: 1; /* This signal is used to invert the input polarity of the tranport | ||
268 | stream SYNC signal before any processing occurs on the transport | ||
269 | stream within FlexCop3. */ | ||
270 | u32 polarity_PS_ERR_sig: 1; /* This signal is used to invert the input polarity of the tranport | ||
271 | stream ERROR signal before any processing occurs on the transport | ||
272 | stream within FlexCop3. */ | ||
273 | u32 unused2 :20; | ||
274 | } misc_214; | ||
275 | |||
276 | /* Mailbox from V8 to host */ | ||
277 | struct { | ||
278 | u32 Mailbox_from_V8 :32; /* When this register is written by either the V8 processor or by an | ||
279 | end host, an interrupt is generated to the PCI host to indicate | ||
280 | that mailbox data is available. Reading register 20c will clear | ||
281 | the IRQ. */ | ||
282 | } mbox_v8_to_host_218; | ||
283 | |||
284 | /* Mailbox from host to v8 Mailbox_to_V8 | ||
285 | * Mailbox_to_V8 mailbox storage register | ||
286 | * used to send messages from PCI to V8. Writing to this register will send an | ||
287 | * IRQ to the V8. Then it can read the data from here. Reading this register | ||
288 | * will clear the IRQ. If the V8 is halted and bit 31 of this register is set, | ||
289 | * then this register is used instead as a direct interface to access the | ||
290 | * V8space memory. | ||
291 | */ | ||
292 | struct { | ||
293 | u32 sysramaccess_data : 8; /* Data byte written or read from the specified address in V8 SysRAM. */ | ||
294 | u32 sysramaccess_addr :15; /* 15 bit address used to access V8 Sys-RAM. */ | ||
295 | u32 unused : 7; | ||
296 | u32 sysramaccess_write: 1; /* Write flag used to latch data into the V8 SysRAM. */ | ||
297 | u32 sysramaccess_busmuster: 1; /* Setting this bit when the V8 is halted at 0x214 Bit(2) allows | ||
298 | this IBI register interface to directly drive the V8-space memory. */ | ||
299 | } mbox_host_to_v8_21c; | ||
300 | |||
301 | |||
302 | /* PIDs, Translation Bit, SMC Filter Select 0x300 to 0x31c */ | ||
303 | struct { | ||
304 | u32 Stream1_PID :13; /* Primary use is receiving Net data, so these 13 bits normally | ||
305 | hold the PID value for the desired network stream. */ | ||
306 | u32 Stream1_trans : 1; /* When set, Net translation will take place for Net data ferried in TS packets. */ | ||
307 | u32 MAC_Multicast_filter : 1; /* When clear, multicast MAC filtering is not allowed for Stream1 and PID_n filters. */ | ||
308 | u32 debug_flag_pid_saved : 1; | ||
309 | u32 Stream2_PID :13; /* 13 bits for Stream 2 PID filter value. General use. */ | ||
310 | u32 Stream2_trans : 1; /* When set Tables/CAI translation will take place for the data ferried in | ||
311 | Stream2_PID TS packets. */ | ||
312 | u32 debug_flag_write_status00 : 1; | ||
313 | u32 debug_fifo_problem : 1; | ||
314 | } pid_filter_300; | ||
315 | |||
316 | struct { | ||
317 | u32 PCR_PID :13; /* PCR stream PID filter value. Primary use is Program Clock Reference stream filtering. */ | ||
318 | u32 PCR_trans : 1; /* When set, Tables/CAI translation will take place for these packets. */ | ||
319 | u32 debug_overrun3 : 1; | ||
320 | u32 debug_overrun2 : 1; | ||
321 | u32 PMT_PID :13; /* stream PID filter value. Primary use is Program Management Table segment filtering. */ | ||
322 | u32 PMT_trans : 1; /* When set, Tables/CAI translation will take place for these packets. */ | ||
323 | u32 reserved : 2; | ||
324 | } pid_filter_304; | ||
325 | |||
326 | struct { | ||
327 | u32 EMM_PID :13; /* EMM PID filter value. Primary use is Entitlement Management Messaging for | ||
328 | conditional access-related data. */ | ||
329 | u32 EMM_trans : 1; /* When set, Tables/CAI translation will take place for these packets. */ | ||
330 | u32 EMM_filter_4 : 1; /* When set will pass only EMM data possessing the same ID code as the | ||
331 | first four bytes (32 bits) of the end-user s 6-byte Smart Card ID number Select */ | ||
332 | u32 EMM_filter_6 : 1; /* When set will pass only EMM data possessing the same 6-byte code as the end-users | ||
333 | complete 6-byte Smart Card ID number. */ | ||
334 | u32 ECM_PID :13; /* ECM PID filter value. Primary use is Entitlement Control Messaging for conditional | ||
335 | access-related data. */ | ||
336 | u32 ECM_trans : 1; /* When set, Tables/CAI translation will take place for these packets. */ | ||
337 | u32 reserved : 2; | ||
338 | } pid_filter_308; | ||
339 | |||
340 | struct { | ||
341 | u32 Group_PID :13; /* PID value for group filtering. */ | ||
342 | u32 Group_trans : 1; /* When set, Tables/CAI translation will take place for these packets. */ | ||
343 | u32 unused1 : 2; | ||
344 | u32 Group_mask :13; /* Mask value used in logical "and" equation that defines group filtering */ | ||
345 | u32 unused2 : 3; | ||
346 | } pid_filter_30c_ext_ind_0_7; | ||
347 | |||
348 | struct { | ||
349 | u32 net_master_read :17; | ||
350 | u32 unused :15; | ||
351 | } pid_filter_30c_ext_ind_1; | ||
352 | |||
353 | struct { | ||
354 | u32 net_master_write :17; | ||
355 | u32 unused :15; | ||
356 | } pid_filter_30c_ext_ind_2; | ||
357 | |||
358 | struct { | ||
359 | u32 next_net_master_write :17; | ||
360 | u32 unused :15; | ||
361 | } pid_filter_30c_ext_ind_3; | ||
362 | |||
363 | struct { | ||
364 | u32 unused1 : 1; | ||
365 | u32 state_write :10; | ||
366 | u32 reserved1 : 6; /* default: 000100 */ | ||
367 | u32 stack_read :10; | ||
368 | u32 reserved2 : 5; /* default: 00100 */ | ||
369 | } pid_filter_30c_ext_ind_4; | ||
370 | |||
371 | struct { | ||
372 | u32 stack_cnt :10; | ||
373 | u32 unused :22; | ||
374 | } pid_filter_30c_ext_ind_5; | ||
375 | |||
376 | struct { | ||
377 | u32 pid_fsm_save_reg0 : 2; | ||
378 | u32 pid_fsm_save_reg1 : 2; | ||
379 | u32 pid_fsm_save_reg2 : 2; | ||
380 | u32 pid_fsm_save_reg3 : 2; | ||
381 | u32 pid_fsm_save_reg4 : 2; | ||
382 | u32 pid_fsm_save_reg300 : 2; | ||
383 | u32 write_status1 : 2; | ||
384 | u32 write_status4 : 2; | ||
385 | u32 data_size_reg :12; | ||
386 | u32 unused : 4; | ||
387 | } pid_filter_30c_ext_ind_6; | ||
388 | |||
389 | struct { | ||
390 | u32 index_reg : 5; /* (Index pointer) Points at an internal PIDn register. A binary code | ||
391 | representing one of 32 internal PIDn registers as well as its | ||
392 | corresponding internal MAC_lown register. */ | ||
393 | u32 extra_index_reg : 3; /* This vector is used to select between sets of debug signals routed to register 0x30c. */ | ||
394 | u32 AB_select : 1; /* Used in conjunction with 0x31c. read/write to the MAC_highA or MAC_highB register | ||
395 | 0=MAC_highB register, 1=MAC_highA */ | ||
396 | u32 pass_alltables : 1; /* 1=Net packets are not filtered against the Network Table ID found in register 0x400. | ||
397 | All types of networks (DVB, ATSC, ISDB) are passed. */ | ||
398 | u32 unused :22; | ||
399 | } index_reg_310; | ||
400 | |||
401 | struct { | ||
402 | u32 PID :13; /* PID value */ | ||
403 | u32 PID_trans : 1; /* translation will take place for packets filtered */ | ||
404 | u32 PID_enable_bit : 1; /* When set this PID filter is enabled */ | ||
405 | u32 reserved :17; | ||
406 | } pid_n_reg_314; | ||
407 | |||
408 | struct { | ||
409 | u32 A4_byte : 8; | ||
410 | u32 A5_byte : 8; | ||
411 | u32 A6_byte : 8; | ||
412 | u32 Enable_bit : 1; /* enabled (1) or disabled (1) */ | ||
413 | u32 HighAB_bit : 1; /* use MAC_highA (1) or MAC_highB (0) as MSB */ | ||
414 | u32 reserved : 6; | ||
415 | } mac_low_reg_318; | ||
416 | |||
417 | struct { | ||
418 | u32 A1_byte : 8; | ||
419 | u32 A2_byte : 8; | ||
420 | u32 A3_byte : 8; | ||
421 | u32 reserved : 8; | ||
422 | } mac_high_reg_31c; | ||
423 | |||
424 | /* Table, SMCID,MACDestination Filters 0x400 to 0x41c */ | ||
425 | struct { | ||
426 | u32 reserved :16; | ||
427 | #define fc_data_Tag_ID_DVB 0x3e | 47 | #define fc_data_Tag_ID_DVB 0x3e |
428 | #define fc_data_Tag_ID_ATSC 0x3f | 48 | #define fc_data_Tag_ID_ATSC 0x3f |
429 | #define fc_data_Tag_ID_IDSB 0x8b | 49 | #define fc_data_Tag_ID_IDSB 0x8b |
430 | u32 data_Tag_ID :16; | ||
431 | } data_tag_400; | ||
432 | |||
433 | struct { | ||
434 | u32 Card_IDbyte6 : 8; | ||
435 | u32 Card_IDbyte5 : 8; | ||
436 | u32 Card_IDbyte4 : 8; | ||
437 | u32 Card_IDbyte3 : 8; | ||
438 | } card_id_408; | ||
439 | |||
440 | struct { | ||
441 | u32 Card_IDbyte2 : 8; | ||
442 | u32 Card_IDbyte1 : 8; | ||
443 | } card_id_40c; | ||
444 | |||
445 | /* holding the unique mac address of the receiver which houses the FlexCopIII */ | ||
446 | struct { | ||
447 | u32 MAC1 : 8; | ||
448 | u32 MAC2 : 8; | ||
449 | u32 MAC3 : 8; | ||
450 | u32 MAC6 : 8; | ||
451 | } mac_address_418; | ||
452 | |||
453 | struct { | ||
454 | u32 MAC7 : 8; | ||
455 | u32 MAC8 : 8; | ||
456 | u32 reserved : 16; | ||
457 | } mac_address_41c; | ||
458 | |||
459 | struct { | ||
460 | u32 transmitter_data_byte : 8; | ||
461 | u32 ReceiveDataReady : 1; | ||
462 | u32 ReceiveByteFrameError: 1; | ||
463 | u32 txbuffempty : 1; | ||
464 | u32 reserved :21; | ||
465 | } ci_600; | ||
466 | |||
467 | struct { | ||
468 | u32 pi_d : 8; | ||
469 | u32 pi_ha :20; | ||
470 | u32 pi_rw : 1; | ||
471 | u32 pi_component_reg : 3; | ||
472 | } pi_604; | ||
473 | |||
474 | struct { | ||
475 | u32 serialReset : 1; | ||
476 | u32 oncecycle_read : 1; | ||
477 | u32 Timer_Read_req : 1; | ||
478 | u32 Timer_Load_req : 1; | ||
479 | u32 timer_data : 7; | ||
480 | u32 unused : 1; /* ??? not mentioned in data book */ | ||
481 | u32 Timer_addr : 5; | ||
482 | u32 reserved : 3; | ||
483 | u32 pcmcia_a_mod_pwr_n : 1; | ||
484 | u32 pcmcia_b_mod_pwr_n : 1; | ||
485 | u32 config_Done_stat : 1; | ||
486 | u32 config_Init_stat : 1; | ||
487 | u32 config_Prog_n : 1; | ||
488 | u32 config_wr_n : 1; | ||
489 | u32 config_cs_n : 1; | ||
490 | u32 config_cclk : 1; | ||
491 | u32 pi_CiMax_IRQ_n : 1; | ||
492 | u32 pi_timeout_status : 1; | ||
493 | u32 pi_wait_n : 1; | ||
494 | u32 pi_busy_n : 1; | ||
495 | } pi_608; | ||
496 | 50 | ||
497 | struct { | ||
498 | u32 PID :13; | ||
499 | u32 key_enable : 1; | ||
500 | #define fc_key_code_default 0x1 | 51 | #define fc_key_code_default 0x1 |
501 | #define fc_key_code_even 0x2 | 52 | #define fc_key_code_even 0x2 |
502 | #define fc_key_code_odd 0x3 | 53 | #define fc_key_code_odd 0x3 |
503 | u32 key_code : 2; | ||
504 | u32 key_array_col : 3; | ||
505 | u32 key_array_row : 5; | ||
506 | u32 dvb_en : 1; /* 0=TS bypasses the Descrambler */ | ||
507 | u32 rw_flag : 1; | ||
508 | u32 reserved : 6; | ||
509 | } dvb_reg_60c; | ||
510 | |||
511 | /* SRAM and Output Destination 0x700 to 0x714 */ | ||
512 | struct { | ||
513 | u32 sram_addr :15; | ||
514 | u32 sram_rw : 1; /* 0=write, 1=read */ | ||
515 | u32 sram_data : 8; | ||
516 | u32 sc_xfer_bit : 1; | ||
517 | u32 reserved1 : 3; | ||
518 | u32 oe_pin_reg : 1; | ||
519 | u32 ce_pin_reg : 1; | ||
520 | u32 reserved2 : 1; | ||
521 | u32 start_sram_ibi : 1; | ||
522 | } sram_ctrl_reg_700; | ||
523 | |||
524 | struct { | ||
525 | u32 net_addr_read :16; | ||
526 | u32 net_addr_write :16; | ||
527 | } net_buf_reg_704; | ||
528 | |||
529 | struct { | ||
530 | u32 cai_read :11; | ||
531 | u32 reserved1 : 5; | ||
532 | u32 cai_write :11; | ||
533 | u32 reserved2 : 6; | ||
534 | u32 cai_cnt : 4; | ||
535 | } cai_buf_reg_708; | ||
536 | |||
537 | struct { | ||
538 | u32 cao_read :11; | ||
539 | u32 reserved1 : 5; | ||
540 | u32 cap_write :11; | ||
541 | u32 reserved2 : 6; | ||
542 | u32 cao_cnt : 4; | ||
543 | } cao_buf_reg_70c; | ||
544 | |||
545 | struct { | ||
546 | u32 media_read :11; | ||
547 | u32 reserved1 : 5; | ||
548 | u32 media_write :11; | ||
549 | u32 reserved2 : 6; | ||
550 | u32 media_cnt : 4; | ||
551 | } media_buf_reg_710; | ||
552 | |||
553 | struct { | ||
554 | u32 NET_Dest : 2; | ||
555 | u32 CAI_Dest : 2; | ||
556 | u32 CAO_Dest : 2; | ||
557 | u32 MEDIA_Dest : 2; | ||
558 | u32 net_ovflow_error : 1; | ||
559 | u32 media_ovflow_error : 1; | ||
560 | u32 cai_ovflow_error : 1; | ||
561 | u32 cao_ovflow_error : 1; | ||
562 | u32 ctrl_usb_wan : 1; | ||
563 | u32 ctrl_sramdma : 1; | ||
564 | u32 ctrl_maximumfill : 1; | ||
565 | u32 reserved :17; | ||
566 | } sram_dest_reg_714; | ||
567 | |||
568 | struct { | ||
569 | u32 net_cnt :12; | ||
570 | u32 reserved1 : 4; | ||
571 | u32 net_addr_read : 1; | ||
572 | u32 reserved2 : 3; | ||
573 | u32 net_addr_write : 1; | ||
574 | u32 reserved3 :11; | ||
575 | } net_buf_reg_718; | ||
576 | |||
577 | struct { | ||
578 | u32 wan_speed_sig : 2; | ||
579 | u32 reserved1 : 6; | ||
580 | u32 wan_wait_state : 8; | ||
581 | u32 sram_chip : 2; | ||
582 | u32 sram_memmap : 2; | ||
583 | u32 reserved2 : 4; | ||
584 | u32 wan_pkt_frame : 4; | ||
585 | u32 reserved3 : 4; | ||
586 | } wan_ctrl_reg_71c; | ||
587 | } flexcop_ibi_value; | ||
588 | 54 | ||
589 | extern flexcop_ibi_value ibi_zero; | 55 | extern flexcop_ibi_value ibi_zero; |
590 | 56 | ||
diff --git a/drivers/media/dvb/b2c2/flexcop-usb.c b/drivers/media/dvb/b2c2/flexcop-usb.c index 0113449abd15..0a78ba3737a5 100644 --- a/drivers/media/dvb/b2c2/flexcop-usb.c +++ b/drivers/media/dvb/b2c2/flexcop-usb.c | |||
@@ -545,7 +545,7 @@ static struct usb_device_id flexcop_usb_table [] = { | |||
545 | /* usb specific object needed to register this driver with the usb subsystem */ | 545 | /* usb specific object needed to register this driver with the usb subsystem */ |
546 | static struct usb_driver flexcop_usb_driver = { | 546 | static struct usb_driver flexcop_usb_driver = { |
547 | .owner = THIS_MODULE, | 547 | .owner = THIS_MODULE, |
548 | .name = "Technisat/B2C2 FlexCop II/IIb/III USB", | 548 | .name = "b2c2_flexcop_usb", |
549 | .probe = flexcop_usb_probe, | 549 | .probe = flexcop_usb_probe, |
550 | .disconnect = flexcop_usb_disconnect, | 550 | .disconnect = flexcop_usb_disconnect, |
551 | .id_table = flexcop_usb_table, | 551 | .id_table = flexcop_usb_table, |
diff --git a/drivers/media/dvb/b2c2/flexcop.c b/drivers/media/dvb/b2c2/flexcop.c index 8b5d14dd36e3..12873d435406 100644 --- a/drivers/media/dvb/b2c2/flexcop.c +++ b/drivers/media/dvb/b2c2/flexcop.c | |||
@@ -46,7 +46,7 @@ | |||
46 | 46 | ||
47 | int b2c2_flexcop_debug; | 47 | int b2c2_flexcop_debug; |
48 | module_param_named(debug, b2c2_flexcop_debug, int, 0644); | 48 | module_param_named(debug, b2c2_flexcop_debug, int, 0644); |
49 | MODULE_PARM_DESC(debug, "set debug level (1=info,2=tuner,4=i2c,8=ts,16=sram (|-able))." DEBSTATUS); | 49 | MODULE_PARM_DESC(debug, "set debug level (1=info,2=tuner,4=i2c,8=ts,16=sram,32=reg (|-able))." DEBSTATUS); |
50 | #undef DEBSTATUS | 50 | #undef DEBSTATUS |
51 | 51 | ||
52 | /* global zero for ibi values */ | 52 | /* global zero for ibi values */ |
@@ -173,9 +173,20 @@ static void flexcop_reset(struct flexcop_device *fc) | |||
173 | fc->write_ibi_reg(fc,ctrl_208,ibi_zero); | 173 | fc->write_ibi_reg(fc,ctrl_208,ibi_zero); |
174 | 174 | ||
175 | v210.raw = 0; | 175 | v210.raw = 0; |
176 | v210.sw_reset_210.reset_blocks = 0xff; | 176 | v210.sw_reset_210.reset_block_000 = 1; |
177 | v210.sw_reset_210.reset_block_100 = 1; | ||
178 | v210.sw_reset_210.reset_block_200 = 1; | ||
179 | v210.sw_reset_210.reset_block_300 = 1; | ||
180 | v210.sw_reset_210.reset_block_400 = 1; | ||
181 | v210.sw_reset_210.reset_block_500 = 1; | ||
182 | v210.sw_reset_210.reset_block_600 = 1; | ||
183 | v210.sw_reset_210.reset_block_700 = 1; | ||
177 | v210.sw_reset_210.Block_reset_enable = 0xb2; | 184 | v210.sw_reset_210.Block_reset_enable = 0xb2; |
185 | |||
186 | v210.sw_reset_210.Special_controls = 0xc259; | ||
187 | |||
178 | fc->write_ibi_reg(fc,sw_reset_210,v210); | 188 | fc->write_ibi_reg(fc,sw_reset_210,v210); |
189 | msleep(1); | ||
179 | 190 | ||
180 | /* reset the periphical devices */ | 191 | /* reset the periphical devices */ |
181 | 192 | ||
@@ -186,6 +197,25 @@ static void flexcop_reset(struct flexcop_device *fc) | |||
186 | fc->write_ibi_reg(fc,misc_204,v204); | 197 | fc->write_ibi_reg(fc,misc_204,v204); |
187 | } | 198 | } |
188 | 199 | ||
200 | void flexcop_reset_block_300(struct flexcop_device *fc) | ||
201 | { | ||
202 | flexcop_ibi_value v208_save = fc->read_ibi_reg(fc,ctrl_208), | ||
203 | v210 = fc->read_ibi_reg(fc,sw_reset_210); | ||
204 | |||
205 | deb_rdump("208: %08x, 210: %08x\n",v208_save.raw,v210.raw); | ||
206 | |||
207 | fc->write_ibi_reg(fc,ctrl_208,ibi_zero); | ||
208 | |||
209 | v210.sw_reset_210.reset_block_300 = 1; | ||
210 | v210.sw_reset_210.Block_reset_enable = 0xb2; | ||
211 | |||
212 | fc->write_ibi_reg(fc,sw_reset_210,v210); | ||
213 | msleep(1); | ||
214 | |||
215 | fc->write_ibi_reg(fc,ctrl_208,v208_save); | ||
216 | } | ||
217 | EXPORT_SYMBOL(flexcop_reset_block_300); | ||
218 | |||
189 | struct flexcop_device *flexcop_device_kmalloc(size_t bus_specific_len) | 219 | struct flexcop_device *flexcop_device_kmalloc(size_t bus_specific_len) |
190 | { | 220 | { |
191 | void *bus; | 221 | void *bus; |
diff --git a/drivers/media/dvb/b2c2/flexcop.h b/drivers/media/dvb/b2c2/flexcop.h index caa343a97bdc..0cebe1d92e0b 100644 --- a/drivers/media/dvb/b2c2/flexcop.h +++ b/drivers/media/dvb/b2c2/flexcop.h | |||
@@ -26,5 +26,6 @@ extern int b2c2_flexcop_debug; | |||
26 | #define deb_i2c(args...) dprintk(0x04,args) | 26 | #define deb_i2c(args...) dprintk(0x04,args) |
27 | #define deb_ts(args...) dprintk(0x08,args) | 27 | #define deb_ts(args...) dprintk(0x08,args) |
28 | #define deb_sram(args...) dprintk(0x10,args) | 28 | #define deb_sram(args...) dprintk(0x10,args) |
29 | #define deb_rdump(args...) dprintk(0x20,args) | ||
29 | 30 | ||
30 | #endif | 31 | #endif |
diff --git a/drivers/media/dvb/b2c2/flexcop_ibi_value_be.h b/drivers/media/dvb/b2c2/flexcop_ibi_value_be.h new file mode 100644 index 000000000000..ed9a6756b194 --- /dev/null +++ b/drivers/media/dvb/b2c2/flexcop_ibi_value_be.h | |||
@@ -0,0 +1,458 @@ | |||
1 | /* This file is part of linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III | ||
2 | * | ||
3 | * register descriptions | ||
4 | * | ||
5 | * see flexcop.c for copyright information. | ||
6 | */ | ||
7 | |||
8 | /* This file is automatically generated, do not edit things here. */ | ||
9 | #ifndef __FLEXCOP_IBI_VALUE_INCLUDED__ | ||
10 | #define __FLEXCOP_IBI_VALUE_INCLUDED__ | ||
11 | |||
12 | typedef union { | ||
13 | u32 raw; | ||
14 | |||
15 | struct { | ||
16 | u32 dma_address0 :30; | ||
17 | u32 dma_0No_update : 1; | ||
18 | u32 dma_0start : 1; | ||
19 | } dma_0x0; | ||
20 | |||
21 | struct { | ||
22 | u32 dma_addr_size :24; | ||
23 | u32 DMA_maxpackets : 8; | ||
24 | } dma_0x4_remap; | ||
25 | |||
26 | struct { | ||
27 | u32 dma_addr_size :24; | ||
28 | u32 unused : 1; | ||
29 | u32 dma1timer : 7; | ||
30 | } dma_0x4_read; | ||
31 | |||
32 | struct { | ||
33 | u32 dma_addr_size :24; | ||
34 | u32 dmatimer : 7; | ||
35 | u32 unused : 1; | ||
36 | } dma_0x4_write; | ||
37 | |||
38 | struct { | ||
39 | u32 dma_cur_addr :30; | ||
40 | u32 unused : 2; | ||
41 | } dma_0x8; | ||
42 | |||
43 | struct { | ||
44 | u32 dma_address1 :30; | ||
45 | u32 remap_enable : 1; | ||
46 | u32 dma_1start : 1; | ||
47 | } dma_0xc; | ||
48 | |||
49 | struct { | ||
50 | u32 st_done : 1; | ||
51 | u32 no_base_addr_ack_error : 1; | ||
52 | u32 twoWS_port_reg : 2; | ||
53 | u32 total_bytes : 2; | ||
54 | u32 twoWS_rw : 1; | ||
55 | u32 working_start : 1; | ||
56 | u32 data1_reg : 8; | ||
57 | u32 baseaddr : 8; | ||
58 | u32 reserved1 : 1; | ||
59 | u32 chipaddr : 7; | ||
60 | } tw_sm_c_100; | ||
61 | |||
62 | struct { | ||
63 | u32 unused : 6; | ||
64 | u32 force_stop : 1; | ||
65 | u32 exlicit_stops : 1; | ||
66 | u32 data4_reg : 8; | ||
67 | u32 data3_reg : 8; | ||
68 | u32 data2_reg : 8; | ||
69 | } tw_sm_c_104; | ||
70 | |||
71 | struct { | ||
72 | u32 reserved2 :19; | ||
73 | u32 tlo1 : 5; | ||
74 | u32 reserved1 : 2; | ||
75 | u32 thi1 : 6; | ||
76 | } tw_sm_c_108; | ||
77 | |||
78 | struct { | ||
79 | u32 reserved2 :19; | ||
80 | u32 tlo1 : 5; | ||
81 | u32 reserved1 : 2; | ||
82 | u32 thi1 : 6; | ||
83 | } tw_sm_c_10c; | ||
84 | |||
85 | struct { | ||
86 | u32 reserved2 :19; | ||
87 | u32 tlo1 : 5; | ||
88 | u32 reserved1 : 2; | ||
89 | u32 thi1 : 6; | ||
90 | } tw_sm_c_110; | ||
91 | |||
92 | struct { | ||
93 | u32 LNB_CTLPrescaler_sig : 2; | ||
94 | u32 LNB_CTLLowCount_sig :15; | ||
95 | u32 LNB_CTLHighCount_sig :15; | ||
96 | } lnb_switch_freq_200; | ||
97 | |||
98 | struct { | ||
99 | u32 Rev_N_sig_reserved2 : 1; | ||
100 | u32 Rev_N_sig_caps : 1; | ||
101 | u32 Rev_N_sig_reserved1 : 2; | ||
102 | u32 Rev_N_sig_revision_hi : 4; | ||
103 | u32 reserved :20; | ||
104 | u32 Per_reset_sig : 1; | ||
105 | u32 LNB_L_H_sig : 1; | ||
106 | u32 ACPI3_sig : 1; | ||
107 | u32 ACPI1_sig : 1; | ||
108 | } misc_204; | ||
109 | |||
110 | struct { | ||
111 | u32 unused : 9; | ||
112 | u32 Mailbox_from_V8_Enable_sig : 1; | ||
113 | u32 DMA2_Size_IRQ_Enable_sig : 1; | ||
114 | u32 DMA1_Size_IRQ_Enable_sig : 1; | ||
115 | u32 DMA2_Timer_Enable_sig : 1; | ||
116 | u32 DMA2_IRQ_Enable_sig : 1; | ||
117 | u32 DMA1_Timer_Enable_sig : 1; | ||
118 | u32 DMA1_IRQ_Enable_sig : 1; | ||
119 | u32 Rcv_Data_sig : 1; | ||
120 | u32 MAC_filter_Mode_sig : 1; | ||
121 | u32 Multi2_Enable_sig : 1; | ||
122 | u32 Per_CA_Enable_sig : 1; | ||
123 | u32 SMC_Enable_sig : 1; | ||
124 | u32 CA_Enable_sig : 1; | ||
125 | u32 WAN_CA_Enable_sig : 1; | ||
126 | u32 WAN_Enable_sig : 1; | ||
127 | u32 Mask_filter_sig : 1; | ||
128 | u32 Null_filter_sig : 1; | ||
129 | u32 ECM_filter_sig : 1; | ||
130 | u32 EMM_filter_sig : 1; | ||
131 | u32 PMT_filter_sig : 1; | ||
132 | u32 PCR_filter_sig : 1; | ||
133 | u32 Stream2_filter_sig : 1; | ||
134 | u32 Stream1_filter_sig : 1; | ||
135 | } ctrl_208; | ||
136 | |||
137 | struct { | ||
138 | u32 reserved :21; | ||
139 | u32 Transport_Error : 1; | ||
140 | u32 LLC_SNAP_FLAG_set : 1; | ||
141 | u32 Continuity_error_flag : 1; | ||
142 | u32 Data_receiver_error : 1; | ||
143 | u32 Mailbox_from_V8_Status_sig : 1; | ||
144 | u32 DMA2_Size_IRQ_Status : 1; | ||
145 | u32 DMA1_Size_IRQ_Status : 1; | ||
146 | u32 DMA2_Timer_Status : 1; | ||
147 | u32 DMA2_IRQ_Status : 1; | ||
148 | u32 DMA1_Timer_Status : 1; | ||
149 | u32 DMA1_IRQ_Status : 1; | ||
150 | } irq_20c; | ||
151 | |||
152 | struct { | ||
153 | u32 Special_controls :16; | ||
154 | u32 Block_reset_enable : 8; | ||
155 | u32 reset_block_700 : 1; | ||
156 | u32 reset_block_600 : 1; | ||
157 | u32 reset_block_500 : 1; | ||
158 | u32 reset_block_400 : 1; | ||
159 | u32 reset_block_300 : 1; | ||
160 | u32 reset_block_200 : 1; | ||
161 | u32 reset_block_100 : 1; | ||
162 | u32 reset_block_000 : 1; | ||
163 | } sw_reset_210; | ||
164 | |||
165 | struct { | ||
166 | u32 unused2 :20; | ||
167 | u32 polarity_PS_ERR_sig : 1; | ||
168 | u32 polarity_PS_SYNC_sig : 1; | ||
169 | u32 polarity_PS_VALID_sig : 1; | ||
170 | u32 polarity_PS_CLK_sig : 1; | ||
171 | u32 unused1 : 3; | ||
172 | u32 s2p_sel_sig : 1; | ||
173 | u32 section_pkg_enable_sig : 1; | ||
174 | u32 halt_V8_sig : 1; | ||
175 | u32 v2WS_oe_sig : 1; | ||
176 | u32 vuart_oe_sig : 1; | ||
177 | } misc_214; | ||
178 | |||
179 | struct { | ||
180 | u32 Mailbox_from_V8 :32; | ||
181 | } mbox_v8_to_host_218; | ||
182 | |||
183 | struct { | ||
184 | u32 sysramaccess_busmuster : 1; | ||
185 | u32 sysramaccess_write : 1; | ||
186 | u32 unused : 7; | ||
187 | u32 sysramaccess_addr :15; | ||
188 | u32 sysramaccess_data : 8; | ||
189 | } mbox_host_to_v8_21c; | ||
190 | |||
191 | struct { | ||
192 | u32 debug_fifo_problem : 1; | ||
193 | u32 debug_flag_write_status00 : 1; | ||
194 | u32 Stream2_trans : 1; | ||
195 | u32 Stream2_PID :13; | ||
196 | u32 debug_flag_pid_saved : 1; | ||
197 | u32 MAC_Multicast_filter : 1; | ||
198 | u32 Stream1_trans : 1; | ||
199 | u32 Stream1_PID :13; | ||
200 | } pid_filter_300; | ||
201 | |||
202 | struct { | ||
203 | u32 reserved : 2; | ||
204 | u32 PMT_trans : 1; | ||
205 | u32 PMT_PID :13; | ||
206 | u32 debug_overrun2 : 1; | ||
207 | u32 debug_overrun3 : 1; | ||
208 | u32 PCR_trans : 1; | ||
209 | u32 PCR_PID :13; | ||
210 | } pid_filter_304; | ||
211 | |||
212 | struct { | ||
213 | u32 reserved : 2; | ||
214 | u32 ECM_trans : 1; | ||
215 | u32 ECM_PID :13; | ||
216 | u32 EMM_filter_6 : 1; | ||
217 | u32 EMM_filter_4 : 1; | ||
218 | u32 EMM_trans : 1; | ||
219 | u32 EMM_PID :13; | ||
220 | } pid_filter_308; | ||
221 | |||
222 | struct { | ||
223 | u32 unused2 : 3; | ||
224 | u32 Group_mask :13; | ||
225 | u32 unused1 : 2; | ||
226 | u32 Group_trans : 1; | ||
227 | u32 Group_PID :13; | ||
228 | } pid_filter_30c_ext_ind_0_7; | ||
229 | |||
230 | struct { | ||
231 | u32 unused :15; | ||
232 | u32 net_master_read :17; | ||
233 | } pid_filter_30c_ext_ind_1; | ||
234 | |||
235 | struct { | ||
236 | u32 unused :15; | ||
237 | u32 net_master_write :17; | ||
238 | } pid_filter_30c_ext_ind_2; | ||
239 | |||
240 | struct { | ||
241 | u32 unused :15; | ||
242 | u32 next_net_master_write :17; | ||
243 | } pid_filter_30c_ext_ind_3; | ||
244 | |||
245 | struct { | ||
246 | u32 reserved2 : 5; | ||
247 | u32 stack_read :10; | ||
248 | u32 reserved1 : 6; | ||
249 | u32 state_write :10; | ||
250 | u32 unused1 : 1; | ||
251 | } pid_filter_30c_ext_ind_4; | ||
252 | |||
253 | struct { | ||
254 | u32 unused :22; | ||
255 | u32 stack_cnt :10; | ||
256 | } pid_filter_30c_ext_ind_5; | ||
257 | |||
258 | struct { | ||
259 | u32 unused : 4; | ||
260 | u32 data_size_reg :12; | ||
261 | u32 write_status4 : 2; | ||
262 | u32 write_status1 : 2; | ||
263 | u32 pid_fsm_save_reg300 : 2; | ||
264 | u32 pid_fsm_save_reg4 : 2; | ||
265 | u32 pid_fsm_save_reg3 : 2; | ||
266 | u32 pid_fsm_save_reg2 : 2; | ||
267 | u32 pid_fsm_save_reg1 : 2; | ||
268 | u32 pid_fsm_save_reg0 : 2; | ||
269 | } pid_filter_30c_ext_ind_6; | ||
270 | |||
271 | struct { | ||
272 | u32 unused :22; | ||
273 | u32 pass_alltables : 1; | ||
274 | u32 AB_select : 1; | ||
275 | u32 extra_index_reg : 3; | ||
276 | u32 index_reg : 5; | ||
277 | } index_reg_310; | ||
278 | |||
279 | struct { | ||
280 | u32 reserved :17; | ||
281 | u32 PID_enable_bit : 1; | ||
282 | u32 PID_trans : 1; | ||
283 | u32 PID :13; | ||
284 | } pid_n_reg_314; | ||
285 | |||
286 | struct { | ||
287 | u32 reserved : 6; | ||
288 | u32 HighAB_bit : 1; | ||
289 | u32 Enable_bit : 1; | ||
290 | u32 A6_byte : 8; | ||
291 | u32 A5_byte : 8; | ||
292 | u32 A4_byte : 8; | ||
293 | } mac_low_reg_318; | ||
294 | |||
295 | struct { | ||
296 | u32 reserved : 8; | ||
297 | u32 A3_byte : 8; | ||
298 | u32 A2_byte : 8; | ||
299 | u32 A1_byte : 8; | ||
300 | } mac_high_reg_31c; | ||
301 | |||
302 | struct { | ||
303 | u32 data_Tag_ID :16; | ||
304 | u32 reserved :16; | ||
305 | } data_tag_400; | ||
306 | |||
307 | struct { | ||
308 | u32 Card_IDbyte3 : 8; | ||
309 | u32 Card_IDbyte4 : 8; | ||
310 | u32 Card_IDbyte5 : 8; | ||
311 | u32 Card_IDbyte6 : 8; | ||
312 | } card_id_408; | ||
313 | |||
314 | struct { | ||
315 | u32 Card_IDbyte1 : 8; | ||
316 | u32 Card_IDbyte2 : 8; | ||
317 | } card_id_40c; | ||
318 | |||
319 | struct { | ||
320 | u32 MAC6 : 8; | ||
321 | u32 MAC3 : 8; | ||
322 | u32 MAC2 : 8; | ||
323 | u32 MAC1 : 8; | ||
324 | } mac_address_418; | ||
325 | |||
326 | struct { | ||
327 | u32 reserved :16; | ||
328 | u32 MAC8 : 8; | ||
329 | u32 MAC7 : 8; | ||
330 | } mac_address_41c; | ||
331 | |||
332 | struct { | ||
333 | u32 reserved :21; | ||
334 | u32 txbuffempty : 1; | ||
335 | u32 ReceiveByteFrameError : 1; | ||
336 | u32 ReceiveDataReady : 1; | ||
337 | u32 transmitter_data_byte : 8; | ||
338 | } ci_600; | ||
339 | |||
340 | struct { | ||
341 | u32 pi_component_reg : 3; | ||
342 | u32 pi_rw : 1; | ||
343 | u32 pi_ha :20; | ||
344 | u32 pi_d : 8; | ||
345 | } pi_604; | ||
346 | |||
347 | struct { | ||
348 | u32 pi_busy_n : 1; | ||
349 | u32 pi_wait_n : 1; | ||
350 | u32 pi_timeout_status : 1; | ||
351 | u32 pi_CiMax_IRQ_n : 1; | ||
352 | u32 config_cclk : 1; | ||
353 | u32 config_cs_n : 1; | ||
354 | u32 config_wr_n : 1; | ||
355 | u32 config_Prog_n : 1; | ||
356 | u32 config_Init_stat : 1; | ||
357 | u32 config_Done_stat : 1; | ||
358 | u32 pcmcia_b_mod_pwr_n : 1; | ||
359 | u32 pcmcia_a_mod_pwr_n : 1; | ||
360 | u32 reserved : 3; | ||
361 | u32 Timer_addr : 5; | ||
362 | u32 unused : 1; | ||
363 | u32 timer_data : 7; | ||
364 | u32 Timer_Load_req : 1; | ||
365 | u32 Timer_Read_req : 1; | ||
366 | u32 oncecycle_read : 1; | ||
367 | u32 serialReset : 1; | ||
368 | } pi_608; | ||
369 | |||
370 | struct { | ||
371 | u32 reserved : 6; | ||
372 | u32 rw_flag : 1; | ||
373 | u32 dvb_en : 1; | ||
374 | u32 key_array_row : 5; | ||
375 | u32 key_array_col : 3; | ||
376 | u32 key_code : 2; | ||
377 | u32 key_enable : 1; | ||
378 | u32 PID :13; | ||
379 | } dvb_reg_60c; | ||
380 | |||
381 | struct { | ||
382 | u32 start_sram_ibi : 1; | ||
383 | u32 reserved2 : 1; | ||
384 | u32 ce_pin_reg : 1; | ||
385 | u32 oe_pin_reg : 1; | ||
386 | u32 reserved1 : 3; | ||
387 | u32 sc_xfer_bit : 1; | ||
388 | u32 sram_data : 8; | ||
389 | u32 sram_rw : 1; | ||
390 | u32 sram_addr :15; | ||
391 | } sram_ctrl_reg_700; | ||
392 | |||
393 | struct { | ||
394 | u32 net_addr_write :16; | ||
395 | u32 net_addr_read :16; | ||
396 | } net_buf_reg_704; | ||
397 | |||
398 | struct { | ||
399 | u32 cai_cnt : 4; | ||
400 | u32 reserved2 : 6; | ||
401 | u32 cai_write :11; | ||
402 | u32 reserved1 : 5; | ||
403 | u32 cai_read :11; | ||
404 | } cai_buf_reg_708; | ||
405 | |||
406 | struct { | ||
407 | u32 cao_cnt : 4; | ||
408 | u32 reserved2 : 6; | ||
409 | u32 cap_write :11; | ||
410 | u32 reserved1 : 5; | ||
411 | u32 cao_read :11; | ||
412 | } cao_buf_reg_70c; | ||
413 | |||
414 | struct { | ||
415 | u32 media_cnt : 4; | ||
416 | u32 reserved2 : 6; | ||
417 | u32 media_write :11; | ||
418 | u32 reserved1 : 5; | ||
419 | u32 media_read :11; | ||
420 | } media_buf_reg_710; | ||
421 | |||
422 | struct { | ||
423 | u32 reserved :17; | ||
424 | u32 ctrl_maximumfill : 1; | ||
425 | u32 ctrl_sramdma : 1; | ||
426 | u32 ctrl_usb_wan : 1; | ||
427 | u32 cao_ovflow_error : 1; | ||
428 | u32 cai_ovflow_error : 1; | ||
429 | u32 media_ovflow_error : 1; | ||
430 | u32 net_ovflow_error : 1; | ||
431 | u32 MEDIA_Dest : 2; | ||
432 | u32 CAO_Dest : 2; | ||
433 | u32 CAI_Dest : 2; | ||
434 | u32 NET_Dest : 2; | ||
435 | } sram_dest_reg_714; | ||
436 | |||
437 | struct { | ||
438 | u32 reserved3 :11; | ||
439 | u32 net_addr_write : 1; | ||
440 | u32 reserved2 : 3; | ||
441 | u32 net_addr_read : 1; | ||
442 | u32 reserved1 : 4; | ||
443 | u32 net_cnt :12; | ||
444 | } net_buf_reg_718; | ||
445 | |||
446 | struct { | ||
447 | u32 reserved3 : 4; | ||
448 | u32 wan_pkt_frame : 4; | ||
449 | u32 reserved2 : 4; | ||
450 | u32 sram_memmap : 2; | ||
451 | u32 sram_chip : 2; | ||
452 | u32 wan_wait_state : 8; | ||
453 | u32 reserved1 : 6; | ||
454 | u32 wan_speed_sig : 2; | ||
455 | } wan_ctrl_reg_71c; | ||
456 | } flexcop_ibi_value; | ||
457 | |||
458 | #endif | ||
diff --git a/drivers/media/dvb/b2c2/flexcop_ibi_value_le.h b/drivers/media/dvb/b2c2/flexcop_ibi_value_le.h new file mode 100644 index 000000000000..49f2315b6e58 --- /dev/null +++ b/drivers/media/dvb/b2c2/flexcop_ibi_value_le.h | |||
@@ -0,0 +1,458 @@ | |||
1 | /* This file is part of linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III | ||
2 | * | ||
3 | * register descriptions | ||
4 | * | ||
5 | * see flexcop.c for copyright information. | ||
6 | */ | ||
7 | |||
8 | /* This file is automatically generated, do not edit things here. */ | ||
9 | #ifndef __FLEXCOP_IBI_VALUE_INCLUDED__ | ||
10 | #define __FLEXCOP_IBI_VALUE_INCLUDED__ | ||
11 | |||
12 | typedef union { | ||
13 | u32 raw; | ||
14 | |||
15 | struct { | ||
16 | u32 dma_0start : 1; | ||
17 | u32 dma_0No_update : 1; | ||
18 | u32 dma_address0 :30; | ||
19 | } dma_0x0; | ||
20 | |||
21 | struct { | ||
22 | u32 DMA_maxpackets : 8; | ||
23 | u32 dma_addr_size :24; | ||
24 | } dma_0x4_remap; | ||
25 | |||
26 | struct { | ||
27 | u32 dma1timer : 7; | ||
28 | u32 unused : 1; | ||
29 | u32 dma_addr_size :24; | ||
30 | } dma_0x4_read; | ||
31 | |||
32 | struct { | ||
33 | u32 unused : 1; | ||
34 | u32 dmatimer : 7; | ||
35 | u32 dma_addr_size :24; | ||
36 | } dma_0x4_write; | ||
37 | |||
38 | struct { | ||
39 | u32 unused : 2; | ||
40 | u32 dma_cur_addr :30; | ||
41 | } dma_0x8; | ||
42 | |||
43 | struct { | ||
44 | u32 dma_1start : 1; | ||
45 | u32 remap_enable : 1; | ||
46 | u32 dma_address1 :30; | ||
47 | } dma_0xc; | ||
48 | |||
49 | struct { | ||
50 | u32 chipaddr : 7; | ||
51 | u32 reserved1 : 1; | ||
52 | u32 baseaddr : 8; | ||
53 | u32 data1_reg : 8; | ||
54 | u32 working_start : 1; | ||
55 | u32 twoWS_rw : 1; | ||
56 | u32 total_bytes : 2; | ||
57 | u32 twoWS_port_reg : 2; | ||
58 | u32 no_base_addr_ack_error : 1; | ||
59 | u32 st_done : 1; | ||
60 | } tw_sm_c_100; | ||
61 | |||
62 | struct { | ||
63 | u32 data2_reg : 8; | ||
64 | u32 data3_reg : 8; | ||
65 | u32 data4_reg : 8; | ||
66 | u32 exlicit_stops : 1; | ||
67 | u32 force_stop : 1; | ||
68 | u32 unused : 6; | ||
69 | } tw_sm_c_104; | ||
70 | |||
71 | struct { | ||
72 | u32 thi1 : 6; | ||
73 | u32 reserved1 : 2; | ||
74 | u32 tlo1 : 5; | ||
75 | u32 reserved2 :19; | ||
76 | } tw_sm_c_108; | ||
77 | |||
78 | struct { | ||
79 | u32 thi1 : 6; | ||
80 | u32 reserved1 : 2; | ||
81 | u32 tlo1 : 5; | ||
82 | u32 reserved2 :19; | ||
83 | } tw_sm_c_10c; | ||
84 | |||
85 | struct { | ||
86 | u32 thi1 : 6; | ||
87 | u32 reserved1 : 2; | ||
88 | u32 tlo1 : 5; | ||
89 | u32 reserved2 :19; | ||
90 | } tw_sm_c_110; | ||
91 | |||
92 | struct { | ||
93 | u32 LNB_CTLHighCount_sig :15; | ||
94 | u32 LNB_CTLLowCount_sig :15; | ||
95 | u32 LNB_CTLPrescaler_sig : 2; | ||
96 | } lnb_switch_freq_200; | ||
97 | |||
98 | struct { | ||
99 | u32 ACPI1_sig : 1; | ||
100 | u32 ACPI3_sig : 1; | ||
101 | u32 LNB_L_H_sig : 1; | ||
102 | u32 Per_reset_sig : 1; | ||
103 | u32 reserved :20; | ||
104 | u32 Rev_N_sig_revision_hi : 4; | ||
105 | u32 Rev_N_sig_reserved1 : 2; | ||
106 | u32 Rev_N_sig_caps : 1; | ||
107 | u32 Rev_N_sig_reserved2 : 1; | ||
108 | } misc_204; | ||
109 | |||
110 | struct { | ||
111 | u32 Stream1_filter_sig : 1; | ||
112 | u32 Stream2_filter_sig : 1; | ||
113 | u32 PCR_filter_sig : 1; | ||
114 | u32 PMT_filter_sig : 1; | ||
115 | u32 EMM_filter_sig : 1; | ||
116 | u32 ECM_filter_sig : 1; | ||
117 | u32 Null_filter_sig : 1; | ||
118 | u32 Mask_filter_sig : 1; | ||
119 | u32 WAN_Enable_sig : 1; | ||
120 | u32 WAN_CA_Enable_sig : 1; | ||
121 | u32 CA_Enable_sig : 1; | ||
122 | u32 SMC_Enable_sig : 1; | ||
123 | u32 Per_CA_Enable_sig : 1; | ||
124 | u32 Multi2_Enable_sig : 1; | ||
125 | u32 MAC_filter_Mode_sig : 1; | ||
126 | u32 Rcv_Data_sig : 1; | ||
127 | u32 DMA1_IRQ_Enable_sig : 1; | ||
128 | u32 DMA1_Timer_Enable_sig : 1; | ||
129 | u32 DMA2_IRQ_Enable_sig : 1; | ||
130 | u32 DMA2_Timer_Enable_sig : 1; | ||
131 | u32 DMA1_Size_IRQ_Enable_sig : 1; | ||
132 | u32 DMA2_Size_IRQ_Enable_sig : 1; | ||
133 | u32 Mailbox_from_V8_Enable_sig : 1; | ||
134 | u32 unused : 9; | ||
135 | } ctrl_208; | ||
136 | |||
137 | struct { | ||
138 | u32 DMA1_IRQ_Status : 1; | ||
139 | u32 DMA1_Timer_Status : 1; | ||
140 | u32 DMA2_IRQ_Status : 1; | ||
141 | u32 DMA2_Timer_Status : 1; | ||
142 | u32 DMA1_Size_IRQ_Status : 1; | ||
143 | u32 DMA2_Size_IRQ_Status : 1; | ||
144 | u32 Mailbox_from_V8_Status_sig : 1; | ||
145 | u32 Data_receiver_error : 1; | ||
146 | u32 Continuity_error_flag : 1; | ||
147 | u32 LLC_SNAP_FLAG_set : 1; | ||
148 | u32 Transport_Error : 1; | ||
149 | u32 reserved :21; | ||
150 | } irq_20c; | ||
151 | |||
152 | struct { | ||
153 | u32 reset_block_000 : 1; | ||
154 | u32 reset_block_100 : 1; | ||
155 | u32 reset_block_200 : 1; | ||
156 | u32 reset_block_300 : 1; | ||
157 | u32 reset_block_400 : 1; | ||
158 | u32 reset_block_500 : 1; | ||
159 | u32 reset_block_600 : 1; | ||
160 | u32 reset_block_700 : 1; | ||
161 | u32 Block_reset_enable : 8; | ||
162 | u32 Special_controls :16; | ||
163 | } sw_reset_210; | ||
164 | |||
165 | struct { | ||
166 | u32 vuart_oe_sig : 1; | ||
167 | u32 v2WS_oe_sig : 1; | ||
168 | u32 halt_V8_sig : 1; | ||
169 | u32 section_pkg_enable_sig : 1; | ||
170 | u32 s2p_sel_sig : 1; | ||
171 | u32 unused1 : 3; | ||
172 | u32 polarity_PS_CLK_sig : 1; | ||
173 | u32 polarity_PS_VALID_sig : 1; | ||
174 | u32 polarity_PS_SYNC_sig : 1; | ||
175 | u32 polarity_PS_ERR_sig : 1; | ||
176 | u32 unused2 :20; | ||
177 | } misc_214; | ||
178 | |||
179 | struct { | ||
180 | u32 Mailbox_from_V8 :32; | ||
181 | } mbox_v8_to_host_218; | ||
182 | |||
183 | struct { | ||
184 | u32 sysramaccess_data : 8; | ||
185 | u32 sysramaccess_addr :15; | ||
186 | u32 unused : 7; | ||
187 | u32 sysramaccess_write : 1; | ||
188 | u32 sysramaccess_busmuster : 1; | ||
189 | } mbox_host_to_v8_21c; | ||
190 | |||
191 | struct { | ||
192 | u32 Stream1_PID :13; | ||
193 | u32 Stream1_trans : 1; | ||
194 | u32 MAC_Multicast_filter : 1; | ||
195 | u32 debug_flag_pid_saved : 1; | ||
196 | u32 Stream2_PID :13; | ||
197 | u32 Stream2_trans : 1; | ||
198 | u32 debug_flag_write_status00 : 1; | ||
199 | u32 debug_fifo_problem : 1; | ||
200 | } pid_filter_300; | ||
201 | |||
202 | struct { | ||
203 | u32 PCR_PID :13; | ||
204 | u32 PCR_trans : 1; | ||
205 | u32 debug_overrun3 : 1; | ||
206 | u32 debug_overrun2 : 1; | ||
207 | u32 PMT_PID :13; | ||
208 | u32 PMT_trans : 1; | ||
209 | u32 reserved : 2; | ||
210 | } pid_filter_304; | ||
211 | |||
212 | struct { | ||
213 | u32 EMM_PID :13; | ||
214 | u32 EMM_trans : 1; | ||
215 | u32 EMM_filter_4 : 1; | ||
216 | u32 EMM_filter_6 : 1; | ||
217 | u32 ECM_PID :13; | ||
218 | u32 ECM_trans : 1; | ||
219 | u32 reserved : 2; | ||
220 | } pid_filter_308; | ||
221 | |||
222 | struct { | ||
223 | u32 Group_PID :13; | ||
224 | u32 Group_trans : 1; | ||
225 | u32 unused1 : 2; | ||
226 | u32 Group_mask :13; | ||
227 | u32 unused2 : 3; | ||
228 | } pid_filter_30c_ext_ind_0_7; | ||
229 | |||
230 | struct { | ||
231 | u32 net_master_read :17; | ||
232 | u32 unused :15; | ||
233 | } pid_filter_30c_ext_ind_1; | ||
234 | |||
235 | struct { | ||
236 | u32 net_master_write :17; | ||
237 | u32 unused :15; | ||
238 | } pid_filter_30c_ext_ind_2; | ||
239 | |||
240 | struct { | ||
241 | u32 next_net_master_write :17; | ||
242 | u32 unused :15; | ||
243 | } pid_filter_30c_ext_ind_3; | ||
244 | |||
245 | struct { | ||
246 | u32 unused1 : 1; | ||
247 | u32 state_write :10; | ||
248 | u32 reserved1 : 6; | ||
249 | u32 stack_read :10; | ||
250 | u32 reserved2 : 5; | ||
251 | } pid_filter_30c_ext_ind_4; | ||
252 | |||
253 | struct { | ||
254 | u32 stack_cnt :10; | ||
255 | u32 unused :22; | ||
256 | } pid_filter_30c_ext_ind_5; | ||
257 | |||
258 | struct { | ||
259 | u32 pid_fsm_save_reg0 : 2; | ||
260 | u32 pid_fsm_save_reg1 : 2; | ||
261 | u32 pid_fsm_save_reg2 : 2; | ||
262 | u32 pid_fsm_save_reg3 : 2; | ||
263 | u32 pid_fsm_save_reg4 : 2; | ||
264 | u32 pid_fsm_save_reg300 : 2; | ||
265 | u32 write_status1 : 2; | ||
266 | u32 write_status4 : 2; | ||
267 | u32 data_size_reg :12; | ||
268 | u32 unused : 4; | ||
269 | } pid_filter_30c_ext_ind_6; | ||
270 | |||
271 | struct { | ||
272 | u32 index_reg : 5; | ||
273 | u32 extra_index_reg : 3; | ||
274 | u32 AB_select : 1; | ||
275 | u32 pass_alltables : 1; | ||
276 | u32 unused :22; | ||
277 | } index_reg_310; | ||
278 | |||
279 | struct { | ||
280 | u32 PID :13; | ||
281 | u32 PID_trans : 1; | ||
282 | u32 PID_enable_bit : 1; | ||
283 | u32 reserved :17; | ||
284 | } pid_n_reg_314; | ||
285 | |||
286 | struct { | ||
287 | u32 A4_byte : 8; | ||
288 | u32 A5_byte : 8; | ||
289 | u32 A6_byte : 8; | ||
290 | u32 Enable_bit : 1; | ||
291 | u32 HighAB_bit : 1; | ||
292 | u32 reserved : 6; | ||
293 | } mac_low_reg_318; | ||
294 | |||
295 | struct { | ||
296 | u32 A1_byte : 8; | ||
297 | u32 A2_byte : 8; | ||
298 | u32 A3_byte : 8; | ||
299 | u32 reserved : 8; | ||
300 | } mac_high_reg_31c; | ||
301 | |||
302 | struct { | ||
303 | u32 reserved :16; | ||
304 | u32 data_Tag_ID :16; | ||
305 | } data_tag_400; | ||
306 | |||
307 | struct { | ||
308 | u32 Card_IDbyte6 : 8; | ||
309 | u32 Card_IDbyte5 : 8; | ||
310 | u32 Card_IDbyte4 : 8; | ||
311 | u32 Card_IDbyte3 : 8; | ||
312 | } card_id_408; | ||
313 | |||
314 | struct { | ||
315 | u32 Card_IDbyte2 : 8; | ||
316 | u32 Card_IDbyte1 : 8; | ||
317 | } card_id_40c; | ||
318 | |||
319 | struct { | ||
320 | u32 MAC1 : 8; | ||
321 | u32 MAC2 : 8; | ||
322 | u32 MAC3 : 8; | ||
323 | u32 MAC6 : 8; | ||
324 | } mac_address_418; | ||
325 | |||
326 | struct { | ||
327 | u32 MAC7 : 8; | ||
328 | u32 MAC8 : 8; | ||
329 | u32 reserved :16; | ||
330 | } mac_address_41c; | ||
331 | |||
332 | struct { | ||
333 | u32 transmitter_data_byte : 8; | ||
334 | u32 ReceiveDataReady : 1; | ||
335 | u32 ReceiveByteFrameError : 1; | ||
336 | u32 txbuffempty : 1; | ||
337 | u32 reserved :21; | ||
338 | } ci_600; | ||
339 | |||
340 | struct { | ||
341 | u32 pi_d : 8; | ||
342 | u32 pi_ha :20; | ||
343 | u32 pi_rw : 1; | ||
344 | u32 pi_component_reg : 3; | ||
345 | } pi_604; | ||
346 | |||
347 | struct { | ||
348 | u32 serialReset : 1; | ||
349 | u32 oncecycle_read : 1; | ||
350 | u32 Timer_Read_req : 1; | ||
351 | u32 Timer_Load_req : 1; | ||
352 | u32 timer_data : 7; | ||
353 | u32 unused : 1; | ||
354 | u32 Timer_addr : 5; | ||
355 | u32 reserved : 3; | ||
356 | u32 pcmcia_a_mod_pwr_n : 1; | ||
357 | u32 pcmcia_b_mod_pwr_n : 1; | ||
358 | u32 config_Done_stat : 1; | ||
359 | u32 config_Init_stat : 1; | ||
360 | u32 config_Prog_n : 1; | ||
361 | u32 config_wr_n : 1; | ||
362 | u32 config_cs_n : 1; | ||
363 | u32 config_cclk : 1; | ||
364 | u32 pi_CiMax_IRQ_n : 1; | ||
365 | u32 pi_timeout_status : 1; | ||
366 | u32 pi_wait_n : 1; | ||
367 | u32 pi_busy_n : 1; | ||
368 | } pi_608; | ||
369 | |||
370 | struct { | ||
371 | u32 PID :13; | ||
372 | u32 key_enable : 1; | ||
373 | u32 key_code : 2; | ||
374 | u32 key_array_col : 3; | ||
375 | u32 key_array_row : 5; | ||
376 | u32 dvb_en : 1; | ||
377 | u32 rw_flag : 1; | ||
378 | u32 reserved : 6; | ||
379 | } dvb_reg_60c; | ||
380 | |||
381 | struct { | ||
382 | u32 sram_addr :15; | ||
383 | u32 sram_rw : 1; | ||
384 | u32 sram_data : 8; | ||
385 | u32 sc_xfer_bit : 1; | ||
386 | u32 reserved1 : 3; | ||
387 | u32 oe_pin_reg : 1; | ||
388 | u32 ce_pin_reg : 1; | ||
389 | u32 reserved2 : 1; | ||
390 | u32 start_sram_ibi : 1; | ||
391 | } sram_ctrl_reg_700; | ||
392 | |||
393 | struct { | ||
394 | u32 net_addr_read :16; | ||
395 | u32 net_addr_write :16; | ||
396 | } net_buf_reg_704; | ||
397 | |||
398 | struct { | ||
399 | u32 cai_read :11; | ||
400 | u32 reserved1 : 5; | ||
401 | u32 cai_write :11; | ||
402 | u32 reserved2 : 6; | ||
403 | u32 cai_cnt : 4; | ||
404 | } cai_buf_reg_708; | ||
405 | |||
406 | struct { | ||
407 | u32 cao_read :11; | ||
408 | u32 reserved1 : 5; | ||
409 | u32 cap_write :11; | ||
410 | u32 reserved2 : 6; | ||
411 | u32 cao_cnt : 4; | ||
412 | } cao_buf_reg_70c; | ||
413 | |||
414 | struct { | ||
415 | u32 media_read :11; | ||
416 | u32 reserved1 : 5; | ||
417 | u32 media_write :11; | ||
418 | u32 reserved2 : 6; | ||
419 | u32 media_cnt : 4; | ||
420 | } media_buf_reg_710; | ||
421 | |||
422 | struct { | ||
423 | u32 NET_Dest : 2; | ||
424 | u32 CAI_Dest : 2; | ||
425 | u32 CAO_Dest : 2; | ||
426 | u32 MEDIA_Dest : 2; | ||
427 | u32 net_ovflow_error : 1; | ||
428 | u32 media_ovflow_error : 1; | ||
429 | u32 cai_ovflow_error : 1; | ||
430 | u32 cao_ovflow_error : 1; | ||
431 | u32 ctrl_usb_wan : 1; | ||
432 | u32 ctrl_sramdma : 1; | ||
433 | u32 ctrl_maximumfill : 1; | ||
434 | u32 reserved :17; | ||
435 | } sram_dest_reg_714; | ||
436 | |||
437 | struct { | ||
438 | u32 net_cnt :12; | ||
439 | u32 reserved1 : 4; | ||
440 | u32 net_addr_read : 1; | ||
441 | u32 reserved2 : 3; | ||
442 | u32 net_addr_write : 1; | ||
443 | u32 reserved3 :11; | ||
444 | } net_buf_reg_718; | ||
445 | |||
446 | struct { | ||
447 | u32 wan_speed_sig : 2; | ||
448 | u32 reserved1 : 6; | ||
449 | u32 wan_wait_state : 8; | ||
450 | u32 sram_chip : 2; | ||
451 | u32 sram_memmap : 2; | ||
452 | u32 reserved2 : 4; | ||
453 | u32 wan_pkt_frame : 4; | ||
454 | u32 reserved3 : 4; | ||
455 | } wan_ctrl_reg_71c; | ||
456 | } flexcop_ibi_value; | ||
457 | |||
458 | #endif | ||
diff --git a/drivers/media/dvb/b2c2/skystar2.c b/drivers/media/dvb/b2c2/skystar2.c deleted file mode 100644 index acbc4c34f72a..000000000000 --- a/drivers/media/dvb/b2c2/skystar2.c +++ /dev/null | |||
@@ -1,2644 +0,0 @@ | |||
1 | /* | ||
2 | * skystar2.c - driver for the Technisat SkyStar2 PCI DVB card | ||
3 | * based on the FlexCopII by B2C2,Inc. | ||
4 | * | ||
5 | * Copyright (C) 2003 Vadim Catana, skystar@moldova.cc | ||
6 | * | ||
7 | * FIX: DISEQC Tone Burst in flexcop_diseqc_ioctl() | ||
8 | * FIX: FULL soft DiSEqC for skystar2 (FlexCopII rev 130) VP310 equipped | ||
9 | * Vincenzo Di Massa, hawk.it at tiscalinet.it | ||
10 | * | ||
11 | * Converted to Linux coding style | ||
12 | * Misc reorganization, polishing, restyling | ||
13 | * Roberto Ragusa, skystar2-c5b8 at robertoragusa dot it | ||
14 | * | ||
15 | * Added hardware filtering support, | ||
16 | * Niklas Peinecke, peinecke at gdv.uni-hannover.de | ||
17 | * | ||
18 | * | ||
19 | * This program is free software; you can redistribute it and/or | ||
20 | * modify it under the terms of the GNU Lesser General Public License | ||
21 | * as published by the Free Software Foundation; either version 2.1 | ||
22 | * of the License, or (at your option) any later version. | ||
23 | * | ||
24 | * This program is distributed in the hope that it will be useful, | ||
25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | * GNU General Public License for more details. | ||
28 | * | ||
29 | * You should have received a copy of the GNU Lesser General Public License | ||
30 | * along with this program; if not, write to the Free Software | ||
31 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
32 | */ | ||
33 | |||
34 | #include <linux/module.h> | ||
35 | #include <linux/moduleparam.h> | ||
36 | #include <linux/delay.h> | ||
37 | #include <linux/pci.h> | ||
38 | #include <linux/init.h> | ||
39 | #include <linux/version.h> | ||
40 | |||
41 | #include <asm/io.h> | ||
42 | |||
43 | #include "dvb_frontend.h" | ||
44 | |||
45 | #include <linux/dvb/frontend.h> | ||
46 | #include <linux/dvb/dmx.h> | ||
47 | #include "dvb_demux.h" | ||
48 | #include "dmxdev.h" | ||
49 | #include "dvb_filter.h" | ||
50 | #include "dvbdev.h" | ||
51 | #include "demux.h" | ||
52 | #include "dvb_net.h" | ||
53 | #include "stv0299.h" | ||
54 | #include "mt352.h" | ||
55 | #include "mt312.h" | ||
56 | #include "nxt2002.h" | ||
57 | |||
58 | static int debug; | ||
59 | static int enable_hw_filters = 2; | ||
60 | |||
61 | module_param(debug, int, 0644); | ||
62 | MODULE_PARM_DESC(debug, "Set debugging level (0 = default, 1 = most messages, 2 = all messages)."); | ||
63 | module_param(enable_hw_filters, int, 0444); | ||
64 | MODULE_PARM_DESC(enable_hw_filters, "enable hardware filters: supported values: 0 (none), 1, 2"); | ||
65 | |||
66 | #define dprintk(x...) do { if (debug>=1) printk(x); } while (0) | ||
67 | #define ddprintk(x...) do { if (debug>=2) printk(x); } while (0) | ||
68 | |||
69 | #define SIZE_OF_BUF_DMA1 0x3ac00 | ||
70 | #define SIZE_OF_BUF_DMA2 0x758 | ||
71 | |||
72 | #define MAX_N_HW_FILTERS (6+32) | ||
73 | #define N_PID_SLOTS 256 | ||
74 | |||
75 | struct dmaq { | ||
76 | u32 bus_addr; | ||
77 | u32 head; | ||
78 | u32 tail; | ||
79 | u32 buffer_size; | ||
80 | u8 *buffer; | ||
81 | }; | ||
82 | |||
83 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) | ||
84 | #define __iomem | ||
85 | #endif | ||
86 | |||
87 | struct adapter { | ||
88 | struct pci_dev *pdev; | ||
89 | |||
90 | u8 card_revision; | ||
91 | u32 b2c2_revision; | ||
92 | u32 pid_filter_max; | ||
93 | u32 mac_filter_max; | ||
94 | u32 irq; | ||
95 | void __iomem *io_mem; | ||
96 | unsigned long io_port; | ||
97 | u8 mac_addr[8]; | ||
98 | u32 dw_sram_type; | ||
99 | |||
100 | struct dvb_adapter dvb_adapter; | ||
101 | struct dvb_demux demux; | ||
102 | struct dmxdev dmxdev; | ||
103 | struct dmx_frontend hw_frontend; | ||
104 | struct dmx_frontend mem_frontend; | ||
105 | struct i2c_adapter i2c_adap; | ||
106 | struct dvb_net dvbnet; | ||
107 | |||
108 | struct semaphore i2c_sem; | ||
109 | |||
110 | struct dmaq dmaq1; | ||
111 | struct dmaq dmaq2; | ||
112 | |||
113 | u32 dma_ctrl; | ||
114 | u32 dma_status; | ||
115 | |||
116 | int capturing; | ||
117 | |||
118 | spinlock_t lock; | ||
119 | |||
120 | int useable_hw_filters; | ||
121 | u16 hw_pids[MAX_N_HW_FILTERS]; | ||
122 | u16 pid_list[N_PID_SLOTS]; | ||
123 | int pid_rc[N_PID_SLOTS]; // ref counters for the pids | ||
124 | int pid_count; | ||
125 | int whole_bandwidth_count; | ||
126 | u32 mac_filter; | ||
127 | |||
128 | struct dvb_frontend* fe; | ||
129 | int (*fe_sleep)(struct dvb_frontend* fe); | ||
130 | }; | ||
131 | |||
132 | #define write_reg_dw(adapter,reg,value) writel(value, adapter->io_mem + reg) | ||
133 | #define read_reg_dw(adapter,reg) readl(adapter->io_mem + reg) | ||
134 | |||
135 | static void write_reg_bitfield(struct adapter *adapter, u32 reg, u32 zeromask, u32 orvalue) | ||
136 | { | ||
137 | u32 tmp; | ||
138 | |||
139 | tmp = read_reg_dw(adapter, reg); | ||
140 | tmp = (tmp & ~zeromask) | orvalue; | ||
141 | write_reg_dw(adapter, reg, tmp); | ||
142 | } | ||
143 | |||
144 | /* i2c functions */ | ||
145 | static int i2c_main_write_for_flex2(struct adapter *adapter, u32 command, u8 *buf, int retries) | ||
146 | { | ||
147 | int i; | ||
148 | u32 value; | ||
149 | |||
150 | write_reg_dw(adapter, 0x100, 0); | ||
151 | write_reg_dw(adapter, 0x100, command); | ||
152 | |||
153 | for (i = 0; i < retries; i++) { | ||
154 | value = read_reg_dw(adapter, 0x100); | ||
155 | |||
156 | if ((value & 0x40000000) == 0) { | ||
157 | if ((value & 0x81000000) == 0x80000000) { | ||
158 | if (buf != 0) | ||
159 | *buf = (value >> 0x10) & 0xff; | ||
160 | |||
161 | return 1; | ||
162 | } | ||
163 | } else { | ||
164 | write_reg_dw(adapter, 0x100, 0); | ||
165 | write_reg_dw(adapter, 0x100, command); | ||
166 | } | ||
167 | } | ||
168 | |||
169 | return 0; | ||
170 | } | ||
171 | |||
172 | /* device = 0x10000000 for tuner, 0x20000000 for eeprom */ | ||
173 | static void i2c_main_setup(u32 device, u32 chip_addr, u8 op, u8 addr, u32 value, u32 len, u32 *command) | ||
174 | { | ||
175 | *command = device | ((len - 1) << 26) | (value << 16) | (addr << 8) | chip_addr; | ||
176 | |||
177 | if (op != 0) | ||
178 | *command = *command | 0x03000000; | ||
179 | else | ||
180 | *command = *command | 0x01000000; | ||
181 | } | ||
182 | |||
183 | static int flex_i2c_read4(struct adapter *adapter, u32 device, u32 chip_addr, u16 addr, u8 *buf, u8 len) | ||
184 | { | ||
185 | u32 command; | ||
186 | u32 value; | ||
187 | |||
188 | int result, i; | ||
189 | |||
190 | i2c_main_setup(device, chip_addr, 1, addr, 0, len, &command); | ||
191 | |||
192 | result = i2c_main_write_for_flex2(adapter, command, buf, 100000); | ||
193 | |||
194 | if ((result & 0xff) != 0) { | ||
195 | if (len > 1) { | ||
196 | value = read_reg_dw(adapter, 0x104); | ||
197 | |||
198 | for (i = 1; i < len; i++) { | ||
199 | buf[i] = value & 0xff; | ||
200 | value = value >> 8; | ||
201 | } | ||
202 | } | ||
203 | } | ||
204 | |||
205 | return result; | ||
206 | } | ||
207 | |||
208 | static int flex_i2c_write4(struct adapter *adapter, u32 device, u32 chip_addr, u32 addr, u8 *buf, u8 len) | ||
209 | { | ||
210 | u32 command; | ||
211 | u32 value; | ||
212 | int i; | ||
213 | |||
214 | if (len > 1) { | ||
215 | value = 0; | ||
216 | |||
217 | for (i = len; i > 1; i--) { | ||
218 | value = value << 8; | ||
219 | value = value | buf[i - 1]; | ||
220 | } | ||
221 | |||
222 | write_reg_dw(adapter, 0x104, value); | ||
223 | } | ||
224 | |||
225 | i2c_main_setup(device, chip_addr, 0, addr, buf[0], len, &command); | ||
226 | |||
227 | return i2c_main_write_for_flex2(adapter, command, NULL, 100000); | ||
228 | } | ||
229 | |||
230 | static void fixchipaddr(u32 device, u32 bus, u32 addr, u32 *ret) | ||
231 | { | ||
232 | if (device == 0x20000000) | ||
233 | *ret = bus | ((addr >> 8) & 3); | ||
234 | else | ||
235 | *ret = bus; | ||
236 | } | ||
237 | |||
238 | static u32 flex_i2c_read(struct adapter *adapter, u32 device, u32 bus, u32 addr, u8 *buf, u32 len) | ||
239 | { | ||
240 | u32 chipaddr; | ||
241 | u32 bytes_to_transfer; | ||
242 | u8 *start; | ||
243 | |||
244 | ddprintk("%s:\n", __FUNCTION__); | ||
245 | |||
246 | start = buf; | ||
247 | |||
248 | while (len != 0) { | ||
249 | bytes_to_transfer = len; | ||
250 | |||
251 | if (bytes_to_transfer > 4) | ||
252 | bytes_to_transfer = 4; | ||
253 | |||
254 | fixchipaddr(device, bus, addr, &chipaddr); | ||
255 | |||
256 | if (flex_i2c_read4(adapter, device, chipaddr, addr, buf, bytes_to_transfer) == 0) | ||
257 | return buf - start; | ||
258 | |||
259 | buf = buf + bytes_to_transfer; | ||
260 | addr = addr + bytes_to_transfer; | ||
261 | len = len - bytes_to_transfer; | ||
262 | }; | ||
263 | |||
264 | return buf - start; | ||
265 | } | ||
266 | |||
267 | static u32 flex_i2c_write(struct adapter *adapter, u32 device, u32 bus, u32 addr, u8 *buf, u32 len) | ||
268 | { | ||
269 | u32 chipaddr; | ||
270 | u32 bytes_to_transfer; | ||
271 | u8 *start; | ||
272 | |||
273 | ddprintk("%s:\n", __FUNCTION__); | ||
274 | |||
275 | start = buf; | ||
276 | |||
277 | while (len != 0) { | ||
278 | bytes_to_transfer = len; | ||
279 | |||
280 | if (bytes_to_transfer > 4) | ||
281 | bytes_to_transfer = 4; | ||
282 | |||
283 | fixchipaddr(device, bus, addr, &chipaddr); | ||
284 | |||
285 | if (flex_i2c_write4(adapter, device, chipaddr, addr, buf, bytes_to_transfer) == 0) | ||
286 | return buf - start; | ||
287 | |||
288 | buf = buf + bytes_to_transfer; | ||
289 | addr = addr + bytes_to_transfer; | ||
290 | len = len - bytes_to_transfer; | ||
291 | } | ||
292 | |||
293 | return buf - start; | ||
294 | } | ||
295 | |||
296 | static int master_xfer(struct i2c_adapter* adapter, struct i2c_msg *msgs, int num) | ||
297 | { | ||
298 | struct adapter *tmp = i2c_get_adapdata(adapter); | ||
299 | int i, ret = 0; | ||
300 | |||
301 | if (down_interruptible(&tmp->i2c_sem)) | ||
302 | return -ERESTARTSYS; | ||
303 | |||
304 | ddprintk("%s: %d messages to transfer\n", __FUNCTION__, num); | ||
305 | |||
306 | for (i = 0; i < num; i++) { | ||
307 | ddprintk("message %d: flags=0x%x, addr=0x%x, buf=0x%x, len=%d \n", i, | ||
308 | msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len); | ||
309 | } | ||
310 | |||
311 | // read command | ||
312 | if ((num == 2) && (msgs[0].flags == 0) && (msgs[1].flags == I2C_M_RD) && (msgs[0].buf != NULL) && (msgs[1].buf != NULL)) { | ||
313 | |||
314 | ret = flex_i2c_read(tmp, 0x10000000, msgs[0].addr, msgs[0].buf[0], msgs[1].buf, msgs[1].len); | ||
315 | |||
316 | up(&tmp->i2c_sem); | ||
317 | |||
318 | if (ret != msgs[1].len) { | ||
319 | dprintk("%s: read error !\n", __FUNCTION__); | ||
320 | |||
321 | for (i = 0; i < 2; i++) { | ||
322 | dprintk("message %d: flags=0x%x, addr=0x%x, buf=0x%x, len=%d \n", i, | ||
323 | msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len); | ||
324 | } | ||
325 | |||
326 | return -EREMOTEIO; | ||
327 | } | ||
328 | |||
329 | return num; | ||
330 | } | ||
331 | // write command | ||
332 | for (i = 0; i < num; i++) { | ||
333 | |||
334 | if ((msgs[i].flags != 0) || (msgs[i].buf == NULL) || (msgs[i].len < 2)) | ||
335 | return -EINVAL; | ||
336 | |||
337 | ret = flex_i2c_write(tmp, 0x10000000, msgs[i].addr, msgs[i].buf[0], &msgs[i].buf[1], msgs[i].len - 1); | ||
338 | |||
339 | up(&tmp->i2c_sem); | ||
340 | |||
341 | if (ret != msgs[0].len - 1) { | ||
342 | dprintk("%s: write error %i !\n", __FUNCTION__, ret); | ||
343 | |||
344 | dprintk("message %d: flags=0x%x, addr=0x%x, buf[0]=0x%x, len=%d \n", i, | ||
345 | msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len); | ||
346 | |||
347 | return -EREMOTEIO; | ||
348 | } | ||
349 | |||
350 | return num; | ||
351 | } | ||
352 | |||
353 | printk("%s: unknown command format !\n", __FUNCTION__); | ||
354 | |||
355 | return -EINVAL; | ||
356 | } | ||
357 | |||
358 | /* SRAM (Skystar2 rev2.3 has one "ISSI IS61LV256" chip on board, | ||
359 | but it seems that FlexCopII can work with more than one chip) */ | ||
360 | static void sram_set_net_dest(struct adapter *adapter, u8 dest) | ||
361 | { | ||
362 | u32 tmp; | ||
363 | |||
364 | udelay(1000); | ||
365 | |||
366 | tmp = (read_reg_dw(adapter, 0x714) & 0xfffffffc) | (dest & 3); | ||
367 | |||
368 | udelay(1000); | ||
369 | |||
370 | write_reg_dw(adapter, 0x714, tmp); | ||
371 | write_reg_dw(adapter, 0x714, tmp); | ||
372 | |||
373 | udelay(1000); | ||
374 | |||
375 | /* return value is never used? */ | ||
376 | /* return tmp; */ | ||
377 | } | ||
378 | |||
379 | static void sram_set_cai_dest(struct adapter *adapter, u8 dest) | ||
380 | { | ||
381 | u32 tmp; | ||
382 | |||
383 | udelay(1000); | ||
384 | |||
385 | tmp = (read_reg_dw(adapter, 0x714) & 0xfffffff3) | ((dest & 3) << 2); | ||
386 | |||
387 | udelay(1000); | ||
388 | udelay(1000); | ||
389 | |||
390 | write_reg_dw(adapter, 0x714, tmp); | ||
391 | write_reg_dw(adapter, 0x714, tmp); | ||
392 | |||
393 | udelay(1000); | ||
394 | |||
395 | /* return value is never used? */ | ||
396 | /* return tmp; */ | ||
397 | } | ||
398 | |||
399 | static void sram_set_cao_dest(struct adapter *adapter, u8 dest) | ||
400 | { | ||
401 | u32 tmp; | ||
402 | |||
403 | udelay(1000); | ||
404 | |||
405 | tmp = (read_reg_dw(adapter, 0x714) & 0xffffffcf) | ((dest & 3) << 4); | ||
406 | |||
407 | udelay(1000); | ||
408 | udelay(1000); | ||
409 | |||
410 | write_reg_dw(adapter, 0x714, tmp); | ||
411 | write_reg_dw(adapter, 0x714, tmp); | ||
412 | |||
413 | udelay(1000); | ||
414 | |||
415 | /* return value is never used? */ | ||
416 | /* return tmp; */ | ||
417 | } | ||
418 | |||
419 | static void sram_set_media_dest(struct adapter *adapter, u8 dest) | ||
420 | { | ||
421 | u32 tmp; | ||
422 | |||
423 | udelay(1000); | ||
424 | |||
425 | tmp = (read_reg_dw(adapter, 0x714) & 0xffffff3f) | ((dest & 3) << 6); | ||
426 | |||
427 | udelay(1000); | ||
428 | udelay(1000); | ||
429 | |||
430 | write_reg_dw(adapter, 0x714, tmp); | ||
431 | write_reg_dw(adapter, 0x714, tmp); | ||
432 | |||
433 | udelay(1000); | ||
434 | |||
435 | /* return value is never used? */ | ||
436 | /* return tmp; */ | ||
437 | } | ||
438 | |||
439 | /* SRAM memory is accessed through a buffer register in the FlexCop | ||
440 | chip (0x700). This register has the following structure: | ||
441 | bits 0-14 : address | ||
442 | bit 15 : read/write flag | ||
443 | bits 16-23 : 8-bit word to write | ||
444 | bits 24-27 : = 4 | ||
445 | bits 28-29 : memory bank selector | ||
446 | bit 31 : busy flag | ||
447 | */ | ||
448 | static void flex_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len) | ||
449 | { | ||
450 | int i, retries; | ||
451 | u32 command; | ||
452 | |||
453 | for (i = 0; i < len; i++) { | ||
454 | command = bank | addr | 0x04000000 | (*buf << 0x10); | ||
455 | |||
456 | retries = 2; | ||
457 | |||
458 | while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) { | ||
459 | mdelay(1); | ||
460 | retries--; | ||
461 | }; | ||
462 | |||
463 | if (retries == 0) | ||
464 | printk("%s: SRAM timeout\n", __FUNCTION__); | ||
465 | |||
466 | write_reg_dw(adapter, 0x700, command); | ||
467 | |||
468 | buf++; | ||
469 | addr++; | ||
470 | } | ||
471 | } | ||
472 | |||
473 | static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len) | ||
474 | { | ||
475 | int i, retries; | ||
476 | u32 command, value; | ||
477 | |||
478 | for (i = 0; i < len; i++) { | ||
479 | command = bank | addr | 0x04008000; | ||
480 | |||
481 | retries = 10000; | ||
482 | |||
483 | while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) { | ||
484 | mdelay(1); | ||
485 | retries--; | ||
486 | }; | ||
487 | |||
488 | if (retries == 0) | ||
489 | printk("%s: SRAM timeout\n", __FUNCTION__); | ||
490 | |||
491 | write_reg_dw(adapter, 0x700, command); | ||
492 | |||
493 | retries = 10000; | ||
494 | |||
495 | while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) { | ||
496 | mdelay(1); | ||
497 | retries--; | ||
498 | }; | ||
499 | |||
500 | if (retries == 0) | ||
501 | printk("%s: SRAM timeout\n", __FUNCTION__); | ||
502 | |||
503 | value = read_reg_dw(adapter, 0x700) >> 0x10; | ||
504 | |||
505 | *buf = (value & 0xff); | ||
506 | |||
507 | addr++; | ||
508 | buf++; | ||
509 | } | ||
510 | } | ||
511 | |||
512 | static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len) | ||
513 | { | ||
514 | u32 bank; | ||
515 | |||
516 | bank = 0; | ||
517 | |||
518 | if (adapter->dw_sram_type == 0x20000) { | ||
519 | bank = (addr & 0x18000) << 0x0d; | ||
520 | } | ||
521 | |||
522 | if (adapter->dw_sram_type == 0x00000) { | ||
523 | if ((addr >> 0x0f) == 0) | ||
524 | bank = 0x20000000; | ||
525 | else | ||
526 | bank = 0x10000000; | ||
527 | } | ||
528 | |||
529 | flex_sram_write(adapter, bank, addr & 0x7fff, buf, len); | ||
530 | } | ||
531 | |||
532 | static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len) | ||
533 | { | ||
534 | u32 bank; | ||
535 | |||
536 | bank = 0; | ||
537 | |||
538 | if (adapter->dw_sram_type == 0x20000) { | ||
539 | bank = (addr & 0x18000) << 0x0d; | ||
540 | } | ||
541 | |||
542 | if (adapter->dw_sram_type == 0x00000) { | ||
543 | if ((addr >> 0x0f) == 0) | ||
544 | bank = 0x20000000; | ||
545 | else | ||
546 | bank = 0x10000000; | ||
547 | } | ||
548 | |||
549 | flex_sram_read(adapter, bank, addr & 0x7fff, buf, len); | ||
550 | } | ||
551 | |||
552 | static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len) | ||
553 | { | ||
554 | u32 length; | ||
555 | |||
556 | while (len != 0) { | ||
557 | length = len; | ||
558 | |||
559 | // check if the address range belongs to the same | ||
560 | // 32K memory chip. If not, the data is read from | ||
561 | // one chip at a time. | ||
562 | if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) { | ||
563 | length = (((addr >> 0x0f) + 1) << 0x0f) - addr; | ||
564 | } | ||
565 | |||
566 | sram_read_chunk(adapter, addr, buf, length); | ||
567 | |||
568 | addr = addr + length; | ||
569 | buf = buf + length; | ||
570 | len = len - length; | ||
571 | } | ||
572 | } | ||
573 | |||
574 | static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len) | ||
575 | { | ||
576 | u32 length; | ||
577 | |||
578 | while (len != 0) { | ||
579 | length = len; | ||
580 | |||
581 | // check if the address range belongs to the same | ||
582 | // 32K memory chip. If not, the data is written to | ||
583 | // one chip at a time. | ||
584 | if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) { | ||
585 | length = (((addr >> 0x0f) + 1) << 0x0f) - addr; | ||
586 | } | ||
587 | |||
588 | sram_write_chunk(adapter, addr, buf, length); | ||
589 | |||
590 | addr = addr + length; | ||
591 | buf = buf + length; | ||
592 | len = len - length; | ||
593 | } | ||
594 | } | ||
595 | |||
596 | static void sram_set_size(struct adapter *adapter, u32 mask) | ||
597 | { | ||
598 | write_reg_dw(adapter, 0x71c, (mask | (~0x30000 & read_reg_dw(adapter, 0x71c)))); | ||
599 | } | ||
600 | |||
601 | static void sram_init(struct adapter *adapter) | ||
602 | { | ||
603 | u32 tmp; | ||
604 | |||
605 | tmp = read_reg_dw(adapter, 0x71c); | ||
606 | |||
607 | write_reg_dw(adapter, 0x71c, 1); | ||
608 | |||
609 | if (read_reg_dw(adapter, 0x71c) != 0) { | ||
610 | write_reg_dw(adapter, 0x71c, tmp); | ||
611 | |||
612 | adapter->dw_sram_type = tmp & 0x30000; | ||
613 | |||
614 | ddprintk("%s: dw_sram_type = %x\n", __FUNCTION__, adapter->dw_sram_type); | ||
615 | |||
616 | } else { | ||
617 | |||
618 | adapter->dw_sram_type = 0x10000; | ||
619 | |||
620 | ddprintk("%s: dw_sram_type = %x\n", __FUNCTION__, adapter->dw_sram_type); | ||
621 | } | ||
622 | |||
623 | /* return value is never used? */ | ||
624 | /* return adapter->dw_sram_type; */ | ||
625 | } | ||
626 | |||
627 | static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr) | ||
628 | { | ||
629 | u8 tmp1, tmp2; | ||
630 | |||
631 | dprintk("%s: mask = %x, addr = %x\n", __FUNCTION__, mask, addr); | ||
632 | |||
633 | sram_set_size(adapter, mask); | ||
634 | sram_init(adapter); | ||
635 | |||
636 | tmp2 = 0xa5; | ||
637 | tmp1 = 0x4f; | ||
638 | |||
639 | sram_write(adapter, addr, &tmp2, 1); | ||
640 | sram_write(adapter, addr + 4, &tmp1, 1); | ||
641 | |||
642 | tmp2 = 0; | ||
643 | |||
644 | mdelay(20); | ||
645 | |||
646 | sram_read(adapter, addr, &tmp2, 1); | ||
647 | sram_read(adapter, addr, &tmp2, 1); | ||
648 | |||
649 | dprintk("%s: wrote 0xa5, read 0x%2x\n", __FUNCTION__, tmp2); | ||
650 | |||
651 | if (tmp2 != 0xa5) | ||
652 | return 0; | ||
653 | |||
654 | tmp2 = 0x5a; | ||
655 | tmp1 = 0xf4; | ||
656 | |||
657 | sram_write(adapter, addr, &tmp2, 1); | ||
658 | sram_write(adapter, addr + 4, &tmp1, 1); | ||
659 | |||
660 | tmp2 = 0; | ||
661 | |||
662 | mdelay(20); | ||
663 | |||
664 | sram_read(adapter, addr, &tmp2, 1); | ||
665 | sram_read(adapter, addr, &tmp2, 1); | ||
666 | |||
667 | dprintk("%s: wrote 0x5a, read 0x%2x\n", __FUNCTION__, tmp2); | ||
668 | |||
669 | if (tmp2 != 0x5a) | ||
670 | return 0; | ||
671 | |||
672 | return 1; | ||
673 | } | ||
674 | |||
675 | static u32 sram_length(struct adapter *adapter) | ||
676 | { | ||
677 | if (adapter->dw_sram_type == 0x10000) | ||
678 | return 32768; // 32K | ||
679 | if (adapter->dw_sram_type == 0x00000) | ||
680 | return 65536; // 64K | ||
681 | if (adapter->dw_sram_type == 0x20000) | ||
682 | return 131072; // 128K | ||
683 | |||
684 | return 32768; // 32K | ||
685 | } | ||
686 | |||
687 | /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory. | ||
688 | - for 128K there are 4x32K chips at bank 0,1,2,3. | ||
689 | - for 64K there are 2x32K chips at bank 1,2. | ||
690 | - for 32K there is one 32K chip at bank 0. | ||
691 | |||
692 | FlexCop works only with one bank at a time. The bank is selected | ||
693 | by bits 28-29 of the 0x700 register. | ||
694 | |||
695 | bank 0 covers addresses 0x00000-0x07fff | ||
696 | bank 1 covers addresses 0x08000-0x0ffff | ||
697 | bank 2 covers addresses 0x10000-0x17fff | ||
698 | bank 3 covers addresses 0x18000-0x1ffff | ||
699 | */ | ||
700 | static int sram_detect_for_flex2(struct adapter *adapter) | ||
701 | { | ||
702 | u32 tmp, tmp2, tmp3; | ||
703 | |||
704 | dprintk("%s:\n", __FUNCTION__); | ||
705 | |||
706 | tmp = read_reg_dw(adapter, 0x208); | ||
707 | write_reg_dw(adapter, 0x208, 0); | ||
708 | |||
709 | tmp2 = read_reg_dw(adapter, 0x71c); | ||
710 | |||
711 | dprintk("%s: tmp2 = %x\n", __FUNCTION__, tmp2); | ||
712 | |||
713 | write_reg_dw(adapter, 0x71c, 1); | ||
714 | |||
715 | tmp3 = read_reg_dw(adapter, 0x71c); | ||
716 | |||
717 | dprintk("%s: tmp3 = %x\n", __FUNCTION__, tmp3); | ||
718 | |||
719 | write_reg_dw(adapter, 0x71c, tmp2); | ||
720 | |||
721 | // check for internal SRAM ??? | ||
722 | tmp3--; | ||
723 | if (tmp3 != 0) { | ||
724 | sram_set_size(adapter, 0x10000); | ||
725 | sram_init(adapter); | ||
726 | write_reg_dw(adapter, 0x208, tmp); | ||
727 | |||
728 | dprintk("%s: sram size = 32K\n", __FUNCTION__); | ||
729 | |||
730 | return 32; | ||
731 | } | ||
732 | |||
733 | if (sram_test_location(adapter, 0x20000, 0x18000) != 0) { | ||
734 | sram_set_size(adapter, 0x20000); | ||
735 | sram_init(adapter); | ||
736 | write_reg_dw(adapter, 0x208, tmp); | ||
737 | |||
738 | dprintk("%s: sram size = 128K\n", __FUNCTION__); | ||
739 | |||
740 | return 128; | ||
741 | } | ||
742 | |||
743 | if (sram_test_location(adapter, 0x00000, 0x10000) != 0) { | ||
744 | sram_set_size(adapter, 0x00000); | ||
745 | sram_init(adapter); | ||
746 | write_reg_dw(adapter, 0x208, tmp); | ||
747 | |||
748 | dprintk("%s: sram size = 64K\n", __FUNCTION__); | ||
749 | |||
750 | return 64; | ||
751 | } | ||
752 | |||
753 | if (sram_test_location(adapter, 0x10000, 0x00000) != 0) { | ||
754 | sram_set_size(adapter, 0x10000); | ||
755 | sram_init(adapter); | ||
756 | write_reg_dw(adapter, 0x208, tmp); | ||
757 | |||
758 | dprintk("%s: sram size = 32K\n", __FUNCTION__); | ||
759 | |||
760 | return 32; | ||
761 | } | ||
762 | |||
763 | sram_set_size(adapter, 0x10000); | ||
764 | sram_init(adapter); | ||
765 | write_reg_dw(adapter, 0x208, tmp); | ||
766 | |||
767 | dprintk("%s: SRAM detection failed. Set to 32K \n", __FUNCTION__); | ||
768 | |||
769 | return 0; | ||
770 | } | ||
771 | |||
772 | static void sll_detect_sram_size(struct adapter *adapter) | ||
773 | { | ||
774 | sram_detect_for_flex2(adapter); | ||
775 | } | ||
776 | |||
777 | /* EEPROM (Skystar2 has one "24LC08B" chip on board) */ | ||
778 | /* | ||
779 | static int eeprom_write(struct adapter *adapter, u16 addr, u8 *buf, u16 len) | ||
780 | { | ||
781 | return flex_i2c_write(adapter, 0x20000000, 0x50, addr, buf, len); | ||
782 | } | ||
783 | */ | ||
784 | |||
785 | static int eeprom_read(struct adapter *adapter, u16 addr, u8 *buf, u16 len) | ||
786 | { | ||
787 | return flex_i2c_read(adapter, 0x20000000, 0x50, addr, buf, len); | ||
788 | } | ||
789 | |||
790 | static u8 calc_lrc(u8 *buf, int len) | ||
791 | { | ||
792 | int i; | ||
793 | u8 sum; | ||
794 | |||
795 | sum = 0; | ||
796 | |||
797 | for (i = 0; i < len; i++) | ||
798 | sum = sum ^ buf[i]; | ||
799 | |||
800 | return sum; | ||
801 | } | ||
802 | |||
803 | static int eeprom_lrc_read(struct adapter *adapter, u32 addr, u32 len, u8 *buf, int retries) | ||
804 | { | ||
805 | int i; | ||
806 | |||
807 | for (i = 0; i < retries; i++) { | ||
808 | if (eeprom_read(adapter, addr, buf, len) == len) { | ||
809 | if (calc_lrc(buf, len - 1) == buf[len - 1]) | ||
810 | return 1; | ||
811 | } | ||
812 | } | ||
813 | |||
814 | return 0; | ||
815 | } | ||
816 | |||
817 | /* | ||
818 | static int eeprom_lrc_write(struct adapter *adapter, u32 addr, u32 len, u8 *wbuf, u8 *rbuf, int retries) | ||
819 | { | ||
820 | int i; | ||
821 | |||
822 | for (i = 0; i < retries; i++) { | ||
823 | if (eeprom_write(adapter, addr, wbuf, len) == len) { | ||
824 | if (eeprom_lrc_read(adapter, addr, len, rbuf, retries) == 1) | ||
825 | return 1; | ||
826 | } | ||
827 | } | ||
828 | |||
829 | return 0; | ||
830 | } | ||
831 | */ | ||
832 | |||
833 | |||
834 | /* These functions could be used to unlock SkyStar2 cards. */ | ||
835 | |||
836 | /* | ||
837 | static int eeprom_writeKey(struct adapter *adapter, u8 *key, u32 len) | ||
838 | { | ||
839 | u8 rbuf[20]; | ||
840 | u8 wbuf[20]; | ||
841 | |||
842 | if (len != 16) | ||
843 | return 0; | ||
844 | |||
845 | memcpy(wbuf, key, len); | ||
846 | |||
847 | wbuf[16] = 0; | ||
848 | wbuf[17] = 0; | ||
849 | wbuf[18] = 0; | ||
850 | wbuf[19] = calc_lrc(wbuf, 19); | ||
851 | |||
852 | return eeprom_lrc_write(adapter, 0x3e4, 20, wbuf, rbuf, 4); | ||
853 | } | ||
854 | |||
855 | static int eeprom_readKey(struct adapter *adapter, u8 *key, u32 len) | ||
856 | { | ||
857 | u8 buf[20]; | ||
858 | |||
859 | if (len != 16) | ||
860 | return 0; | ||
861 | |||
862 | if (eeprom_lrc_read(adapter, 0x3e4, 20, buf, 4) == 0) | ||
863 | return 0; | ||
864 | |||
865 | memcpy(key, buf, len); | ||
866 | |||
867 | return 1; | ||
868 | } | ||
869 | */ | ||
870 | |||
871 | static int eeprom_get_mac_addr(struct adapter *adapter, char type, u8 *mac) | ||
872 | { | ||
873 | u8 tmp[8]; | ||
874 | |||
875 | if (eeprom_lrc_read(adapter, 0x3f8, 8, tmp, 4) != 0) { | ||
876 | if (type != 0) { | ||
877 | mac[0] = tmp[0]; | ||
878 | mac[1] = tmp[1]; | ||
879 | mac[2] = tmp[2]; | ||
880 | mac[3] = 0xfe; | ||
881 | mac[4] = 0xff; | ||
882 | mac[5] = tmp[3]; | ||
883 | mac[6] = tmp[4]; | ||
884 | mac[7] = tmp[5]; | ||
885 | |||
886 | } else { | ||
887 | |||
888 | mac[0] = tmp[0]; | ||
889 | mac[1] = tmp[1]; | ||
890 | mac[2] = tmp[2]; | ||
891 | mac[3] = tmp[3]; | ||
892 | mac[4] = tmp[4]; | ||
893 | mac[5] = tmp[5]; | ||
894 | } | ||
895 | |||
896 | return 1; | ||
897 | |||
898 | } else { | ||
899 | |||
900 | if (type == 0) { | ||
901 | memset(mac, 0, 6); | ||
902 | |||
903 | } else { | ||
904 | |||
905 | memset(mac, 0, 8); | ||
906 | } | ||
907 | |||
908 | return 0; | ||
909 | } | ||
910 | } | ||
911 | |||
912 | /* | ||
913 | static char eeprom_set_mac_addr(struct adapter *adapter, char type, u8 *mac) | ||
914 | { | ||
915 | u8 tmp[8]; | ||
916 | |||
917 | if (type != 0) { | ||
918 | tmp[0] = mac[0]; | ||
919 | tmp[1] = mac[1]; | ||
920 | tmp[2] = mac[2]; | ||
921 | tmp[3] = mac[5]; | ||
922 | tmp[4] = mac[6]; | ||
923 | tmp[5] = mac[7]; | ||
924 | |||
925 | } else { | ||
926 | |||
927 | tmp[0] = mac[0]; | ||
928 | tmp[1] = mac[1]; | ||
929 | tmp[2] = mac[2]; | ||
930 | tmp[3] = mac[3]; | ||
931 | tmp[4] = mac[4]; | ||
932 | tmp[5] = mac[5]; | ||
933 | } | ||
934 | |||
935 | tmp[6] = 0; | ||
936 | tmp[7] = calc_lrc(tmp, 7); | ||
937 | |||
938 | if (eeprom_write(adapter, 0x3f8, tmp, 8) == 8) | ||
939 | return 1; | ||
940 | |||
941 | return 0; | ||
942 | } | ||
943 | */ | ||
944 | |||
945 | /* PID filter */ | ||
946 | |||
947 | /* every flexcop has 6 "lower" hw PID filters */ | ||
948 | /* these are enabled by setting bits 0-5 of 0x208 */ | ||
949 | /* for the 32 additional filters we have to select one */ | ||
950 | /* of them through 0x310 and modify through 0x314 */ | ||
951 | /* op: 0=disable, 1=enable */ | ||
952 | static void filter_enable_hw_filter(struct adapter *adapter, int id, u8 op) | ||
953 | { | ||
954 | dprintk("%s: id=%d op=%d\n", __FUNCTION__, id, op); | ||
955 | if (id <= 5) { | ||
956 | u32 mask = (0x00000001 << id); | ||
957 | write_reg_bitfield(adapter, 0x208, mask, op ? mask : 0); | ||
958 | } else { | ||
959 | /* select */ | ||
960 | write_reg_bitfield(adapter, 0x310, 0x1f, (id - 6) & 0x1f); | ||
961 | /* modify */ | ||
962 | write_reg_bitfield(adapter, 0x314, 0x00006000, op ? 0x00004000 : 0); | ||
963 | } | ||
964 | } | ||
965 | |||
966 | /* this sets the PID that should pass the specified filter */ | ||
967 | static void pid_set_hw_pid(struct adapter *adapter, int id, u16 pid) | ||
968 | { | ||
969 | dprintk("%s: id=%d pid=%d\n", __FUNCTION__, id, pid); | ||
970 | if (id <= 5) { | ||
971 | u32 adr = 0x300 + ((id & 6) << 1); | ||
972 | int shift = (id & 1) ? 16 : 0; | ||
973 | dprintk("%s: id=%d addr=%x %c pid=%d\n", __FUNCTION__, id, adr, (id & 1) ? 'h' : 'l', pid); | ||
974 | write_reg_bitfield(adapter, adr, (0x7fff) << shift, (pid & 0x1fff) << shift); | ||
975 | } else { | ||
976 | /* select */ | ||
977 | write_reg_bitfield(adapter, 0x310, 0x1f, (id - 6) & 0x1f); | ||
978 | /* modify */ | ||
979 | write_reg_bitfield(adapter, 0x314, 0x1fff, pid & 0x1fff); | ||
980 | } | ||
981 | } | ||
982 | |||
983 | |||
984 | /* | ||
985 | static void filter_enable_null_filter(struct adapter *adapter, u32 op) | ||
986 | { | ||
987 | dprintk("%s: op=%x\n", __FUNCTION__, op); | ||
988 | |||
989 | write_reg_bitfield(adapter, 0x208, 0x00000040, op?0x00000040:0); | ||
990 | } | ||
991 | */ | ||
992 | |||
993 | static void filter_enable_mask_filter(struct adapter *adapter, u32 op) | ||
994 | { | ||
995 | dprintk("%s: op=%x\n", __FUNCTION__, op); | ||
996 | |||
997 | write_reg_bitfield(adapter, 0x208, 0x00000080, op ? 0x00000080 : 0); | ||
998 | } | ||
999 | |||
1000 | |||
1001 | static void ctrl_enable_mac(struct adapter *adapter, u32 op) | ||
1002 | { | ||
1003 | write_reg_bitfield(adapter, 0x208, 0x00004000, op ? 0x00004000 : 0); | ||
1004 | } | ||
1005 | |||
1006 | static int ca_set_mac_dst_addr_filter(struct adapter *adapter, u8 *mac) | ||
1007 | { | ||
1008 | u32 tmp1, tmp2; | ||
1009 | |||
1010 | tmp1 = (mac[3] << 0x18) | (mac[2] << 0x10) | (mac[1] << 0x08) | mac[0]; | ||
1011 | tmp2 = (mac[5] << 0x08) | mac[4]; | ||
1012 | |||
1013 | write_reg_dw(adapter, 0x418, tmp1); | ||
1014 | write_reg_dw(adapter, 0x41c, tmp2); | ||
1015 | |||
1016 | return 0; | ||
1017 | } | ||
1018 | |||
1019 | /* | ||
1020 | static void set_ignore_mac_filter(struct adapter *adapter, u8 op) | ||
1021 | { | ||
1022 | if (op != 0) { | ||
1023 | write_reg_bitfield(adapter, 0x208, 0x00004000, 0); | ||
1024 | adapter->mac_filter = 1; | ||
1025 | } else { | ||
1026 | if (adapter->mac_filter != 0) { | ||
1027 | adapter->mac_filter = 0; | ||
1028 | write_reg_bitfield(adapter, 0x208, 0x00004000, 0x00004000); | ||
1029 | } | ||
1030 | } | ||
1031 | } | ||
1032 | */ | ||
1033 | |||
1034 | /* | ||
1035 | static void check_null_filter_enable(struct adapter *adapter) | ||
1036 | { | ||
1037 | filter_enable_null_filter(adapter, 1); | ||
1038 | filter_enable_mask_filter(adapter, 1); | ||
1039 | } | ||
1040 | */ | ||
1041 | |||
1042 | static void pid_set_group_pid(struct adapter *adapter, u16 pid) | ||
1043 | { | ||
1044 | u32 value; | ||
1045 | |||
1046 | dprintk("%s: pid=%x\n", __FUNCTION__, pid); | ||
1047 | value = (pid & 0x3fff) | (read_reg_dw(adapter, 0x30c) & 0xffff0000); | ||
1048 | write_reg_dw(adapter, 0x30c, value); | ||
1049 | } | ||
1050 | |||
1051 | static void pid_set_group_mask(struct adapter *adapter, u16 pid) | ||
1052 | { | ||
1053 | u32 value; | ||
1054 | |||
1055 | dprintk("%s: pid=%x\n", __FUNCTION__, pid); | ||
1056 | value = ((pid & 0x3fff) << 0x10) | (read_reg_dw(adapter, 0x30c) & 0xffff); | ||
1057 | write_reg_dw(adapter, 0x30c, value); | ||
1058 | } | ||
1059 | |||
1060 | /* | ||
1061 | static int pid_get_group_pid(struct adapter *adapter) | ||
1062 | { | ||
1063 | return read_reg_dw(adapter, 0x30c) & 0x00001fff; | ||
1064 | } | ||
1065 | |||
1066 | static int pid_get_group_mask(struct adapter *adapter) | ||
1067 | { | ||
1068 | return (read_reg_dw(adapter, 0x30c) >> 0x10)& 0x00001fff; | ||
1069 | } | ||
1070 | */ | ||
1071 | |||
1072 | /* | ||
1073 | static void reset_hardware_pid_filter(struct adapter *adapter) | ||
1074 | { | ||
1075 | pid_set_stream1_pid(adapter, 0x1fff); | ||
1076 | |||
1077 | pid_set_stream2_pid(adapter, 0x1fff); | ||
1078 | filter_enable_stream2_filter(adapter, 0); | ||
1079 | |||
1080 | pid_set_pcr_pid(adapter, 0x1fff); | ||
1081 | filter_enable_pcr_filter(adapter, 0); | ||
1082 | |||
1083 | pid_set_pmt_pid(adapter, 0x1fff); | ||
1084 | filter_enable_pmt_filter(adapter, 0); | ||
1085 | |||
1086 | pid_set_ecm_pid(adapter, 0x1fff); | ||
1087 | filter_enable_ecm_filter(adapter, 0); | ||
1088 | |||
1089 | pid_set_emm_pid(adapter, 0x1fff); | ||
1090 | filter_enable_emm_filter(adapter, 0); | ||
1091 | } | ||
1092 | */ | ||
1093 | |||
1094 | static void init_pids(struct adapter *adapter) | ||
1095 | { | ||
1096 | int i; | ||
1097 | |||
1098 | adapter->pid_count = 0; | ||
1099 | adapter->whole_bandwidth_count = 0; | ||
1100 | for (i = 0; i < adapter->useable_hw_filters; i++) { | ||
1101 | dprintk("%s: setting filter %d to 0x1fff\n", __FUNCTION__, i); | ||
1102 | adapter->hw_pids[i] = 0x1fff; | ||
1103 | pid_set_hw_pid(adapter, i, 0x1fff); | ||
1104 | } | ||
1105 | |||
1106 | pid_set_group_pid(adapter, 0); | ||
1107 | pid_set_group_mask(adapter, 0x1fe0); | ||
1108 | } | ||
1109 | |||
1110 | static void open_whole_bandwidth(struct adapter *adapter) | ||
1111 | { | ||
1112 | dprintk("%s:\n", __FUNCTION__); | ||
1113 | pid_set_group_pid(adapter, 0); | ||
1114 | pid_set_group_mask(adapter, 0); | ||
1115 | /* | ||
1116 | filter_enable_mask_filter(adapter, 1); | ||
1117 | */ | ||
1118 | } | ||
1119 | |||
1120 | static void close_whole_bandwidth(struct adapter *adapter) | ||
1121 | { | ||
1122 | dprintk("%s:\n", __FUNCTION__); | ||
1123 | pid_set_group_pid(adapter, 0); | ||
1124 | pid_set_group_mask(adapter, 0x1fe0); | ||
1125 | /* | ||
1126 | filter_enable_mask_filter(adapter, 1); | ||
1127 | */ | ||
1128 | } | ||
1129 | |||
1130 | static void whole_bandwidth_inc(struct adapter *adapter) | ||
1131 | { | ||
1132 | if (adapter->whole_bandwidth_count++ == 0) | ||
1133 | open_whole_bandwidth(adapter); | ||
1134 | } | ||
1135 | |||
1136 | static void whole_bandwidth_dec(struct adapter *adapter) | ||
1137 | { | ||
1138 | if (--adapter->whole_bandwidth_count <= 0) | ||
1139 | close_whole_bandwidth(adapter); | ||
1140 | } | ||
1141 | |||
1142 | /* The specified PID has to be let through the | ||
1143 | hw filters. | ||
1144 | We try to allocate an hardware filter and open whole | ||
1145 | bandwidth when allocation is impossible. | ||
1146 | All pids<=0x1f pass through the group filter. | ||
1147 | Returns 1 on success, -1 on error */ | ||
1148 | static int add_hw_pid(struct adapter *adapter, u16 pid) | ||
1149 | { | ||
1150 | int i; | ||
1151 | |||
1152 | dprintk("%s: pid=%d\n", __FUNCTION__, pid); | ||
1153 | |||
1154 | if (pid <= 0x1f) | ||
1155 | return 1; | ||
1156 | |||
1157 | /* we can't use a filter for 0x2000, so no search */ | ||
1158 | if (pid != 0x2000) { | ||
1159 | /* find an unused hardware filter */ | ||
1160 | for (i = 0; i < adapter->useable_hw_filters; i++) { | ||
1161 | dprintk("%s: pid=%d searching slot=%d\n", __FUNCTION__, pid, i); | ||
1162 | if (adapter->hw_pids[i] == 0x1fff) { | ||
1163 | dprintk("%s: pid=%d slot=%d\n", __FUNCTION__, pid, i); | ||
1164 | adapter->hw_pids[i] = pid; | ||
1165 | pid_set_hw_pid(adapter, i, pid); | ||
1166 | filter_enable_hw_filter(adapter, i, 1); | ||
1167 | return 1; | ||
1168 | } | ||
1169 | } | ||
1170 | } | ||
1171 | /* if we have not used a filter, this pid depends on whole bandwidth */ | ||
1172 | dprintk("%s: pid=%d whole_bandwidth\n", __FUNCTION__, pid); | ||
1173 | whole_bandwidth_inc(adapter); | ||
1174 | return 1; | ||
1175 | } | ||
1176 | |||
1177 | /* returns -1 if the pid was not present in the filters */ | ||
1178 | static int remove_hw_pid(struct adapter *adapter, u16 pid) | ||
1179 | { | ||
1180 | int i; | ||
1181 | |||
1182 | dprintk("%s: pid=%d\n", __FUNCTION__, pid); | ||
1183 | |||
1184 | if (pid <= 0x1f) | ||
1185 | return 1; | ||
1186 | |||
1187 | /* we can't use a filter for 0x2000, so no search */ | ||
1188 | if (pid != 0x2000) { | ||
1189 | for (i = 0; i < adapter->useable_hw_filters; i++) { | ||
1190 | dprintk("%s: pid=%d searching slot=%d\n", __FUNCTION__, pid, i); | ||
1191 | if (adapter->hw_pids[i] == pid) { // find the pid slot | ||
1192 | dprintk("%s: pid=%d slot=%d\n", __FUNCTION__, pid, i); | ||
1193 | adapter->hw_pids[i] = 0x1fff; | ||
1194 | pid_set_hw_pid(adapter, i, 0x1fff); | ||
1195 | filter_enable_hw_filter(adapter, i, 0); | ||
1196 | return 1; | ||
1197 | } | ||
1198 | } | ||
1199 | } | ||
1200 | /* if we have not used a filter, this pid depended on whole bandwith */ | ||
1201 | dprintk("%s: pid=%d whole_bandwidth\n", __FUNCTION__, pid); | ||
1202 | whole_bandwidth_dec(adapter); | ||
1203 | return 1; | ||
1204 | } | ||
1205 | |||
1206 | /* Adds a PID to the filters. | ||
1207 | Adding a pid more than once is possible, we keep reference counts. | ||
1208 | Whole stream available through pid==0x2000. | ||
1209 | Returns 1 on success, -1 on error */ | ||
1210 | static int add_pid(struct adapter *adapter, u16 pid) | ||
1211 | { | ||
1212 | int i; | ||
1213 | |||
1214 | dprintk("%s: pid=%d\n", __FUNCTION__, pid); | ||
1215 | |||
1216 | if (pid > 0x1ffe && pid != 0x2000) | ||
1217 | return -1; | ||
1218 | |||
1219 | // check if the pid is already present | ||
1220 | for (i = 0; i < adapter->pid_count; i++) | ||
1221 | if (adapter->pid_list[i] == pid) { | ||
1222 | adapter->pid_rc[i]++; // increment ref counter | ||
1223 | return 1; | ||
1224 | } | ||
1225 | |||
1226 | if (adapter->pid_count == N_PID_SLOTS) | ||
1227 | return -1; // no more pids can be added | ||
1228 | adapter->pid_list[adapter->pid_count] = pid; // register pid | ||
1229 | adapter->pid_rc[adapter->pid_count] = 1; | ||
1230 | adapter->pid_count++; | ||
1231 | // hardware setting | ||
1232 | add_hw_pid(adapter, pid); | ||
1233 | |||
1234 | return 1; | ||
1235 | } | ||
1236 | |||
1237 | /* Removes a PID from the filters. */ | ||
1238 | static int remove_pid(struct adapter *adapter, u16 pid) | ||
1239 | { | ||
1240 | int i; | ||
1241 | |||
1242 | dprintk("%s: pid=%d\n", __FUNCTION__, pid); | ||
1243 | |||
1244 | if (pid > 0x1ffe && pid != 0x2000) | ||
1245 | return -1; | ||
1246 | |||
1247 | // check if the pid is present (it must be!) | ||
1248 | for (i = 0; i < adapter->pid_count; i++) { | ||
1249 | if (adapter->pid_list[i] == pid) { | ||
1250 | adapter->pid_rc[i]--; | ||
1251 | if (adapter->pid_rc[i] <= 0) { | ||
1252 | // remove from the list | ||
1253 | adapter->pid_count--; | ||
1254 | adapter->pid_list[i]=adapter->pid_list[adapter->pid_count]; | ||
1255 | adapter->pid_rc[i] = adapter->pid_rc[adapter->pid_count]; | ||
1256 | // hardware setting | ||
1257 | remove_hw_pid(adapter, pid); | ||
1258 | } | ||
1259 | return 1; | ||
1260 | } | ||
1261 | } | ||
1262 | |||
1263 | return -1; | ||
1264 | } | ||
1265 | |||
1266 | |||
1267 | /* dma & irq */ | ||
1268 | static void ctrl_enable_smc(struct adapter *adapter, u32 op) | ||
1269 | { | ||
1270 | write_reg_bitfield(adapter, 0x208, 0x00000800, op ? 0x00000800 : 0); | ||
1271 | } | ||
1272 | |||
1273 | static void dma_enable_disable_irq(struct adapter *adapter, u32 flag1, u32 flag2, u32 flag3) | ||
1274 | { | ||
1275 | adapter->dma_ctrl = adapter->dma_ctrl & 0x000f0000; | ||
1276 | |||
1277 | if (flag1 == 0) { | ||
1278 | if (flag2 == 0) | ||
1279 | adapter->dma_ctrl = adapter->dma_ctrl & ~0x00010000; | ||
1280 | else | ||
1281 | adapter->dma_ctrl = adapter->dma_ctrl | 0x00010000; | ||
1282 | |||
1283 | if (flag3 == 0) | ||
1284 | adapter->dma_ctrl = adapter->dma_ctrl & ~0x00020000; | ||
1285 | else | ||
1286 | adapter->dma_ctrl = adapter->dma_ctrl | 0x00020000; | ||
1287 | |||
1288 | } else { | ||
1289 | |||
1290 | if (flag2 == 0) | ||
1291 | adapter->dma_ctrl = adapter->dma_ctrl & ~0x00040000; | ||
1292 | else | ||
1293 | adapter->dma_ctrl = adapter->dma_ctrl | 0x00040000; | ||
1294 | |||
1295 | if (flag3 == 0) | ||
1296 | adapter->dma_ctrl = adapter->dma_ctrl & ~0x00080000; | ||
1297 | else | ||
1298 | adapter->dma_ctrl = adapter->dma_ctrl | 0x00080000; | ||
1299 | } | ||
1300 | } | ||
1301 | |||
1302 | static void irq_dma_enable_disable_irq(struct adapter *adapter, u32 op) | ||
1303 | { | ||
1304 | u32 value; | ||
1305 | |||
1306 | value = read_reg_dw(adapter, 0x208) & 0xfff0ffff; | ||
1307 | |||
1308 | if (op != 0) | ||
1309 | value = value | (adapter->dma_ctrl & 0x000f0000); | ||
1310 | |||
1311 | write_reg_dw(adapter, 0x208, value); | ||
1312 | } | ||
1313 | |||
1314 | /* FlexCopII has 2 dma channels. DMA1 is used to transfer TS data to | ||
1315 | system memory. | ||
1316 | |||
1317 | The DMA1 buffer is divided in 2 subbuffers of equal size. | ||
1318 | FlexCopII will transfer TS data to one subbuffer, signal an interrupt | ||
1319 | when the subbuffer is full and continue fillig the second subbuffer. | ||
1320 | |||
1321 | For DMA1: | ||
1322 | subbuffer size in 32-bit words is stored in the first 24 bits of | ||
1323 | register 0x004. The last 8 bits of register 0x004 contain the number | ||
1324 | of subbuffers. | ||
1325 | |||
1326 | the first 30 bits of register 0x000 contain the address of the first | ||
1327 | subbuffer. The last 2 bits contain 0, when dma1 is disabled and 1, | ||
1328 | when dma1 is enabled. | ||
1329 | |||
1330 | the first 30 bits of register 0x00c contain the address of the second | ||
1331 | subbuffer. the last 2 bits contain 1. | ||
1332 | |||
1333 | register 0x008 will contain the address of the subbuffer that was filled | ||
1334 | with TS data, when FlexCopII will generate an interrupt. | ||
1335 | |||
1336 | For DMA2: | ||
1337 | subbuffer size in 32-bit words is stored in the first 24 bits of | ||
1338 | register 0x014. The last 8 bits of register 0x014 contain the number | ||
1339 | of subbuffers. | ||
1340 | |||
1341 | the first 30 bits of register 0x010 contain the address of the first | ||
1342 | subbuffer. The last 2 bits contain 0, when dma1 is disabled and 1, | ||
1343 | when dma1 is enabled. | ||
1344 | |||
1345 | the first 30 bits of register 0x01c contain the address of the second | ||
1346 | subbuffer. the last 2 bits contain 1. | ||
1347 | |||
1348 | register 0x018 contains the address of the subbuffer that was filled | ||
1349 | with TS data, when FlexCopII generates an interrupt. | ||
1350 | */ | ||
1351 | static int dma_init_dma(struct adapter *adapter, u32 dma_channel) | ||
1352 | { | ||
1353 | u32 subbuffers, subbufsize, subbuf0, subbuf1; | ||
1354 | |||
1355 | if (dma_channel == 0) { | ||
1356 | dprintk("%s: Initializing DMA1 channel\n", __FUNCTION__); | ||
1357 | |||
1358 | subbuffers = 2; | ||
1359 | |||
1360 | subbufsize = (((adapter->dmaq1.buffer_size / 2) / 4) << 8) | subbuffers; | ||
1361 | |||
1362 | subbuf0 = adapter->dmaq1.bus_addr & 0xfffffffc; | ||
1363 | |||
1364 | subbuf1 = ((adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) & 0xfffffffc) | 1; | ||
1365 | |||
1366 | dprintk("%s: first subbuffer address = 0x%x\n", __FUNCTION__, subbuf0); | ||
1367 | udelay(1000); | ||
1368 | write_reg_dw(adapter, 0x000, subbuf0); | ||
1369 | |||
1370 | dprintk("%s: subbuffer size = 0x%x\n", __FUNCTION__, (subbufsize >> 8) * 4); | ||
1371 | udelay(1000); | ||
1372 | write_reg_dw(adapter, 0x004, subbufsize); | ||
1373 | |||
1374 | dprintk("%s: second subbuffer address = 0x%x\n", __FUNCTION__, subbuf1); | ||
1375 | udelay(1000); | ||
1376 | write_reg_dw(adapter, 0x00c, subbuf1); | ||
1377 | |||
1378 | dprintk("%s: counter = 0x%x\n", __FUNCTION__, adapter->dmaq1.bus_addr & 0xfffffffc); | ||
1379 | write_reg_dw(adapter, 0x008, adapter->dmaq1.bus_addr & 0xfffffffc); | ||
1380 | udelay(1000); | ||
1381 | |||
1382 | dma_enable_disable_irq(adapter, 0, 1, subbuffers ? 1 : 0); | ||
1383 | |||
1384 | irq_dma_enable_disable_irq(adapter, 1); | ||
1385 | |||
1386 | sram_set_media_dest(adapter, 1); | ||
1387 | sram_set_net_dest(adapter, 1); | ||
1388 | sram_set_cai_dest(adapter, 2); | ||
1389 | sram_set_cao_dest(adapter, 2); | ||
1390 | } | ||
1391 | |||
1392 | if (dma_channel == 1) { | ||
1393 | dprintk("%s: Initializing DMA2 channel\n", __FUNCTION__); | ||
1394 | |||
1395 | subbuffers = 2; | ||
1396 | |||
1397 | subbufsize = (((adapter->dmaq2.buffer_size / 2) / 4) << 8) | subbuffers; | ||
1398 | |||
1399 | subbuf0 = adapter->dmaq2.bus_addr & 0xfffffffc; | ||
1400 | |||
1401 | subbuf1 = ((adapter->dmaq2.bus_addr + adapter->dmaq2.buffer_size / 2) & 0xfffffffc) | 1; | ||
1402 | |||
1403 | dprintk("%s: first subbuffer address = 0x%x\n", __FUNCTION__, subbuf0); | ||
1404 | udelay(1000); | ||
1405 | write_reg_dw(adapter, 0x010, subbuf0); | ||
1406 | |||
1407 | dprintk("%s: subbuffer size = 0x%x\n", __FUNCTION__, (subbufsize >> 8) * 4); | ||
1408 | udelay(1000); | ||
1409 | write_reg_dw(adapter, 0x014, subbufsize); | ||
1410 | |||
1411 | dprintk("%s: second buffer address = 0x%x\n", __FUNCTION__, subbuf1); | ||
1412 | udelay(1000); | ||
1413 | write_reg_dw(adapter, 0x01c, subbuf1); | ||
1414 | |||
1415 | sram_set_cai_dest(adapter, 2); | ||
1416 | } | ||
1417 | |||
1418 | return 0; | ||
1419 | } | ||
1420 | |||
1421 | static void ctrl_enable_receive_data(struct adapter *adapter, u32 op) | ||
1422 | { | ||
1423 | if (op == 0) { | ||
1424 | write_reg_bitfield(adapter, 0x208, 0x00008000, 0); | ||
1425 | adapter->dma_status = adapter->dma_status & ~0x00000004; | ||
1426 | } else { | ||
1427 | write_reg_bitfield(adapter, 0x208, 0x00008000, 0x00008000); | ||
1428 | adapter->dma_status = adapter->dma_status | 0x00000004; | ||
1429 | } | ||
1430 | } | ||
1431 | |||
1432 | /* bit 0 of dma_mask is set to 1 if dma1 channel has to be enabled/disabled | ||
1433 | bit 1 of dma_mask is set to 1 if dma2 channel has to be enabled/disabled | ||
1434 | */ | ||
1435 | static void dma_start_stop(struct adapter *adapter, u32 dma_mask, int start_stop) | ||
1436 | { | ||
1437 | u32 dma_enable, dma1_enable, dma2_enable; | ||
1438 | |||
1439 | dprintk("%s: dma_mask=%x\n", __FUNCTION__, dma_mask); | ||
1440 | |||
1441 | if (start_stop == 1) { | ||
1442 | dprintk("%s: starting dma\n", __FUNCTION__); | ||
1443 | |||
1444 | dma1_enable = 0; | ||
1445 | dma2_enable = 0; | ||
1446 | |||
1447 | if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) == 0) && (adapter->dmaq1.bus_addr != 0)) { | ||
1448 | adapter->dma_status = adapter->dma_status | 1; | ||
1449 | dma1_enable = 1; | ||
1450 | } | ||
1451 | |||
1452 | if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) == 0) && (adapter->dmaq2.bus_addr != 0)) { | ||
1453 | adapter->dma_status = adapter->dma_status | 2; | ||
1454 | dma2_enable = 1; | ||
1455 | } | ||
1456 | // enable dma1 and dma2 | ||
1457 | if ((dma1_enable == 1) && (dma2_enable == 1)) { | ||
1458 | write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr | 1); | ||
1459 | write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1); | ||
1460 | write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr | 1); | ||
1461 | |||
1462 | ctrl_enable_receive_data(adapter, 1); | ||
1463 | |||
1464 | return; | ||
1465 | } | ||
1466 | // enable dma1 | ||
1467 | if ((dma1_enable == 1) && (dma2_enable == 0)) { | ||
1468 | write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr | 1); | ||
1469 | write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1); | ||
1470 | |||
1471 | ctrl_enable_receive_data(adapter, 1); | ||
1472 | |||
1473 | return; | ||
1474 | } | ||
1475 | // enable dma2 | ||
1476 | if ((dma1_enable == 0) && (dma2_enable == 1)) { | ||
1477 | write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr | 1); | ||
1478 | |||
1479 | ctrl_enable_receive_data(adapter, 1); | ||
1480 | |||
1481 | return; | ||
1482 | } | ||
1483 | // start dma | ||
1484 | if ((dma1_enable == 0) && (dma2_enable == 0)) { | ||
1485 | ctrl_enable_receive_data(adapter, 1); | ||
1486 | |||
1487 | return; | ||
1488 | } | ||
1489 | |||
1490 | } else { | ||
1491 | |||
1492 | dprintk("%s: stopping dma\n", __FUNCTION__); | ||
1493 | |||
1494 | dma_enable = adapter->dma_status & 0x00000003; | ||
1495 | |||
1496 | if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) != 0)) { | ||
1497 | dma_enable = dma_enable & 0xfffffffe; | ||
1498 | } | ||
1499 | |||
1500 | if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) != 0)) { | ||
1501 | dma_enable = dma_enable & 0xfffffffd; | ||
1502 | } | ||
1503 | //stop dma | ||
1504 | if ((dma_enable == 0) && ((adapter->dma_status & 4) != 0)) { | ||
1505 | ctrl_enable_receive_data(adapter, 0); | ||
1506 | |||
1507 | udelay(3000); | ||
1508 | } | ||
1509 | //disable dma1 | ||
1510 | if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) != 0) && (adapter->dmaq1.bus_addr != 0)) { | ||
1511 | write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr); | ||
1512 | write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1); | ||
1513 | |||
1514 | adapter->dma_status = adapter->dma_status & ~0x00000001; | ||
1515 | } | ||
1516 | //disable dma2 | ||
1517 | if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) != 0) && (adapter->dmaq2.bus_addr != 0)) { | ||
1518 | write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr); | ||
1519 | |||
1520 | adapter->dma_status = adapter->dma_status & ~0x00000002; | ||
1521 | } | ||
1522 | } | ||
1523 | } | ||
1524 | |||
1525 | static void open_stream(struct adapter *adapter, u16 pid) | ||
1526 | { | ||
1527 | u32 dma_mask; | ||
1528 | |||
1529 | ++adapter->capturing; | ||
1530 | |||
1531 | filter_enable_mask_filter(adapter, 1); | ||
1532 | |||
1533 | add_pid(adapter, pid); | ||
1534 | |||
1535 | dprintk("%s: adapter->dma_status=%x\n", __FUNCTION__, adapter->dma_status); | ||
1536 | |||
1537 | if ((adapter->dma_status & 7) != 7) { | ||
1538 | dma_mask = 0; | ||
1539 | |||
1540 | if (((adapter->dma_status & 0x10000000) != 0) && ((adapter->dma_status & 1) == 0)) { | ||
1541 | dma_mask = dma_mask | 1; | ||
1542 | |||
1543 | adapter->dmaq1.head = 0; | ||
1544 | adapter->dmaq1.tail = 0; | ||
1545 | |||
1546 | memset(adapter->dmaq1.buffer, 0, adapter->dmaq1.buffer_size); | ||
1547 | } | ||
1548 | |||
1549 | if (((adapter->dma_status & 0x20000000) != 0) && ((adapter->dma_status & 2) == 0)) { | ||
1550 | dma_mask = dma_mask | 2; | ||
1551 | |||
1552 | adapter->dmaq2.head = 0; | ||
1553 | adapter->dmaq2.tail = 0; | ||
1554 | } | ||
1555 | |||
1556 | if (dma_mask != 0) { | ||
1557 | irq_dma_enable_disable_irq(adapter, 1); | ||
1558 | |||
1559 | dma_start_stop(adapter, dma_mask, 1); | ||
1560 | } | ||
1561 | } | ||
1562 | } | ||
1563 | |||
1564 | static void close_stream(struct adapter *adapter, u16 pid) | ||
1565 | { | ||
1566 | if (adapter->capturing > 0) | ||
1567 | --adapter->capturing; | ||
1568 | |||
1569 | dprintk("%s: dma_status=%x\n", __FUNCTION__, adapter->dma_status); | ||
1570 | |||
1571 | if (adapter->capturing == 0) { | ||
1572 | u32 dma_mask = 0; | ||
1573 | |||
1574 | if ((adapter->dma_status & 1) != 0) | ||
1575 | dma_mask = dma_mask | 0x00000001; | ||
1576 | if ((adapter->dma_status & 2) != 0) | ||
1577 | dma_mask = dma_mask | 0x00000002; | ||
1578 | |||
1579 | if (dma_mask != 0) { | ||
1580 | dma_start_stop(adapter, dma_mask, 0); | ||
1581 | } | ||
1582 | } | ||
1583 | remove_pid(adapter, pid); | ||
1584 | } | ||
1585 | |||
1586 | static void interrupt_service_dma1(struct adapter *adapter) | ||
1587 | { | ||
1588 | struct dvb_demux *dvbdmx = &adapter->demux; | ||
1589 | |||
1590 | int n_cur_dma_counter; | ||
1591 | u32 n_num_bytes_parsed; | ||
1592 | u32 n_num_new_bytes_transferred; | ||
1593 | u32 dw_default_packet_size = 188; | ||
1594 | u8 gb_tmp_buffer[188]; | ||
1595 | u8 *pb_dma_buf_cur_pos; | ||
1596 | |||
1597 | n_cur_dma_counter = readl(adapter->io_mem + 0x008) - adapter->dmaq1.bus_addr; | ||
1598 | n_cur_dma_counter = (n_cur_dma_counter / dw_default_packet_size) * dw_default_packet_size; | ||
1599 | |||
1600 | if ((n_cur_dma_counter < 0) || (n_cur_dma_counter > adapter->dmaq1.buffer_size)) { | ||
1601 | dprintk("%s: dma counter outside dma buffer\n", __FUNCTION__); | ||
1602 | return; | ||
1603 | } | ||
1604 | |||
1605 | adapter->dmaq1.head = n_cur_dma_counter; | ||
1606 | |||
1607 | if (adapter->dmaq1.tail <= n_cur_dma_counter) { | ||
1608 | n_num_new_bytes_transferred = n_cur_dma_counter - adapter->dmaq1.tail; | ||
1609 | |||
1610 | } else { | ||
1611 | |||
1612 | n_num_new_bytes_transferred = (adapter->dmaq1.buffer_size - adapter->dmaq1.tail) + n_cur_dma_counter; | ||
1613 | } | ||
1614 | |||
1615 | ddprintk("%s: n_cur_dma_counter = %d\n", __FUNCTION__, n_cur_dma_counter); | ||
1616 | ddprintk("%s: dmaq1.tail = %d\n", __FUNCTION__, adapter->dmaq1.tail); | ||
1617 | ddprintk("%s: bytes_transferred = %d\n", __FUNCTION__, n_num_new_bytes_transferred); | ||
1618 | |||
1619 | if (n_num_new_bytes_transferred < dw_default_packet_size) | ||
1620 | return; | ||
1621 | |||
1622 | n_num_bytes_parsed = 0; | ||
1623 | |||
1624 | while (n_num_bytes_parsed < n_num_new_bytes_transferred) { | ||
1625 | pb_dma_buf_cur_pos = adapter->dmaq1.buffer + adapter->dmaq1.tail; | ||
1626 | |||
1627 | if (adapter->dmaq1.buffer + adapter->dmaq1.buffer_size < adapter->dmaq1.buffer + adapter->dmaq1.tail + 188) { | ||
1628 | memcpy(gb_tmp_buffer, adapter->dmaq1.buffer + adapter->dmaq1.tail, | ||
1629 | adapter->dmaq1.buffer_size - adapter->dmaq1.tail); | ||
1630 | memcpy(gb_tmp_buffer + (adapter->dmaq1.buffer_size - adapter->dmaq1.tail), adapter->dmaq1.buffer, | ||
1631 | (188 - (adapter->dmaq1.buffer_size - adapter->dmaq1.tail))); | ||
1632 | |||
1633 | pb_dma_buf_cur_pos = gb_tmp_buffer; | ||
1634 | } | ||
1635 | |||
1636 | if (adapter->capturing != 0) { | ||
1637 | dvb_dmx_swfilter_packets(dvbdmx, pb_dma_buf_cur_pos, dw_default_packet_size / 188); | ||
1638 | } | ||
1639 | |||
1640 | n_num_bytes_parsed = n_num_bytes_parsed + dw_default_packet_size; | ||
1641 | |||
1642 | adapter->dmaq1.tail = adapter->dmaq1.tail + dw_default_packet_size; | ||
1643 | |||
1644 | if (adapter->dmaq1.tail >= adapter->dmaq1.buffer_size) | ||
1645 | adapter->dmaq1.tail = adapter->dmaq1.tail - adapter->dmaq1.buffer_size; | ||
1646 | }; | ||
1647 | } | ||
1648 | |||
1649 | static void interrupt_service_dma2(struct adapter *adapter) | ||
1650 | { | ||
1651 | printk("%s:\n", __FUNCTION__); | ||
1652 | } | ||
1653 | |||
1654 | static irqreturn_t isr(int irq, void *dev_id, struct pt_regs *regs) | ||
1655 | { | ||
1656 | struct adapter *tmp = dev_id; | ||
1657 | |||
1658 | u32 value; | ||
1659 | |||
1660 | ddprintk("%s:\n", __FUNCTION__); | ||
1661 | |||
1662 | spin_lock_irq(&tmp->lock); | ||
1663 | |||
1664 | if (0 == ((value = read_reg_dw(tmp, 0x20c)) & 0x0f)) { | ||
1665 | spin_unlock_irq(&tmp->lock); | ||
1666 | return IRQ_NONE; | ||
1667 | } | ||
1668 | |||
1669 | while (value != 0) { | ||
1670 | if ((value & 0x03) != 0) | ||
1671 | interrupt_service_dma1(tmp); | ||
1672 | if ((value & 0x0c) != 0) | ||
1673 | interrupt_service_dma2(tmp); | ||
1674 | value = read_reg_dw(tmp, 0x20c) & 0x0f; | ||
1675 | } | ||
1676 | |||
1677 | spin_unlock_irq(&tmp->lock); | ||
1678 | return IRQ_HANDLED; | ||
1679 | } | ||
1680 | |||
1681 | static int init_dma_queue_one(struct adapter *adapter, struct dmaq *dmaq, | ||
1682 | int size, int dmaq_offset) | ||
1683 | { | ||
1684 | struct pci_dev *pdev = adapter->pdev; | ||
1685 | dma_addr_t dma_addr; | ||
1686 | |||
1687 | dmaq->head = 0; | ||
1688 | dmaq->tail = 0; | ||
1689 | |||
1690 | dmaq->buffer = pci_alloc_consistent(pdev, size + 0x80, &dma_addr); | ||
1691 | if (!dmaq->buffer) | ||
1692 | return -ENOMEM; | ||
1693 | |||
1694 | dmaq->bus_addr = dma_addr; | ||
1695 | dmaq->buffer_size = size; | ||
1696 | |||
1697 | dma_init_dma(adapter, dmaq_offset); | ||
1698 | |||
1699 | ddprintk("%s: allocated dma buffer at 0x%p, length=%d\n", | ||
1700 | __FUNCTION__, dmaq->buffer, size); | ||
1701 | |||
1702 | return 0; | ||
1703 | } | ||
1704 | |||
1705 | static int init_dma_queue(struct adapter *adapter) | ||
1706 | { | ||
1707 | struct { | ||
1708 | struct dmaq *dmaq; | ||
1709 | u32 dma_status; | ||
1710 | int size; | ||
1711 | } dmaq_desc[] = { | ||
1712 | { &adapter->dmaq1, 0x10000000, SIZE_OF_BUF_DMA1 }, | ||
1713 | { &adapter->dmaq2, 0x20000000, SIZE_OF_BUF_DMA2 } | ||
1714 | }, *p = dmaq_desc; | ||
1715 | int i; | ||
1716 | |||
1717 | for (i = 0; i < 2; i++, p++) { | ||
1718 | if (init_dma_queue_one(adapter, p->dmaq, p->size, i) < 0) | ||
1719 | adapter->dma_status &= ~p->dma_status; | ||
1720 | else | ||
1721 | adapter->dma_status |= p->dma_status; | ||
1722 | } | ||
1723 | return (adapter->dma_status & 0x30000000) ? 0 : -ENOMEM; | ||
1724 | } | ||
1725 | |||
1726 | static void free_dma_queue_one(struct adapter *adapter, struct dmaq *dmaq) | ||
1727 | { | ||
1728 | if (dmaq->buffer) { | ||
1729 | pci_free_consistent(adapter->pdev, dmaq->buffer_size + 0x80, | ||
1730 | dmaq->buffer, dmaq->bus_addr); | ||
1731 | memset(dmaq, 0, sizeof(*dmaq)); | ||
1732 | } | ||
1733 | } | ||
1734 | |||
1735 | static void free_dma_queue(struct adapter *adapter) | ||
1736 | { | ||
1737 | struct dmaq *dmaq[] = { | ||
1738 | &adapter->dmaq1, | ||
1739 | &adapter->dmaq2, | ||
1740 | NULL | ||
1741 | }, **p; | ||
1742 | |||
1743 | for (p = dmaq; *p; p++) | ||
1744 | free_dma_queue_one(adapter, *p); | ||
1745 | } | ||
1746 | |||
1747 | static void release_adapter(struct adapter *adapter) | ||
1748 | { | ||
1749 | struct pci_dev *pdev = adapter->pdev; | ||
1750 | |||
1751 | iounmap(adapter->io_mem); | ||
1752 | pci_disable_device(pdev); | ||
1753 | pci_release_region(pdev, 0); | ||
1754 | pci_release_region(pdev, 1); | ||
1755 | } | ||
1756 | |||
1757 | static void free_adapter_object(struct adapter *adapter) | ||
1758 | { | ||
1759 | dprintk("%s:\n", __FUNCTION__); | ||
1760 | |||
1761 | close_stream(adapter, 0); | ||
1762 | free_irq(adapter->irq, adapter); | ||
1763 | free_dma_queue(adapter); | ||
1764 | release_adapter(adapter); | ||
1765 | kfree(adapter); | ||
1766 | } | ||
1767 | |||
1768 | static struct pci_driver skystar2_pci_driver; | ||
1769 | |||
1770 | static int claim_adapter(struct adapter *adapter) | ||
1771 | { | ||
1772 | struct pci_dev *pdev = adapter->pdev; | ||
1773 | u16 var; | ||
1774 | int ret; | ||
1775 | |||
1776 | ret = pci_request_region(pdev, 1, skystar2_pci_driver.name); | ||
1777 | if (ret < 0) | ||
1778 | goto out; | ||
1779 | |||
1780 | ret = pci_request_region(pdev, 0, skystar2_pci_driver.name); | ||
1781 | if (ret < 0) | ||
1782 | goto err_pci_release_1; | ||
1783 | |||
1784 | pci_read_config_byte(pdev, PCI_CLASS_REVISION, &adapter->card_revision); | ||
1785 | |||
1786 | dprintk("%s: card revision %x \n", __FUNCTION__, adapter->card_revision); | ||
1787 | |||
1788 | ret = pci_enable_device(pdev); | ||
1789 | if (ret < 0) | ||
1790 | goto err_pci_release_0; | ||
1791 | |||
1792 | pci_read_config_word(pdev, 4, &var); | ||
1793 | |||
1794 | if ((var & 4) == 0) | ||
1795 | pci_set_master(pdev); | ||
1796 | |||
1797 | adapter->io_port = pdev->resource[1].start; | ||
1798 | |||
1799 | adapter->io_mem = ioremap(pdev->resource[0].start, 0x800); | ||
1800 | |||
1801 | if (!adapter->io_mem) { | ||
1802 | dprintk("%s: can not map io memory\n", __FUNCTION__); | ||
1803 | ret = -EIO; | ||
1804 | goto err_pci_disable; | ||
1805 | } | ||
1806 | |||
1807 | dprintk("%s: io memory maped at %p\n", __FUNCTION__, adapter->io_mem); | ||
1808 | |||
1809 | ret = 1; | ||
1810 | out: | ||
1811 | return ret; | ||
1812 | |||
1813 | err_pci_disable: | ||
1814 | pci_disable_device(pdev); | ||
1815 | err_pci_release_0: | ||
1816 | pci_release_region(pdev, 0); | ||
1817 | err_pci_release_1: | ||
1818 | pci_release_region(pdev, 1); | ||
1819 | goto out; | ||
1820 | } | ||
1821 | |||
1822 | /* | ||
1823 | static int sll_reset_flexcop(struct adapter *adapter) | ||
1824 | { | ||
1825 | write_reg_dw(adapter, 0x208, 0); | ||
1826 | write_reg_dw(adapter, 0x210, 0xb2ff); | ||
1827 | |||
1828 | return 0; | ||
1829 | } | ||
1830 | */ | ||
1831 | |||
1832 | static void decide_how_many_hw_filters(struct adapter *adapter) | ||
1833 | { | ||
1834 | int hw_filters; | ||
1835 | int mod_option_hw_filters; | ||
1836 | |||
1837 | // FlexCop IIb & III have 6+32 hw filters | ||
1838 | // FlexCop II has 6 hw filters, every other should have at least 6 | ||
1839 | switch (adapter->b2c2_revision) { | ||
1840 | case 0x82: /* II */ | ||
1841 | hw_filters = 6; | ||
1842 | break; | ||
1843 | case 0xc3: /* IIB */ | ||
1844 | hw_filters = 6 + 32; | ||
1845 | break; | ||
1846 | case 0xc0: /* III */ | ||
1847 | hw_filters = 6 + 32; | ||
1848 | break; | ||
1849 | default: | ||
1850 | hw_filters = 6; | ||
1851 | break; | ||
1852 | } | ||
1853 | printk("%s: the chip has %i hardware filters", __FILE__, hw_filters); | ||
1854 | |||
1855 | mod_option_hw_filters = 0; | ||
1856 | if (enable_hw_filters >= 1) | ||
1857 | mod_option_hw_filters += 6; | ||
1858 | if (enable_hw_filters >= 2) | ||
1859 | mod_option_hw_filters += 32; | ||
1860 | |||
1861 | if (mod_option_hw_filters >= hw_filters) { | ||
1862 | adapter->useable_hw_filters = hw_filters; | ||
1863 | } else { | ||
1864 | adapter->useable_hw_filters = mod_option_hw_filters; | ||
1865 | printk(", but only %d will be used because of module option", mod_option_hw_filters); | ||
1866 | } | ||
1867 | printk("\n"); | ||
1868 | dprintk("%s: useable_hardware_filters set to %i\n", __FILE__, adapter->useable_hw_filters); | ||
1869 | } | ||
1870 | |||
1871 | static int driver_initialize(struct pci_dev *pdev) | ||
1872 | { | ||
1873 | struct adapter *adapter; | ||
1874 | u32 tmp; | ||
1875 | int ret = -ENOMEM; | ||
1876 | |||
1877 | adapter = kmalloc(sizeof(struct adapter), GFP_KERNEL); | ||
1878 | if (!adapter) { | ||
1879 | dprintk("%s: out of memory!\n", __FUNCTION__); | ||
1880 | goto out; | ||
1881 | } | ||
1882 | |||
1883 | memset(adapter, 0, sizeof(struct adapter)); | ||
1884 | |||
1885 | pci_set_drvdata(pdev,adapter); | ||
1886 | |||
1887 | adapter->pdev = pdev; | ||
1888 | adapter->irq = pdev->irq; | ||
1889 | |||
1890 | ret = claim_adapter(adapter); | ||
1891 | if (ret < 0) | ||
1892 | goto err_kfree; | ||
1893 | |||
1894 | irq_dma_enable_disable_irq(adapter, 0); | ||
1895 | |||
1896 | ret = request_irq(pdev->irq, isr, 0x4000000, "Skystar2", adapter); | ||
1897 | if (ret < 0) { | ||
1898 | dprintk("%s: unable to allocate irq=%d !\n", __FUNCTION__, pdev->irq); | ||
1899 | goto err_release_adapter; | ||
1900 | } | ||
1901 | |||
1902 | read_reg_dw(adapter, 0x208); | ||
1903 | write_reg_dw(adapter, 0x208, 0); | ||
1904 | write_reg_dw(adapter, 0x210, 0xb2ff); | ||
1905 | write_reg_dw(adapter, 0x208, 0x40); | ||
1906 | |||
1907 | ret = init_dma_queue(adapter); | ||
1908 | if (ret < 0) | ||
1909 | goto err_free_irq; | ||
1910 | |||
1911 | adapter->b2c2_revision = (read_reg_dw(adapter, 0x204) >> 0x18); | ||
1912 | |||
1913 | switch (adapter->b2c2_revision) { | ||
1914 | case 0x82: | ||
1915 | printk("%s: FlexCopII(rev.130) chip found\n", __FILE__); | ||
1916 | break; | ||
1917 | case 0xc3: | ||
1918 | printk("%s: FlexCopIIB(rev.195) chip found\n", __FILE__); | ||
1919 | break; | ||
1920 | case 0xc0: | ||
1921 | printk("%s: FlexCopIII(rev.192) chip found\n", __FILE__); | ||
1922 | break; | ||
1923 | default: | ||
1924 | printk("%s: The revision of the FlexCop chip on your card is %d\n", __FILE__, adapter->b2c2_revision); | ||
1925 | printk("%s: This driver works only with FlexCopII(rev.130), FlexCopIIB(rev.195) and FlexCopIII(rev.192).\n", __FILE__); | ||
1926 | ret = -ENODEV; | ||
1927 | goto err_free_dma_queue; | ||
1928 | } | ||
1929 | |||
1930 | decide_how_many_hw_filters(adapter); | ||
1931 | |||
1932 | init_pids(adapter); | ||
1933 | |||
1934 | tmp = read_reg_dw(adapter, 0x204); | ||
1935 | |||
1936 | write_reg_dw(adapter, 0x204, 0); | ||
1937 | mdelay(20); | ||
1938 | |||
1939 | write_reg_dw(adapter, 0x204, tmp); | ||
1940 | mdelay(10); | ||
1941 | |||
1942 | tmp = read_reg_dw(adapter, 0x308); | ||
1943 | write_reg_dw(adapter, 0x308, 0x4000 | tmp); | ||
1944 | |||
1945 | adapter->dw_sram_type = 0x10000; | ||
1946 | |||
1947 | sll_detect_sram_size(adapter); | ||
1948 | |||
1949 | dprintk("%s sram length = %d, sram type= %x\n", __FUNCTION__, sram_length(adapter), adapter->dw_sram_type); | ||
1950 | |||
1951 | sram_set_media_dest(adapter, 1); | ||
1952 | sram_set_net_dest(adapter, 1); | ||
1953 | |||
1954 | ctrl_enable_smc(adapter, 0); | ||
1955 | |||
1956 | sram_set_cai_dest(adapter, 2); | ||
1957 | sram_set_cao_dest(adapter, 2); | ||
1958 | |||
1959 | dma_enable_disable_irq(adapter, 1, 0, 0); | ||
1960 | |||
1961 | if (eeprom_get_mac_addr(adapter, 0, adapter->mac_addr) != 0) { | ||
1962 | printk("%s MAC address = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x \n", __FUNCTION__, adapter->mac_addr[0], | ||
1963 | adapter->mac_addr[1], adapter->mac_addr[2], adapter->mac_addr[3], adapter->mac_addr[4], adapter->mac_addr[5], | ||
1964 | adapter->mac_addr[6], adapter->mac_addr[7] | ||
1965 | ); | ||
1966 | |||
1967 | ca_set_mac_dst_addr_filter(adapter, adapter->mac_addr); | ||
1968 | ctrl_enable_mac(adapter, 1); | ||
1969 | } | ||
1970 | |||
1971 | spin_lock_init(&adapter->lock); | ||
1972 | |||
1973 | out: | ||
1974 | return ret; | ||
1975 | |||
1976 | err_free_dma_queue: | ||
1977 | free_dma_queue(adapter); | ||
1978 | err_free_irq: | ||
1979 | free_irq(pdev->irq, adapter); | ||
1980 | err_release_adapter: | ||
1981 | release_adapter(adapter); | ||
1982 | err_kfree: | ||
1983 | pci_set_drvdata(pdev, NULL); | ||
1984 | kfree(adapter); | ||
1985 | goto out; | ||
1986 | } | ||
1987 | |||
1988 | static void driver_halt(struct pci_dev *pdev) | ||
1989 | { | ||
1990 | struct adapter *adapter = pci_get_drvdata(pdev); | ||
1991 | |||
1992 | irq_dma_enable_disable_irq(adapter, 0); | ||
1993 | |||
1994 | ctrl_enable_receive_data(adapter, 0); | ||
1995 | |||
1996 | free_adapter_object(adapter); | ||
1997 | |||
1998 | pci_set_drvdata(pdev, NULL); | ||
1999 | } | ||
2000 | |||
2001 | static int dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed) | ||
2002 | { | ||
2003 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | ||
2004 | struct adapter *adapter = (struct adapter *) dvbdmx->priv; | ||
2005 | |||
2006 | dprintk("%s: PID=%d, type=%d\n", __FUNCTION__, dvbdmxfeed->pid, dvbdmxfeed->type); | ||
2007 | |||
2008 | open_stream(adapter, dvbdmxfeed->pid); | ||
2009 | |||
2010 | return 0; | ||
2011 | } | ||
2012 | |||
2013 | static int dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed) | ||
2014 | { | ||
2015 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | ||
2016 | struct adapter *adapter = (struct adapter *) dvbdmx->priv; | ||
2017 | |||
2018 | dprintk("%s: PID=%d, type=%d\n", __FUNCTION__, dvbdmxfeed->pid, dvbdmxfeed->type); | ||
2019 | |||
2020 | close_stream(adapter, dvbdmxfeed->pid); | ||
2021 | |||
2022 | return 0; | ||
2023 | } | ||
2024 | |||
2025 | /* lnb control */ | ||
2026 | static void set_tuner_tone(struct adapter *adapter, u8 tone) | ||
2027 | { | ||
2028 | u16 wz_half_period_for_45_mhz[] = { 0x01ff, 0x0154, 0x00ff, 0x00cc }; | ||
2029 | u16 ax; | ||
2030 | |||
2031 | dprintk("%s: %u\n", __FUNCTION__, tone); | ||
2032 | |||
2033 | switch (tone) { | ||
2034 | case 1: | ||
2035 | ax = wz_half_period_for_45_mhz[0]; | ||
2036 | break; | ||
2037 | case 2: | ||
2038 | ax = wz_half_period_for_45_mhz[1]; | ||
2039 | break; | ||
2040 | case 3: | ||
2041 | ax = wz_half_period_for_45_mhz[2]; | ||
2042 | break; | ||
2043 | case 4: | ||
2044 | ax = wz_half_period_for_45_mhz[3]; | ||
2045 | break; | ||
2046 | |||
2047 | default: | ||
2048 | ax = 0; | ||
2049 | } | ||
2050 | |||
2051 | if (ax != 0) { | ||
2052 | write_reg_dw(adapter, 0x200, ((ax << 0x0f) + (ax & 0x7fff)) | 0x40000000); | ||
2053 | |||
2054 | } else { | ||
2055 | |||
2056 | write_reg_dw(adapter, 0x200, 0x40ff8000); | ||
2057 | } | ||
2058 | } | ||
2059 | |||
2060 | static void set_tuner_polarity(struct adapter *adapter, u8 polarity) | ||
2061 | { | ||
2062 | u32 var; | ||
2063 | |||
2064 | dprintk("%s : polarity = %u \n", __FUNCTION__, polarity); | ||
2065 | |||
2066 | var = read_reg_dw(adapter, 0x204); | ||
2067 | |||
2068 | if (polarity == 0) { | ||
2069 | dprintk("%s: LNB power off\n", __FUNCTION__); | ||
2070 | var = var | 1; | ||
2071 | }; | ||
2072 | |||
2073 | if (polarity == 1) { | ||
2074 | var = var & ~1; | ||
2075 | var = var & ~4; | ||
2076 | }; | ||
2077 | |||
2078 | if (polarity == 2) { | ||
2079 | var = var & ~1; | ||
2080 | var = var | 4; | ||
2081 | } | ||
2082 | |||
2083 | write_reg_dw(adapter, 0x204, var); | ||
2084 | } | ||
2085 | |||
2086 | static void diseqc_send_bit(struct adapter *adapter, int data) | ||
2087 | { | ||
2088 | set_tuner_tone(adapter, 1); | ||
2089 | udelay(data ? 500 : 1000); | ||
2090 | set_tuner_tone(adapter, 0); | ||
2091 | udelay(data ? 1000 : 500); | ||
2092 | } | ||
2093 | |||
2094 | |||
2095 | static void diseqc_send_byte(struct adapter *adapter, int data) | ||
2096 | { | ||
2097 | int i, par = 1, d; | ||
2098 | |||
2099 | for (i = 7; i >= 0; i--) { | ||
2100 | d = (data >> i) & 1; | ||
2101 | par ^= d; | ||
2102 | diseqc_send_bit(adapter, d); | ||
2103 | } | ||
2104 | |||
2105 | diseqc_send_bit(adapter, par); | ||
2106 | } | ||
2107 | |||
2108 | |||
2109 | static int send_diseqc_msg(struct adapter *adapter, int len, u8 *msg, unsigned long burst) | ||
2110 | { | ||
2111 | int i; | ||
2112 | |||
2113 | set_tuner_tone(adapter, 0); | ||
2114 | mdelay(16); | ||
2115 | |||
2116 | for (i = 0; i < len; i++) | ||
2117 | diseqc_send_byte(adapter, msg[i]); | ||
2118 | |||
2119 | mdelay(16); | ||
2120 | |||
2121 | if (burst != -1) { | ||
2122 | if (burst) | ||
2123 | diseqc_send_byte(adapter, 0xff); | ||
2124 | else { | ||
2125 | set_tuner_tone(adapter, 1); | ||
2126 | udelay(12500); | ||
2127 | set_tuner_tone(adapter, 0); | ||
2128 | } | ||
2129 | msleep(20); | ||
2130 | } | ||
2131 | |||
2132 | return 0; | ||
2133 | } | ||
2134 | |||
2135 | static int flexcop_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | ||
2136 | { | ||
2137 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2138 | |||
2139 | switch(tone) { | ||
2140 | case SEC_TONE_ON: | ||
2141 | set_tuner_tone(adapter, 1); | ||
2142 | break; | ||
2143 | case SEC_TONE_OFF: | ||
2144 | set_tuner_tone(adapter, 0); | ||
2145 | break; | ||
2146 | default: | ||
2147 | return -EINVAL; | ||
2148 | }; | ||
2149 | |||
2150 | return 0; | ||
2151 | } | ||
2152 | |||
2153 | static int flexcop_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | ||
2154 | { | ||
2155 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2156 | |||
2157 | send_diseqc_msg(adapter, cmd->msg_len, cmd->msg, 0); | ||
2158 | |||
2159 | return 0; | ||
2160 | } | ||
2161 | |||
2162 | static int flexcop_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | ||
2163 | { | ||
2164 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2165 | |||
2166 | send_diseqc_msg(adapter, 0, NULL, minicmd); | ||
2167 | |||
2168 | return 0; | ||
2169 | } | ||
2170 | |||
2171 | static int flexcop_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | ||
2172 | { | ||
2173 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2174 | |||
2175 | dprintk("%s: FE_SET_VOLTAGE\n", __FUNCTION__); | ||
2176 | |||
2177 | switch (voltage) { | ||
2178 | case SEC_VOLTAGE_13: | ||
2179 | dprintk("%s: SEC_VOLTAGE_13, %x\n", __FUNCTION__, SEC_VOLTAGE_13); | ||
2180 | set_tuner_polarity(adapter, 1); | ||
2181 | return 0; | ||
2182 | |||
2183 | case SEC_VOLTAGE_18: | ||
2184 | dprintk("%s: SEC_VOLTAGE_18, %x\n", __FUNCTION__, SEC_VOLTAGE_18); | ||
2185 | set_tuner_polarity(adapter, 2); | ||
2186 | return 0; | ||
2187 | |||
2188 | default: | ||
2189 | return -EINVAL; | ||
2190 | } | ||
2191 | } | ||
2192 | |||
2193 | static int flexcop_sleep(struct dvb_frontend* fe) | ||
2194 | { | ||
2195 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2196 | |||
2197 | dprintk("%s: FE_SLEEP\n", __FUNCTION__); | ||
2198 | set_tuner_polarity(adapter, 0); | ||
2199 | |||
2200 | if (adapter->fe_sleep) return adapter->fe_sleep(fe); | ||
2201 | return 0; | ||
2202 | } | ||
2203 | |||
2204 | static u32 flexcop_i2c_func(struct i2c_adapter *adapter) | ||
2205 | { | ||
2206 | printk("flexcop_i2c_func\n"); | ||
2207 | |||
2208 | return I2C_FUNC_I2C; | ||
2209 | } | ||
2210 | |||
2211 | static struct i2c_algorithm flexcop_algo = { | ||
2212 | .name = "flexcop i2c algorithm", | ||
2213 | .id = I2C_ALGO_BIT, | ||
2214 | .master_xfer = master_xfer, | ||
2215 | .functionality = flexcop_i2c_func, | ||
2216 | }; | ||
2217 | |||
2218 | |||
2219 | |||
2220 | |||
2221 | static int samsung_tbmu24112_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio) | ||
2222 | { | ||
2223 | u8 aclk = 0; | ||
2224 | u8 bclk = 0; | ||
2225 | |||
2226 | if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; } | ||
2227 | else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; } | ||
2228 | else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; } | ||
2229 | else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; } | ||
2230 | else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; } | ||
2231 | else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; } | ||
2232 | |||
2233 | stv0299_writereg (fe, 0x13, aclk); | ||
2234 | stv0299_writereg (fe, 0x14, bclk); | ||
2235 | stv0299_writereg (fe, 0x1f, (ratio >> 16) & 0xff); | ||
2236 | stv0299_writereg (fe, 0x20, (ratio >> 8) & 0xff); | ||
2237 | stv0299_writereg (fe, 0x21, (ratio ) & 0xf0); | ||
2238 | |||
2239 | return 0; | ||
2240 | } | ||
2241 | |||
2242 | static int samsung_tbmu24112_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) | ||
2243 | { | ||
2244 | u8 buf[4]; | ||
2245 | u32 div; | ||
2246 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; | ||
2247 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2248 | |||
2249 | div = params->frequency / 125; | ||
2250 | |||
2251 | buf[0] = (div >> 8) & 0x7f; | ||
2252 | buf[1] = div & 0xff; | ||
2253 | buf[2] = 0x84; // 0xC4 | ||
2254 | buf[3] = 0x08; | ||
2255 | |||
2256 | if (params->frequency < 1500000) buf[3] |= 0x10; | ||
2257 | |||
2258 | if (i2c_transfer (&adapter->i2c_adap, &msg, 1) != 1) return -EIO; | ||
2259 | return 0; | ||
2260 | } | ||
2261 | |||
2262 | static u8 samsung_tbmu24112_inittab[] = { | ||
2263 | 0x01, 0x15, | ||
2264 | 0x02, 0x30, | ||
2265 | 0x03, 0x00, | ||
2266 | 0x04, 0x7D, | ||
2267 | 0x05, 0x35, | ||
2268 | 0x06, 0x02, | ||
2269 | 0x07, 0x00, | ||
2270 | 0x08, 0xC3, | ||
2271 | 0x0C, 0x00, | ||
2272 | 0x0D, 0x81, | ||
2273 | 0x0E, 0x23, | ||
2274 | 0x0F, 0x12, | ||
2275 | 0x10, 0x7E, | ||
2276 | 0x11, 0x84, | ||
2277 | 0x12, 0xB9, | ||
2278 | 0x13, 0x88, | ||
2279 | 0x14, 0x89, | ||
2280 | 0x15, 0xC9, | ||
2281 | 0x16, 0x00, | ||
2282 | 0x17, 0x5C, | ||
2283 | 0x18, 0x00, | ||
2284 | 0x19, 0x00, | ||
2285 | 0x1A, 0x00, | ||
2286 | 0x1C, 0x00, | ||
2287 | 0x1D, 0x00, | ||
2288 | 0x1E, 0x00, | ||
2289 | 0x1F, 0x3A, | ||
2290 | 0x20, 0x2E, | ||
2291 | 0x21, 0x80, | ||
2292 | 0x22, 0xFF, | ||
2293 | 0x23, 0xC1, | ||
2294 | 0x28, 0x00, | ||
2295 | 0x29, 0x1E, | ||
2296 | 0x2A, 0x14, | ||
2297 | 0x2B, 0x0F, | ||
2298 | 0x2C, 0x09, | ||
2299 | 0x2D, 0x05, | ||
2300 | 0x31, 0x1F, | ||
2301 | 0x32, 0x19, | ||
2302 | 0x33, 0xFE, | ||
2303 | 0x34, 0x93, | ||
2304 | 0xff, 0xff, | ||
2305 | }; | ||
2306 | |||
2307 | static struct stv0299_config samsung_tbmu24112_config = { | ||
2308 | .demod_address = 0x68, | ||
2309 | .inittab = samsung_tbmu24112_inittab, | ||
2310 | .mclk = 88000000UL, | ||
2311 | .invert = 0, | ||
2312 | .enhanced_tuning = 0, | ||
2313 | .skip_reinit = 0, | ||
2314 | .lock_output = STV0229_LOCKOUTPUT_LK, | ||
2315 | .volt13_op0_op1 = STV0299_VOLT13_OP1, | ||
2316 | .min_delay_ms = 100, | ||
2317 | .set_symbol_rate = samsung_tbmu24112_set_symbol_rate, | ||
2318 | .pll_set = samsung_tbmu24112_pll_set, | ||
2319 | }; | ||
2320 | |||
2321 | |||
2322 | |||
2323 | static int nxt2002_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name) | ||
2324 | { | ||
2325 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2326 | |||
2327 | return request_firmware(fw, name, &adapter->pdev->dev); | ||
2328 | } | ||
2329 | |||
2330 | |||
2331 | static struct nxt2002_config samsung_tbmv_config = { | ||
2332 | .demod_address = 0x0A, | ||
2333 | .request_firmware = nxt2002_request_firmware, | ||
2334 | }; | ||
2335 | |||
2336 | static int samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe) | ||
2337 | { | ||
2338 | static u8 mt352_clock_config [] = { 0x89, 0x18, 0x2d }; | ||
2339 | static u8 mt352_reset [] = { 0x50, 0x80 }; | ||
2340 | static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | ||
2341 | static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0xa1 }; | ||
2342 | static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 }; | ||
2343 | |||
2344 | mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config)); | ||
2345 | udelay(2000); | ||
2346 | mt352_write(fe, mt352_reset, sizeof(mt352_reset)); | ||
2347 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); | ||
2348 | |||
2349 | mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg)); | ||
2350 | mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg)); | ||
2351 | |||
2352 | return 0; | ||
2353 | } | ||
2354 | |||
2355 | static int samsung_tdtc9251dh0_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf) | ||
2356 | { | ||
2357 | u32 div; | ||
2358 | unsigned char bs = 0; | ||
2359 | |||
2360 | #define IF_FREQUENCYx6 217 /* 6 * 36.16666666667MHz */ | ||
2361 | div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; | ||
2362 | |||
2363 | if (params->frequency >= 48000000 && params->frequency <= 154000000) bs = 0x09; | ||
2364 | if (params->frequency >= 161000000 && params->frequency <= 439000000) bs = 0x0a; | ||
2365 | if (params->frequency >= 447000000 && params->frequency <= 863000000) bs = 0x08; | ||
2366 | |||
2367 | pllbuf[0] = 0xc2; // Note: non-linux standard PLL i2c address | ||
2368 | pllbuf[1] = div >> 8; | ||
2369 | pllbuf[2] = div & 0xff; | ||
2370 | pllbuf[3] = 0xcc; | ||
2371 | pllbuf[4] = bs; | ||
2372 | |||
2373 | return 0; | ||
2374 | } | ||
2375 | |||
2376 | static struct mt352_config samsung_tdtc9251dh0_config = { | ||
2377 | |||
2378 | .demod_address = 0x0f, | ||
2379 | .demod_init = samsung_tdtc9251dh0_demod_init, | ||
2380 | .pll_set = samsung_tdtc9251dh0_pll_set, | ||
2381 | }; | ||
2382 | |||
2383 | static int skystar23_samsung_tbdu18132_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) | ||
2384 | { | ||
2385 | u8 buf[4]; | ||
2386 | u32 div; | ||
2387 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; | ||
2388 | struct adapter* adapter = (struct adapter*) fe->dvb->priv; | ||
2389 | |||
2390 | div = (params->frequency + (125/2)) / 125; | ||
2391 | |||
2392 | buf[0] = (div >> 8) & 0x7f; | ||
2393 | buf[1] = (div >> 0) & 0xff; | ||
2394 | buf[2] = 0x84 | ((div >> 10) & 0x60); | ||
2395 | buf[3] = 0x80; | ||
2396 | |||
2397 | if (params->frequency < 1550000) | ||
2398 | buf[3] |= 0x02; | ||
2399 | |||
2400 | if (i2c_transfer (&adapter->i2c_adap, &msg, 1) != 1) return -EIO; | ||
2401 | return 0; | ||
2402 | } | ||
2403 | |||
2404 | static struct mt312_config skystar23_samsung_tbdu18132_config = { | ||
2405 | |||
2406 | .demod_address = 0x0e, | ||
2407 | .pll_set = skystar23_samsung_tbdu18132_pll_set, | ||
2408 | }; | ||
2409 | |||
2410 | |||
2411 | |||
2412 | |||
2413 | static void frontend_init(struct adapter *skystar2) | ||
2414 | { | ||
2415 | switch(skystar2->pdev->device) { | ||
2416 | case 0x2103: // Technisat Skystar2 OR Technisat Airstar2 (DVB-T or ATSC) | ||
2417 | |||
2418 | // Attempt to load the Nextwave nxt2002 for ATSC support | ||
2419 | skystar2->fe = nxt2002_attach(&samsung_tbmv_config, &skystar2->i2c_adap); | ||
2420 | if (skystar2->fe != NULL) { | ||
2421 | skystar2->fe_sleep = skystar2->fe->ops->sleep; | ||
2422 | skystar2->fe->ops->sleep = flexcop_sleep; | ||
2423 | break; | ||
2424 | } | ||
2425 | |||
2426 | // try the skystar2 v2.6 first (stv0299/Samsung tbmu24112(sl1935)) | ||
2427 | skystar2->fe = stv0299_attach(&samsung_tbmu24112_config, &skystar2->i2c_adap); | ||
2428 | if (skystar2->fe != NULL) { | ||
2429 | skystar2->fe->ops->set_voltage = flexcop_set_voltage; | ||
2430 | skystar2->fe_sleep = skystar2->fe->ops->sleep; | ||
2431 | skystar2->fe->ops->sleep = flexcop_sleep; | ||
2432 | break; | ||
2433 | } | ||
2434 | |||
2435 | // try the airstar2 (mt352/Samsung tdtc9251dh0(??)) | ||
2436 | skystar2->fe = mt352_attach(&samsung_tdtc9251dh0_config, &skystar2->i2c_adap); | ||
2437 | if (skystar2->fe != NULL) { | ||
2438 | skystar2->fe->ops->info.frequency_min = 474000000; | ||
2439 | skystar2->fe->ops->info.frequency_max = 858000000; | ||
2440 | break; | ||
2441 | } | ||
2442 | |||
2443 | // try the skystar2 v2.3 (vp310/Samsung tbdu18132(tsa5059)) | ||
2444 | skystar2->fe = vp310_attach(&skystar23_samsung_tbdu18132_config, &skystar2->i2c_adap); | ||
2445 | if (skystar2->fe != NULL) { | ||
2446 | skystar2->fe->ops->diseqc_send_master_cmd = flexcop_diseqc_send_master_cmd; | ||
2447 | skystar2->fe->ops->diseqc_send_burst = flexcop_diseqc_send_burst; | ||
2448 | skystar2->fe->ops->set_tone = flexcop_set_tone; | ||
2449 | skystar2->fe->ops->set_voltage = flexcop_set_voltage; | ||
2450 | skystar2->fe_sleep = skystar2->fe->ops->sleep; | ||
2451 | skystar2->fe->ops->sleep = flexcop_sleep; | ||
2452 | break; | ||
2453 | } | ||
2454 | break; | ||
2455 | } | ||
2456 | |||
2457 | if (skystar2->fe == NULL) { | ||
2458 | printk("skystar2: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n", | ||
2459 | skystar2->pdev->vendor, | ||
2460 | skystar2->pdev->device, | ||
2461 | skystar2->pdev->subsystem_vendor, | ||
2462 | skystar2->pdev->subsystem_device); | ||
2463 | } else { | ||
2464 | if (dvb_register_frontend(&skystar2->dvb_adapter, skystar2->fe)) { | ||
2465 | printk("skystar2: Frontend registration failed!\n"); | ||
2466 | if (skystar2->fe->ops->release) | ||
2467 | skystar2->fe->ops->release(skystar2->fe); | ||
2468 | skystar2->fe = NULL; | ||
2469 | } | ||
2470 | } | ||
2471 | } | ||
2472 | |||
2473 | |||
2474 | static int skystar2_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
2475 | { | ||
2476 | struct adapter *adapter; | ||
2477 | struct dvb_adapter *dvb_adapter; | ||
2478 | struct dvb_demux *dvbdemux; | ||
2479 | struct dmx_demux *dmx; | ||
2480 | int ret = -ENODEV; | ||
2481 | |||
2482 | if (!pdev) | ||
2483 | goto out; | ||
2484 | |||
2485 | ret = driver_initialize(pdev); | ||
2486 | if (ret < 0) | ||
2487 | goto out; | ||
2488 | |||
2489 | adapter = pci_get_drvdata(pdev); | ||
2490 | dvb_adapter = &adapter->dvb_adapter; | ||
2491 | |||
2492 | ret = dvb_register_adapter(dvb_adapter, skystar2_pci_driver.name, | ||
2493 | THIS_MODULE); | ||
2494 | if (ret < 0) { | ||
2495 | printk("%s: Error registering DVB adapter\n", __FUNCTION__); | ||
2496 | goto err_halt; | ||
2497 | } | ||
2498 | |||
2499 | dvb_adapter->priv = adapter; | ||
2500 | |||
2501 | |||
2502 | init_MUTEX(&adapter->i2c_sem); | ||
2503 | |||
2504 | |||
2505 | memset(&adapter->i2c_adap, 0, sizeof(struct i2c_adapter)); | ||
2506 | strcpy(adapter->i2c_adap.name, "SkyStar2"); | ||
2507 | |||
2508 | i2c_set_adapdata(&adapter->i2c_adap, adapter); | ||
2509 | |||
2510 | #ifdef I2C_ADAP_CLASS_TV_DIGITAL | ||
2511 | adapter->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL; | ||
2512 | #else | ||
2513 | adapter->i2c_adap.class = I2C_CLASS_TV_DIGITAL; | ||
2514 | #endif | ||
2515 | adapter->i2c_adap.algo = &flexcop_algo; | ||
2516 | adapter->i2c_adap.algo_data = NULL; | ||
2517 | adapter->i2c_adap.id = I2C_ALGO_BIT; | ||
2518 | |||
2519 | ret = i2c_add_adapter(&adapter->i2c_adap); | ||
2520 | if (ret < 0) | ||
2521 | goto err_dvb_unregister; | ||
2522 | |||
2523 | dvbdemux = &adapter->demux; | ||
2524 | |||
2525 | dvbdemux->priv = adapter; | ||
2526 | dvbdemux->filternum = N_PID_SLOTS; | ||
2527 | dvbdemux->feednum = N_PID_SLOTS; | ||
2528 | dvbdemux->start_feed = dvb_start_feed; | ||
2529 | dvbdemux->stop_feed = dvb_stop_feed; | ||
2530 | dvbdemux->write_to_decoder = NULL; | ||
2531 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); | ||
2532 | |||
2533 | ret = dvb_dmx_init(&adapter->demux); | ||
2534 | if (ret < 0) | ||
2535 | goto err_i2c_del; | ||
2536 | |||
2537 | dmx = &dvbdemux->dmx; | ||
2538 | |||
2539 | adapter->hw_frontend.source = DMX_FRONTEND_0; | ||
2540 | adapter->dmxdev.filternum = N_PID_SLOTS; | ||
2541 | adapter->dmxdev.demux = dmx; | ||
2542 | adapter->dmxdev.capabilities = 0; | ||
2543 | |||
2544 | ret = dvb_dmxdev_init(&adapter->dmxdev, &adapter->dvb_adapter); | ||
2545 | if (ret < 0) | ||
2546 | goto err_dmx_release; | ||
2547 | |||
2548 | ret = dmx->add_frontend(dmx, &adapter->hw_frontend); | ||
2549 | if (ret < 0) | ||
2550 | goto err_dmxdev_release; | ||
2551 | |||
2552 | adapter->mem_frontend.source = DMX_MEMORY_FE; | ||
2553 | |||
2554 | ret = dmx->add_frontend(dmx, &adapter->mem_frontend); | ||
2555 | if (ret < 0) | ||
2556 | goto err_remove_hw_frontend; | ||
2557 | |||
2558 | ret = dmx->connect_frontend(dmx, &adapter->hw_frontend); | ||
2559 | if (ret < 0) | ||
2560 | goto err_remove_mem_frontend; | ||
2561 | |||
2562 | dvb_net_init(&adapter->dvb_adapter, &adapter->dvbnet, &dvbdemux->dmx); | ||
2563 | |||
2564 | frontend_init(adapter); | ||
2565 | out: | ||
2566 | return ret; | ||
2567 | |||
2568 | err_remove_mem_frontend: | ||
2569 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &adapter->mem_frontend); | ||
2570 | err_remove_hw_frontend: | ||
2571 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &adapter->hw_frontend); | ||
2572 | err_dmxdev_release: | ||
2573 | dvb_dmxdev_release(&adapter->dmxdev); | ||
2574 | err_dmx_release: | ||
2575 | dvb_dmx_release(&adapter->demux); | ||
2576 | err_i2c_del: | ||
2577 | i2c_del_adapter(&adapter->i2c_adap); | ||
2578 | err_dvb_unregister: | ||
2579 | dvb_unregister_adapter(&adapter->dvb_adapter); | ||
2580 | err_halt: | ||
2581 | driver_halt(pdev); | ||
2582 | goto out; | ||
2583 | } | ||
2584 | |||
2585 | static void skystar2_remove(struct pci_dev *pdev) | ||
2586 | { | ||
2587 | struct adapter *adapter = pci_get_drvdata(pdev); | ||
2588 | struct dvb_demux *dvbdemux; | ||
2589 | struct dmx_demux *dmx; | ||
2590 | |||
2591 | if (!adapter) | ||
2592 | return; | ||
2593 | |||
2594 | dvb_net_release(&adapter->dvbnet); | ||
2595 | dvbdemux = &adapter->demux; | ||
2596 | dmx = &dvbdemux->dmx; | ||
2597 | |||
2598 | dmx->close(dmx); | ||
2599 | dmx->remove_frontend(dmx, &adapter->hw_frontend); | ||
2600 | dmx->remove_frontend(dmx, &adapter->mem_frontend); | ||
2601 | |||
2602 | dvb_dmxdev_release(&adapter->dmxdev); | ||
2603 | dvb_dmx_release(dvbdemux); | ||
2604 | |||
2605 | if (adapter->fe != NULL) | ||
2606 | dvb_unregister_frontend(adapter->fe); | ||
2607 | |||
2608 | dvb_unregister_adapter(&adapter->dvb_adapter); | ||
2609 | |||
2610 | i2c_del_adapter(&adapter->i2c_adap); | ||
2611 | |||
2612 | driver_halt(pdev); | ||
2613 | } | ||
2614 | |||
2615 | static struct pci_device_id skystar2_pci_tbl[] = { | ||
2616 | {0x000013d0, 0x00002103, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x00000000}, | ||
2617 | /* {0x000013d0, 0x00002200, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x00000000}, UNDEFINED HARDWARE - mail linuxtv.org list */ //FCIII | ||
2618 | {0,}, | ||
2619 | }; | ||
2620 | |||
2621 | MODULE_DEVICE_TABLE(pci, skystar2_pci_tbl); | ||
2622 | |||
2623 | static struct pci_driver skystar2_pci_driver = { | ||
2624 | .name = "SkyStar2", | ||
2625 | .id_table = skystar2_pci_tbl, | ||
2626 | .probe = skystar2_probe, | ||
2627 | .remove = skystar2_remove, | ||
2628 | }; | ||
2629 | |||
2630 | static int skystar2_init(void) | ||
2631 | { | ||
2632 | return pci_register_driver(&skystar2_pci_driver); | ||
2633 | } | ||
2634 | |||
2635 | static void skystar2_cleanup(void) | ||
2636 | { | ||
2637 | pci_unregister_driver(&skystar2_pci_driver); | ||
2638 | } | ||
2639 | |||
2640 | module_init(skystar2_init); | ||
2641 | module_exit(skystar2_cleanup); | ||
2642 | |||
2643 | MODULE_DESCRIPTION("Technisat SkyStar2 DVB PCI Driver"); | ||
2644 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/dvb/bt8xx/dst.c b/drivers/media/dvb/bt8xx/dst.c index 1339912c308b..9bd12832e3d9 100644 --- a/drivers/media/dvb/bt8xx/dst.c +++ b/drivers/media/dvb/bt8xx/dst.c | |||
@@ -258,10 +258,10 @@ int write_dst(struct dst_state *state, u8 *data, u8 len) | |||
258 | if (debug && (verbose > 4)) { | 258 | if (debug && (verbose > 4)) { |
259 | u8 i; | 259 | u8 i; |
260 | if (verbose > 4) { | 260 | if (verbose > 4) { |
261 | dprintk("%s writing", __FUNCTION__); | 261 | dprintk("%s writing [ ", __FUNCTION__); |
262 | for (i = 0; i < len; i++) | 262 | for (i = 0; i < len; i++) |
263 | dprintk(" %02x", data[i]); | 263 | dprintk("%02x ", data[i]); |
264 | dprintk("\n"); | 264 | dprintk("]\n"); |
265 | } | 265 | } |
266 | } | 266 | } |
267 | for (cnt = 0; cnt < 2; cnt++) { | 267 | for (cnt = 0; cnt < 2; cnt++) { |
@@ -320,10 +320,29 @@ int read_dst(struct dst_state *state, u8 * ret, u8 len) | |||
320 | } | 320 | } |
321 | EXPORT_SYMBOL(read_dst); | 321 | EXPORT_SYMBOL(read_dst); |
322 | 322 | ||
323 | static int dst_set_freq(struct dst_state *state, u32 freq) | 323 | static int dst_set_polarization(struct dst_state *state) |
324 | { | 324 | { |
325 | u8 *val; | 325 | switch (state->voltage) { |
326 | case SEC_VOLTAGE_13: // vertical | ||
327 | printk("%s: Polarization=[Vertical]\n", __FUNCTION__); | ||
328 | state->tx_tuna[8] &= ~0x40; //1 | ||
329 | break; | ||
330 | |||
331 | case SEC_VOLTAGE_18: // horizontal | ||
332 | printk("%s: Polarization=[Horizontal]\n", __FUNCTION__); | ||
333 | state->tx_tuna[8] |= 0x40; // 0 | ||
334 | break; | ||
335 | |||
336 | case SEC_VOLTAGE_OFF: | ||
337 | |||
338 | break; | ||
339 | } | ||
340 | |||
341 | return 0; | ||
342 | } | ||
326 | 343 | ||
344 | static int dst_set_freq(struct dst_state *state, u32 freq) | ||
345 | { | ||
327 | state->frequency = freq; | 346 | state->frequency = freq; |
328 | if (debug > 4) | 347 | if (debug > 4) |
329 | dprintk("%s: set Frequency %u\n", __FUNCTION__, freq); | 348 | dprintk("%s: set Frequency %u\n", __FUNCTION__, freq); |
@@ -332,46 +351,30 @@ static int dst_set_freq(struct dst_state *state, u32 freq) | |||
332 | freq = freq / 1000; | 351 | freq = freq / 1000; |
333 | if (freq < 950 || freq > 2150) | 352 | if (freq < 950 || freq > 2150) |
334 | return -EINVAL; | 353 | return -EINVAL; |
335 | val = &state->tx_tuna[0]; | 354 | |
336 | val[2] = (freq >> 8) & 0x7f; | 355 | state->tx_tuna[2] = (freq >> 8); |
337 | val[3] = (u8) freq; | 356 | state->tx_tuna[3] = (u8) freq; |
338 | val[4] = 1; | 357 | state->tx_tuna[4] = 0x01; |
339 | val[8] &= ~4; | 358 | state->tx_tuna[8] &= ~0x04; |
340 | if (freq < 1531) | 359 | if (state->type_flags & DST_TYPE_HAS_OBS_REGS) { |
341 | val[8] |= 4; | 360 | if (freq < 1531) |
361 | state->tx_tuna[8] |= 0x04; | ||
362 | } | ||
363 | |||
342 | } else if (state->dst_type == DST_TYPE_IS_TERR) { | 364 | } else if (state->dst_type == DST_TYPE_IS_TERR) { |
343 | freq = freq / 1000; | 365 | freq = freq / 1000; |
344 | if (freq < 137000 || freq > 858000) | 366 | if (freq < 137000 || freq > 858000) |
345 | return -EINVAL; | 367 | return -EINVAL; |
346 | val = &state->tx_tuna[0]; | ||
347 | val[2] = (freq >> 16) & 0xff; | ||
348 | val[3] = (freq >> 8) & 0xff; | ||
349 | val[4] = (u8) freq; | ||
350 | val[5] = 0; | ||
351 | switch (state->bandwidth) { | ||
352 | case BANDWIDTH_6_MHZ: | ||
353 | val[6] = 6; | ||
354 | break; | ||
355 | 368 | ||
356 | case BANDWIDTH_7_MHZ: | 369 | state->tx_tuna[2] = (freq >> 16) & 0xff; |
357 | case BANDWIDTH_AUTO: | 370 | state->tx_tuna[3] = (freq >> 8) & 0xff; |
358 | val[6] = 7; | 371 | state->tx_tuna[4] = (u8) freq; |
359 | break; | ||
360 | 372 | ||
361 | case BANDWIDTH_8_MHZ: | ||
362 | val[6] = 8; | ||
363 | break; | ||
364 | } | ||
365 | |||
366 | val[7] = 0; | ||
367 | val[8] = 0; | ||
368 | } else if (state->dst_type == DST_TYPE_IS_CABLE) { | 373 | } else if (state->dst_type == DST_TYPE_IS_CABLE) { |
369 | /* guess till will get one */ | 374 | state->tx_tuna[2] = (freq >> 16) & 0xff; |
370 | freq = freq / 1000; | 375 | state->tx_tuna[3] = (freq >> 8) & 0xff; |
371 | val = &state->tx_tuna[0]; | 376 | state->tx_tuna[4] = (u8) freq; |
372 | val[2] = (freq >> 16) & 0xff; | 377 | |
373 | val[3] = (freq >> 8) & 0xff; | ||
374 | val[4] = (u8) freq; | ||
375 | } else | 378 | } else |
376 | return -EINVAL; | 379 | return -EINVAL; |
377 | return 0; | 380 | return 0; |
@@ -379,51 +382,58 @@ static int dst_set_freq(struct dst_state *state, u32 freq) | |||
379 | 382 | ||
380 | static int dst_set_bandwidth(struct dst_state* state, fe_bandwidth_t bandwidth) | 383 | static int dst_set_bandwidth(struct dst_state* state, fe_bandwidth_t bandwidth) |
381 | { | 384 | { |
382 | u8 *val; | ||
383 | |||
384 | state->bandwidth = bandwidth; | 385 | state->bandwidth = bandwidth; |
385 | 386 | ||
386 | if (state->dst_type != DST_TYPE_IS_TERR) | 387 | if (state->dst_type != DST_TYPE_IS_TERR) |
387 | return 0; | 388 | return 0; |
388 | 389 | ||
389 | val = &state->tx_tuna[0]; | ||
390 | switch (bandwidth) { | 390 | switch (bandwidth) { |
391 | case BANDWIDTH_6_MHZ: | 391 | case BANDWIDTH_6_MHZ: |
392 | val[6] = 6; | 392 | if (state->dst_hw_cap & DST_TYPE_HAS_CA) |
393 | break; | 393 | state->tx_tuna[7] = 0x06; |
394 | else { | ||
395 | state->tx_tuna[6] = 0x06; | ||
396 | state->tx_tuna[7] = 0x00; | ||
397 | } | ||
398 | break; | ||
394 | 399 | ||
395 | case BANDWIDTH_7_MHZ: | 400 | case BANDWIDTH_7_MHZ: |
396 | val[6] = 7; | 401 | if (state->dst_hw_cap & DST_TYPE_HAS_CA) |
397 | break; | 402 | state->tx_tuna[7] = 0x07; |
403 | else { | ||
404 | state->tx_tuna[6] = 0x07; | ||
405 | state->tx_tuna[7] = 0x00; | ||
406 | } | ||
407 | break; | ||
398 | 408 | ||
399 | case BANDWIDTH_8_MHZ: | 409 | case BANDWIDTH_8_MHZ: |
400 | val[6] = 8; | 410 | if (state->dst_hw_cap & DST_TYPE_HAS_CA) |
401 | break; | 411 | state->tx_tuna[7] = 0x08; |
412 | else { | ||
413 | state->tx_tuna[6] = 0x08; | ||
414 | state->tx_tuna[7] = 0x00; | ||
415 | } | ||
416 | break; | ||
402 | 417 | ||
403 | default: | 418 | default: |
404 | return -EINVAL; | 419 | return -EINVAL; |
405 | } | 420 | } |
406 | return 0; | 421 | return 0; |
407 | } | 422 | } |
408 | 423 | ||
409 | static int dst_set_inversion(struct dst_state* state, fe_spectral_inversion_t inversion) | 424 | static int dst_set_inversion(struct dst_state* state, fe_spectral_inversion_t inversion) |
410 | { | 425 | { |
411 | u8 *val; | ||
412 | |||
413 | state->inversion = inversion; | 426 | state->inversion = inversion; |
414 | |||
415 | val = &state->tx_tuna[0]; | ||
416 | |||
417 | val[8] &= ~0x80; | ||
418 | |||
419 | switch (inversion) { | 427 | switch (inversion) { |
420 | case INVERSION_OFF: | 428 | case INVERSION_OFF: // Inversion = Normal |
421 | break; | 429 | state->tx_tuna[8] &= ~0x80; |
422 | case INVERSION_ON: | 430 | break; |
423 | val[8] |= 0x80; | 431 | |
424 | break; | 432 | case INVERSION_ON: |
425 | default: | 433 | state->tx_tuna[8] |= 0x80; |
426 | return -EINVAL; | 434 | break; |
435 | default: | ||
436 | return -EINVAL; | ||
427 | } | 437 | } |
428 | return 0; | 438 | return 0; |
429 | } | 439 | } |
@@ -478,6 +488,52 @@ static int dst_set_symbolrate(struct dst_state* state, u32 srate) | |||
478 | return 0; | 488 | return 0; |
479 | } | 489 | } |
480 | 490 | ||
491 | |||
492 | static int dst_set_modulation(struct dst_state *state, fe_modulation_t modulation) | ||
493 | { | ||
494 | if (state->dst_type != DST_TYPE_IS_CABLE) | ||
495 | return 0; | ||
496 | |||
497 | state->modulation = modulation; | ||
498 | switch (modulation) { | ||
499 | case QAM_16: | ||
500 | state->tx_tuna[8] = 0x10; | ||
501 | break; | ||
502 | |||
503 | case QAM_32: | ||
504 | state->tx_tuna[8] = 0x20; | ||
505 | break; | ||
506 | |||
507 | case QAM_64: | ||
508 | state->tx_tuna[8] = 0x40; | ||
509 | break; | ||
510 | |||
511 | case QAM_128: | ||
512 | state->tx_tuna[8] = 0x80; | ||
513 | break; | ||
514 | |||
515 | case QAM_256: | ||
516 | state->tx_tuna[8] = 0x00; | ||
517 | break; | ||
518 | |||
519 | case QPSK: | ||
520 | case QAM_AUTO: | ||
521 | case VSB_8: | ||
522 | case VSB_16: | ||
523 | default: | ||
524 | return -EINVAL; | ||
525 | |||
526 | } | ||
527 | |||
528 | return 0; | ||
529 | } | ||
530 | |||
531 | static fe_modulation_t dst_get_modulation(struct dst_state *state) | ||
532 | { | ||
533 | return state->modulation; | ||
534 | } | ||
535 | |||
536 | |||
481 | u8 dst_check_sum(u8 * buf, u32 len) | 537 | u8 dst_check_sum(u8 * buf, u32 len) |
482 | { | 538 | { |
483 | u32 i; | 539 | u32 i; |
@@ -577,7 +633,7 @@ struct dst_types dst_tlist[] = { | |||
577 | .device_id = "200103A", | 633 | .device_id = "200103A", |
578 | .offset = 0, | 634 | .offset = 0, |
579 | .dst_type = DST_TYPE_IS_SAT, | 635 | .dst_type = DST_TYPE_IS_SAT, |
580 | .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1, | 636 | .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS, |
581 | .dst_feature = 0 | 637 | .dst_feature = 0 |
582 | }, /* obsolete */ | 638 | }, /* obsolete */ |
583 | 639 | ||
@@ -626,7 +682,7 @@ struct dst_types dst_tlist[] = { | |||
626 | .device_id = "DSTMCI", | 682 | .device_id = "DSTMCI", |
627 | .offset = 1, | 683 | .offset = 1, |
628 | .dst_type = DST_TYPE_IS_SAT, | 684 | .dst_type = DST_TYPE_IS_SAT, |
629 | .type_flags = DST_TYPE_HAS_NEWTUNE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD, | 685 | .type_flags = DST_TYPE_HAS_NEWTUNE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT, |
630 | .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | 686 | .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 |
631 | | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC | 687 | | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC |
632 | }, | 688 | }, |
@@ -872,7 +928,7 @@ static int dst_get_signal(struct dst_state* state) | |||
872 | { | 928 | { |
873 | int retval; | 929 | int retval; |
874 | u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb }; | 930 | u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb }; |
875 | 931 | printk("%s: Getting Signal strength and other parameters !!!!!!!!\n", __FUNCTION__); | |
876 | if ((state->diseq_flags & ATTEMPT_TUNE) == 0) { | 932 | if ((state->diseq_flags & ATTEMPT_TUNE) == 0) { |
877 | state->decode_lock = state->decode_strength = state->decode_snr = 0; | 933 | state->decode_lock = state->decode_strength = state->decode_snr = 0; |
878 | return 0; | 934 | return 0; |
@@ -954,15 +1010,8 @@ static int dst_get_tuna(struct dst_state* state) | |||
954 | state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3]; | 1010 | state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3]; |
955 | 1011 | ||
956 | state->decode_lock = 1; | 1012 | state->decode_lock = 1; |
957 | /* | ||
958 | dst->decode_n1 = (dst->rx_tuna[4] << 8) + | ||
959 | (dst->rx_tuna[5]); | ||
960 | |||
961 | dst->decode_n2 = (dst->rx_tuna[8] << 8) + | ||
962 | (dst->rx_tuna[7]); | ||
963 | */ | ||
964 | state->diseq_flags |= HAS_LOCK; | 1013 | state->diseq_flags |= HAS_LOCK; |
965 | /* dst->cur_jiff = jiffies; */ | 1014 | |
966 | return 1; | 1015 | return 1; |
967 | } | 1016 | } |
968 | 1017 | ||
@@ -1098,7 +1147,11 @@ static int dst_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |||
1098 | 1147 | ||
1099 | switch (tone) { | 1148 | switch (tone) { |
1100 | case SEC_TONE_OFF: | 1149 | case SEC_TONE_OFF: |
1101 | state->tx_tuna[2] = 0xff; | 1150 | if (state->type_flags & DST_TYPE_HAS_OBS_REGS) |
1151 | state->tx_tuna[2] = 0x00; | ||
1152 | else | ||
1153 | state->tx_tuna[2] = 0xff; | ||
1154 | |||
1102 | break; | 1155 | break; |
1103 | 1156 | ||
1104 | case SEC_TONE_ON: | 1157 | case SEC_TONE_ON: |
@@ -1145,7 +1198,8 @@ static int dst_init(struct dvb_frontend* fe) | |||
1145 | static u8 ini_tvci_tuna[] = { 9, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; | 1198 | static u8 ini_tvci_tuna[] = { 9, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; |
1146 | static u8 ini_cabfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; | 1199 | static u8 ini_cabfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; |
1147 | static u8 ini_cabci_tuna[] = { 9, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; | 1200 | static u8 ini_cabci_tuna[] = { 9, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; |
1148 | state->inversion = INVERSION_ON; | 1201 | // state->inversion = INVERSION_ON; |
1202 | state->inversion = INVERSION_OFF; | ||
1149 | state->voltage = SEC_VOLTAGE_13; | 1203 | state->voltage = SEC_VOLTAGE_13; |
1150 | state->tone = SEC_TONE_OFF; | 1204 | state->tone = SEC_TONE_OFF; |
1151 | state->symbol_rate = 29473000; | 1205 | state->symbol_rate = 29473000; |
@@ -1174,7 +1228,7 @@ static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status) | |||
1174 | 1228 | ||
1175 | *status = 0; | 1229 | *status = 0; |
1176 | if (state->diseq_flags & HAS_LOCK) { | 1230 | if (state->diseq_flags & HAS_LOCK) { |
1177 | dst_get_signal(state); | 1231 | // dst_get_signal(state); // don't require(?) to ask MCU |
1178 | if (state->decode_lock) | 1232 | if (state->decode_lock) |
1179 | *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI; | 1233 | *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI; |
1180 | } | 1234 | } |
@@ -1208,20 +1262,25 @@ static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
1208 | 1262 | ||
1209 | dst_set_freq(state, p->frequency); | 1263 | dst_set_freq(state, p->frequency); |
1210 | if (verbose > 4) | 1264 | if (verbose > 4) |
1211 | dprintk("Set Frequency = [%d]\n", p->frequency); | 1265 | dprintk("Set Frequency=[%d]\n", p->frequency); |
1212 | 1266 | ||
1213 | dst_set_inversion(state, p->inversion); | 1267 | // dst_set_inversion(state, p->inversion); |
1214 | if (state->dst_type == DST_TYPE_IS_SAT) { | 1268 | if (state->dst_type == DST_TYPE_IS_SAT) { |
1269 | if (state->type_flags & DST_TYPE_HAS_OBS_REGS) | ||
1270 | dst_set_inversion(state, p->inversion); | ||
1271 | |||
1215 | dst_set_fec(state, p->u.qpsk.fec_inner); | 1272 | dst_set_fec(state, p->u.qpsk.fec_inner); |
1216 | dst_set_symbolrate(state, p->u.qpsk.symbol_rate); | 1273 | dst_set_symbolrate(state, p->u.qpsk.symbol_rate); |
1274 | dst_set_polarization(state); | ||
1217 | if (verbose > 4) | 1275 | if (verbose > 4) |
1218 | dprintk("Set Symbolrate = [%d]\n", p->u.qpsk.symbol_rate); | 1276 | dprintk("Set Symbolrate=[%d]\n", p->u.qpsk.symbol_rate); |
1219 | 1277 | ||
1220 | } else if (state->dst_type == DST_TYPE_IS_TERR) { | 1278 | } else if (state->dst_type == DST_TYPE_IS_TERR) { |
1221 | dst_set_bandwidth(state, p->u.ofdm.bandwidth); | 1279 | dst_set_bandwidth(state, p->u.ofdm.bandwidth); |
1222 | } else if (state->dst_type == DST_TYPE_IS_CABLE) { | 1280 | } else if (state->dst_type == DST_TYPE_IS_CABLE) { |
1223 | dst_set_fec(state, p->u.qam.fec_inner); | 1281 | dst_set_fec(state, p->u.qam.fec_inner); |
1224 | dst_set_symbolrate(state, p->u.qam.symbol_rate); | 1282 | dst_set_symbolrate(state, p->u.qam.symbol_rate); |
1283 | dst_set_modulation(state, p->u.qam.modulation); | ||
1225 | } | 1284 | } |
1226 | dst_write_tuna(fe); | 1285 | dst_write_tuna(fe); |
1227 | 1286 | ||
@@ -1233,8 +1292,11 @@ static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
1233 | struct dst_state* state = fe->demodulator_priv; | 1292 | struct dst_state* state = fe->demodulator_priv; |
1234 | 1293 | ||
1235 | p->frequency = state->decode_freq; | 1294 | p->frequency = state->decode_freq; |
1236 | p->inversion = state->inversion; | 1295 | // p->inversion = state->inversion; |
1237 | if (state->dst_type == DST_TYPE_IS_SAT) { | 1296 | if (state->dst_type == DST_TYPE_IS_SAT) { |
1297 | if (state->type_flags & DST_TYPE_HAS_OBS_REGS) | ||
1298 | p->inversion = state->inversion; | ||
1299 | |||
1238 | p->u.qpsk.symbol_rate = state->symbol_rate; | 1300 | p->u.qpsk.symbol_rate = state->symbol_rate; |
1239 | p->u.qpsk.fec_inner = dst_get_fec(state); | 1301 | p->u.qpsk.fec_inner = dst_get_fec(state); |
1240 | } else if (state->dst_type == DST_TYPE_IS_TERR) { | 1302 | } else if (state->dst_type == DST_TYPE_IS_TERR) { |
@@ -1242,7 +1304,8 @@ static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
1242 | } else if (state->dst_type == DST_TYPE_IS_CABLE) { | 1304 | } else if (state->dst_type == DST_TYPE_IS_CABLE) { |
1243 | p->u.qam.symbol_rate = state->symbol_rate; | 1305 | p->u.qam.symbol_rate = state->symbol_rate; |
1244 | p->u.qam.fec_inner = dst_get_fec(state); | 1306 | p->u.qam.fec_inner = dst_get_fec(state); |
1245 | p->u.qam.modulation = QAM_AUTO; | 1307 | // p->u.qam.modulation = QAM_AUTO; |
1308 | p->u.qam.modulation = dst_get_modulation(state); | ||
1246 | } | 1309 | } |
1247 | 1310 | ||
1248 | return 0; | 1311 | return 0; |
diff --git a/drivers/media/dvb/bt8xx/dst_ca.c b/drivers/media/dvb/bt8xx/dst_ca.c index d781504cc2fa..bfaacd5fc20f 100644 --- a/drivers/media/dvb/bt8xx/dst_ca.c +++ b/drivers/media/dvb/bt8xx/dst_ca.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include "dst_ca.h" | 32 | #include "dst_ca.h" |
33 | #include "dst_common.h" | 33 | #include "dst_common.h" |
34 | 34 | ||
35 | static unsigned int verbose = 1; | 35 | static unsigned int verbose = 5; |
36 | module_param(verbose, int, 0644); | 36 | module_param(verbose, int, 0644); |
37 | MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); | 37 | MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); |
38 | 38 | ||
@@ -295,34 +295,28 @@ static int ca_get_message(struct dst_state *state, struct ca_msg *p_ca_message, | |||
295 | return 0; | 295 | return 0; |
296 | } | 296 | } |
297 | 297 | ||
298 | static int handle_en50221_tag(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer) | 298 | static int handle_dst_tag(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer, u32 length) |
299 | { | 299 | { |
300 | if (state->dst_hw_cap & DST_TYPE_HAS_SESSION) { | 300 | if (state->dst_hw_cap & DST_TYPE_HAS_SESSION) { |
301 | hw_buffer->msg[2] = p_ca_message->msg[1]; /* MSB */ | 301 | hw_buffer->msg[2] = p_ca_message->msg[1]; /* MSB */ |
302 | hw_buffer->msg[3] = p_ca_message->msg[2]; /* LSB */ | 302 | hw_buffer->msg[3] = p_ca_message->msg[2]; /* LSB */ |
303 | } | 303 | } |
304 | else { | 304 | else { |
305 | hw_buffer->msg[0] = (length & 0xff) + 7; | ||
306 | hw_buffer->msg[1] = 0x40; | ||
305 | hw_buffer->msg[2] = 0x03; | 307 | hw_buffer->msg[2] = 0x03; |
306 | hw_buffer->msg[3] = 0x00; | 308 | hw_buffer->msg[3] = 0x00; |
309 | hw_buffer->msg[4] = 0x03; | ||
310 | hw_buffer->msg[5] = length & 0xff; | ||
311 | hw_buffer->msg[6] = 0x00; | ||
307 | } | 312 | } |
308 | return 0; | 313 | return 0; |
309 | } | 314 | } |
310 | 315 | ||
311 | static int debug_8820_buffer(struct ca_msg *hw_buffer) | ||
312 | { | ||
313 | unsigned int i; | ||
314 | |||
315 | dprintk("%s:Debug=[", __FUNCTION__); | ||
316 | for (i = 0; i < (hw_buffer->msg[0] + 1); i++) | ||
317 | dprintk(" %02x", hw_buffer->msg[i]); | ||
318 | dprintk("]\n"); | ||
319 | |||
320 | return 0; | ||
321 | } | ||
322 | 316 | ||
323 | static int write_to_8820(struct dst_state *state, struct ca_msg *hw_buffer, u8 reply) | 317 | static int write_to_8820(struct dst_state *state, struct ca_msg *hw_buffer, u8 length, u8 reply) |
324 | { | 318 | { |
325 | if ((dst_put_ci(state, hw_buffer->msg, (hw_buffer->length + 1), hw_buffer->msg, reply)) < 0) { | 319 | if ((dst_put_ci(state, hw_buffer->msg, length, hw_buffer->msg, reply)) < 0) { |
326 | dprintk("%s: DST-CI Command failed.\n", __FUNCTION__); | 320 | dprintk("%s: DST-CI Command failed.\n", __FUNCTION__); |
327 | dprintk("%s: Resetting DST.\n", __FUNCTION__); | 321 | dprintk("%s: Resetting DST.\n", __FUNCTION__); |
328 | rdc_reset_state(state); | 322 | rdc_reset_state(state); |
@@ -334,234 +328,141 @@ static int write_to_8820(struct dst_state *state, struct ca_msg *hw_buffer, u8 r | |||
334 | return 0; | 328 | return 0; |
335 | } | 329 | } |
336 | 330 | ||
337 | 331 | u32 asn_1_decode(u8 *asn_1_array) | |
338 | static int ca_set_pmt(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer, u8 reply, u8 query) | ||
339 | { | 332 | { |
340 | u32 hw_offset, buf_offset, i, k; | 333 | u8 length_field = 0, word_count = 0, count = 0; |
341 | u32 program_info_length = 0, es_info_length = 0, length = 0, words = 0; | 334 | u32 length = 0; |
342 | u8 found_prog_ca_desc = 0, found_stream_ca_desc = 0, error_condition = 0, hw_buffer_length = 0; | 335 | |
343 | 336 | length_field = asn_1_array[0]; | |
344 | if (verbose > 3) | 337 | dprintk("%s: Length field=[%02x]\n", __FUNCTION__, length_field); |
345 | dprintk("%s, p_ca_message length %d (0x%x)\n", __FUNCTION__,p_ca_message->length,p_ca_message->length ); | 338 | if (length_field < 0x80) { |
346 | 339 | length = length_field & 0x7f; | |
347 | handle_en50221_tag(state, p_ca_message, hw_buffer); /* EN50221 tag */ | 340 | dprintk("%s: Length=[%02x]\n", __FUNCTION__, length); |
348 | 341 | } else { | |
349 | /* Handle the length field (variable) */ | 342 | word_count = length_field & 0x7f; |
350 | if (!(p_ca_message->msg[3] & 0x80)) { /* Length = 1 */ | 343 | for (count = 0; count < word_count; count++) { |
351 | length = p_ca_message->msg[3] & 0x7f; | 344 | length = (length | asn_1_array[count + 1]) << 8; |
352 | words = 0; /* domi's suggestion */ | 345 | dprintk("%s: Length=[%04x]\n", __FUNCTION__, length); |
353 | } | ||
354 | else { /* Length = words */ | ||
355 | words = p_ca_message->msg[3] & 0x7f; | ||
356 | for (i = 0; i < words; i++) { | ||
357 | length = length << 8; | ||
358 | length = length | p_ca_message->msg[4 + i]; | ||
359 | } | 346 | } |
360 | } | 347 | } |
361 | if (verbose > 4) { | 348 | return length; |
362 | dprintk("%s:Length=[%d (0x%x)], Words=[%d]\n", __FUNCTION__, length,length, words); | 349 | } |
363 | |||
364 | /* Debug Input string */ | ||
365 | for (i = 0; i < length; i++) | ||
366 | dprintk(" %02x", p_ca_message->msg[i]); | ||
367 | dprintk("]\n"); | ||
368 | } | ||
369 | |||
370 | hw_offset = 7; | ||
371 | buf_offset = words + 4; | ||
372 | |||
373 | /* Program Header */ | ||
374 | if (verbose > 4) | ||
375 | dprintk("\n%s:Program Header=[", __FUNCTION__); | ||
376 | for (i = 0; i < 6; i++) { | ||
377 | hw_buffer->msg[hw_offset] = p_ca_message->msg[buf_offset]; | ||
378 | if (verbose > 4) | ||
379 | dprintk(" %02x", p_ca_message->msg[buf_offset]); | ||
380 | hw_offset++, buf_offset++, hw_buffer_length++; | ||
381 | } | ||
382 | if (verbose > 4) | ||
383 | dprintk("]\n"); | ||
384 | 350 | ||
385 | program_info_length = 0; | 351 | static int init_buffer(u8 *buffer, u32 length) |
386 | program_info_length = (((program_info_length | p_ca_message->msg[words + 8]) & 0x0f) << 8) | p_ca_message->msg[words + 9]; | 352 | { |
387 | if (verbose > 4) | 353 | u32 i; |
388 | dprintk("%s:Program info Length=[%d][%02x], hw_offset=[%d], buf_offset=[%d] \n", | 354 | for (i = 0; i < length; i++) |
389 | __FUNCTION__, program_info_length, program_info_length, hw_offset, buf_offset); | 355 | buffer[i] = 0; |
390 | 356 | ||
391 | if (program_info_length && (program_info_length < 256)) { /* If program_info_length */ | 357 | return 0; |
392 | hw_buffer->msg[11] = hw_buffer->msg[11] & 0x0f; /* req only 4 bits */ | 358 | } |
393 | hw_buffer->msg[12] = hw_buffer->msg[12] + 1; /* increment! ASIC bug! */ | ||
394 | 359 | ||
395 | if (p_ca_message->msg[buf_offset + 1] == 0x09) { /* Check CA descriptor */ | 360 | static int debug_string(u8 *msg, u32 length, u32 offset) |
396 | found_prog_ca_desc = 1; | 361 | { |
397 | if (verbose > 4) | 362 | u32 i; |
398 | dprintk("%s: Found CA descriptor @ Program level\n", __FUNCTION__); | ||
399 | } | ||
400 | 363 | ||
401 | if (found_prog_ca_desc) { /* Command only if CA descriptor */ | 364 | dprintk(" String=[ "); |
402 | hw_buffer->msg[13] = p_ca_message->msg[buf_offset]; /* CA PMT command ID */ | 365 | for (i = offset; i < length; i++) |
403 | hw_offset++, buf_offset++, hw_buffer_length++; | 366 | dprintk("%02x ", msg[i]); |
404 | } | 367 | dprintk("]\n"); |
405 | 368 | ||
406 | /* Program descriptors */ | 369 | return 0; |
407 | if (verbose > 4) { | 370 | } |
408 | dprintk("%s:**********>buf_offset=[%d], hw_offset=[%d]\n", __FUNCTION__, buf_offset, hw_offset); | ||
409 | dprintk("%s:Program descriptors=[", __FUNCTION__); | ||
410 | } | ||
411 | while (program_info_length && !error_condition) { /* Copy prog descriptors */ | ||
412 | if (program_info_length > p_ca_message->length) { /* Error situation */ | ||
413 | dprintk ("%s:\"WARNING\" Length error, line=[%d], prog_info_length=[%d]\n", | ||
414 | __FUNCTION__, __LINE__, program_info_length); | ||
415 | dprintk("%s:\"WARNING\" Bailing out of possible loop\n", __FUNCTION__); | ||
416 | error_condition = 1; | ||
417 | break; | ||
418 | } | ||
419 | 371 | ||
420 | hw_buffer->msg[hw_offset] = p_ca_message->msg[buf_offset]; | 372 | static int copy_string(u8 *destination, u8 *source, u32 dest_offset, u32 source_offset, u32 length) |
421 | dprintk(" %02x", p_ca_message->msg[buf_offset]); | 373 | { |
422 | hw_offset++, buf_offset++, hw_buffer_length++, program_info_length--; | 374 | u32 i; |
423 | } | 375 | dprintk("%s: Copying [", __FUNCTION__); |
424 | if (verbose > 4) { | 376 | for (i = 0; i < length; i++) { |
425 | dprintk("]\n"); | 377 | destination[i + dest_offset] = source[i + source_offset]; |
426 | dprintk("%s:**********>buf_offset=[%d], hw_offset=[%d]\n", __FUNCTION__, buf_offset, hw_offset); | 378 | dprintk(" %02x", source[i + source_offset]); |
427 | } | ||
428 | if (found_prog_ca_desc) { | ||
429 | if (!reply) { | ||
430 | hw_buffer->msg[13] = 0x01; /* OK descrambling */ | ||
431 | if (verbose > 1) | ||
432 | dprintk("CA PMT Command = OK Descrambling\n"); | ||
433 | } | ||
434 | else { | ||
435 | hw_buffer->msg[13] = 0x02; /* Ok MMI */ | ||
436 | if (verbose > 1) | ||
437 | dprintk("CA PMT Command = Ok MMI\n"); | ||
438 | } | ||
439 | if (query) { | ||
440 | hw_buffer->msg[13] = 0x03; /* Query */ | ||
441 | if (verbose > 1) | ||
442 | dprintk("CA PMT Command = CA PMT query\n"); | ||
443 | } | ||
444 | } | ||
445 | } | ||
446 | else { | ||
447 | hw_buffer->msg[11] = hw_buffer->msg[11] & 0xf0; /* Don't write to ASIC */ | ||
448 | hw_buffer->msg[12] = hw_buffer->msg[12] = 0x00; | ||
449 | } | 379 | } |
450 | if (verbose > 4) | 380 | dprintk("]\n"); |
451 | dprintk("%s:**********>p_ca_message->length=[%d], buf_offset=[%d], hw_offset=[%d]\n", | ||
452 | __FUNCTION__, p_ca_message->length, buf_offset, hw_offset); | ||
453 | |||
454 | while ((buf_offset < p_ca_message->length) && !error_condition) { | ||
455 | /* Bail out in case of an indefinite loop */ | ||
456 | if ((es_info_length > p_ca_message->length) || (buf_offset > p_ca_message->length)) { | ||
457 | dprintk("%s:\"WARNING\" Length error, line=[%d], prog_info_length=[%d], buf_offset=[%d]\n", | ||
458 | __FUNCTION__, __LINE__, program_info_length, buf_offset); | ||
459 | |||
460 | dprintk("%s:\"WARNING\" Bailing out of possible loop\n", __FUNCTION__); | ||
461 | error_condition = 1; | ||
462 | break; | ||
463 | } | ||
464 | |||
465 | /* Stream Header */ | ||
466 | |||
467 | for (k = 0; k < 5; k++) { | ||
468 | hw_buffer->msg[hw_offset + k] = p_ca_message->msg[buf_offset + k]; | ||
469 | } | ||
470 | 381 | ||
471 | es_info_length = 0; | 382 | return i; |
472 | es_info_length = (es_info_length | (p_ca_message->msg[buf_offset + 3] & 0x0f)) << 8 | p_ca_message->msg[buf_offset + 4]; | 383 | } |
473 | 384 | ||
474 | if (verbose > 4) { | 385 | static int modify_4_bits(u8 *message, u32 pos) |
475 | dprintk("\n%s:----->Stream header=[%02x %02x %02x %02x %02x]\n", __FUNCTION__, | 386 | { |
476 | p_ca_message->msg[buf_offset + 0], p_ca_message->msg[buf_offset + 1], | 387 | message[pos] &= 0x0f; |
477 | p_ca_message->msg[buf_offset + 2], p_ca_message->msg[buf_offset + 3], | ||
478 | p_ca_message->msg[buf_offset + 4]); | ||
479 | 388 | ||
480 | dprintk("%s:----->Stream type=[%02x], es length=[%d (0x%x)], Chars=[%02x] [%02x], buf_offset=[%d]\n", __FUNCTION__, | 389 | return 0; |
481 | p_ca_message->msg[buf_offset + 0], es_info_length, es_info_length, | 390 | } |
482 | p_ca_message->msg[buf_offset + 3], p_ca_message->msg[buf_offset + 4], buf_offset); | ||
483 | } | ||
484 | 391 | ||
485 | hw_buffer->msg[hw_offset + 3] &= 0x0f; /* req only 4 bits */ | ||
486 | 392 | ||
487 | if (found_prog_ca_desc) { | ||
488 | hw_buffer->msg[hw_offset + 3] = 0x00; | ||
489 | hw_buffer->msg[hw_offset + 4] = 0x00; | ||
490 | } | ||
491 | 393 | ||
492 | hw_offset += 5, buf_offset += 5, hw_buffer_length += 5; | 394 | static int ca_set_pmt(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer, u8 reply, u8 query) |
395 | { | ||
396 | u32 length = 0, count = 0; | ||
397 | u8 asn_1_words, program_header_length; | ||
398 | u16 program_info_length = 0, es_info_length = 0; | ||
399 | u32 hw_offset = 0, buf_offset = 0, i; | ||
400 | u8 dst_tag_length; | ||
493 | 401 | ||
494 | /* Check for CA descriptor */ | 402 | length = asn_1_decode(&p_ca_message->msg[3]); |
495 | if (p_ca_message->msg[buf_offset + 1] == 0x09) { | 403 | dprintk("%s: CA Message length=[%d]\n", __FUNCTION__, length); |
496 | if (verbose > 4) | 404 | dprintk("%s: ASN.1 ", __FUNCTION__); |
497 | dprintk("%s:Found CA descriptor @ Stream level\n", __FUNCTION__); | 405 | debug_string(&p_ca_message->msg[4], length, 0); // length does not include tag and length |
498 | found_stream_ca_desc = 1; | ||
499 | } | ||
500 | 406 | ||
501 | /* ES descriptors */ | 407 | init_buffer(hw_buffer->msg, length); |
502 | 408 | handle_dst_tag(state, p_ca_message, hw_buffer, length); | |
503 | if (es_info_length && !error_condition && !found_prog_ca_desc && found_stream_ca_desc) { | ||
504 | // if (!ca_pmt_done) { | ||
505 | hw_buffer->msg[hw_offset] = p_ca_message->msg[buf_offset]; /* CA PMT cmd(es) */ | ||
506 | if (verbose > 4) | ||
507 | printk("%s:----->CA PMT Command ID=[%02x]\n", __FUNCTION__, p_ca_message->msg[buf_offset]); | ||
508 | // hw_offset++, buf_offset++, hw_buffer_length++, es_info_length--, ca_pmt_done = 1; | ||
509 | hw_offset++, buf_offset++, hw_buffer_length++, es_info_length--; | ||
510 | // } | ||
511 | if (verbose > 4) | ||
512 | dprintk("%s:----->ES descriptors=[", __FUNCTION__); | ||
513 | |||
514 | while (es_info_length && !error_condition) { /* ES descriptors */ | ||
515 | if ((es_info_length > p_ca_message->length) || (buf_offset > p_ca_message->length)) { | ||
516 | if (verbose > 4) { | ||
517 | dprintk("%s:\"WARNING\" ES Length error, line=[%d], es_info_length=[%d], buf_offset=[%d]\n", | ||
518 | __FUNCTION__, __LINE__, es_info_length, buf_offset); | ||
519 | |||
520 | dprintk("%s:\"WARNING\" Bailing out of possible loop\n", __FUNCTION__); | ||
521 | } | ||
522 | error_condition = 1; | ||
523 | break; | ||
524 | } | ||
525 | 409 | ||
526 | hw_buffer->msg[hw_offset] = p_ca_message->msg[buf_offset]; | 410 | hw_offset = 7; |
527 | if (verbose > 3) | 411 | asn_1_words = 1; // just a hack to test, should compute this one |
528 | dprintk("%02x ", hw_buffer->msg[hw_offset]); | 412 | buf_offset = 3; |
529 | hw_offset++, buf_offset++, hw_buffer_length++, es_info_length--; | 413 | program_header_length = 6; |
530 | } | 414 | dst_tag_length = 7; |
531 | found_stream_ca_desc = 0; /* unset for new streams */ | 415 | |
532 | dprintk("]\n"); | 416 | // debug_twinhan_ca_params(state, p_ca_message, hw_buffer, reply, query, length, hw_offset, buf_offset); |
417 | // dprintk("%s: Program Header(BUF)", __FUNCTION__); | ||
418 | // debug_string(&p_ca_message->msg[4], program_header_length, 0); | ||
419 | // dprintk("%s: Copying Program header\n", __FUNCTION__); | ||
420 | copy_string(hw_buffer->msg, p_ca_message->msg, hw_offset, (buf_offset + asn_1_words), program_header_length); | ||
421 | buf_offset += program_header_length, hw_offset += program_header_length; | ||
422 | modify_4_bits(hw_buffer->msg, (hw_offset - 2)); | ||
423 | if (state->type_flags & DST_TYPE_HAS_INC_COUNT) { // workaround | ||
424 | dprintk("%s: Probably an ASIC bug !!!\n", __FUNCTION__); | ||
425 | debug_string(hw_buffer->msg, (hw_offset + program_header_length), 0); | ||
426 | hw_buffer->msg[hw_offset - 1] += 1; | ||
427 | } | ||
428 | |||
429 | // dprintk("%s: Program Header(HW), Count=[%d]", __FUNCTION__, count); | ||
430 | // debug_string(hw_buffer->msg, hw_offset, 0); | ||
431 | |||
432 | program_info_length = ((program_info_length | (p_ca_message->msg[buf_offset - 1] & 0x0f)) << 8) | p_ca_message->msg[buf_offset]; | ||
433 | dprintk("%s: Program info length=[%02x]\n", __FUNCTION__, program_info_length); | ||
434 | if (program_info_length) { | ||
435 | count = copy_string(hw_buffer->msg, p_ca_message->msg, hw_offset, (buf_offset + 1), (program_info_length + 1) ); // copy next elem, not current | ||
436 | buf_offset += count, hw_offset += count; | ||
437 | // dprintk("%s: Program level ", __FUNCTION__); | ||
438 | // debug_string(hw_buffer->msg, hw_offset, 0); | ||
439 | } | ||
440 | |||
441 | buf_offset += 1;// hw_offset += 1; | ||
442 | for (i = buf_offset; i < length; i++) { | ||
443 | // dprintk("%s: Stream Header ", __FUNCTION__); | ||
444 | count = copy_string(hw_buffer->msg, p_ca_message->msg, hw_offset, buf_offset, 5); | ||
445 | modify_4_bits(hw_buffer->msg, (hw_offset + 3)); | ||
446 | |||
447 | hw_offset += 5, buf_offset += 5, i += 4; | ||
448 | // debug_string(hw_buffer->msg, hw_offset, (hw_offset - 5)); | ||
449 | es_info_length = ((es_info_length | (p_ca_message->msg[buf_offset - 1] & 0x0f)) << 8) | p_ca_message->msg[buf_offset]; | ||
450 | dprintk("%s: ES info length=[%02x]\n", __FUNCTION__, es_info_length); | ||
451 | if (es_info_length) { | ||
452 | // copy descriptors @ STREAM level | ||
453 | dprintk("%s: Descriptors @ STREAM level...!!! \n", __FUNCTION__); | ||
533 | } | 454 | } |
534 | } | ||
535 | |||
536 | /* MCU Magic words */ | ||
537 | |||
538 | hw_buffer_length += 7; | ||
539 | hw_buffer->msg[0] = hw_buffer_length; | ||
540 | hw_buffer->msg[1] = 64; | ||
541 | hw_buffer->msg[4] = 3; | ||
542 | hw_buffer->msg[5] = hw_buffer->msg[0] - 7; | ||
543 | hw_buffer->msg[6] = 0; | ||
544 | |||
545 | 455 | ||
546 | /* Fix length */ | ||
547 | hw_buffer->length = hw_buffer->msg[0]; | ||
548 | |||
549 | put_checksum(&hw_buffer->msg[0], hw_buffer->msg[0]); | ||
550 | /* Do the actual write */ | ||
551 | if (verbose > 4) { | ||
552 | dprintk("%s:======================DEBUGGING================================\n", __FUNCTION__); | ||
553 | dprintk("%s: Actual Length=[%d]\n", __FUNCTION__, hw_buffer_length); | ||
554 | } | 456 | } |
555 | /* Only for debugging! */ | 457 | hw_buffer->msg[length + dst_tag_length] = dst_check_sum(hw_buffer->msg, (length + dst_tag_length)); |
556 | if (verbose > 2) | 458 | // dprintk("%s: Total length=[%d], Checksum=[%02x]\n", __FUNCTION__, (length + dst_tag_length), hw_buffer->msg[length + dst_tag_length]); |
557 | debug_8820_buffer(hw_buffer); | 459 | debug_string(hw_buffer->msg, (length + dst_tag_length + 1), 0); // dst tags also |
558 | if (verbose > 3) | 460 | write_to_8820(state, hw_buffer, (length + dst_tag_length + 1), reply); // checksum |
559 | dprintk("%s: Reply = [%d]\n", __FUNCTION__, reply); | ||
560 | write_to_8820(state, hw_buffer, reply); | ||
561 | 461 | ||
562 | return 0; | 462 | return 0; |
563 | } | 463 | } |
564 | 464 | ||
465 | |||
565 | /* Board supports CA PMT reply ? */ | 466 | /* Board supports CA PMT reply ? */ |
566 | static int dst_check_ca_pmt(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer) | 467 | static int dst_check_ca_pmt(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer) |
567 | { | 468 | { |
@@ -605,7 +506,7 @@ static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message, | |||
605 | struct ca_msg *hw_buffer; | 506 | struct ca_msg *hw_buffer; |
606 | 507 | ||
607 | if ((hw_buffer = (struct ca_msg *) kmalloc(sizeof (struct ca_msg), GFP_KERNEL)) == NULL) { | 508 | if ((hw_buffer = (struct ca_msg *) kmalloc(sizeof (struct ca_msg), GFP_KERNEL)) == NULL) { |
608 | printk("%s: Memory allocation failure\n", __FUNCTION__); | 509 | dprintk("%s: Memory allocation failure\n", __FUNCTION__); |
609 | return -ENOMEM; | 510 | return -ENOMEM; |
610 | } | 511 | } |
611 | if (verbose > 3) | 512 | if (verbose > 3) |
@@ -630,8 +531,10 @@ static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message, | |||
630 | switch (command) { | 531 | switch (command) { |
631 | case CA_PMT: | 532 | case CA_PMT: |
632 | if (verbose > 3) | 533 | if (verbose > 3) |
534 | // dprintk("Command = SEND_CA_PMT\n"); | ||
633 | dprintk("Command = SEND_CA_PMT\n"); | 535 | dprintk("Command = SEND_CA_PMT\n"); |
634 | if ((ca_set_pmt(state, p_ca_message, hw_buffer, 0, 0)) < 0) { | 536 | // if ((ca_set_pmt(state, p_ca_message, hw_buffer, 0, 0)) < 0) { |
537 | if ((ca_set_pmt(state, p_ca_message, hw_buffer, 0, 0)) < 0) { // code simplification started | ||
635 | dprintk("%s: -->CA_PMT Failed !\n", __FUNCTION__); | 538 | dprintk("%s: -->CA_PMT Failed !\n", __FUNCTION__); |
636 | return -1; | 539 | return -1; |
637 | } | 540 | } |
@@ -664,7 +567,7 @@ static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message, | |||
664 | return -1; | 567 | return -1; |
665 | } | 568 | } |
666 | if (verbose > 3) | 569 | if (verbose > 3) |
667 | printk("%s: -->CA_APP_INFO_ENQUIRY Success !\n", __FUNCTION__); | 570 | dprintk("%s: -->CA_APP_INFO_ENQUIRY Success !\n", __FUNCTION__); |
668 | 571 | ||
669 | break; | 572 | break; |
670 | } | 573 | } |
@@ -681,17 +584,17 @@ static int dst_ca_ioctl(struct inode *inode, struct file *file, unsigned int cmd | |||
681 | struct ca_msg *p_ca_message; | 584 | struct ca_msg *p_ca_message; |
682 | 585 | ||
683 | if ((p_ca_message = (struct ca_msg *) kmalloc(sizeof (struct ca_msg), GFP_KERNEL)) == NULL) { | 586 | if ((p_ca_message = (struct ca_msg *) kmalloc(sizeof (struct ca_msg), GFP_KERNEL)) == NULL) { |
684 | printk("%s: Memory allocation failure\n", __FUNCTION__); | 587 | dprintk("%s: Memory allocation failure\n", __FUNCTION__); |
685 | return -ENOMEM; | 588 | return -ENOMEM; |
686 | } | 589 | } |
687 | 590 | ||
688 | if ((p_ca_slot_info = (struct ca_slot_info *) kmalloc(sizeof (struct ca_slot_info), GFP_KERNEL)) == NULL) { | 591 | if ((p_ca_slot_info = (struct ca_slot_info *) kmalloc(sizeof (struct ca_slot_info), GFP_KERNEL)) == NULL) { |
689 | printk("%s: Memory allocation failure\n", __FUNCTION__); | 592 | dprintk("%s: Memory allocation failure\n", __FUNCTION__); |
690 | return -ENOMEM; | 593 | return -ENOMEM; |
691 | } | 594 | } |
692 | 595 | ||
693 | if ((p_ca_caps = (struct ca_caps *) kmalloc(sizeof (struct ca_caps), GFP_KERNEL)) == NULL) { | 596 | if ((p_ca_caps = (struct ca_caps *) kmalloc(sizeof (struct ca_caps), GFP_KERNEL)) == NULL) { |
694 | printk("%s: Memory allocation failure\n", __FUNCTION__); | 597 | dprintk("%s: Memory allocation failure\n", __FUNCTION__); |
695 | return -ENOMEM; | 598 | return -ENOMEM; |
696 | } | 599 | } |
697 | 600 | ||
diff --git a/drivers/media/dvb/bt8xx/dst_common.h b/drivers/media/dvb/bt8xx/dst_common.h index 0b3da29245fb..ef532a6aceaa 100644 --- a/drivers/media/dvb/bt8xx/dst_common.h +++ b/drivers/media/dvb/bt8xx/dst_common.h | |||
@@ -47,6 +47,8 @@ | |||
47 | #define DST_TYPE_HAS_FW_2 16 | 47 | #define DST_TYPE_HAS_FW_2 16 |
48 | #define DST_TYPE_HAS_FW_3 32 | 48 | #define DST_TYPE_HAS_FW_3 32 |
49 | #define DST_TYPE_HAS_FW_BUILD 64 | 49 | #define DST_TYPE_HAS_FW_BUILD 64 |
50 | #define DST_TYPE_HAS_OBS_REGS 128 | ||
51 | #define DST_TYPE_HAS_INC_COUNT 256 | ||
50 | 52 | ||
51 | /* Card capability list */ | 53 | /* Card capability list */ |
52 | 54 | ||
@@ -110,6 +112,7 @@ struct dst_state { | |||
110 | u32 dst_hw_cap; | 112 | u32 dst_hw_cap; |
111 | u8 dst_fw_version; | 113 | u8 dst_fw_version; |
112 | fe_sec_mini_cmd_t minicmd; | 114 | fe_sec_mini_cmd_t minicmd; |
115 | fe_modulation_t modulation; | ||
113 | u8 messages[256]; | 116 | u8 messages[256]; |
114 | }; | 117 | }; |
115 | 118 | ||
diff --git a/drivers/media/dvb/cinergyT2/cinergyT2.c b/drivers/media/dvb/cinergyT2/cinergyT2.c index 96c57fde95a0..7d8b3cad350b 100644 --- a/drivers/media/dvb/cinergyT2/cinergyT2.c +++ b/drivers/media/dvb/cinergyT2/cinergyT2.c | |||
@@ -699,6 +699,8 @@ static void cinergyt2_query_rc (void *data) | |||
699 | for (n=0; len>0 && n<(len/sizeof(rc_events[0])); n++) { | 699 | for (n=0; len>0 && n<(len/sizeof(rc_events[0])); n++) { |
700 | int i; | 700 | int i; |
701 | 701 | ||
702 | /* dprintk(1,"rc_events[%d].value = %x, type=%x\n",n,le32_to_cpu(rc_events[n].value),rc_events[n].type);*/ | ||
703 | |||
702 | if (rc_events[n].type == CINERGYT2_RC_EVENT_TYPE_NEC && | 704 | if (rc_events[n].type == CINERGYT2_RC_EVENT_TYPE_NEC && |
703 | rc_events[n].value == ~0) | 705 | rc_events[n].value == ~0) |
704 | { | 706 | { |
@@ -714,7 +716,7 @@ static void cinergyt2_query_rc (void *data) | |||
714 | cinergyt2->rc_input_event = KEY_MAX; | 716 | cinergyt2->rc_input_event = KEY_MAX; |
715 | for (i=0; i<sizeof(rc_keys)/sizeof(rc_keys[0]); i+=3) { | 717 | for (i=0; i<sizeof(rc_keys)/sizeof(rc_keys[0]); i+=3) { |
716 | if (rc_keys[i+0] == rc_events[n].type && | 718 | if (rc_keys[i+0] == rc_events[n].type && |
717 | rc_keys[i+1] == rc_events[n].value) | 719 | rc_keys[i+1] == le32_to_cpu(rc_events[n].value)) |
718 | { | 720 | { |
719 | cinergyt2->rc_input_event = rc_keys[i+2]; | 721 | cinergyt2->rc_input_event = rc_keys[i+2]; |
720 | break; | 722 | break; |
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c index c225de7ffd82..68050cd527cb 100644 --- a/drivers/media/dvb/dvb-core/dmxdev.c +++ b/drivers/media/dvb/dvb-core/dmxdev.c | |||
@@ -42,12 +42,6 @@ MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | |||
42 | 42 | ||
43 | #define dprintk if (debug) printk | 43 | #define dprintk if (debug) printk |
44 | 44 | ||
45 | static inline struct dmxdev_filter * | ||
46 | dvb_dmxdev_file_to_filter(struct file *file) | ||
47 | { | ||
48 | return (struct dmxdev_filter *) file->private_data; | ||
49 | } | ||
50 | |||
51 | static inline void dvb_dmxdev_buffer_init(struct dmxdev_buffer *buffer) | 45 | static inline void dvb_dmxdev_buffer_init(struct dmxdev_buffer *buffer) |
52 | { | 46 | { |
53 | buffer->data=NULL; | 47 | buffer->data=NULL; |
@@ -669,8 +663,10 @@ static int dvb_dmxdev_filter_start(struct dmxdev_filter *filter) | |||
669 | 663 | ||
670 | ret = filter->feed.ts->start_filtering(filter->feed.ts); | 664 | ret = filter->feed.ts->start_filtering(filter->feed.ts); |
671 | 665 | ||
672 | if (ret < 0) | 666 | if (ret < 0) { |
667 | dmxdev->demux->release_ts_feed(dmxdev->demux, *tsfeed); | ||
673 | return ret; | 668 | return ret; |
669 | } | ||
674 | 670 | ||
675 | break; | 671 | break; |
676 | } | 672 | } |
@@ -842,7 +838,7 @@ static ssize_t dvb_dmxdev_read_sec(struct dmxdev_filter *dfil, | |||
842 | static ssize_t | 838 | static ssize_t |
843 | dvb_demux_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | 839 | dvb_demux_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) |
844 | { | 840 | { |
845 | struct dmxdev_filter *dmxdevfilter=dvb_dmxdev_file_to_filter(file); | 841 | struct dmxdev_filter *dmxdevfilter= file->private_data; |
846 | int ret=0; | 842 | int ret=0; |
847 | 843 | ||
848 | if (down_interruptible(&dmxdevfilter->mutex)) | 844 | if (down_interruptible(&dmxdevfilter->mutex)) |
@@ -863,7 +859,7 @@ dvb_demux_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |||
863 | static int dvb_demux_do_ioctl(struct inode *inode, struct file *file, | 859 | static int dvb_demux_do_ioctl(struct inode *inode, struct file *file, |
864 | unsigned int cmd, void *parg) | 860 | unsigned int cmd, void *parg) |
865 | { | 861 | { |
866 | struct dmxdev_filter *dmxdevfilter=dvb_dmxdev_file_to_filter(file); | 862 | struct dmxdev_filter *dmxdevfilter = file->private_data; |
867 | struct dmxdev *dmxdev=dmxdevfilter->dev; | 863 | struct dmxdev *dmxdev=dmxdevfilter->dev; |
868 | unsigned long arg=(unsigned long) parg; | 864 | unsigned long arg=(unsigned long) parg; |
869 | int ret=0; | 865 | int ret=0; |
@@ -960,7 +956,7 @@ static int dvb_demux_ioctl(struct inode *inode, struct file *file, | |||
960 | 956 | ||
961 | static unsigned int dvb_demux_poll (struct file *file, poll_table *wait) | 957 | static unsigned int dvb_demux_poll (struct file *file, poll_table *wait) |
962 | { | 958 | { |
963 | struct dmxdev_filter *dmxdevfilter = dvb_dmxdev_file_to_filter(file); | 959 | struct dmxdev_filter *dmxdevfilter = file->private_data; |
964 | unsigned int mask = 0; | 960 | unsigned int mask = 0; |
965 | 961 | ||
966 | if (!dmxdevfilter) | 962 | if (!dmxdevfilter) |
@@ -985,7 +981,7 @@ static unsigned int dvb_demux_poll (struct file *file, poll_table *wait) | |||
985 | 981 | ||
986 | static int dvb_demux_release(struct inode *inode, struct file *file) | 982 | static int dvb_demux_release(struct inode *inode, struct file *file) |
987 | { | 983 | { |
988 | struct dmxdev_filter *dmxdevfilter = dvb_dmxdev_file_to_filter(file); | 984 | struct dmxdev_filter *dmxdevfilter = file->private_data; |
989 | struct dmxdev *dmxdev = dmxdevfilter->dev; | 985 | struct dmxdev *dmxdev = dmxdevfilter->dev; |
990 | 986 | ||
991 | return dvb_dmxdev_filter_free(dmxdev, dmxdevfilter); | 987 | return dvb_dmxdev_filter_free(dmxdev, dmxdevfilter); |
@@ -1109,7 +1105,6 @@ dvb_dmxdev_init(struct dmxdev *dmxdev, struct dvb_adapter *dvb_adapter) | |||
1109 | dvb_dmxdev_filter_state_set(&dmxdev->filter[i], DMXDEV_STATE_FREE); | 1105 | dvb_dmxdev_filter_state_set(&dmxdev->filter[i], DMXDEV_STATE_FREE); |
1110 | dmxdev->dvr[i].dev=dmxdev; | 1106 | dmxdev->dvr[i].dev=dmxdev; |
1111 | dmxdev->dvr[i].buffer.data=NULL; | 1107 | dmxdev->dvr[i].buffer.data=NULL; |
1112 | dvb_dmxdev_filter_state_set(&dmxdev->filter[i], DMXDEV_STATE_FREE); | ||
1113 | dvb_dmxdev_dvr_state_set(&dmxdev->dvr[i], DMXDEV_STATE_FREE); | 1108 | dvb_dmxdev_dvr_state_set(&dmxdev->dvr[i], DMXDEV_STATE_FREE); |
1114 | } | 1109 | } |
1115 | 1110 | ||
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c index f11daae91cd4..a8bc84240b50 100644 --- a/drivers/media/dvb/dvb-core/dvb_frontend.c +++ b/drivers/media/dvb/dvb-core/dvb_frontend.c | |||
@@ -42,6 +42,8 @@ | |||
42 | #include "dvb_frontend.h" | 42 | #include "dvb_frontend.h" |
43 | #include "dvbdev.h" | 43 | #include "dvbdev.h" |
44 | 44 | ||
45 | // #define DEBUG_LOCKLOSS 1 | ||
46 | |||
45 | static int dvb_frontend_debug; | 47 | static int dvb_frontend_debug; |
46 | static int dvb_shutdown_timeout = 5; | 48 | static int dvb_shutdown_timeout = 5; |
47 | static int dvb_force_auto_inversion; | 49 | static int dvb_force_auto_inversion; |
@@ -113,6 +115,7 @@ struct dvb_frontend_private { | |||
113 | int exit; | 115 | int exit; |
114 | int wakeup; | 116 | int wakeup; |
115 | fe_status_t status; | 117 | fe_status_t status; |
118 | fe_sec_tone_mode_t tone; | ||
116 | }; | 119 | }; |
117 | 120 | ||
118 | 121 | ||
@@ -434,9 +437,26 @@ static int dvb_frontend_thread(void *data) | |||
434 | /* we're tuned, and the lock is still good... */ | 437 | /* we're tuned, and the lock is still good... */ |
435 | if (s & FE_HAS_LOCK) | 438 | if (s & FE_HAS_LOCK) |
436 | continue; | 439 | continue; |
437 | else { | 440 | else { /* if we _WERE_ tuned, but now don't have a lock */ |
438 | /* if we _WERE_ tuned, but now don't have a lock, | 441 | #ifdef DEBUG_LOCKLOSS |
439 | * need to zigzag */ | 442 | /* first of all try setting the tone again if it was on - this |
443 | * sometimes works around problems with noisy power supplies */ | ||
444 | if (fe->ops->set_tone && (fepriv->tone == SEC_TONE_ON)) { | ||
445 | fe->ops->set_tone(fe, fepriv->tone); | ||
446 | mdelay(100); | ||
447 | s = 0; | ||
448 | fe->ops->read_status(fe, &s); | ||
449 | if (s & FE_HAS_LOCK) { | ||
450 | printk("DVB%i: Lock was lost, but regained by setting " | ||
451 | "the tone. This may indicate your power supply " | ||
452 | "is noisy/slightly incompatable with this DVB-S " | ||
453 | "adapter\n", fe->dvb->num); | ||
454 | fepriv->state = FESTATE_TUNED; | ||
455 | continue; | ||
456 | } | ||
457 | } | ||
458 | #endif | ||
459 | /* some other reason for losing the lock - start zigzagging */ | ||
440 | fepriv->state = FESTATE_ZIGZAG_FAST; | 460 | fepriv->state = FESTATE_ZIGZAG_FAST; |
441 | fepriv->started_auto_step = fepriv->auto_step; | 461 | fepriv->started_auto_step = fepriv->auto_step; |
442 | check_wrapped = 0; | 462 | check_wrapped = 0; |
@@ -626,11 +646,21 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file, | |||
626 | break; | 646 | break; |
627 | } | 647 | } |
628 | 648 | ||
629 | case FE_READ_STATUS: | 649 | case FE_READ_STATUS: { |
650 | fe_status_t* status = parg; | ||
651 | |||
652 | /* if retune was requested but hasn't occured yet, prevent | ||
653 | * that user get signal state from previous tuning */ | ||
654 | if(fepriv->state == FESTATE_RETUNE) { | ||
655 | err=0; | ||
656 | *status = 0; | ||
657 | break; | ||
658 | } | ||
659 | |||
630 | if (fe->ops->read_status) | 660 | if (fe->ops->read_status) |
631 | err = fe->ops->read_status(fe, (fe_status_t*) parg); | 661 | err = fe->ops->read_status(fe, status); |
632 | break; | 662 | break; |
633 | 663 | } | |
634 | case FE_READ_BER: | 664 | case FE_READ_BER: |
635 | if (fe->ops->read_ber) | 665 | if (fe->ops->read_ber) |
636 | err = fe->ops->read_ber(fe, (__u32*) parg); | 666 | err = fe->ops->read_ber(fe, (__u32*) parg); |
@@ -681,6 +711,7 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file, | |||
681 | err = fe->ops->set_tone(fe, (fe_sec_tone_mode_t) parg); | 711 | err = fe->ops->set_tone(fe, (fe_sec_tone_mode_t) parg); |
682 | fepriv->state = FESTATE_DISEQC; | 712 | fepriv->state = FESTATE_DISEQC; |
683 | fepriv->status = 0; | 713 | fepriv->status = 0; |
714 | fepriv->tone = (fe_sec_tone_mode_t) parg; | ||
684 | } | 715 | } |
685 | break; | 716 | break; |
686 | 717 | ||
@@ -883,6 +914,7 @@ int dvb_register_frontend(struct dvb_adapter* dvb, | |||
883 | init_MUTEX (&fepriv->events.sem); | 914 | init_MUTEX (&fepriv->events.sem); |
884 | fe->dvb = dvb; | 915 | fe->dvb = dvb; |
885 | fepriv->inversion = INVERSION_OFF; | 916 | fepriv->inversion = INVERSION_OFF; |
917 | fepriv->tone = SEC_TONE_OFF; | ||
886 | 918 | ||
887 | printk ("DVB: registering frontend %i (%s)...\n", | 919 | printk ("DVB: registering frontend %i (%s)...\n", |
888 | fe->dvb->num, | 920 | fe->dvb->num, |
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h index d2b021792791..9c2c1d1136bd 100644 --- a/drivers/media/dvb/dvb-core/dvb_frontend.h +++ b/drivers/media/dvb/dvb-core/dvb_frontend.h | |||
@@ -40,28 +40,6 @@ | |||
40 | 40 | ||
41 | #include "dvbdev.h" | 41 | #include "dvbdev.h" |
42 | 42 | ||
43 | /* FIXME: Move to i2c-id.h */ | ||
44 | #define I2C_DRIVERID_DVBFE_SP8870 I2C_DRIVERID_EXP2 | ||
45 | #define I2C_DRIVERID_DVBFE_CX22700 I2C_DRIVERID_EXP2 | ||
46 | #define I2C_DRIVERID_DVBFE_AT76C651 I2C_DRIVERID_EXP2 | ||
47 | #define I2C_DRIVERID_DVBFE_CX24110 I2C_DRIVERID_EXP2 | ||
48 | #define I2C_DRIVERID_DVBFE_CX22702 I2C_DRIVERID_EXP2 | ||
49 | #define I2C_DRIVERID_DVBFE_DIB3000MB I2C_DRIVERID_EXP2 | ||
50 | #define I2C_DRIVERID_DVBFE_DST I2C_DRIVERID_EXP2 | ||
51 | #define I2C_DRIVERID_DVBFE_DUMMY I2C_DRIVERID_EXP2 | ||
52 | #define I2C_DRIVERID_DVBFE_L64781 I2C_DRIVERID_EXP2 | ||
53 | #define I2C_DRIVERID_DVBFE_MT312 I2C_DRIVERID_EXP2 | ||
54 | #define I2C_DRIVERID_DVBFE_MT352 I2C_DRIVERID_EXP2 | ||
55 | #define I2C_DRIVERID_DVBFE_NXT6000 I2C_DRIVERID_EXP2 | ||
56 | #define I2C_DRIVERID_DVBFE_SP887X I2C_DRIVERID_EXP2 | ||
57 | #define I2C_DRIVERID_DVBFE_STV0299 I2C_DRIVERID_EXP2 | ||
58 | #define I2C_DRIVERID_DVBFE_TDA1004X I2C_DRIVERID_EXP2 | ||
59 | #define I2C_DRIVERID_DVBFE_TDA8083 I2C_DRIVERID_EXP2 | ||
60 | #define I2C_DRIVERID_DVBFE_VES1820 I2C_DRIVERID_EXP2 | ||
61 | #define I2C_DRIVERID_DVBFE_VES1X93 I2C_DRIVERID_EXP2 | ||
62 | #define I2C_DRIVERID_DVBFE_TDA80XX I2C_DRIVERID_EXP2 | ||
63 | |||
64 | |||
65 | struct dvb_frontend_tune_settings { | 43 | struct dvb_frontend_tune_settings { |
66 | int min_delay_ms; | 44 | int min_delay_ms; |
67 | int step_size; | 45 | int step_size; |
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig index 8aa32f6e447b..612e5b087b1c 100644 --- a/drivers/media/dvb/dvb-usb/Kconfig +++ b/drivers/media/dvb/dvb-usb/Kconfig | |||
@@ -3,30 +3,35 @@ config DVB_USB | |||
3 | depends on DVB_CORE && USB | 3 | depends on DVB_CORE && USB |
4 | select FW_LOADER | 4 | select FW_LOADER |
5 | help | 5 | help |
6 | By enabling this you will be able to choose the various USB 1.1 and | 6 | By enabling this you will be able to choose the various supported |
7 | USB2.0 DVB devices. | 7 | USB1.1 and USB2.0 DVB devices. |
8 | 8 | ||
9 | Almost every USB device needs a firmware, please look into | 9 | Almost every USB device needs a firmware, please look into |
10 | <file:Documentation/dvb/README.dvb-usb> | 10 | <file:Documentation/dvb/README.dvb-usb>. |
11 | 11 | ||
12 | Say Y if you own an USB DVB device. | 12 | For a complete list of supported USB devices see the LinuxTV DVB Wiki: |
13 | <http://www.linuxtv.org/wiki/index.php/DVB_USB> | ||
14 | |||
15 | Say Y if you own a USB DVB device. | ||
13 | 16 | ||
14 | config DVB_USB_DEBUG | 17 | config DVB_USB_DEBUG |
15 | bool "Enable extended debug support for all DVB-USB devices" | 18 | bool "Enable extended debug support for all DVB-USB devices" |
16 | depends on DVB_USB | 19 | depends on DVB_USB |
17 | help | 20 | help |
18 | Say Y if you want to enable debuging. See modinfo dvb-usb (and the | 21 | Say Y if you want to enable debugging. See modinfo dvb-usb (and the |
19 | appropriate drivers) for debug levels. | 22 | appropriate drivers) for debug levels. |
20 | 23 | ||
21 | config DVB_USB_A800 | 24 | config DVB_USB_A800 |
22 | tristate "AVerMedia AverTV DVB-T USB 2.0 (A800)" | 25 | tristate "AVerMedia AverTV DVB-T USB 2.0 (A800)" |
23 | depends on DVB_USB | 26 | depends on DVB_USB |
27 | select DVB_DIB3000MC | ||
24 | help | 28 | help |
25 | Say Y here to support the AVerMedia AverTV DVB-T USB 2.0 (A800) receiver. | 29 | Say Y here to support the AVerMedia AverTV DVB-T USB 2.0 (A800) receiver. |
26 | 30 | ||
27 | config DVB_USB_DIBUSB_MB | 31 | config DVB_USB_DIBUSB_MB |
28 | tristate "DiBcom USB DVB-T devices (based on the DiB3000M-B) (see help for device list)" | 32 | tristate "DiBcom USB DVB-T devices (based on the DiB3000M-B) (see help for device list)" |
29 | depends on DVB_USB | 33 | depends on DVB_USB |
34 | select DVB_DIB3000MB | ||
30 | help | 35 | help |
31 | Support for USB 1.1 and 2.0 DVB-T receivers based on reference designs made by | 36 | Support for USB 1.1 and 2.0 DVB-T receivers based on reference designs made by |
32 | DiBcom (<http://www.dibcom.fr>) equipped with a DiB3000M-B demodulator. | 37 | DiBcom (<http://www.dibcom.fr>) equipped with a DiB3000M-B demodulator. |
@@ -52,6 +57,7 @@ config DVB_USB_DIBUSB_MB | |||
52 | config DVB_USB_DIBUSB_MC | 57 | config DVB_USB_DIBUSB_MC |
53 | tristate "DiBcom USB DVB-T devices (based on the DiB3000M-C/P) (see help for device list)" | 58 | tristate "DiBcom USB DVB-T devices (based on the DiB3000M-C/P) (see help for device list)" |
54 | depends on DVB_USB | 59 | depends on DVB_USB |
60 | select DVB_DIB3000MC | ||
55 | help | 61 | help |
56 | Support for 2.0 DVB-T receivers based on reference designs made by | 62 | Support for 2.0 DVB-T receivers based on reference designs made by |
57 | DiBcom (<http://www.dibcom.fr>) equipped with a DiB3000M-C/P demodulator. | 63 | DiBcom (<http://www.dibcom.fr>) equipped with a DiB3000M-C/P demodulator. |
@@ -66,12 +72,23 @@ config DVB_USB_DIBUSB_MC | |||
66 | config DVB_USB_UMT_010 | 72 | config DVB_USB_UMT_010 |
67 | tristate "HanfTek UMT-010 DVB-T USB2.0 support" | 73 | tristate "HanfTek UMT-010 DVB-T USB2.0 support" |
68 | depends on DVB_USB | 74 | depends on DVB_USB |
75 | select DVB_DIB3000MC | ||
69 | help | 76 | help |
70 | Say Y here to support the HanfTek UMT-010 USB2.0 stick-sized DVB-T receiver. | 77 | Say Y here to support the HanfTek UMT-010 USB2.0 stick-sized DVB-T receiver. |
71 | 78 | ||
79 | config DVB_USB_CXUSB | ||
80 | tristate "Medion MD95700 hybrid USB2.0 (Conexant) support" | ||
81 | depends on DVB_USB | ||
82 | select DVB_CX22702 | ||
83 | help | ||
84 | Say Y here to support the Medion MD95700 hybrid USB2.0 device. Currently | ||
85 | only the DVB-T part is supported. | ||
86 | |||
72 | config DVB_USB_DIGITV | 87 | config DVB_USB_DIGITV |
73 | tristate "Nebula Electronics uDigiTV DVB-T USB2.0 support" | 88 | tristate "Nebula Electronics uDigiTV DVB-T USB2.0 support" |
74 | depends on DVB_USB | 89 | depends on DVB_USB |
90 | select DVB_NXT6000 | ||
91 | select DVB_MT352 | ||
75 | help | 92 | help |
76 | Say Y here to support the Nebula Electronics uDigitV USB2.0 DVB-T receiver. | 93 | Say Y here to support the Nebula Electronics uDigitV USB2.0 DVB-T receiver. |
77 | 94 | ||
@@ -87,13 +104,16 @@ config DVB_USB_VP7045 | |||
87 | config DVB_USB_NOVA_T_USB2 | 104 | config DVB_USB_NOVA_T_USB2 |
88 | tristate "Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 support" | 105 | tristate "Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 support" |
89 | depends on DVB_USB | 106 | depends on DVB_USB |
107 | select DVB_DIB3000MC | ||
90 | help | 108 | help |
91 | Say Y here to support the Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 receiver. | 109 | Say Y here to support the Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 receiver. |
92 | 110 | ||
93 | config DVB_USB_DTT200U | 111 | config DVB_USB_DTT200U |
94 | tristate "Yakumo/Hama/Typhoon/Yuan DVB-T USB2.0 support" | 112 | tristate "WideView WT-200U and WT-220U (pen) DVB-T USB2.0 support (Yakumo/Hama/Typhoon/Yuan)" |
95 | depends on DVB_USB | 113 | depends on DVB_USB |
96 | help | 114 | help |
97 | Say Y here to support the Yakumo/Hama/Typhoon/Yuan DVB-T USB2.0 receiver. | 115 | Say Y here to support the WideView/Yakumo/Hama/Typhoon/Yuan DVB-T USB2.0 receiver. |
98 | 116 | ||
99 | The receivers are also known as DTT200U (Yakumo) and UB300 (Yuan). | 117 | The receivers are also known as DTT200U (Yakumo) and UB300 (Yuan). |
118 | |||
119 | The WT-220U and its clones are pen-sized. | ||
diff --git a/drivers/media/dvb/dvb-usb/Makefile b/drivers/media/dvb/dvb-usb/Makefile index d65b50f9abb0..746d87ed6f32 100644 --- a/drivers/media/dvb/dvb-usb/Makefile +++ b/drivers/media/dvb/dvb-usb/Makefile | |||
@@ -27,4 +27,7 @@ obj-$(CONFIG_DVB_USB_UMT_010) += dvb-usb-dibusb-common.o dvb-usb-umt-010.o | |||
27 | dvb-usb-digitv-objs = digitv.o | 27 | dvb-usb-digitv-objs = digitv.o |
28 | obj-$(CONFIG_DVB_USB_DIGITV) += dvb-usb-digitv.o | 28 | obj-$(CONFIG_DVB_USB_DIGITV) += dvb-usb-digitv.o |
29 | 29 | ||
30 | dvb-usb-cxusb-objs = cxusb.o | ||
31 | obj-$(CONFIG_DVB_USB_CXUSB) += dvb-usb-cxusb.o | ||
32 | |||
30 | EXTRA_CFLAGS = -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/ | 33 | EXTRA_CFLAGS = -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/ |
diff --git a/drivers/media/dvb/dvb-usb/a800.c b/drivers/media/dvb/dvb-usb/a800.c index a3542935604f..f2fcc2f1f846 100644 --- a/drivers/media/dvb/dvb-usb/a800.c +++ b/drivers/media/dvb/dvb-usb/a800.c | |||
@@ -61,6 +61,12 @@ static struct dvb_usb_rc_key a800_rc_keys[] = { | |||
61 | { 0x02, 0x00, KEY_LAST }, /* >>| / BLUE */ | 61 | { 0x02, 0x00, KEY_LAST }, /* >>| / BLUE */ |
62 | { 0x02, 0x04, KEY_EPG }, /* EPG */ | 62 | { 0x02, 0x04, KEY_EPG }, /* EPG */ |
63 | { 0x02, 0x15, KEY_MENU }, /* MENU */ | 63 | { 0x02, 0x15, KEY_MENU }, /* MENU */ |
64 | |||
65 | { 0x03, 0x03, KEY_CHANNELUP }, /* CH UP */ | ||
66 | { 0x03, 0x02, KEY_CHANNELDOWN }, /* CH DOWN */ | ||
67 | { 0x03, 0x01, KEY_FIRST }, /* |<< / GREEN */ | ||
68 | { 0x03, 0x00, KEY_LAST }, /* >>| / BLUE */ | ||
69 | |||
64 | }; | 70 | }; |
65 | 71 | ||
66 | int a800_rc_query(struct dvb_usb_device *d, u32 *event, int *state) | 72 | int a800_rc_query(struct dvb_usb_device *d, u32 *event, int *state) |
@@ -68,7 +74,7 @@ int a800_rc_query(struct dvb_usb_device *d, u32 *event, int *state) | |||
68 | u8 key[5]; | 74 | u8 key[5]; |
69 | if (usb_control_msg(d->udev,usb_rcvctrlpipe(d->udev,0), | 75 | if (usb_control_msg(d->udev,usb_rcvctrlpipe(d->udev,0), |
70 | 0x04, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, key, 5, | 76 | 0x04, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, key, 5, |
71 | 2*HZ) != 5) | 77 | 2000) != 5) |
72 | return -ENODEV; | 78 | return -ENODEV; |
73 | 79 | ||
74 | /* call the universal NEC remote processor, to find out the key's state and event */ | 80 | /* call the universal NEC remote processor, to find out the key's state and event */ |
@@ -143,7 +149,7 @@ static struct dvb_usb_properties a800_properties = { | |||
143 | 149 | ||
144 | static struct usb_driver a800_driver = { | 150 | static struct usb_driver a800_driver = { |
145 | .owner = THIS_MODULE, | 151 | .owner = THIS_MODULE, |
146 | .name = "AVerMedia AverTV DVB-T USB 2.0 (A800)", | 152 | .name = "dvb_usb_a800", |
147 | .probe = a800_probe, | 153 | .probe = a800_probe, |
148 | .disconnect = dvb_usb_device_exit, | 154 | .disconnect = dvb_usb_device_exit, |
149 | .id_table = a800_table, | 155 | .id_table = a800_table, |
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c new file mode 100644 index 000000000000..c3e1b661aae6 --- /dev/null +++ b/drivers/media/dvb/dvb-usb/cxusb.c | |||
@@ -0,0 +1,295 @@ | |||
1 | /* DVB USB compliant linux driver for Conexant USB reference design. | ||
2 | * | ||
3 | * The Conexant reference design I saw on their website was only for analogue | ||
4 | * capturing (using the cx25842). The box I took to write this driver (reverse | ||
5 | * engineered) is the one labeled Medion MD95700. In addition to the cx25842 | ||
6 | * for analogue capturing it also has a cx22702 DVB-T demodulator on the main | ||
7 | * board. Besides it has a atiremote (X10) and a USB2.0 hub onboard. | ||
8 | * | ||
9 | * Maybe it is a little bit premature to call this driver cxusb, but I assume | ||
10 | * the USB protocol is identical or at least inherited from the reference | ||
11 | * design, so it can be reused for the "analogue-only" device (if it will | ||
12 | * appear at all). | ||
13 | * | ||
14 | * TODO: check if the cx25840-driver (from ivtv) can be used for the analogue | ||
15 | * part | ||
16 | * | ||
17 | * Copyright (C) 2005 Patrick Boettcher (patrick.boettcher@desy.de) | ||
18 | * | ||
19 | * This program is free software; you can redistribute it and/or modify it | ||
20 | * under the terms of the GNU General Public License as published by the Free | ||
21 | * Software Foundation, version 2. | ||
22 | * | ||
23 | * see Documentation/dvb/README.dvb-usb for more information | ||
24 | */ | ||
25 | #include "cxusb.h" | ||
26 | |||
27 | #include "cx22702.h" | ||
28 | |||
29 | /* debug */ | ||
30 | int dvb_usb_cxusb_debug; | ||
31 | module_param_named(debug,dvb_usb_cxusb_debug, int, 0644); | ||
32 | MODULE_PARM_DESC(debug, "set debugging level (1=rc (or-able))." DVB_USB_DEBUG_STATUS); | ||
33 | |||
34 | static int cxusb_ctrl_msg(struct dvb_usb_device *d, | ||
35 | u8 cmd, u8 *wbuf, int wlen, u8 *rbuf, int rlen) | ||
36 | { | ||
37 | int wo = (rbuf == NULL || rlen == 0); /* write-only */ | ||
38 | u8 sndbuf[1+wlen]; | ||
39 | memset(sndbuf,0,1+wlen); | ||
40 | |||
41 | sndbuf[0] = cmd; | ||
42 | memcpy(&sndbuf[1],wbuf,wlen); | ||
43 | if (wo) | ||
44 | dvb_usb_generic_write(d,sndbuf,1+wlen); | ||
45 | else | ||
46 | dvb_usb_generic_rw(d,sndbuf,1+wlen,rbuf,rlen,0); | ||
47 | |||
48 | return 0; | ||
49 | } | ||
50 | |||
51 | /* I2C */ | ||
52 | static void cxusb_set_i2c_path(struct dvb_usb_device *d, enum cxusb_i2c_pathes path) | ||
53 | { | ||
54 | struct cxusb_state *st = d->priv; | ||
55 | u8 o[2],i; | ||
56 | |||
57 | if (path == st->cur_i2c_path) | ||
58 | return; | ||
59 | |||
60 | o[0] = IOCTL_SET_I2C_PATH; | ||
61 | switch (path) { | ||
62 | case PATH_CX22702: | ||
63 | o[1] = 0; | ||
64 | break; | ||
65 | case PATH_TUNER_OTHER: | ||
66 | o[1] = 1; | ||
67 | break; | ||
68 | default: | ||
69 | err("unkown i2c path"); | ||
70 | return; | ||
71 | } | ||
72 | cxusb_ctrl_msg(d,CMD_IOCTL,o,2,&i,1); | ||
73 | |||
74 | if (i != 0x01) | ||
75 | deb_info("i2c_path setting failed.\n"); | ||
76 | |||
77 | st->cur_i2c_path = path; | ||
78 | } | ||
79 | |||
80 | static int cxusb_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num) | ||
81 | { | ||
82 | struct dvb_usb_device *d = i2c_get_adapdata(adap); | ||
83 | int i; | ||
84 | |||
85 | if (down_interruptible(&d->i2c_sem) < 0) | ||
86 | return -EAGAIN; | ||
87 | |||
88 | if (num > 2) | ||
89 | warn("more than 2 i2c messages at a time is not handled yet. TODO."); | ||
90 | |||
91 | for (i = 0; i < num; i++) { | ||
92 | |||
93 | switch (msg[i].addr) { | ||
94 | case 0x63: | ||
95 | cxusb_set_i2c_path(d,PATH_CX22702); | ||
96 | break; | ||
97 | default: | ||
98 | cxusb_set_i2c_path(d,PATH_TUNER_OTHER); | ||
99 | break; | ||
100 | } | ||
101 | |||
102 | /* read request */ | ||
103 | if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) { | ||
104 | u8 obuf[3+msg[i].len], ibuf[1+msg[i+1].len]; | ||
105 | obuf[0] = msg[i].len; | ||
106 | obuf[1] = msg[i+1].len; | ||
107 | obuf[2] = msg[i].addr; | ||
108 | memcpy(&obuf[3],msg[i].buf,msg[i].len); | ||
109 | |||
110 | if (cxusb_ctrl_msg(d, CMD_I2C_READ, | ||
111 | obuf, 3+msg[i].len, | ||
112 | ibuf, 1+msg[i+1].len) < 0) | ||
113 | break; | ||
114 | |||
115 | if (ibuf[0] != 0x08) | ||
116 | deb_info("i2c read could have been failed\n"); | ||
117 | |||
118 | memcpy(msg[i+1].buf,&ibuf[1],msg[i+1].len); | ||
119 | |||
120 | i++; | ||
121 | } else { /* write */ | ||
122 | u8 obuf[2+msg[i].len], ibuf; | ||
123 | obuf[0] = msg[i].addr; | ||
124 | obuf[1] = msg[i].len; | ||
125 | memcpy(&obuf[2],msg[i].buf,msg[i].len); | ||
126 | |||
127 | if (cxusb_ctrl_msg(d,CMD_I2C_WRITE, obuf, 2+msg[i].len, &ibuf,1) < 0) | ||
128 | break; | ||
129 | if (ibuf != 0x08) | ||
130 | deb_info("i2c write could have been failed\n"); | ||
131 | } | ||
132 | } | ||
133 | |||
134 | up(&d->i2c_sem); | ||
135 | return i; | ||
136 | } | ||
137 | |||
138 | static u32 cxusb_i2c_func(struct i2c_adapter *adapter) | ||
139 | { | ||
140 | return I2C_FUNC_I2C; | ||
141 | } | ||
142 | |||
143 | static struct i2c_algorithm cxusb_i2c_algo = { | ||
144 | .name = "Conexant USB I2C algorithm", | ||
145 | .id = I2C_ALGO_BIT, | ||
146 | .master_xfer = cxusb_i2c_xfer, | ||
147 | .functionality = cxusb_i2c_func, | ||
148 | }; | ||
149 | |||
150 | static int cxusb_power_ctrl(struct dvb_usb_device *d, int onoff) | ||
151 | { | ||
152 | return 0; | ||
153 | } | ||
154 | |||
155 | static int cxusb_streaming_ctrl(struct dvb_usb_device *d, int onoff) | ||
156 | { | ||
157 | u8 buf[2] = { 0x03, 0x00 }; | ||
158 | if (onoff) | ||
159 | cxusb_ctrl_msg(d,0x36, buf, 2, NULL, 0); | ||
160 | else | ||
161 | cxusb_ctrl_msg(d,0x37, NULL, 0, NULL, 0); | ||
162 | |||
163 | return 0; | ||
164 | } | ||
165 | |||
166 | struct cx22702_config cxusb_cx22702_config = { | ||
167 | .demod_address = 0x63, | ||
168 | |||
169 | .output_mode = CX22702_PARALLEL_OUTPUT, | ||
170 | |||
171 | .pll_init = dvb_usb_pll_init_i2c, | ||
172 | .pll_set = dvb_usb_pll_set_i2c, | ||
173 | }; | ||
174 | |||
175 | /* Callbacks for DVB USB */ | ||
176 | static int cxusb_tuner_attach(struct dvb_usb_device *d) | ||
177 | { | ||
178 | u8 bpll[4] = { 0x0b, 0xdc, 0x9c, 0xa0 }; | ||
179 | d->pll_addr = 0x61; | ||
180 | memcpy(d->pll_init,bpll,4); | ||
181 | d->pll_desc = &dvb_pll_fmd1216me; | ||
182 | return 0; | ||
183 | } | ||
184 | |||
185 | static int cxusb_frontend_attach(struct dvb_usb_device *d) | ||
186 | { | ||
187 | u8 buf[2] = { 0x03, 0x00 }; | ||
188 | u8 b = 0; | ||
189 | |||
190 | if (usb_set_interface(d->udev,0,0) < 0) | ||
191 | err("set interface to alts=0 failed"); | ||
192 | |||
193 | cxusb_ctrl_msg(d,0xde,&b,0,NULL,0); | ||
194 | cxusb_set_i2c_path(d,PATH_TUNER_OTHER); | ||
195 | cxusb_ctrl_msg(d,CMD_POWER_OFF, NULL, 0, &b, 1); | ||
196 | |||
197 | if (usb_set_interface(d->udev,0,6) < 0) | ||
198 | err("set interface failed"); | ||
199 | |||
200 | cxusb_ctrl_msg(d,0x36, buf, 2, NULL, 0); | ||
201 | cxusb_set_i2c_path(d,PATH_CX22702); | ||
202 | cxusb_ctrl_msg(d,CMD_POWER_ON, NULL, 0, &b, 1); | ||
203 | |||
204 | if ((d->fe = cx22702_attach(&cxusb_cx22702_config, &d->i2c_adap)) != NULL) | ||
205 | return 0; | ||
206 | |||
207 | return -EIO; | ||
208 | } | ||
209 | |||
210 | /* DVB USB Driver stuff */ | ||
211 | static struct dvb_usb_properties cxusb_properties; | ||
212 | |||
213 | static int cxusb_probe(struct usb_interface *intf, | ||
214 | const struct usb_device_id *id) | ||
215 | { | ||
216 | return dvb_usb_device_init(intf,&cxusb_properties,THIS_MODULE); | ||
217 | } | ||
218 | |||
219 | static struct usb_device_id cxusb_table [] = { | ||
220 | { USB_DEVICE(USB_VID_MEDION, USB_PID_MEDION_MD95700) }, | ||
221 | {} /* Terminating entry */ | ||
222 | }; | ||
223 | MODULE_DEVICE_TABLE (usb, cxusb_table); | ||
224 | |||
225 | static struct dvb_usb_properties cxusb_properties = { | ||
226 | .caps = DVB_USB_IS_AN_I2C_ADAPTER, | ||
227 | |||
228 | .usb_ctrl = CYPRESS_FX2, | ||
229 | |||
230 | .size_of_priv = sizeof(struct cxusb_state), | ||
231 | |||
232 | .streaming_ctrl = cxusb_streaming_ctrl, | ||
233 | .power_ctrl = cxusb_power_ctrl, | ||
234 | .frontend_attach = cxusb_frontend_attach, | ||
235 | .tuner_attach = cxusb_tuner_attach, | ||
236 | |||
237 | .i2c_algo = &cxusb_i2c_algo, | ||
238 | |||
239 | .generic_bulk_ctrl_endpoint = 0x01, | ||
240 | /* parameter for the MPEG2-data transfer */ | ||
241 | .urb = { | ||
242 | .type = DVB_USB_ISOC, | ||
243 | .count = 5, | ||
244 | .endpoint = 0x02, | ||
245 | .u = { | ||
246 | .isoc = { | ||
247 | .framesperurb = 32, | ||
248 | .framesize = 940, | ||
249 | .interval = 5, | ||
250 | } | ||
251 | } | ||
252 | }, | ||
253 | |||
254 | .num_device_descs = 1, | ||
255 | .devices = { | ||
256 | { "Medion MD95700 (MDUSBTV-HYBRID)", | ||
257 | { NULL }, | ||
258 | { &cxusb_table[0], NULL }, | ||
259 | }, | ||
260 | } | ||
261 | }; | ||
262 | |||
263 | static struct usb_driver cxusb_driver = { | ||
264 | .owner = THIS_MODULE, | ||
265 | .name = "dvb_usb_cxusb", | ||
266 | .probe = cxusb_probe, | ||
267 | .disconnect = dvb_usb_device_exit, | ||
268 | .id_table = cxusb_table, | ||
269 | }; | ||
270 | |||
271 | /* module stuff */ | ||
272 | static int __init cxusb_module_init(void) | ||
273 | { | ||
274 | int result; | ||
275 | if ((result = usb_register(&cxusb_driver))) { | ||
276 | err("usb_register failed. Error number %d",result); | ||
277 | return result; | ||
278 | } | ||
279 | |||
280 | return 0; | ||
281 | } | ||
282 | |||
283 | static void __exit cxusb_module_exit(void) | ||
284 | { | ||
285 | /* deregister this driver from the USB subsystem */ | ||
286 | usb_deregister(&cxusb_driver); | ||
287 | } | ||
288 | |||
289 | module_init (cxusb_module_init); | ||
290 | module_exit (cxusb_module_exit); | ||
291 | |||
292 | MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); | ||
293 | MODULE_DESCRIPTION("Driver for Conexant USB2.0 hybrid reference design"); | ||
294 | MODULE_VERSION("1.0-alpha"); | ||
295 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/dvb/dvb-usb/cxusb.h b/drivers/media/dvb/dvb-usb/cxusb.h new file mode 100644 index 000000000000..1d79016e3195 --- /dev/null +++ b/drivers/media/dvb/dvb-usb/cxusb.h | |||
@@ -0,0 +1,30 @@ | |||
1 | #ifndef _DVB_USB_CXUSB_H_ | ||
2 | #define _DVB_USB_CXUSB_H_ | ||
3 | |||
4 | #define DVB_USB_LOG_PREFIX "digitv" | ||
5 | #include "dvb-usb.h" | ||
6 | |||
7 | extern int dvb_usb_cxusb_debug; | ||
8 | #define deb_info(args...) dprintk(dvb_usb_cxusb_debug,0x01,args) | ||
9 | |||
10 | /* usb commands - some of it are guesses, don't have a reference yet */ | ||
11 | #define CMD_I2C_WRITE 0x08 | ||
12 | #define CMD_I2C_READ 0x09 | ||
13 | |||
14 | #define CMD_IOCTL 0x0e | ||
15 | #define IOCTL_SET_I2C_PATH 0x02 | ||
16 | |||
17 | #define CMD_POWER_OFF 0x50 | ||
18 | #define CMD_POWER_ON 0x51 | ||
19 | |||
20 | enum cxusb_i2c_pathes { | ||
21 | PATH_UNDEF = 0x00, | ||
22 | PATH_CX22702 = 0x01, | ||
23 | PATH_TUNER_OTHER = 0x02, | ||
24 | }; | ||
25 | |||
26 | struct cxusb_state { | ||
27 | enum cxusb_i2c_pathes cur_i2c_path; | ||
28 | }; | ||
29 | |||
30 | #endif | ||
diff --git a/drivers/media/dvb/dvb-usb/dibusb-mb.c b/drivers/media/dvb/dvb-usb/dibusb-mb.c index a0ffbb59fa14..828b5182e16c 100644 --- a/drivers/media/dvb/dvb-usb/dibusb-mb.c +++ b/drivers/media/dvb/dvb-usb/dibusb-mb.c | |||
@@ -31,10 +31,17 @@ static int dibusb_dib3000mb_frontend_attach(struct dvb_usb_device *d) | |||
31 | return 0; | 31 | return 0; |
32 | } | 32 | } |
33 | 33 | ||
34 | /* some of the dibusb 1.1 device aren't equipped with the default tuner | 34 | static int dibusb_thomson_tuner_attach(struct dvb_usb_device *d) |
35 | { | ||
36 | d->pll_addr = 0x61; | ||
37 | d->pll_desc = &dvb_pll_tua6010xs; | ||
38 | return 0; | ||
39 | } | ||
40 | |||
41 | /* Some of the Artec 1.1 device aren't equipped with the default tuner | ||
35 | * (Thomson Cable), but with a Panasonic ENV77H11D5. This function figures | 42 | * (Thomson Cable), but with a Panasonic ENV77H11D5. This function figures |
36 | * this out. */ | 43 | * this out. */ |
37 | static int dibusb_dib3000mb_tuner_attach (struct dvb_usb_device *d) | 44 | static int dibusb_tuner_probe_and_attach(struct dvb_usb_device *d) |
38 | { | 45 | { |
39 | u8 b[2] = { 0,0 }, b2[1]; | 46 | u8 b[2] = { 0,0 }, b2[1]; |
40 | int ret = 0; | 47 | int ret = 0; |
@@ -59,8 +66,7 @@ static int dibusb_dib3000mb_tuner_attach (struct dvb_usb_device *d) | |||
59 | 66 | ||
60 | if (b2[0] == 0xfe) { | 67 | if (b2[0] == 0xfe) { |
61 | info("this device has the Thomson Cable onboard. Which is default."); | 68 | info("this device has the Thomson Cable onboard. Which is default."); |
62 | d->pll_addr = 0x61; | 69 | dibusb_thomson_tuner_attach(d); |
63 | d->pll_desc = &dvb_pll_tua6010xs; | ||
64 | } else { | 70 | } else { |
65 | u8 bpll[4] = { 0x0b, 0xf5, 0x85, 0xab }; | 71 | u8 bpll[4] = { 0x0b, 0xf5, 0x85, 0xab }; |
66 | info("this device has the Panasonic ENV77H11D5 onboard."); | 72 | info("this device has the Panasonic ENV77H11D5 onboard."); |
@@ -90,8 +96,8 @@ static int dibusb_probe(struct usb_interface *intf, | |||
90 | 96 | ||
91 | /* do not change the order of the ID table */ | 97 | /* do not change the order of the ID table */ |
92 | static struct usb_device_id dibusb_dib3000mb_table [] = { | 98 | static struct usb_device_id dibusb_dib3000mb_table [] = { |
93 | /* 00 */ { USB_DEVICE(USB_VID_AVERMEDIA_UNK, USB_PID_AVERMEDIA_DVBT_USB_COLD)}, | 99 | /* 00 */ { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_AVERMEDIA_DVBT_USB_COLD)}, |
94 | /* 01 */ { USB_DEVICE(USB_VID_AVERMEDIA_UNK, USB_PID_AVERMEDIA_DVBT_USB_WARM)}, | 100 | /* 01 */ { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_AVERMEDIA_DVBT_USB_WARM)}, |
95 | /* 02 */ { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_DVBU2000_COLD) }, | 101 | /* 02 */ { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_DVBU2000_COLD) }, |
96 | /* 03 */ { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_DVBU2000_WARM) }, | 102 | /* 03 */ { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_DVBU2000_WARM) }, |
97 | /* 04 */ { USB_DEVICE(USB_VID_COMPRO_UNK, USB_PID_COMPRO_DVBU2000_UNK_COLD) }, | 103 | /* 04 */ { USB_DEVICE(USB_VID_COMPRO_UNK, USB_PID_COMPRO_DVBU2000_UNK_COLD) }, |
@@ -114,7 +120,17 @@ static struct usb_device_id dibusb_dib3000mb_table [] = { | |||
114 | /* 21 */ { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ULTIMA_TVBOX_AN2235_COLD) }, | 120 | /* 21 */ { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ULTIMA_TVBOX_AN2235_COLD) }, |
115 | /* 22 */ { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ULTIMA_TVBOX_AN2235_WARM) }, | 121 | /* 22 */ { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ULTIMA_TVBOX_AN2235_WARM) }, |
116 | /* 23 */ { USB_DEVICE(USB_VID_ADSTECH, USB_PID_ADSTECH_USB2_COLD) }, | 122 | /* 23 */ { USB_DEVICE(USB_VID_ADSTECH, USB_PID_ADSTECH_USB2_COLD) }, |
123 | |||
124 | /* device ID with default DIBUSB2_0-firmware and with the hacked firmware */ | ||
117 | /* 24 */ { USB_DEVICE(USB_VID_ADSTECH, USB_PID_ADSTECH_USB2_WARM) }, | 125 | /* 24 */ { USB_DEVICE(USB_VID_ADSTECH, USB_PID_ADSTECH_USB2_WARM) }, |
126 | /* 25 */ { USB_DEVICE(USB_VID_KYE, USB_PID_KYE_DVB_T_COLD) }, | ||
127 | /* 26 */ { USB_DEVICE(USB_VID_KYE, USB_PID_KYE_DVB_T_WARM) }, | ||
128 | |||
129 | // #define DVB_USB_DIBUSB_MB_FAULTY_USB_IDs | ||
130 | |||
131 | #ifdef DVB_USB_DIBUSB_MB_FAULTY_USB_IDs | ||
132 | /* 27 */ { USB_DEVICE(USB_VID_ANCHOR, USB_PID_ULTIMA_TVBOX_ANCHOR_COLD) }, | ||
133 | #endif | ||
118 | { } /* Terminating entry */ | 134 | { } /* Terminating entry */ |
119 | }; | 135 | }; |
120 | MODULE_DEVICE_TABLE (usb, dibusb_dib3000mb_table); | 136 | MODULE_DEVICE_TABLE (usb, dibusb_dib3000mb_table); |
@@ -134,7 +150,7 @@ static struct dvb_usb_properties dibusb1_1_properties = { | |||
134 | .pid_filter_ctrl = dibusb_pid_filter_ctrl, | 150 | .pid_filter_ctrl = dibusb_pid_filter_ctrl, |
135 | .power_ctrl = dibusb_power_ctrl, | 151 | .power_ctrl = dibusb_power_ctrl, |
136 | .frontend_attach = dibusb_dib3000mb_frontend_attach, | 152 | .frontend_attach = dibusb_dib3000mb_frontend_attach, |
137 | .tuner_attach = dibusb_dib3000mb_tuner_attach, | 153 | .tuner_attach = dibusb_tuner_probe_and_attach, |
138 | 154 | ||
139 | .rc_interval = DEFAULT_RC_INTERVAL, | 155 | .rc_interval = DEFAULT_RC_INTERVAL, |
140 | .rc_key_map = dibusb_rc_keys, | 156 | .rc_key_map = dibusb_rc_keys, |
@@ -156,7 +172,7 @@ static struct dvb_usb_properties dibusb1_1_properties = { | |||
156 | } | 172 | } |
157 | }, | 173 | }, |
158 | 174 | ||
159 | .num_device_descs = 8, | 175 | .num_device_descs = 9, |
160 | .devices = { | 176 | .devices = { |
161 | { "AVerMedia AverTV DVBT USB1.1", | 177 | { "AVerMedia AverTV DVBT USB1.1", |
162 | { &dibusb_dib3000mb_table[0], NULL }, | 178 | { &dibusb_dib3000mb_table[0], NULL }, |
@@ -190,11 +206,17 @@ static struct dvb_usb_properties dibusb1_1_properties = { | |||
190 | { &dibusb_dib3000mb_table[19], NULL }, | 206 | { &dibusb_dib3000mb_table[19], NULL }, |
191 | { &dibusb_dib3000mb_table[20], NULL }, | 207 | { &dibusb_dib3000mb_table[20], NULL }, |
192 | }, | 208 | }, |
209 | { "VideoWalker DVB-T USB", | ||
210 | { &dibusb_dib3000mb_table[25], NULL }, | ||
211 | { &dibusb_dib3000mb_table[26], NULL }, | ||
212 | }, | ||
193 | } | 213 | } |
194 | }; | 214 | }; |
195 | 215 | ||
196 | static struct dvb_usb_properties dibusb1_1_an2235_properties = { | 216 | static struct dvb_usb_properties dibusb1_1_an2235_properties = { |
197 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_PID_FILTER_CAN_BE_TURNED_OFF | DVB_USB_IS_AN_I2C_ADAPTER, | 217 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_PID_FILTER_CAN_BE_TURNED_OFF | DVB_USB_IS_AN_I2C_ADAPTER, |
218 | .pid_filter_count = 16, | ||
219 | |||
198 | .usb_ctrl = CYPRESS_AN2235, | 220 | .usb_ctrl = CYPRESS_AN2235, |
199 | 221 | ||
200 | .firmware = "dvb-usb-dibusb-an2235-01.fw", | 222 | .firmware = "dvb-usb-dibusb-an2235-01.fw", |
@@ -206,7 +228,7 @@ static struct dvb_usb_properties dibusb1_1_an2235_properties = { | |||
206 | .pid_filter_ctrl = dibusb_pid_filter_ctrl, | 228 | .pid_filter_ctrl = dibusb_pid_filter_ctrl, |
207 | .power_ctrl = dibusb_power_ctrl, | 229 | .power_ctrl = dibusb_power_ctrl, |
208 | .frontend_attach = dibusb_dib3000mb_frontend_attach, | 230 | .frontend_attach = dibusb_dib3000mb_frontend_attach, |
209 | .tuner_attach = dibusb_dib3000mb_tuner_attach, | 231 | .tuner_attach = dibusb_tuner_probe_and_attach, |
210 | 232 | ||
211 | .rc_interval = DEFAULT_RC_INTERVAL, | 233 | .rc_interval = DEFAULT_RC_INTERVAL, |
212 | .rc_key_map = dibusb_rc_keys, | 234 | .rc_key_map = dibusb_rc_keys, |
@@ -228,20 +250,32 @@ static struct dvb_usb_properties dibusb1_1_an2235_properties = { | |||
228 | } | 250 | } |
229 | }, | 251 | }, |
230 | 252 | ||
253 | #ifdef DVB_USB_DIBUSB_MB_FAULTY_USB_IDs | ||
254 | .num_device_descs = 2, | ||
255 | #else | ||
231 | .num_device_descs = 1, | 256 | .num_device_descs = 1, |
257 | #endif | ||
232 | .devices = { | 258 | .devices = { |
233 | { "Artec T1 USB1.1 TVBOX with AN2235", | 259 | { "Artec T1 USB1.1 TVBOX with AN2235", |
234 | { &dibusb_dib3000mb_table[20], NULL }, | 260 | { &dibusb_dib3000mb_table[20], NULL }, |
235 | { &dibusb_dib3000mb_table[21], NULL }, | 261 | { &dibusb_dib3000mb_table[21], NULL }, |
236 | }, | 262 | }, |
263 | #ifdef DVB_USB_DIBUSB_MB_FAULTY_USB_IDs | ||
264 | { "Artec T1 USB1.1 TVBOX with AN2235 (faulty USB IDs)", | ||
265 | { &dibusb_dib3000mb_table[27], NULL }, | ||
266 | { NULL }, | ||
267 | }, | ||
268 | #endif | ||
237 | } | 269 | } |
238 | }; | 270 | }; |
239 | 271 | ||
240 | static struct dvb_usb_properties dibusb2_0b_properties = { | 272 | static struct dvb_usb_properties dibusb2_0b_properties = { |
241 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_PID_FILTER_CAN_BE_TURNED_OFF | DVB_USB_IS_AN_I2C_ADAPTER, | 273 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_PID_FILTER_CAN_BE_TURNED_OFF | DVB_USB_IS_AN_I2C_ADAPTER, |
274 | .pid_filter_count = 32, | ||
275 | |||
242 | .usb_ctrl = CYPRESS_FX2, | 276 | .usb_ctrl = CYPRESS_FX2, |
243 | 277 | ||
244 | .firmware = "dvb-usb-adstech-usb2-01.fw", | 278 | .firmware = "dvb-usb-adstech-usb2-02.fw", |
245 | 279 | ||
246 | .size_of_priv = sizeof(struct dibusb_state), | 280 | .size_of_priv = sizeof(struct dibusb_state), |
247 | 281 | ||
@@ -250,7 +284,7 @@ static struct dvb_usb_properties dibusb2_0b_properties = { | |||
250 | .pid_filter_ctrl = dibusb_pid_filter_ctrl, | 284 | .pid_filter_ctrl = dibusb_pid_filter_ctrl, |
251 | .power_ctrl = dibusb2_0_power_ctrl, | 285 | .power_ctrl = dibusb2_0_power_ctrl, |
252 | .frontend_attach = dibusb_dib3000mb_frontend_attach, | 286 | .frontend_attach = dibusb_dib3000mb_frontend_attach, |
253 | .tuner_attach = dibusb_dib3000mb_tuner_attach, | 287 | .tuner_attach = dibusb_thomson_tuner_attach, |
254 | 288 | ||
255 | .rc_interval = DEFAULT_RC_INTERVAL, | 289 | .rc_interval = DEFAULT_RC_INTERVAL, |
256 | .rc_key_map = dibusb_rc_keys, | 290 | .rc_key_map = dibusb_rc_keys, |
@@ -272,18 +306,18 @@ static struct dvb_usb_properties dibusb2_0b_properties = { | |||
272 | } | 306 | } |
273 | }, | 307 | }, |
274 | 308 | ||
275 | .num_device_descs = 2, | 309 | .num_device_descs = 1, |
276 | .devices = { | 310 | .devices = { |
277 | { "KWorld/ADSTech Instant DVB-T USB 2.0", | 311 | { "KWorld/ADSTech Instant DVB-T USB 2.0", |
278 | { &dibusb_dib3000mb_table[23], NULL }, | 312 | { &dibusb_dib3000mb_table[23], NULL }, |
279 | { &dibusb_dib3000mb_table[24], NULL }, /* device ID with default DIBUSB2_0-firmware */ | 313 | { &dibusb_dib3000mb_table[24], NULL }, |
280 | }, | 314 | }, |
281 | } | 315 | } |
282 | }; | 316 | }; |
283 | 317 | ||
284 | static struct usb_driver dibusb_driver = { | 318 | static struct usb_driver dibusb_driver = { |
285 | .owner = THIS_MODULE, | 319 | .owner = THIS_MODULE, |
286 | .name = "DiBcom based USB DVB-T devices (DiB3000M-B based)", | 320 | .name = "dvb_usb_dibusb_mb", |
287 | .probe = dibusb_probe, | 321 | .probe = dibusb_probe, |
288 | .disconnect = dvb_usb_device_exit, | 322 | .disconnect = dvb_usb_device_exit, |
289 | .id_table = dibusb_dib3000mb_table, | 323 | .id_table = dibusb_dib3000mb_table, |
diff --git a/drivers/media/dvb/dvb-usb/dibusb-mc.c b/drivers/media/dvb/dvb-usb/dibusb-mc.c index aad8ed3fe005..e9dac430f37d 100644 --- a/drivers/media/dvb/dvb-usb/dibusb-mc.c +++ b/drivers/media/dvb/dvb-usb/dibusb-mc.c | |||
@@ -83,7 +83,7 @@ static struct dvb_usb_properties dibusb_mc_properties = { | |||
83 | 83 | ||
84 | static struct usb_driver dibusb_mc_driver = { | 84 | static struct usb_driver dibusb_mc_driver = { |
85 | .owner = THIS_MODULE, | 85 | .owner = THIS_MODULE, |
86 | .name = "DiBcom based USB2.0 DVB-T (DiB3000M-C/P based) devices", | 86 | .name = "dvb_usb_dibusb_mc", |
87 | .probe = dibusb_mc_probe, | 87 | .probe = dibusb_mc_probe, |
88 | .disconnect = dvb_usb_device_exit, | 88 | .disconnect = dvb_usb_device_exit, |
89 | .id_table = dibusb_dib3000mc_table, | 89 | .id_table = dibusb_dib3000mc_table, |
diff --git a/drivers/media/dvb/dvb-usb/digitv.c b/drivers/media/dvb/dvb-usb/digitv.c index 5acf3fde9522..9a676afc1d6e 100644 --- a/drivers/media/dvb/dvb-usb/digitv.c +++ b/drivers/media/dvb/dvb-usb/digitv.c | |||
@@ -1,10 +1,9 @@ | |||
1 | /* DVB USB compliant linux driver for Nebula Electronics uDigiTV DVB-T USB2.0 | 1 | /* DVB USB compliant linux driver for Nebula Electronics uDigiTV DVB-T USB2.0 |
2 | * receiver | 2 | * receiver |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Patrick Boettcher (patrick.boettcher@desy.de) and | 4 | * Copyright (C) 2005 Patrick Boettcher (patrick.boettcher@desy.de) |
5 | * Allan Third (allan.third@cs.man.ac.uk) | ||
6 | * | 5 | * |
7 | * partly based on the SDK published by Nebula Electronics (TODO do we want this line ?) | 6 | * partly based on the SDK published by Nebula Electronics |
8 | * | 7 | * |
9 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the Free | 9 | * under the terms of the GNU General Public License as published by the Free |
@@ -38,7 +37,7 @@ static int digitv_ctrl_msg(struct dvb_usb_device *d, | |||
38 | dvb_usb_generic_write(d,sndbuf,7); | 37 | dvb_usb_generic_write(d,sndbuf,7); |
39 | } else { | 38 | } else { |
40 | dvb_usb_generic_rw(d,sndbuf,7,rcvbuf,7,10); | 39 | dvb_usb_generic_rw(d,sndbuf,7,rcvbuf,7,10); |
41 | memcpy(&rbuf,&rcvbuf[3],rlen); | 40 | memcpy(rbuf,&rcvbuf[3],rlen); |
42 | } | 41 | } |
43 | return 0; | 42 | return 0; |
44 | } | 43 | } |
@@ -95,41 +94,20 @@ static int digitv_identify_state (struct usb_device *udev, struct | |||
95 | 94 | ||
96 | static int digitv_mt352_demod_init(struct dvb_frontend *fe) | 95 | static int digitv_mt352_demod_init(struct dvb_frontend *fe) |
97 | { | 96 | { |
98 | static u8 mt352_clock_config[] = { 0x89, 0x38, 0x2d }; | 97 | static u8 reset_buf[] = { 0x89, 0x38, 0x8a, 0x2d, 0x50, 0x80 }; |
99 | static u8 mt352_reset[] = { 0x50, 0x80 }; | 98 | static u8 init_buf[] = { 0x68, 0xa0, 0x8e, 0x40, 0x53, 0x50, |
100 | static u8 mt352_mclk_ratio[] = { 0x8b, 0x00 }; | 99 | 0x67, 0x20, 0x7d, 0x01, 0x7c, 0x00, 0x7a, 0x00, |
101 | 100 | 0x79, 0x20, 0x57, 0x05, 0x56, 0x31, 0x88, 0x0f, | |
102 | static u8 mt352_agc_cfg[] = { 0x68, 0xa0 }; | 101 | 0x75, 0x32 }; |
103 | static u8 mt352_adc_ctl_1_cfg[] = { 0x8E, 0xa0 }; | 102 | int i; |
104 | static u8 mt352_acq_ctl[] = { 0x53, 0x50 }; | ||
105 | static u8 mt352_agc_target[] = { 0x67, 0x20 }; | ||
106 | |||
107 | static u8 mt352_rs_err_per[] = { 0x7c, 0x00, 0x01 }; | ||
108 | static u8 mt352_snr_select[] = { 0x79, 0x00, 0x20 }; | ||
109 | |||
110 | static u8 mt352_input_freq_1[] = { 0x56, 0x31, 0x05 }; | ||
111 | 103 | ||
112 | static u8 mt352_scan_ctl[] = { 0x88, 0x0f }; | 104 | for (i = 0; i < ARRAY_SIZE(reset_buf); i += 2) |
113 | static u8 mt352_capt_range[] = { 0x75, 0x32 }; | 105 | mt352_write(fe, &reset_buf[i], 2); |
114 | 106 | ||
115 | mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config)); | ||
116 | mt352_write(fe, mt352_reset, sizeof(mt352_reset)); | ||
117 | msleep(1); | 107 | msleep(1); |
118 | mt352_write(fe, mt352_mclk_ratio, sizeof(mt352_mclk_ratio)); | ||
119 | |||
120 | mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg)); | ||
121 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); | ||
122 | mt352_write(fe, mt352_acq_ctl, sizeof(mt352_acq_ctl)); | ||
123 | mt352_write(fe, mt352_agc_target, sizeof(mt352_agc_target)); | ||
124 | |||
125 | |||
126 | mt352_write(fe, mt352_rs_err_per, sizeof(mt352_rs_err_per)); | ||
127 | mt352_write(fe, mt352_snr_select, sizeof(mt352_snr_select)); | ||
128 | 108 | ||
129 | mt352_write(fe, mt352_input_freq_1, sizeof(mt352_input_freq_1)); | 109 | for (i = 0; i < ARRAY_SIZE(init_buf); i += 2) |
130 | 110 | mt352_write(fe, &init_buf[i], 2); | |
131 | mt352_write(fe, mt352_scan_ctl, sizeof(mt352_scan_ctl)); | ||
132 | mt352_write(fe, mt352_capt_range, sizeof(mt352_capt_range)); | ||
133 | 111 | ||
134 | return 0; | 112 | return 0; |
135 | } | 113 | } |
@@ -137,7 +115,7 @@ static int digitv_mt352_demod_init(struct dvb_frontend *fe) | |||
137 | static struct mt352_config digitv_mt352_config = { | 115 | static struct mt352_config digitv_mt352_config = { |
138 | .demod_address = 0x0, /* ignored by the digitv anyway */ | 116 | .demod_address = 0x0, /* ignored by the digitv anyway */ |
139 | .demod_init = digitv_mt352_demod_init, | 117 | .demod_init = digitv_mt352_demod_init, |
140 | .pll_set = NULL, /* TODO */ | 118 | .pll_set = dvb_usb_pll_set, |
141 | }; | 119 | }; |
142 | 120 | ||
143 | static struct nxt6000_config digitv_nxt6000_config = { | 121 | static struct nxt6000_config digitv_nxt6000_config = { |
@@ -150,9 +128,9 @@ static struct nxt6000_config digitv_nxt6000_config = { | |||
150 | 128 | ||
151 | static int digitv_frontend_attach(struct dvb_usb_device *d) | 129 | static int digitv_frontend_attach(struct dvb_usb_device *d) |
152 | { | 130 | { |
153 | if ((d->fe = mt352_attach(&digitv_mt352_config, &d->i2c_adap)) == NULL) | 131 | if ((d->fe = mt352_attach(&digitv_mt352_config, &d->i2c_adap)) != NULL) |
154 | return 0; | 132 | return 0; |
155 | if ((d->fe = nxt6000_attach(&digitv_nxt6000_config, &d->i2c_adap)) == NULL) { | 133 | if ((d->fe = nxt6000_attach(&digitv_nxt6000_config, &d->i2c_adap)) != NULL) { |
156 | 134 | ||
157 | warn("nxt6000 support is not done yet, in fact you are one of the first " | 135 | warn("nxt6000 support is not done yet, in fact you are one of the first " |
158 | "person who wants to use this device in Linux. Please report to " | 136 | "person who wants to use this device in Linux. Please report to " |
@@ -163,6 +141,13 @@ static int digitv_frontend_attach(struct dvb_usb_device *d) | |||
163 | return -EIO; | 141 | return -EIO; |
164 | } | 142 | } |
165 | 143 | ||
144 | static int digitv_tuner_attach(struct dvb_usb_device *d) | ||
145 | { | ||
146 | d->pll_addr = 0x60; | ||
147 | d->pll_desc = &dvb_pll_tded4; | ||
148 | return 0; | ||
149 | } | ||
150 | |||
166 | static struct dvb_usb_rc_key digitv_rc_keys[] = { | 151 | static struct dvb_usb_rc_key digitv_rc_keys[] = { |
167 | { 0x00, 0x16, KEY_POWER }, /* dummy key */ | 152 | { 0x00, 0x16, KEY_POWER }, /* dummy key */ |
168 | }; | 153 | }; |
@@ -184,7 +169,6 @@ int digitv_rc_query(struct dvb_usb_device *d, u32 *event, int *state) | |||
184 | return 0; | 169 | return 0; |
185 | } | 170 | } |
186 | 171 | ||
187 | |||
188 | /* DVB USB Driver stuff */ | 172 | /* DVB USB Driver stuff */ |
189 | static struct dvb_usb_properties digitv_properties; | 173 | static struct dvb_usb_properties digitv_properties; |
190 | 174 | ||
@@ -208,13 +192,8 @@ static struct dvb_usb_properties digitv_properties = { | |||
208 | 192 | ||
209 | .size_of_priv = 0, | 193 | .size_of_priv = 0, |
210 | 194 | ||
211 | .streaming_ctrl = NULL, | ||
212 | .pid_filter = NULL, | ||
213 | .pid_filter_ctrl = NULL, | ||
214 | .power_ctrl = NULL, | ||
215 | .frontend_attach = digitv_frontend_attach, | 195 | .frontend_attach = digitv_frontend_attach, |
216 | .tuner_attach = NULL, // digitv_tuner_attach, | 196 | .tuner_attach = digitv_tuner_attach, |
217 | .read_mac_address = NULL, | ||
218 | 197 | ||
219 | .rc_interval = 1000, | 198 | .rc_interval = 1000, |
220 | .rc_key_map = digitv_rc_keys, | 199 | .rc_key_map = digitv_rc_keys, |
@@ -238,7 +217,7 @@ static struct dvb_usb_properties digitv_properties = { | |||
238 | } | 217 | } |
239 | }, | 218 | }, |
240 | 219 | ||
241 | .num_device_descs = 2, | 220 | .num_device_descs = 1, |
242 | .devices = { | 221 | .devices = { |
243 | { "Nebula Electronics uDigiTV DVB-T USB2.0)", | 222 | { "Nebula Electronics uDigiTV DVB-T USB2.0)", |
244 | { &digitv_table[0], NULL }, | 223 | { &digitv_table[0], NULL }, |
@@ -249,7 +228,7 @@ static struct dvb_usb_properties digitv_properties = { | |||
249 | 228 | ||
250 | static struct usb_driver digitv_driver = { | 229 | static struct usb_driver digitv_driver = { |
251 | .owner = THIS_MODULE, | 230 | .owner = THIS_MODULE, |
252 | .name = "Nebula Electronics uDigiTV DVB-T USB2.0 device", | 231 | .name = "dvb_usb_digitv", |
253 | .probe = digitv_probe, | 232 | .probe = digitv_probe, |
254 | .disconnect = dvb_usb_device_exit, | 233 | .disconnect = dvb_usb_device_exit, |
255 | .id_table = digitv_table, | 234 | .id_table = digitv_table, |
diff --git a/drivers/media/dvb/dvb-usb/dtt200u-fe.c b/drivers/media/dvb/dvb-usb/dtt200u-fe.c index d17d768038c6..b032523b07bc 100644 --- a/drivers/media/dvb/dvb-usb/dtt200u-fe.c +++ b/drivers/media/dvb/dvb-usb/dtt200u-fe.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* Frontend part of the Linux driver for the Yakumo/Hama/Typhoon DVB-T | 1 | /* Frontend part of the Linux driver for the WideView/ Yakumo/ Hama/ |
2 | * USB2.0 receiver. | 2 | * Typhoon/ Yuan DVB-T USB2.0 receiver. |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Patrick Boettcher <patrick.boettcher@desy.de> | 4 | * Copyright (C) 2005 Patrick Boettcher <patrick.boettcher@desy.de> |
5 | * | 5 | * |
@@ -14,61 +14,58 @@ | |||
14 | struct dtt200u_fe_state { | 14 | struct dtt200u_fe_state { |
15 | struct dvb_usb_device *d; | 15 | struct dvb_usb_device *d; |
16 | 16 | ||
17 | fe_status_t stat; | ||
18 | |||
17 | struct dvb_frontend_parameters fep; | 19 | struct dvb_frontend_parameters fep; |
18 | struct dvb_frontend frontend; | 20 | struct dvb_frontend frontend; |
19 | }; | 21 | }; |
20 | 22 | ||
21 | #define moan(which,what) info("unexpected value in '%s' for cmd '%02x' - please report to linux-dvb@linuxtv.org",which,what) | ||
22 | |||
23 | static int dtt200u_fe_read_status(struct dvb_frontend* fe, fe_status_t *stat) | 23 | static int dtt200u_fe_read_status(struct dvb_frontend* fe, fe_status_t *stat) |
24 | { | 24 | { |
25 | struct dtt200u_fe_state *state = fe->demodulator_priv; | 25 | struct dtt200u_fe_state *state = fe->demodulator_priv; |
26 | u8 bw = GET_TUNE_STAT; | 26 | u8 st = GET_TUNE_STATUS, b[3]; |
27 | u8 br[3] = { 0 }; | 27 | |
28 | // u8 bdeb[5] = { 0 }; | 28 | dvb_usb_generic_rw(state->d,&st,1,b,3,0); |
29 | 29 | ||
30 | dvb_usb_generic_rw(state->d,&bw,1,br,3,0); | 30 | switch (b[0]) { |
31 | switch (br[0]) { | ||
32 | case 0x01: | 31 | case 0x01: |
33 | *stat = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; | 32 | *stat = FE_HAS_SIGNAL | FE_HAS_CARRIER | |
33 | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; | ||
34 | break; | 34 | break; |
35 | case 0x00: | 35 | case 0x00: /* pending */ |
36 | *stat = 0; | 36 | *stat = FE_TIMEDOUT; /* during set_frontend */ |
37 | break; | 37 | break; |
38 | default: | 38 | default: |
39 | moan("br[0]",GET_TUNE_STAT); | 39 | case 0x02: /* failed */ |
40 | *stat = 0; | ||
40 | break; | 41 | break; |
41 | } | 42 | } |
42 | |||
43 | // bw[0] = 0x88; | ||
44 | // dvb_usb_generic_rw(state->d,bw,1,bdeb,5,0); | ||
45 | |||
46 | // deb_info("%02x: %02x %02x %02x %02x %02x\n",bw[0],bdeb[0],bdeb[1],bdeb[2],bdeb[3],bdeb[4]); | ||
47 | |||
48 | return 0; | 43 | return 0; |
49 | } | 44 | } |
45 | |||
50 | static int dtt200u_fe_read_ber(struct dvb_frontend* fe, u32 *ber) | 46 | static int dtt200u_fe_read_ber(struct dvb_frontend* fe, u32 *ber) |
51 | { | 47 | { |
52 | struct dtt200u_fe_state *state = fe->demodulator_priv; | 48 | struct dtt200u_fe_state *state = fe->demodulator_priv; |
53 | u8 bw = GET_BER; | 49 | u8 bw = GET_VIT_ERR_CNT,b[3]; |
54 | *ber = 0; | 50 | dvb_usb_generic_rw(state->d,&bw,1,b,3,0); |
55 | dvb_usb_generic_rw(state->d,&bw,1,(u8*) ber,3,0); | 51 | *ber = (b[0] << 16) | (b[1] << 8) | b[2]; |
56 | return 0; | 52 | return 0; |
57 | } | 53 | } |
58 | 54 | ||
59 | static int dtt200u_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc) | 55 | static int dtt200u_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc) |
60 | { | 56 | { |
61 | struct dtt200u_fe_state *state = fe->demodulator_priv; | 57 | struct dtt200u_fe_state *state = fe->demodulator_priv; |
62 | u8 bw = GET_UNK; | 58 | u8 bw = GET_RS_UNCOR_BLK_CNT,b[2]; |
63 | *unc = 0; | 59 | |
64 | dvb_usb_generic_rw(state->d,&bw,1,(u8*) unc,3,0); | 60 | dvb_usb_generic_rw(state->d,&bw,1,b,2,0); |
61 | *unc = (b[0] << 8) | b[1]; | ||
65 | return 0; | 62 | return 0; |
66 | } | 63 | } |
67 | 64 | ||
68 | static int dtt200u_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength) | 65 | static int dtt200u_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength) |
69 | { | 66 | { |
70 | struct dtt200u_fe_state *state = fe->demodulator_priv; | 67 | struct dtt200u_fe_state *state = fe->demodulator_priv; |
71 | u8 bw = GET_SIG_STRENGTH, b; | 68 | u8 bw = GET_AGC, b; |
72 | dvb_usb_generic_rw(state->d,&bw,1,&b,1,0); | 69 | dvb_usb_generic_rw(state->d,&bw,1,&b,1,0); |
73 | *strength = (b << 8) | b; | 70 | *strength = (b << 8) | b; |
74 | return 0; | 71 | return 0; |
@@ -86,7 +83,7 @@ static int dtt200u_fe_read_snr(struct dvb_frontend* fe, u16 *snr) | |||
86 | static int dtt200u_fe_init(struct dvb_frontend* fe) | 83 | static int dtt200u_fe_init(struct dvb_frontend* fe) |
87 | { | 84 | { |
88 | struct dtt200u_fe_state *state = fe->demodulator_priv; | 85 | struct dtt200u_fe_state *state = fe->demodulator_priv; |
89 | u8 b = RESET_DEMOD; | 86 | u8 b = SET_INIT; |
90 | return dvb_usb_generic_write(state->d,&b,1); | 87 | return dvb_usb_generic_write(state->d,&b,1); |
91 | } | 88 | } |
92 | 89 | ||
@@ -98,8 +95,8 @@ static int dtt200u_fe_sleep(struct dvb_frontend* fe) | |||
98 | static int dtt200u_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune) | 95 | static int dtt200u_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune) |
99 | { | 96 | { |
100 | tune->min_delay_ms = 1500; | 97 | tune->min_delay_ms = 1500; |
101 | tune->step_size = 166667; | 98 | tune->step_size = 0; |
102 | tune->max_drift = 166667 * 2; | 99 | tune->max_drift = 0; |
103 | return 0; | 100 | return 0; |
104 | } | 101 | } |
105 | 102 | ||
@@ -107,27 +104,32 @@ static int dtt200u_fe_set_frontend(struct dvb_frontend* fe, | |||
107 | struct dvb_frontend_parameters *fep) | 104 | struct dvb_frontend_parameters *fep) |
108 | { | 105 | { |
109 | struct dtt200u_fe_state *state = fe->demodulator_priv; | 106 | struct dtt200u_fe_state *state = fe->demodulator_priv; |
107 | int i; | ||
108 | fe_status_t st; | ||
110 | u16 freq = fep->frequency / 250000; | 109 | u16 freq = fep->frequency / 250000; |
111 | u8 bw,bwbuf[2] = { SET_BANDWIDTH, 0 }, freqbuf[3] = { SET_FREQUENCY, 0, 0 }; | 110 | u8 bwbuf[2] = { SET_BANDWIDTH, 0 },freqbuf[3] = { SET_RF_FREQ, 0, 0 }; |
112 | 111 | ||
113 | switch (fep->u.ofdm.bandwidth) { | 112 | switch (fep->u.ofdm.bandwidth) { |
114 | case BANDWIDTH_8_MHZ: bw = 8; break; | 113 | case BANDWIDTH_8_MHZ: bwbuf[1] = 8; break; |
115 | case BANDWIDTH_7_MHZ: bw = 7; break; | 114 | case BANDWIDTH_7_MHZ: bwbuf[1] = 7; break; |
116 | case BANDWIDTH_6_MHZ: bw = 6; break; | 115 | case BANDWIDTH_6_MHZ: bwbuf[1] = 6; break; |
117 | case BANDWIDTH_AUTO: return -EOPNOTSUPP; | 116 | case BANDWIDTH_AUTO: return -EOPNOTSUPP; |
118 | default: | 117 | default: |
119 | return -EINVAL; | 118 | return -EINVAL; |
120 | } | 119 | } |
121 | deb_info("set_frontend\n"); | ||
122 | 120 | ||
123 | bwbuf[1] = bw; | ||
124 | dvb_usb_generic_write(state->d,bwbuf,2); | 121 | dvb_usb_generic_write(state->d,bwbuf,2); |
125 | 122 | ||
126 | freqbuf[1] = freq & 0xff; | 123 | freqbuf[1] = freq & 0xff; |
127 | freqbuf[2] = (freq >> 8) & 0xff; | 124 | freqbuf[2] = (freq >> 8) & 0xff; |
128 | dvb_usb_generic_write(state->d,freqbuf,3); | 125 | dvb_usb_generic_write(state->d,freqbuf,3); |
129 | 126 | ||
130 | memcpy(&state->fep,fep,sizeof(struct dvb_frontend_parameters)); | 127 | for (i = 0; i < 30; i++) { |
128 | msleep(20); | ||
129 | dtt200u_fe_read_status(fe, &st); | ||
130 | if (st & FE_TIMEDOUT) | ||
131 | continue; | ||
132 | } | ||
131 | 133 | ||
132 | return 0; | 134 | return 0; |
133 | } | 135 | } |
@@ -174,7 +176,7 @@ success: | |||
174 | 176 | ||
175 | static struct dvb_frontend_ops dtt200u_fe_ops = { | 177 | static struct dvb_frontend_ops dtt200u_fe_ops = { |
176 | .info = { | 178 | .info = { |
177 | .name = "DTT200U (Yakumo/Typhoon/Hama) DVB-T", | 179 | .name = "WideView USB DVB-T", |
178 | .type = FE_OFDM, | 180 | .type = FE_OFDM, |
179 | .frequency_min = 44250000, | 181 | .frequency_min = 44250000, |
180 | .frequency_max = 867250000, | 182 | .frequency_max = 867250000, |
diff --git a/drivers/media/dvb/dvb-usb/dtt200u.c b/drivers/media/dvb/dvb-usb/dtt200u.c index fb2b5a2da137..47dba6e45968 100644 --- a/drivers/media/dvb/dvb-usb/dtt200u.c +++ b/drivers/media/dvb/dvb-usb/dtt200u.c | |||
@@ -1,8 +1,10 @@ | |||
1 | /* DVB USB library compliant Linux driver for the Yakumo/Hama/Typhoon DVB-T | 1 | /* DVB USB library compliant Linux driver for the WideView/ Yakumo/ Hama/ |
2 | * USB2.0 receiver. | 2 | * Typhoon/ Yuan DVB-T USB2.0 receiver. |
3 | * | 3 | * |
4 | * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) | 4 | * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) |
5 | * | 5 | * |
6 | * Thanks to Steve Chang from WideView for providing support for the WT-220U. | ||
7 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the Free | 9 | * under the terms of the GNU General Public License as published by the Free |
8 | * Software Foundation, version 2. | 10 | * Software Foundation, version 2. |
@@ -16,14 +18,24 @@ int dvb_usb_dtt200u_debug; | |||
16 | module_param_named(debug,dvb_usb_dtt200u_debug, int, 0644); | 18 | module_param_named(debug,dvb_usb_dtt200u_debug, int, 0644); |
17 | MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2 (or-able))." DVB_USB_DEBUG_STATUS); | 19 | MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2 (or-able))." DVB_USB_DEBUG_STATUS); |
18 | 20 | ||
21 | static int dtt200u_power_ctrl(struct dvb_usb_device *d, int onoff) | ||
22 | { | ||
23 | u8 b = SET_INIT; | ||
24 | |||
25 | if (onoff) | ||
26 | dvb_usb_generic_write(d,&b,2); | ||
27 | |||
28 | return 0; | ||
29 | } | ||
30 | |||
19 | static int dtt200u_streaming_ctrl(struct dvb_usb_device *d, int onoff) | 31 | static int dtt200u_streaming_ctrl(struct dvb_usb_device *d, int onoff) |
20 | { | 32 | { |
21 | u8 b_streaming[2] = { SET_TS_CTRL, onoff }; | 33 | u8 b_streaming[2] = { SET_STREAMING, onoff }; |
22 | u8 b_rst_pid = RESET_PID_FILTER; | 34 | u8 b_rst_pid = RESET_PID_FILTER; |
23 | 35 | ||
24 | dvb_usb_generic_write(d,b_streaming,2); | 36 | dvb_usb_generic_write(d,b_streaming,2); |
25 | 37 | ||
26 | if (!onoff) | 38 | if (onoff == 0) |
27 | dvb_usb_generic_write(d,&b_rst_pid,1); | 39 | dvb_usb_generic_write(d,&b_rst_pid,1); |
28 | return 0; | 40 | return 0; |
29 | } | 41 | } |
@@ -36,7 +48,7 @@ static int dtt200u_pid_filter(struct dvb_usb_device *d, int index, u16 pid, int | |||
36 | b_pid[0] = SET_PID_FILTER; | 48 | b_pid[0] = SET_PID_FILTER; |
37 | b_pid[1] = index; | 49 | b_pid[1] = index; |
38 | b_pid[2] = pid & 0xff; | 50 | b_pid[2] = pid & 0xff; |
39 | b_pid[3] = (pid >> 8) & 0xff; | 51 | b_pid[3] = (pid >> 8) & 0x1f; |
40 | 52 | ||
41 | return dvb_usb_generic_write(d,b_pid,4); | 53 | return dvb_usb_generic_write(d,b_pid,4); |
42 | } | 54 | } |
@@ -54,9 +66,9 @@ static struct dvb_usb_rc_key dtt200u_rc_keys[] = { | |||
54 | { 0x80, 0x08, KEY_5 }, | 66 | { 0x80, 0x08, KEY_5 }, |
55 | { 0x80, 0x09, KEY_6 }, | 67 | { 0x80, 0x09, KEY_6 }, |
56 | { 0x80, 0x0a, KEY_7 }, | 68 | { 0x80, 0x0a, KEY_7 }, |
57 | { 0x00, 0x0c, KEY_ZOOM }, | 69 | { 0x80, 0x0c, KEY_ZOOM }, |
58 | { 0x80, 0x0d, KEY_0 }, | 70 | { 0x80, 0x0d, KEY_0 }, |
59 | { 0x00, 0x0e, KEY_SELECT }, | 71 | { 0x80, 0x0e, KEY_SELECT }, |
60 | { 0x80, 0x12, KEY_POWER }, | 72 | { 0x80, 0x12, KEY_POWER }, |
61 | { 0x80, 0x1a, KEY_CHANNELUP }, | 73 | { 0x80, 0x1a, KEY_CHANNELUP }, |
62 | { 0x80, 0x1b, KEY_8 }, | 74 | { 0x80, 0x1b, KEY_8 }, |
@@ -66,7 +78,7 @@ static struct dvb_usb_rc_key dtt200u_rc_keys[] = { | |||
66 | 78 | ||
67 | static int dtt200u_rc_query(struct dvb_usb_device *d, u32 *event, int *state) | 79 | static int dtt200u_rc_query(struct dvb_usb_device *d, u32 *event, int *state) |
68 | { | 80 | { |
69 | u8 key[5],cmd = GET_RC_KEY; | 81 | u8 key[5],cmd = GET_RC_CODE; |
70 | dvb_usb_generic_rw(d,&cmd,1,key,5,0); | 82 | dvb_usb_generic_rw(d,&cmd,1,key,5,0); |
71 | dvb_usb_nec_rc_key_to_event(d,key,event,state); | 83 | dvb_usb_nec_rc_key_to_event(d,key,event,state); |
72 | if (key[0] != 0) | 84 | if (key[0] != 0) |
@@ -81,32 +93,41 @@ static int dtt200u_frontend_attach(struct dvb_usb_device *d) | |||
81 | } | 93 | } |
82 | 94 | ||
83 | static struct dvb_usb_properties dtt200u_properties; | 95 | static struct dvb_usb_properties dtt200u_properties; |
96 | static struct dvb_usb_properties wt220u_properties; | ||
84 | 97 | ||
85 | static int dtt200u_usb_probe(struct usb_interface *intf, | 98 | static int dtt200u_usb_probe(struct usb_interface *intf, |
86 | const struct usb_device_id *id) | 99 | const struct usb_device_id *id) |
87 | { | 100 | { |
88 | return dvb_usb_device_init(intf,&dtt200u_properties,THIS_MODULE); | 101 | if (dvb_usb_device_init(intf,&dtt200u_properties,THIS_MODULE) == 0 || |
102 | dvb_usb_device_init(intf,&wt220u_properties,THIS_MODULE) == 0) | ||
103 | return 0; | ||
104 | |||
105 | return -ENODEV; | ||
89 | } | 106 | } |
90 | 107 | ||
91 | static struct usb_device_id dtt200u_usb_table [] = { | 108 | static struct usb_device_id dtt200u_usb_table [] = { |
92 | { USB_DEVICE(USB_VID_AVERMEDIA_UNK, USB_PID_DTT200U_COLD) }, | 109 | // { USB_DEVICE(0x04b4,0x8613) }, |
93 | { USB_DEVICE(USB_VID_AVERMEDIA_UNK, USB_PID_DTT200U_WARM) }, | 110 | { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_DTT200U_COLD) }, |
111 | { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_DTT200U_WARM) }, | ||
112 | { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_COLD) }, | ||
113 | { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_WARM) }, | ||
94 | { 0 }, | 114 | { 0 }, |
95 | }; | 115 | }; |
96 | MODULE_DEVICE_TABLE(usb, dtt200u_usb_table); | 116 | MODULE_DEVICE_TABLE(usb, dtt200u_usb_table); |
97 | 117 | ||
98 | static struct dvb_usb_properties dtt200u_properties = { | 118 | static struct dvb_usb_properties dtt200u_properties = { |
99 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_NEED_PID_FILTERING, | 119 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_NEED_PID_FILTERING, |
100 | .pid_filter_count = 255, /* It is a guess, but there are at least 10 */ | 120 | .pid_filter_count = 15, |
101 | 121 | ||
102 | .usb_ctrl = CYPRESS_FX2, | 122 | .usb_ctrl = CYPRESS_FX2, |
103 | .firmware = "dvb-usb-dtt200u-01.fw", | 123 | .firmware = "dvb-usb-dtt200u-01.fw", |
104 | 124 | ||
125 | .power_ctrl = dtt200u_power_ctrl, | ||
105 | .streaming_ctrl = dtt200u_streaming_ctrl, | 126 | .streaming_ctrl = dtt200u_streaming_ctrl, |
106 | .pid_filter = dtt200u_pid_filter, | 127 | .pid_filter = dtt200u_pid_filter, |
107 | .frontend_attach = dtt200u_frontend_attach, | 128 | .frontend_attach = dtt200u_frontend_attach, |
108 | 129 | ||
109 | .rc_interval = 200, | 130 | .rc_interval = 300, |
110 | .rc_key_map = dtt200u_rc_keys, | 131 | .rc_key_map = dtt200u_rc_keys, |
111 | .rc_key_map_size = ARRAY_SIZE(dtt200u_rc_keys), | 132 | .rc_key_map_size = ARRAY_SIZE(dtt200u_rc_keys), |
112 | .rc_query = dtt200u_rc_query, | 133 | .rc_query = dtt200u_rc_query, |
@@ -127,18 +148,59 @@ static struct dvb_usb_properties dtt200u_properties = { | |||
127 | 148 | ||
128 | .num_device_descs = 1, | 149 | .num_device_descs = 1, |
129 | .devices = { | 150 | .devices = { |
130 | { .name = "Yakumo/Hama/Typhoon DVB-T USB2.0)", | 151 | { .name = "WideView/Yuan/Yakumo/Hama/Typhoon DVB-T USB2.0 (WT-200U)", |
131 | .cold_ids = { &dtt200u_usb_table[0], &dtt200u_usb_table[2] }, | 152 | .cold_ids = { &dtt200u_usb_table[0], NULL }, |
132 | .warm_ids = { &dtt200u_usb_table[1], NULL }, | 153 | .warm_ids = { &dtt200u_usb_table[1], NULL }, |
133 | }, | 154 | }, |
134 | { 0 }, | 155 | { 0 }, |
135 | } | 156 | } |
136 | }; | 157 | }; |
137 | 158 | ||
159 | static struct dvb_usb_properties wt220u_properties = { | ||
160 | .caps = DVB_USB_HAS_PID_FILTER | DVB_USB_NEED_PID_FILTERING, | ||
161 | .pid_filter_count = 15, | ||
162 | |||
163 | .usb_ctrl = CYPRESS_FX2, | ||
164 | .firmware = "dvb-usb-wt220u-01.fw", | ||
165 | |||
166 | .power_ctrl = dtt200u_power_ctrl, | ||
167 | .streaming_ctrl = dtt200u_streaming_ctrl, | ||
168 | .pid_filter = dtt200u_pid_filter, | ||
169 | .frontend_attach = dtt200u_frontend_attach, | ||
170 | |||
171 | .rc_interval = 300, | ||
172 | .rc_key_map = dtt200u_rc_keys, | ||
173 | .rc_key_map_size = ARRAY_SIZE(dtt200u_rc_keys), | ||
174 | .rc_query = dtt200u_rc_query, | ||
175 | |||
176 | .generic_bulk_ctrl_endpoint = 0x01, | ||
177 | |||
178 | /* parameter for the MPEG2-data transfer */ | ||
179 | .urb = { | ||
180 | .type = DVB_USB_BULK, | ||
181 | .count = 7, | ||
182 | .endpoint = 0x02, | ||
183 | .u = { | ||
184 | .bulk = { | ||
185 | .buffersize = 4096, | ||
186 | } | ||
187 | } | ||
188 | }, | ||
189 | |||
190 | .num_device_descs = 1, | ||
191 | .devices = { | ||
192 | { .name = "WideView WT-220U PenType Receiver (and clones)", | ||
193 | .cold_ids = { &dtt200u_usb_table[2], NULL }, | ||
194 | .warm_ids = { &dtt200u_usb_table[3], NULL }, | ||
195 | }, | ||
196 | { 0 }, | ||
197 | } | ||
198 | }; | ||
199 | |||
138 | /* usb specific object needed to register this driver with the usb subsystem */ | 200 | /* usb specific object needed to register this driver with the usb subsystem */ |
139 | static struct usb_driver dtt200u_usb_driver = { | 201 | static struct usb_driver dtt200u_usb_driver = { |
140 | .owner = THIS_MODULE, | 202 | .owner = THIS_MODULE, |
141 | .name = "Yakumo/Hama/Typhoon DVB-T USB2.0", | 203 | .name = "dvb_usb_dtt200u", |
142 | .probe = dtt200u_usb_probe, | 204 | .probe = dtt200u_usb_probe, |
143 | .disconnect = dvb_usb_device_exit, | 205 | .disconnect = dvb_usb_device_exit, |
144 | .id_table = dtt200u_usb_table, | 206 | .id_table = dtt200u_usb_table, |
@@ -166,6 +228,6 @@ module_init(dtt200u_usb_module_init); | |||
166 | module_exit(dtt200u_usb_module_exit); | 228 | module_exit(dtt200u_usb_module_exit); |
167 | 229 | ||
168 | MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); | 230 | MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); |
169 | MODULE_DESCRIPTION("Driver for the Yakumo/Hama/Typhoon DVB-T USB2.0 device"); | 231 | MODULE_DESCRIPTION("Driver for the WideView/Yakumo/Hama/Typhoon DVB-T USB2.0 devices"); |
170 | MODULE_VERSION("1.0"); | 232 | MODULE_VERSION("1.0"); |
171 | MODULE_LICENSE("GPL"); | 233 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/media/dvb/dvb-usb/dtt200u.h b/drivers/media/dvb/dvb-usb/dtt200u.h index ed4142071518..6f1f3042e21a 100644 --- a/drivers/media/dvb/dvb-usb/dtt200u.h +++ b/drivers/media/dvb/dvb-usb/dtt200u.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* Common header file of Linux driver for the Yakumo/Hama/Typhoon DVB-T | 1 | /* Common header file of Linux driver for the WideView/ Yakumo/ Hama/ |
2 | * USB2.0 receiver. | 2 | * Typhoon/ Yuan DVB-T USB2.0 receiver. |
3 | * | 3 | * |
4 | * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) | 4 | * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) |
5 | * | 5 | * |
@@ -22,44 +22,34 @@ extern int dvb_usb_dtt200u_debug; | |||
22 | /* guessed protocol description (reverse engineered): | 22 | /* guessed protocol description (reverse engineered): |
23 | * read | 23 | * read |
24 | * 00 - USB type 0x02 for usb2.0, 0x01 for usb1.1 | 24 | * 00 - USB type 0x02 for usb2.0, 0x01 for usb1.1 |
25 | * 81 - <TS_LOCK> <current frequency divided by 250000> | ||
26 | * 82 - crash - do not touch | ||
27 | * 83 - crash - do not touch | ||
28 | * 84 - remote control | ||
29 | * 85 - crash - do not touch (OK, stop testing here) | ||
30 | * 88 - locking 2 bytes (0x80 0x40 == no signal, 0x89 0x20 == nice signal) | 25 | * 88 - locking 2 bytes (0x80 0x40 == no signal, 0x89 0x20 == nice signal) |
31 | * 89 - noise-to-signal | ||
32 | * 8a - unkown 1 byte - signal_strength | ||
33 | * 8c - ber ??? | ||
34 | * 8d - ber | ||
35 | * 8e - unc | ||
36 | */ | 26 | */ |
37 | 27 | ||
38 | #define GET_SPEED 0x00 | 28 | #define GET_SPEED 0x00 |
39 | #define GET_TUNE_STAT 0x81 | 29 | #define GET_TUNE_STATUS 0x81 |
40 | #define GET_RC_KEY 0x84 | 30 | #define GET_RC_CODE 0x84 |
41 | #define GET_STATUS 0x88 | 31 | #define GET_CONFIGURATION 0x88 |
42 | #define GET_SNR 0x89 | 32 | #define GET_AGC 0x89 |
43 | #define GET_SIG_STRENGTH 0x8a | 33 | #define GET_SNR 0x8a |
44 | #define GET_UNK 0x8c | 34 | #define GET_VIT_ERR_CNT 0x8c |
45 | #define GET_BER 0x8d | 35 | #define GET_RS_ERR_CNT 0x8d |
46 | #define GET_UNC 0x8e | 36 | #define GET_RS_UNCOR_BLK_CNT 0x8e |
47 | 37 | ||
48 | /* write | 38 | /* write |
49 | * 01 - reset the demod | 39 | * 01 - init |
50 | * 02 - frequency (divided by 250000) | 40 | * 02 - frequency (divided by 250000) |
51 | * 03 - bandwidth | 41 | * 03 - bandwidth |
52 | * 04 - pid table (index pid(7:0) pid(12:8)) | 42 | * 04 - pid table (index pid(7:0) pid(12:8)) |
53 | * 05 - reset the pid table | 43 | * 05 - reset the pid table |
54 | * 08 - demod transfer enabled or not (FX2 transfer is enabled by default) | 44 | * 08 - transfer switch |
55 | */ | 45 | */ |
56 | 46 | ||
57 | #define RESET_DEMOD 0x01 | 47 | #define SET_INIT 0x01 |
58 | #define SET_FREQUENCY 0x02 | 48 | #define SET_RF_FREQ 0x02 |
59 | #define SET_BANDWIDTH 0x03 | 49 | #define SET_BANDWIDTH 0x03 |
60 | #define SET_PID_FILTER 0x04 | 50 | #define SET_PID_FILTER 0x04 |
61 | #define RESET_PID_FILTER 0x05 | 51 | #define RESET_PID_FILTER 0x05 |
62 | #define SET_TS_CTRL 0x08 | 52 | #define SET_STREAMING 0x08 |
63 | 53 | ||
64 | extern struct dvb_frontend * dtt200u_fe_attach(struct dvb_usb_device *d); | 54 | extern struct dvb_frontend * dtt200u_fe_attach(struct dvb_usb_device *d); |
65 | 55 | ||
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-common.h b/drivers/media/dvb/dvb-usb/dvb-usb-common.h index 67e0d73fbceb..7300489d3e24 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-common.h +++ b/drivers/media/dvb/dvb-usb/dvb-usb-common.h | |||
@@ -12,14 +12,16 @@ | |||
12 | #include "dvb-usb.h" | 12 | #include "dvb-usb.h" |
13 | 13 | ||
14 | extern int dvb_usb_debug; | 14 | extern int dvb_usb_debug; |
15 | extern int dvb_usb_disable_rc_polling; | ||
15 | 16 | ||
16 | #define deb_info(args...) dprintk(dvb_usb_debug,0x01,args) | 17 | #define deb_info(args...) dprintk(dvb_usb_debug,0x01,args) |
17 | #define deb_xfer(args...) dprintk(dvb_usb_debug,0x02,args) | 18 | #define deb_xfer(args...) dprintk(dvb_usb_debug,0x02,args) |
18 | #define deb_pll(args...) dprintk(dvb_usb_debug,0x04,args) | 19 | #define deb_pll(args...) dprintk(dvb_usb_debug,0x04,args) |
19 | #define deb_ts(args...) dprintk(dvb_usb_debug,0x08,args) | 20 | #define deb_ts(args...) dprintk(dvb_usb_debug,0x08,args) |
20 | #define deb_err(args...) dprintk(dvb_usb_debug,0x10,args) | 21 | #define deb_err(args...) dprintk(dvb_usb_debug,0x10,args) |
21 | #define deb_rc(args...) dprintk(dvb_usb_debug,0x20,args) | 22 | #define deb_rc(args...) dprintk(dvb_usb_debug,0x20,args) |
22 | #define deb_fw(args...) dprintk(dvb_usb_debug,0x40,args) | 23 | #define deb_fw(args...) dprintk(dvb_usb_debug,0x40,args) |
24 | #define deb_mem(args...) dprintk(dvb_usb_debug,0x80,args) | ||
23 | 25 | ||
24 | /* commonly used methods */ | 26 | /* commonly used methods */ |
25 | extern int usb_cypress_load_firmware(struct usb_device *, const char *, int); | 27 | extern int usb_cypress_load_firmware(struct usb_device *, const char *, int); |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h index bcb34191868b..794d513a8480 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h +++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h | |||
@@ -12,7 +12,7 @@ | |||
12 | /* Vendor IDs */ | 12 | /* Vendor IDs */ |
13 | #define USB_VID_ADSTECH 0x06e1 | 13 | #define USB_VID_ADSTECH 0x06e1 |
14 | #define USB_VID_ANCHOR 0x0547 | 14 | #define USB_VID_ANCHOR 0x0547 |
15 | #define USB_VID_AVERMEDIA_UNK 0x14aa | 15 | #define USB_VID_WIDEVIEW 0x14aa |
16 | #define USB_VID_AVERMEDIA 0x07ca | 16 | #define USB_VID_AVERMEDIA 0x07ca |
17 | #define USB_VID_COMPRO 0x185b | 17 | #define USB_VID_COMPRO 0x185b |
18 | #define USB_VID_COMPRO_UNK 0x145f | 18 | #define USB_VID_COMPRO_UNK 0x145f |
@@ -24,6 +24,8 @@ | |||
24 | #define USB_VID_HANFTEK 0x15f4 | 24 | #define USB_VID_HANFTEK 0x15f4 |
25 | #define USB_VID_HAUPPAUGE 0x2040 | 25 | #define USB_VID_HAUPPAUGE 0x2040 |
26 | #define USB_VID_HYPER_PALTEK 0x1025 | 26 | #define USB_VID_HYPER_PALTEK 0x1025 |
27 | #define USB_VID_KYE 0x0458 | ||
28 | #define USB_VID_MEDION 0x1660 | ||
27 | #define USB_VID_VISIONPLUS 0x13d3 | 29 | #define USB_VID_VISIONPLUS 0x13d3 |
28 | #define USB_VID_TWINHAN 0x1822 | 30 | #define USB_VID_TWINHAN 0x1822 |
29 | #define USB_VID_ULTIMA_ELECTRONIC 0x05d8 | 31 | #define USB_VID_ULTIMA_ELECTRONIC 0x05d8 |
@@ -70,6 +72,8 @@ | |||
70 | #define USB_PID_HANFTEK_UMT_010_WARM 0x0015 | 72 | #define USB_PID_HANFTEK_UMT_010_WARM 0x0015 |
71 | #define USB_PID_DTT200U_COLD 0x0201 | 73 | #define USB_PID_DTT200U_COLD 0x0201 |
72 | #define USB_PID_DTT200U_WARM 0x0301 | 74 | #define USB_PID_DTT200U_WARM 0x0301 |
75 | #define USB_PID_WT220U_COLD 0x0222 | ||
76 | #define USB_PID_WT220U_WARM 0x0221 | ||
73 | #define USB_PID_WINTV_NOVA_T_USB2_COLD 0x9300 | 77 | #define USB_PID_WINTV_NOVA_T_USB2_COLD 0x9300 |
74 | #define USB_PID_WINTV_NOVA_T_USB2_WARM 0x9301 | 78 | #define USB_PID_WINTV_NOVA_T_USB2_WARM 0x9301 |
75 | #define USB_PID_NEBULA_DIGITV 0x0201 | 79 | #define USB_PID_NEBULA_DIGITV 0x0201 |
@@ -78,6 +82,8 @@ | |||
78 | #define USB_PID_DVICO_BLUEBIRD_LGDT 0xd820 | 82 | #define USB_PID_DVICO_BLUEBIRD_LGDT 0xd820 |
79 | #define USB_PID_DVICO_BLUEBIRD_LGZ201_1 0xdb01 | 83 | #define USB_PID_DVICO_BLUEBIRD_LGZ201_1 0xdb01 |
80 | #define USB_PID_DVICO_BLUEBIRD_TH7579_2 0xdb11 | 84 | #define USB_PID_DVICO_BLUEBIRD_TH7579_2 0xdb11 |
81 | 85 | #define USB_PID_MEDION_MD95700 0x0932 | |
86 | #define USB_PID_KYE_DVB_T_COLD 0x701e | ||
87 | #define USB_PID_KYE_DVB_T_WARM 0x701f | ||
82 | 88 | ||
83 | #endif | 89 | #endif |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-init.c b/drivers/media/dvb/dvb-usb/dvb-usb-init.c index 3aadec974cf1..c3b3ae4f3ec7 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-init.c +++ b/drivers/media/dvb/dvb-usb/dvb-usb-init.c | |||
@@ -18,6 +18,10 @@ int dvb_usb_debug; | |||
18 | module_param_named(debug,dvb_usb_debug, int, 0644); | 18 | module_param_named(debug,dvb_usb_debug, int, 0644); |
19 | MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,pll=4,ts=8,err=16,rc=32,fw=64 (or-able))." DVB_USB_DEBUG_STATUS); | 19 | MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,pll=4,ts=8,err=16,rc=32,fw=64 (or-able))." DVB_USB_DEBUG_STATUS); |
20 | 20 | ||
21 | int dvb_usb_disable_rc_polling; | ||
22 | module_param_named(disable_rc_polling, dvb_usb_disable_rc_polling, int, 0644); | ||
23 | MODULE_PARM_DESC(disable_rc_polling, "disable remote control polling (default: 0)."); | ||
24 | |||
21 | /* general initialization functions */ | 25 | /* general initialization functions */ |
22 | int dvb_usb_exit(struct dvb_usb_device *d) | 26 | int dvb_usb_exit(struct dvb_usb_device *d) |
23 | { | 27 | { |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c index 9f1e23f82bae..fc7800f1743e 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c +++ b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c | |||
@@ -21,6 +21,10 @@ static void dvb_usb_read_remote_control(void *data) | |||
21 | /* TODO: need a lock here. We can simply skip checking for the remote control | 21 | /* TODO: need a lock here. We can simply skip checking for the remote control |
22 | if we're busy. */ | 22 | if we're busy. */ |
23 | 23 | ||
24 | /* when the parameter has been set to 1 via sysfs while the driver was running */ | ||
25 | if (dvb_usb_disable_rc_polling) | ||
26 | return; | ||
27 | |||
24 | if (d->props.rc_query(d,&event,&state)) { | 28 | if (d->props.rc_query(d,&event,&state)) { |
25 | err("error while querying for an remote control event."); | 29 | err("error while querying for an remote control event."); |
26 | goto schedule; | 30 | goto schedule; |
@@ -35,7 +39,7 @@ static void dvb_usb_read_remote_control(void *data) | |||
35 | d->last_event = event; | 39 | d->last_event = event; |
36 | case REMOTE_KEY_REPEAT: | 40 | case REMOTE_KEY_REPEAT: |
37 | deb_rc("key repeated\n"); | 41 | deb_rc("key repeated\n"); |
38 | input_event(&d->rc_input_dev, EV_KEY, event, 1); | 42 | input_event(&d->rc_input_dev, EV_KEY, d->last_event, 1); |
39 | input_event(&d->rc_input_dev, EV_KEY, d->last_event, 0); | 43 | input_event(&d->rc_input_dev, EV_KEY, d->last_event, 0); |
40 | input_sync(&d->rc_input_dev); | 44 | input_sync(&d->rc_input_dev); |
41 | break; | 45 | break; |
@@ -85,7 +89,9 @@ schedule: | |||
85 | int dvb_usb_remote_init(struct dvb_usb_device *d) | 89 | int dvb_usb_remote_init(struct dvb_usb_device *d) |
86 | { | 90 | { |
87 | int i; | 91 | int i; |
88 | if (d->props.rc_key_map == NULL) | 92 | if (d->props.rc_key_map == NULL || |
93 | d->props.rc_query == NULL || | ||
94 | dvb_usb_disable_rc_polling) | ||
89 | return 0; | 95 | return 0; |
90 | 96 | ||
91 | /* Initialise the remote-control structures.*/ | 97 | /* Initialise the remote-control structures.*/ |
@@ -154,12 +160,12 @@ int dvb_usb_nec_rc_key_to_event(struct dvb_usb_device *d, | |||
154 | break; | 160 | break; |
155 | } | 161 | } |
156 | /* See if we can match the raw key code. */ | 162 | /* See if we can match the raw key code. */ |
157 | for (i = 0; i < sizeof(keymap)/sizeof(struct dvb_usb_rc_key); i++) | 163 | for (i = 0; i < d->props.rc_key_map_size; i++) |
158 | if (keymap[i].custom == keybuf[1] && | 164 | if (keymap[i].custom == keybuf[1] && |
159 | keymap[i].data == keybuf[3]) { | 165 | keymap[i].data == keybuf[3]) { |
160 | *event = keymap[i].event; | 166 | *event = keymap[i].event; |
161 | *state = REMOTE_KEY_PRESSED; | 167 | *state = REMOTE_KEY_PRESSED; |
162 | break; | 168 | return 0; |
163 | } | 169 | } |
164 | deb_err("key mapping failed - no appropriate key found in keymapping\n"); | 170 | deb_err("key mapping failed - no appropriate key found in keymapping\n"); |
165 | break; | 171 | break; |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-urb.c b/drivers/media/dvb/dvb-usb/dvb-usb-urb.c index 83d476fb410a..f5799a4c228e 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-urb.c +++ b/drivers/media/dvb/dvb-usb/dvb-usb-urb.c | |||
@@ -24,11 +24,12 @@ int dvb_usb_generic_rw(struct dvb_usb_device *d, u8 *wbuf, u16 wlen, u8 *rbuf, | |||
24 | if ((ret = down_interruptible(&d->usb_sem))) | 24 | if ((ret = down_interruptible(&d->usb_sem))) |
25 | return ret; | 25 | return ret; |
26 | 26 | ||
27 | deb_xfer(">>> "); | ||
27 | debug_dump(wbuf,wlen,deb_xfer); | 28 | debug_dump(wbuf,wlen,deb_xfer); |
28 | 29 | ||
29 | ret = usb_bulk_msg(d->udev,usb_sndbulkpipe(d->udev, | 30 | ret = usb_bulk_msg(d->udev,usb_sndbulkpipe(d->udev, |
30 | d->props.generic_bulk_ctrl_endpoint), wbuf,wlen,&actlen, | 31 | d->props.generic_bulk_ctrl_endpoint), wbuf,wlen,&actlen, |
31 | 2*HZ); | 32 | 2000); |
32 | 33 | ||
33 | if (ret) | 34 | if (ret) |
34 | err("bulk message failed: %d (%d/%d)",ret,wlen,actlen); | 35 | err("bulk message failed: %d (%d/%d)",ret,wlen,actlen); |
@@ -42,12 +43,14 @@ int dvb_usb_generic_rw(struct dvb_usb_device *d, u8 *wbuf, u16 wlen, u8 *rbuf, | |||
42 | 43 | ||
43 | ret = usb_bulk_msg(d->udev,usb_rcvbulkpipe(d->udev, | 44 | ret = usb_bulk_msg(d->udev,usb_rcvbulkpipe(d->udev, |
44 | d->props.generic_bulk_ctrl_endpoint),rbuf,rlen,&actlen, | 45 | d->props.generic_bulk_ctrl_endpoint),rbuf,rlen,&actlen, |
45 | 2*HZ); | 46 | 2000); |
46 | 47 | ||
47 | if (ret) | 48 | if (ret) |
48 | err("recv bulk message failed: %d",ret); | 49 | err("recv bulk message failed: %d",ret); |
49 | else | 50 | else { |
51 | deb_xfer("<<< "); | ||
50 | debug_dump(rbuf,actlen,deb_xfer); | 52 | debug_dump(rbuf,actlen,deb_xfer); |
53 | } | ||
51 | } | 54 | } |
52 | 55 | ||
53 | up(&d->usb_sem); | 56 | up(&d->usb_sem); |
@@ -61,12 +64,19 @@ int dvb_usb_generic_write(struct dvb_usb_device *d, u8 *buf, u16 len) | |||
61 | } | 64 | } |
62 | EXPORT_SYMBOL(dvb_usb_generic_write); | 65 | EXPORT_SYMBOL(dvb_usb_generic_write); |
63 | 66 | ||
64 | static void dvb_usb_bulk_urb_complete(struct urb *urb, struct pt_regs *ptregs) | 67 | |
68 | /* URB stuff for streaming */ | ||
69 | static void dvb_usb_urb_complete(struct urb *urb, struct pt_regs *ptregs) | ||
65 | { | 70 | { |
66 | struct dvb_usb_device *d = urb->context; | 71 | struct dvb_usb_device *d = urb->context; |
72 | int ptype = usb_pipetype(urb->pipe); | ||
73 | int i; | ||
74 | u8 *b; | ||
67 | 75 | ||
68 | deb_ts("bulk urb completed. feedcount: %d, status: %d, length: %d\n",d->feedcount,urb->status, | 76 | deb_ts("'%s' urb completed. feedcount: %d, status: %d, length: %d/%d, pack_num: %d, errors: %d\n", |
69 | urb->actual_length); | 77 | ptype == PIPE_ISOCHRONOUS ? "isoc" : "bulk", d->feedcount, |
78 | urb->status,urb->actual_length,urb->transfer_buffer_length, | ||
79 | urb->number_of_packets,urb->error_count); | ||
70 | 80 | ||
71 | switch (urb->status) { | 81 | switch (urb->status) { |
72 | case 0: /* success */ | 82 | case 0: /* success */ |
@@ -81,11 +91,33 @@ static void dvb_usb_bulk_urb_complete(struct urb *urb, struct pt_regs *ptregs) | |||
81 | break; | 91 | break; |
82 | } | 92 | } |
83 | 93 | ||
84 | if (d->feedcount > 0 && urb->actual_length > 0) { | 94 | if (d->feedcount > 0) { |
85 | if (d->state & DVB_USB_STATE_DVB) | 95 | if (d->state & DVB_USB_STATE_DVB) { |
86 | dvb_dmx_swfilter(&d->demux, (u8*) urb->transfer_buffer,urb->actual_length); | 96 | switch (ptype) { |
87 | } else | 97 | case PIPE_ISOCHRONOUS: |
88 | deb_ts("URB dropped because of feedcount.\n"); | 98 | b = (u8 *) urb->transfer_buffer; |
99 | for (i = 0; i < urb->number_of_packets; i++) { | ||
100 | if (urb->iso_frame_desc[i].status != 0) | ||
101 | deb_ts("iso frame descriptor has an error: %d\n",urb->iso_frame_desc[i].status); | ||
102 | else if (urb->iso_frame_desc[i].actual_length > 0) { | ||
103 | dvb_dmx_swfilter(&d->demux,b + urb->iso_frame_desc[i].offset, | ||
104 | urb->iso_frame_desc[i].actual_length); | ||
105 | } | ||
106 | urb->iso_frame_desc[i].status = 0; | ||
107 | urb->iso_frame_desc[i].actual_length = 0; | ||
108 | } | ||
109 | debug_dump(b,20,deb_ts); | ||
110 | break; | ||
111 | case PIPE_BULK: | ||
112 | if (urb->actual_length > 0) | ||
113 | dvb_dmx_swfilter(&d->demux, (u8 *) urb->transfer_buffer,urb->actual_length); | ||
114 | break; | ||
115 | default: | ||
116 | err("unkown endpoint type in completition handler."); | ||
117 | return; | ||
118 | } | ||
119 | } | ||
120 | } | ||
89 | 121 | ||
90 | usb_submit_urb(urb,GFP_ATOMIC); | 122 | usb_submit_urb(urb,GFP_ATOMIC); |
91 | } | 123 | } |
@@ -94,7 +126,7 @@ int dvb_usb_urb_kill(struct dvb_usb_device *d) | |||
94 | { | 126 | { |
95 | int i; | 127 | int i; |
96 | for (i = 0; i < d->urbs_submitted; i++) { | 128 | for (i = 0; i < d->urbs_submitted; i++) { |
97 | deb_info("killing URB no. %d.\n",i); | 129 | deb_ts("killing URB no. %d.\n",i); |
98 | 130 | ||
99 | /* stop the URB */ | 131 | /* stop the URB */ |
100 | usb_kill_urb(d->urb_list[i]); | 132 | usb_kill_urb(d->urb_list[i]); |
@@ -107,9 +139,9 @@ int dvb_usb_urb_submit(struct dvb_usb_device *d) | |||
107 | { | 139 | { |
108 | int i,ret; | 140 | int i,ret; |
109 | for (i = 0; i < d->urbs_initialized; i++) { | 141 | for (i = 0; i < d->urbs_initialized; i++) { |
110 | deb_info("submitting URB no. %d\n",i); | 142 | deb_ts("submitting URB no. %d\n",i); |
111 | if ((ret = usb_submit_urb(d->urb_list[i],GFP_ATOMIC))) { | 143 | if ((ret = usb_submit_urb(d->urb_list[i],GFP_ATOMIC))) { |
112 | err("could not submit URB no. %d - get them all back\n",i); | 144 | err("could not submit URB no. %d - get them all back",i); |
113 | dvb_usb_urb_kill(d); | 145 | dvb_usb_urb_kill(d); |
114 | return ret; | 146 | return ret; |
115 | } | 147 | } |
@@ -118,32 +150,78 @@ int dvb_usb_urb_submit(struct dvb_usb_device *d) | |||
118 | return 0; | 150 | return 0; |
119 | } | 151 | } |
120 | 152 | ||
121 | static int dvb_usb_bulk_urb_init(struct dvb_usb_device *d) | 153 | static int dvb_usb_free_stream_buffers(struct dvb_usb_device *d) |
122 | { | 154 | { |
123 | int i,bufsize = d->props.urb.count * d->props.urb.u.bulk.buffersize; | 155 | if (d->state & DVB_USB_STATE_URB_BUF) { |
156 | while (d->buf_num) { | ||
157 | d->buf_num--; | ||
158 | deb_mem("freeing buffer %d\n",d->buf_num); | ||
159 | usb_buffer_free(d->udev, d->buf_size, | ||
160 | d->buf_list[d->buf_num], d->dma_addr[d->buf_num]); | ||
161 | } | ||
162 | kfree(d->buf_list); | ||
163 | kfree(d->dma_addr); | ||
164 | } | ||
165 | |||
166 | d->state &= ~DVB_USB_STATE_URB_BUF; | ||
124 | 167 | ||
125 | deb_info("allocate %d bytes as buffersize for all URBs\n",bufsize); | 168 | return 0; |
126 | /* allocate the actual buffer for the URBs */ | 169 | } |
127 | if ((d->buffer = usb_buffer_alloc(d->udev, bufsize, SLAB_ATOMIC, &d->dma_handle)) == NULL) { | 170 | |
128 | deb_info("not enough memory for urb-buffer allocation.\n"); | 171 | static int dvb_usb_allocate_stream_buffers(struct dvb_usb_device *d, int num, unsigned long size) |
172 | { | ||
173 | d->buf_num = 0; | ||
174 | d->buf_size = size; | ||
175 | |||
176 | deb_mem("all in all I will use %lu bytes for streaming\n",num*size); | ||
177 | |||
178 | if ((d->buf_list = kmalloc(num*sizeof(u8 *), GFP_ATOMIC)) == NULL) | ||
179 | return -ENOMEM; | ||
180 | |||
181 | if ((d->dma_addr = kmalloc(num*sizeof(dma_addr_t), GFP_ATOMIC)) == NULL) { | ||
182 | kfree(d->buf_list); | ||
129 | return -ENOMEM; | 183 | return -ENOMEM; |
130 | } | 184 | } |
131 | deb_info("allocation successful\n"); | 185 | memset(d->buf_list,0,num*sizeof(u8 *)); |
132 | memset(d->buffer,0,bufsize); | 186 | memset(d->dma_addr,0,num*sizeof(dma_addr_t)); |
133 | 187 | ||
134 | d->state |= DVB_USB_STATE_URB_BUF; | 188 | d->state |= DVB_USB_STATE_URB_BUF; |
135 | 189 | ||
190 | for (d->buf_num = 0; d->buf_num < num; d->buf_num++) { | ||
191 | deb_mem("allocating buffer %d\n",d->buf_num); | ||
192 | if (( d->buf_list[d->buf_num] = | ||
193 | usb_buffer_alloc(d->udev, size, SLAB_ATOMIC, | ||
194 | &d->dma_addr[d->buf_num]) ) == NULL) { | ||
195 | deb_mem("not enough memory for urb-buffer allocation.\n"); | ||
196 | dvb_usb_free_stream_buffers(d); | ||
197 | return -ENOMEM; | ||
198 | } | ||
199 | deb_mem("buffer %d: %p (dma: %d)\n",d->buf_num,d->buf_list[d->buf_num],d->dma_addr[d->buf_num]); | ||
200 | memset(d->buf_list[d->buf_num],0,size); | ||
201 | } | ||
202 | deb_mem("allocation successful\n"); | ||
203 | |||
204 | return 0; | ||
205 | } | ||
206 | |||
207 | static int dvb_usb_bulk_urb_init(struct dvb_usb_device *d) | ||
208 | { | ||
209 | int i; | ||
210 | |||
211 | if ((i = dvb_usb_allocate_stream_buffers(d,d->props.urb.count, | ||
212 | d->props.urb.u.bulk.buffersize)) < 0) | ||
213 | return i; | ||
214 | |||
136 | /* allocate the URBs */ | 215 | /* allocate the URBs */ |
137 | for (i = 0; i < d->props.urb.count; i++) { | 216 | for (i = 0; i < d->props.urb.count; i++) { |
138 | if (!(d->urb_list[i] = usb_alloc_urb(0,GFP_ATOMIC))) { | 217 | if ((d->urb_list[i] = usb_alloc_urb(0,GFP_ATOMIC)) == NULL) |
139 | return -ENOMEM; | 218 | return -ENOMEM; |
140 | } | ||
141 | 219 | ||
142 | usb_fill_bulk_urb( d->urb_list[i], d->udev, | 220 | usb_fill_bulk_urb( d->urb_list[i], d->udev, |
143 | usb_rcvbulkpipe(d->udev,d->props.urb.endpoint), | 221 | usb_rcvbulkpipe(d->udev,d->props.urb.endpoint), |
144 | &d->buffer[i*d->props.urb.u.bulk.buffersize], | 222 | d->buf_list[i], |
145 | d->props.urb.u.bulk.buffersize, | 223 | d->props.urb.u.bulk.buffersize, |
146 | dvb_usb_bulk_urb_complete, d); | 224 | dvb_usb_urb_complete, d); |
147 | 225 | ||
148 | d->urb_list[i]->transfer_flags = 0; | 226 | d->urb_list[i]->transfer_flags = 0; |
149 | d->urbs_initialized++; | 227 | d->urbs_initialized++; |
@@ -151,6 +229,47 @@ static int dvb_usb_bulk_urb_init(struct dvb_usb_device *d) | |||
151 | return 0; | 229 | return 0; |
152 | } | 230 | } |
153 | 231 | ||
232 | static int dvb_usb_isoc_urb_init(struct dvb_usb_device *d) | ||
233 | { | ||
234 | int i,j; | ||
235 | |||
236 | if ((i = dvb_usb_allocate_stream_buffers(d,d->props.urb.count, | ||
237 | d->props.urb.u.isoc.framesize*d->props.urb.u.isoc.framesperurb)) < 0) | ||
238 | return i; | ||
239 | |||
240 | /* allocate the URBs */ | ||
241 | for (i = 0; i < d->props.urb.count; i++) { | ||
242 | struct urb *urb; | ||
243 | int frame_offset = 0; | ||
244 | if ((d->urb_list[i] = | ||
245 | usb_alloc_urb(d->props.urb.u.isoc.framesperurb,GFP_ATOMIC)) == NULL) | ||
246 | return -ENOMEM; | ||
247 | |||
248 | urb = d->urb_list[i]; | ||
249 | |||
250 | urb->dev = d->udev; | ||
251 | urb->context = d; | ||
252 | urb->complete = dvb_usb_urb_complete; | ||
253 | urb->pipe = usb_rcvisocpipe(d->udev,d->props.urb.endpoint); | ||
254 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; | ||
255 | urb->interval = d->props.urb.u.isoc.interval; | ||
256 | urb->number_of_packets = d->props.urb.u.isoc.framesperurb; | ||
257 | urb->transfer_buffer_length = d->buf_size; | ||
258 | urb->transfer_buffer = d->buf_list[i]; | ||
259 | urb->transfer_dma = d->dma_addr[i]; | ||
260 | |||
261 | for (j = 0; j < d->props.urb.u.isoc.framesperurb; j++) { | ||
262 | urb->iso_frame_desc[j].offset = frame_offset; | ||
263 | urb->iso_frame_desc[j].length = d->props.urb.u.isoc.framesize; | ||
264 | frame_offset += d->props.urb.u.isoc.framesize; | ||
265 | } | ||
266 | |||
267 | d->urbs_initialized++; | ||
268 | } | ||
269 | return 0; | ||
270 | |||
271 | } | ||
272 | |||
154 | int dvb_usb_urb_init(struct dvb_usb_device *d) | 273 | int dvb_usb_urb_init(struct dvb_usb_device *d) |
155 | { | 274 | { |
156 | /* | 275 | /* |
@@ -174,8 +293,7 @@ int dvb_usb_urb_init(struct dvb_usb_device *d) | |||
174 | case DVB_USB_BULK: | 293 | case DVB_USB_BULK: |
175 | return dvb_usb_bulk_urb_init(d); | 294 | return dvb_usb_bulk_urb_init(d); |
176 | case DVB_USB_ISOC: | 295 | case DVB_USB_ISOC: |
177 | err("isochronous transfer not yet implemented in dvb-usb."); | 296 | return dvb_usb_isoc_urb_init(d); |
178 | return -EINVAL; | ||
179 | default: | 297 | default: |
180 | err("unkown URB-type for data transfer."); | 298 | err("unkown URB-type for data transfer."); |
181 | return -EINVAL; | 299 | return -EINVAL; |
@@ -191,7 +309,7 @@ int dvb_usb_urb_exit(struct dvb_usb_device *d) | |||
191 | if (d->state & DVB_USB_STATE_URB_LIST) { | 309 | if (d->state & DVB_USB_STATE_URB_LIST) { |
192 | for (i = 0; i < d->urbs_initialized; i++) { | 310 | for (i = 0; i < d->urbs_initialized; i++) { |
193 | if (d->urb_list[i] != NULL) { | 311 | if (d->urb_list[i] != NULL) { |
194 | deb_info("freeing URB no. %d.\n",i); | 312 | deb_mem("freeing URB no. %d.\n",i); |
195 | /* free the URBs */ | 313 | /* free the URBs */ |
196 | usb_free_urb(d->urb_list[i]); | 314 | usb_free_urb(d->urb_list[i]); |
197 | } | 315 | } |
@@ -202,10 +320,6 @@ int dvb_usb_urb_exit(struct dvb_usb_device *d) | |||
202 | d->state &= ~DVB_USB_STATE_URB_LIST; | 320 | d->state &= ~DVB_USB_STATE_URB_LIST; |
203 | } | 321 | } |
204 | 322 | ||
205 | if (d->state & DVB_USB_STATE_URB_BUF) | 323 | dvb_usb_free_stream_buffers(d); |
206 | usb_buffer_free(d->udev, d->props.urb.u.bulk.buffersize * d->props.urb.count, | ||
207 | d->buffer, d->dma_handle); | ||
208 | |||
209 | d->state &= ~DVB_USB_STATE_URB_BUF; | ||
210 | return 0; | 324 | return 0; |
211 | } | 325 | } |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb.h b/drivers/media/dvb/dvb-usb/dvb-usb.h index abcee1943f64..a80567caf508 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb.h +++ b/drivers/media/dvb/dvb-usb/dvb-usb.h | |||
@@ -189,12 +189,13 @@ struct dvb_usb_properties { | |||
189 | struct { | 189 | struct { |
190 | int framesperurb; | 190 | int framesperurb; |
191 | int framesize; | 191 | int framesize; |
192 | int interval; | ||
192 | } isoc; | 193 | } isoc; |
193 | } u; | 194 | } u; |
194 | } urb; | 195 | } urb; |
195 | 196 | ||
196 | int num_device_descs; | 197 | int num_device_descs; |
197 | struct dvb_usb_device_description devices[8]; | 198 | struct dvb_usb_device_description devices[9]; |
198 | }; | 199 | }; |
199 | 200 | ||
200 | 201 | ||
@@ -207,19 +208,28 @@ struct dvb_usb_properties { | |||
207 | * @udev: pointer to the device's struct usb_device. | 208 | * @udev: pointer to the device's struct usb_device. |
208 | * @urb_list: array of dynamically allocated struct urb for the MPEG2-TS- | 209 | * @urb_list: array of dynamically allocated struct urb for the MPEG2-TS- |
209 | * streaming. | 210 | * streaming. |
210 | * @buffer: buffer used to streaming. | 211 | * |
211 | * @dma_handle: dma_addr_t for buffer. | 212 | * @buf_num: number of buffer allocated. |
213 | * @buf_size: size of each buffer in buf_list. | ||
214 | * @buf_list: array containing all allocate buffers for streaming. | ||
215 | * @dma_addr: list of dma_addr_t for each buffer in buf_list. | ||
216 | * | ||
212 | * @urbs_initialized: number of URBs initialized. | 217 | * @urbs_initialized: number of URBs initialized. |
213 | * @urbs_submitted: number of URBs submitted. | 218 | * @urbs_submitted: number of URBs submitted. |
219 | * | ||
214 | * @feedcount: number of reqested feeds (used for streaming-activation) | 220 | * @feedcount: number of reqested feeds (used for streaming-activation) |
215 | * @pid_filtering: is hardware pid_filtering used or not. | 221 | * @pid_filtering: is hardware pid_filtering used or not. |
222 | * | ||
216 | * @usb_sem: semaphore of USB control messages (reading needs two messages) | 223 | * @usb_sem: semaphore of USB control messages (reading needs two messages) |
217 | * @i2c_sem: semaphore for i2c-transfers | 224 | * @i2c_sem: semaphore for i2c-transfers |
225 | * | ||
218 | * @i2c_adap: device's i2c_adapter if it uses I2CoverUSB | 226 | * @i2c_adap: device's i2c_adapter if it uses I2CoverUSB |
219 | * @pll_addr: I2C address of the tuner for programming | 227 | * @pll_addr: I2C address of the tuner for programming |
220 | * @pll_init: array containing the initialization buffer | 228 | * @pll_init: array containing the initialization buffer |
221 | * @pll_desc: pointer to the appropriate struct dvb_pll_desc | 229 | * @pll_desc: pointer to the appropriate struct dvb_pll_desc |
222 | * @tuner_pass_ctrl: called to (de)activate tuner passthru of the demod | 230 | * |
231 | * @tuner_pass_ctrl: called to (de)activate tuner passthru of the demod or the board | ||
232 | * | ||
223 | * @dvb_adap: device's dvb_adapter. | 233 | * @dvb_adap: device's dvb_adapter. |
224 | * @dmxdev: device's dmxdev. | 234 | * @dmxdev: device's dmxdev. |
225 | * @demux: device's software demuxer. | 235 | * @demux: device's software demuxer. |
@@ -253,8 +263,12 @@ struct dvb_usb_device { | |||
253 | /* usb */ | 263 | /* usb */ |
254 | struct usb_device *udev; | 264 | struct usb_device *udev; |
255 | struct urb **urb_list; | 265 | struct urb **urb_list; |
256 | u8 *buffer; | 266 | |
257 | dma_addr_t dma_handle; | 267 | int buf_num; |
268 | unsigned long buf_size; | ||
269 | u8 **buf_list; | ||
270 | dma_addr_t *dma_addr; | ||
271 | |||
258 | int urbs_initialized; | 272 | int urbs_initialized; |
259 | int urbs_submitted; | 273 | int urbs_submitted; |
260 | 274 | ||
diff --git a/drivers/media/dvb/dvb-usb/nova-t-usb2.c b/drivers/media/dvb/dvb-usb/nova-t-usb2.c index 9d83781aef95..258a92bfbcc7 100644 --- a/drivers/media/dvb/dvb-usb/nova-t-usb2.c +++ b/drivers/media/dvb/dvb-usb/nova-t-usb2.c | |||
@@ -203,7 +203,7 @@ static struct dvb_usb_properties nova_t_properties = { | |||
203 | 203 | ||
204 | static struct usb_driver nova_t_driver = { | 204 | static struct usb_driver nova_t_driver = { |
205 | .owner = THIS_MODULE, | 205 | .owner = THIS_MODULE, |
206 | .name = "Hauppauge WinTV-NOVA-T usb2", | 206 | .name = "dvb_usb_nova_t_usb2", |
207 | .probe = nova_t_probe, | 207 | .probe = nova_t_probe, |
208 | .disconnect = dvb_usb_device_exit, | 208 | .disconnect = dvb_usb_device_exit, |
209 | .id_table = nova_t_table, | 209 | .id_table = nova_t_table, |
diff --git a/drivers/media/dvb/dvb-usb/umt-010.c b/drivers/media/dvb/dvb-usb/umt-010.c index aa560422ce7c..2112ac3cf5e2 100644 --- a/drivers/media/dvb/dvb-usb/umt-010.c +++ b/drivers/media/dvb/dvb-usb/umt-010.c | |||
@@ -129,7 +129,7 @@ static struct dvb_usb_properties umt_properties = { | |||
129 | 129 | ||
130 | static struct usb_driver umt_driver = { | 130 | static struct usb_driver umt_driver = { |
131 | .owner = THIS_MODULE, | 131 | .owner = THIS_MODULE, |
132 | .name = "HanfTek UMT-010 USB2.0 DVB-T devices", | 132 | .name = "dvb_usb_umt_010", |
133 | .probe = umt_probe, | 133 | .probe = umt_probe, |
134 | .disconnect = dvb_usb_device_exit, | 134 | .disconnect = dvb_usb_device_exit, |
135 | .id_table = umt_table, | 135 | .id_table = umt_table, |
diff --git a/drivers/media/dvb/dvb-usb/vp7045.c b/drivers/media/dvb/dvb-usb/vp7045.c index 02ecc9a8e3b6..5adc5d69ec84 100644 --- a/drivers/media/dvb/dvb-usb/vp7045.c +++ b/drivers/media/dvb/dvb-usb/vp7045.c | |||
@@ -44,7 +44,7 @@ int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in, | |||
44 | if (usb_control_msg(d->udev, | 44 | if (usb_control_msg(d->udev, |
45 | usb_sndctrlpipe(d->udev,0), | 45 | usb_sndctrlpipe(d->udev,0), |
46 | TH_COMMAND_OUT, USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0, | 46 | TH_COMMAND_OUT, USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0, |
47 | outbuf, 20, 2*HZ) != 20) { | 47 | outbuf, 20, 2000) != 20) { |
48 | err("USB control message 'out' went wrong."); | 48 | err("USB control message 'out' went wrong."); |
49 | ret = -EIO; | 49 | ret = -EIO; |
50 | goto unlock; | 50 | goto unlock; |
@@ -55,7 +55,7 @@ int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in, | |||
55 | if (usb_control_msg(d->udev, | 55 | if (usb_control_msg(d->udev, |
56 | usb_rcvctrlpipe(d->udev,0), | 56 | usb_rcvctrlpipe(d->udev,0), |
57 | TH_COMMAND_IN, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, | 57 | TH_COMMAND_IN, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, |
58 | inbuf, 12, 2*HZ) != 12) { | 58 | inbuf, 12, 2000) != 12) { |
59 | err("USB control message 'in' went wrong."); | 59 | err("USB control message 'in' went wrong."); |
60 | ret = -EIO; | 60 | ret = -EIO; |
61 | goto unlock; | 61 | goto unlock; |
@@ -94,13 +94,38 @@ static int vp7045_power_ctrl(struct dvb_usb_device *d, int onoff) | |||
94 | /* The keymapping struct. Somehow this should be loaded to the driver, but | 94 | /* The keymapping struct. Somehow this should be loaded to the driver, but |
95 | * currently it is hardcoded. */ | 95 | * currently it is hardcoded. */ |
96 | static struct dvb_usb_rc_key vp7045_rc_keys[] = { | 96 | static struct dvb_usb_rc_key vp7045_rc_keys[] = { |
97 | /* insert the keys like this. to make the raw keys visible, enable | 97 | { 0x00, 0x16, KEY_POWER }, |
98 | * debug=0x04 when loading dvb-usb-vp7045. */ | 98 | { 0x00, 0x10, KEY_MUTE }, |
99 | 99 | { 0x00, 0x03, KEY_1 }, | |
100 | /* these keys are probably wrong. I don't have a working IR-receiver on my | 100 | { 0x00, 0x01, KEY_2 }, |
101 | * vp7045, so I can't test it. Patches are welcome. */ | 101 | { 0x00, 0x06, KEY_3 }, |
102 | { 0x00, 0x01, KEY_1 }, | 102 | { 0x00, 0x09, KEY_4 }, |
103 | { 0x00, 0x02, KEY_2 }, | 103 | { 0x00, 0x1d, KEY_5 }, |
104 | { 0x00, 0x1f, KEY_6 }, | ||
105 | { 0x00, 0x0d, KEY_7 }, | ||
106 | { 0x00, 0x19, KEY_8 }, | ||
107 | { 0x00, 0x1b, KEY_9 }, | ||
108 | { 0x00, 0x15, KEY_0 }, | ||
109 | { 0x00, 0x05, KEY_CHANNELUP }, | ||
110 | { 0x00, 0x02, KEY_CHANNELDOWN }, | ||
111 | { 0x00, 0x1e, KEY_VOLUMEUP }, | ||
112 | { 0x00, 0x0a, KEY_VOLUMEDOWN }, | ||
113 | { 0x00, 0x11, KEY_RECORD }, | ||
114 | { 0x00, 0x17, KEY_FAVORITES }, /* Heart symbol - Channel list. */ | ||
115 | { 0x00, 0x14, KEY_PLAY }, | ||
116 | { 0x00, 0x1a, KEY_STOP }, | ||
117 | { 0x00, 0x40, KEY_REWIND }, | ||
118 | { 0x00, 0x12, KEY_FASTFORWARD }, | ||
119 | { 0x00, 0x0e, KEY_PREVIOUS }, /* Recall - Previous channel. */ | ||
120 | { 0x00, 0x4c, KEY_PAUSE }, | ||
121 | { 0x00, 0x4d, KEY_SCREEN }, /* Full screen mode. */ | ||
122 | { 0x00, 0x54, KEY_AUDIO }, /* MTS - Switch to secondary audio. */ | ||
123 | { 0x00, 0x0c, KEY_CANCEL }, /* Cancel */ | ||
124 | { 0x00, 0x1c, KEY_EPG }, /* EPG */ | ||
125 | { 0x00, 0x00, KEY_TAB }, /* Tab */ | ||
126 | { 0x00, 0x48, KEY_INFO }, /* Preview */ | ||
127 | { 0x00, 0x04, KEY_LIST }, /* RecordList */ | ||
128 | { 0x00, 0x0f, KEY_TEXT } /* Teletext */ | ||
104 | }; | 129 | }; |
105 | 130 | ||
106 | static int vp7045_rc_query(struct dvb_usb_device *d, u32 *key_buf, int *state) | 131 | static int vp7045_rc_query(struct dvb_usb_device *d, u32 *key_buf, int *state) |
@@ -230,7 +255,7 @@ static struct dvb_usb_properties vp7045_properties = { | |||
230 | /* usb specific object needed to register this driver with the usb subsystem */ | 255 | /* usb specific object needed to register this driver with the usb subsystem */ |
231 | static struct usb_driver vp7045_usb_driver = { | 256 | static struct usb_driver vp7045_usb_driver = { |
232 | .owner = THIS_MODULE, | 257 | .owner = THIS_MODULE, |
233 | .name = "dvb-usb-vp7045", | 258 | .name = "dvb_usb_vp7045", |
234 | .probe = vp7045_usb_probe, | 259 | .probe = vp7045_usb_probe, |
235 | .disconnect = dvb_usb_device_exit, | 260 | .disconnect = dvb_usb_device_exit, |
236 | .id_table = vp7045_usb_table, | 261 | .id_table = vp7045_usb_table, |
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig index b4fddf513ebe..d847c62bd837 100644 --- a/drivers/media/dvb/frontends/Kconfig +++ b/drivers/media/dvb/frontends/Kconfig | |||
@@ -40,6 +40,12 @@ config DVB_VES1X93 | |||
40 | help | 40 | help |
41 | A DVB-S tuner module. Say Y when you want to support this frontend. | 41 | A DVB-S tuner module. Say Y when you want to support this frontend. |
42 | 42 | ||
43 | config DVB_S5H1420 | ||
44 | tristate "Samsung S5H1420 based" | ||
45 | depends on DVB_CORE | ||
46 | help | ||
47 | A DVB-S tuner module. Say Y when you want to support this frontend. | ||
48 | |||
43 | comment "DVB-T (terrestrial) frontends" | 49 | comment "DVB-T (terrestrial) frontends" |
44 | depends on DVB_CORE | 50 | depends on DVB_CORE |
45 | 51 | ||
@@ -181,4 +187,11 @@ config DVB_BCM3510 | |||
181 | An ATSC 8VSB/16VSB and QAM64/256 tuner module. Say Y when you want to | 187 | An ATSC 8VSB/16VSB and QAM64/256 tuner module. Say Y when you want to |
182 | support this frontend. | 188 | support this frontend. |
183 | 189 | ||
190 | config DVB_LGDT3302 | ||
191 | tristate "LGDT3302 based (DViCO FusionHDTV3 Gold)" | ||
192 | depends on DVB_CORE | ||
193 | help | ||
194 | An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want | ||
195 | to support this frontend. | ||
196 | |||
184 | endmenu | 197 | endmenu |
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile index 91d6d3576d3d..de5e240cba7f 100644 --- a/drivers/media/dvb/frontends/Makefile +++ b/drivers/media/dvb/frontends/Makefile | |||
@@ -29,3 +29,5 @@ obj-$(CONFIG_DVB_NXT2002) += nxt2002.o | |||
29 | obj-$(CONFIG_DVB_OR51211) += or51211.o | 29 | obj-$(CONFIG_DVB_OR51211) += or51211.o |
30 | obj-$(CONFIG_DVB_OR51132) += or51132.o | 30 | obj-$(CONFIG_DVB_OR51132) += or51132.o |
31 | obj-$(CONFIG_DVB_BCM3510) += bcm3510.o | 31 | obj-$(CONFIG_DVB_BCM3510) += bcm3510.o |
32 | obj-$(CONFIG_DVB_S5H1420) += s5h1420.o | ||
33 | obj-$(CONFIG_DVB_LGDT3302) += lgdt3302.o | ||
diff --git a/drivers/media/dvb/frontends/cx22702.c b/drivers/media/dvb/frontends/cx22702.c index f4aa44136c7c..9f639297a9f2 100644 --- a/drivers/media/dvb/frontends/cx22702.c +++ b/drivers/media/dvb/frontends/cx22702.c | |||
@@ -76,7 +76,6 @@ static u8 init_tab [] = { | |||
76 | 0x49, 0x56, | 76 | 0x49, 0x56, |
77 | 0x6b, 0x1e, | 77 | 0x6b, 0x1e, |
78 | 0xc8, 0x02, | 78 | 0xc8, 0x02, |
79 | 0xf8, 0x02, | ||
80 | 0xf9, 0x00, | 79 | 0xf9, 0x00, |
81 | 0xfa, 0x00, | 80 | 0xfa, 0x00, |
82 | 0xfb, 0x00, | 81 | 0xfb, 0x00, |
@@ -203,7 +202,7 @@ static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
203 | struct cx22702_state* state = fe->demodulator_priv; | 202 | struct cx22702_state* state = fe->demodulator_priv; |
204 | 203 | ||
205 | /* set PLL */ | 204 | /* set PLL */ |
206 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe); | 205 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe); |
207 | if (state->config->pll_set) { | 206 | if (state->config->pll_set) { |
208 | state->config->pll_set(fe, p); | 207 | state->config->pll_set(fe, p); |
209 | } else if (state->config->pll_desc) { | 208 | } else if (state->config->pll_desc) { |
@@ -217,7 +216,7 @@ static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
217 | } else { | 216 | } else { |
218 | BUG(); | 217 | BUG(); |
219 | } | 218 | } |
220 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1); | 219 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1); |
221 | 220 | ||
222 | /* set inversion */ | 221 | /* set inversion */ |
223 | cx22702_set_inversion (state, p->inversion); | 222 | cx22702_set_inversion (state, p->inversion); |
@@ -256,7 +255,7 @@ static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
256 | cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc ); | 255 | cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc ); |
257 | cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 ); | 256 | cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 ); |
258 | cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */ | 257 | cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */ |
259 | printk("%s: Autodetecting\n",__FUNCTION__); | 258 | dprintk("%s: Autodetecting\n",__FUNCTION__); |
260 | return 0; | 259 | return 0; |
261 | } | 260 | } |
262 | 261 | ||
@@ -347,10 +346,11 @@ static int cx22702_init (struct dvb_frontend* fe) | |||
347 | for (i=0; i<sizeof(init_tab); i+=2) | 346 | for (i=0; i<sizeof(init_tab); i+=2) |
348 | cx22702_writereg (state, init_tab[i], init_tab[i+1]); | 347 | cx22702_writereg (state, init_tab[i], init_tab[i+1]); |
349 | 348 | ||
349 | cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02); | ||
350 | 350 | ||
351 | /* init PLL */ | 351 | /* init PLL */ |
352 | if (state->config->pll_init) { | 352 | if (state->config->pll_init) { |
353 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe); | 353 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) & 0xfe); |
354 | state->config->pll_init(fe); | 354 | state->config->pll_init(fe); |
355 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1); | 355 | cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1); |
356 | } | 356 | } |
@@ -440,8 +440,10 @@ static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |||
440 | 440 | ||
441 | /* RS Uncorrectable Packet Count then reset */ | 441 | /* RS Uncorrectable Packet Count then reset */ |
442 | _ucblocks = cx22702_readreg (state, 0xE3); | 442 | _ucblocks = cx22702_readreg (state, 0xE3); |
443 | if (state->prevUCBlocks < _ucblocks) *ucblocks = (_ucblocks - state->prevUCBlocks); | 443 | if (state->prevUCBlocks < _ucblocks) |
444 | else *ucblocks = state->prevUCBlocks - _ucblocks; | 444 | *ucblocks = (_ucblocks - state->prevUCBlocks); |
445 | else | ||
446 | *ucblocks = state->prevUCBlocks - _ucblocks; | ||
445 | state->prevUCBlocks = _ucblocks; | 447 | state->prevUCBlocks = _ucblocks; |
446 | 448 | ||
447 | return 0; | 449 | return 0; |
@@ -457,6 +459,12 @@ static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par | |||
457 | return cx22702_get_tps (state, &p->u.ofdm); | 459 | return cx22702_get_tps (state, &p->u.ofdm); |
458 | } | 460 | } |
459 | 461 | ||
462 | static int cx22702_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune) | ||
463 | { | ||
464 | tune->min_delay_ms = 1000; | ||
465 | return 0; | ||
466 | } | ||
467 | |||
460 | static void cx22702_release(struct dvb_frontend* fe) | 468 | static void cx22702_release(struct dvb_frontend* fe) |
461 | { | 469 | { |
462 | struct cx22702_state* state = fe->demodulator_priv; | 470 | struct cx22702_state* state = fe->demodulator_priv; |
@@ -472,7 +480,8 @@ struct dvb_frontend* cx22702_attach(const struct cx22702_config* config, | |||
472 | 480 | ||
473 | /* allocate memory for the internal state */ | 481 | /* allocate memory for the internal state */ |
474 | state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL); | 482 | state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL); |
475 | if (state == NULL) goto error; | 483 | if (state == NULL) |
484 | goto error; | ||
476 | 485 | ||
477 | /* setup the state */ | 486 | /* setup the state */ |
478 | state->config = config; | 487 | state->config = config; |
@@ -481,7 +490,8 @@ struct dvb_frontend* cx22702_attach(const struct cx22702_config* config, | |||
481 | state->prevUCBlocks = 0; | 490 | state->prevUCBlocks = 0; |
482 | 491 | ||
483 | /* check if the demod is there */ | 492 | /* check if the demod is there */ |
484 | if (cx22702_readreg(state, 0x1f) != 0x3) goto error; | 493 | if (cx22702_readreg(state, 0x1f) != 0x3) |
494 | goto error; | ||
485 | 495 | ||
486 | /* create dvb_frontend */ | 496 | /* create dvb_frontend */ |
487 | state->frontend.ops = &state->ops; | 497 | state->frontend.ops = &state->ops; |
@@ -514,6 +524,7 @@ static struct dvb_frontend_ops cx22702_ops = { | |||
514 | 524 | ||
515 | .set_frontend = cx22702_set_tps, | 525 | .set_frontend = cx22702_set_tps, |
516 | .get_frontend = cx22702_get_frontend, | 526 | .get_frontend = cx22702_get_frontend, |
527 | .get_tune_settings = cx22702_get_tune_settings, | ||
517 | 528 | ||
518 | .read_status = cx22702_read_status, | 529 | .read_status = cx22702_read_status, |
519 | .read_ber = cx22702_read_ber, | 530 | .read_ber = cx22702_read_ber, |
diff --git a/drivers/media/dvb/frontends/cx22702.h b/drivers/media/dvb/frontends/cx22702.h index 559fdb906669..11f86806756e 100644 --- a/drivers/media/dvb/frontends/cx22702.h +++ b/drivers/media/dvb/frontends/cx22702.h | |||
@@ -35,6 +35,11 @@ struct cx22702_config | |||
35 | /* the demodulator's i2c address */ | 35 | /* the demodulator's i2c address */ |
36 | u8 demod_address; | 36 | u8 demod_address; |
37 | 37 | ||
38 | /* serial/parallel output */ | ||
39 | #define CX22702_PARALLEL_OUTPUT 0 | ||
40 | #define CX22702_SERIAL_OUTPUT 1 | ||
41 | u8 output_mode; | ||
42 | |||
38 | /* PLL maintenance */ | 43 | /* PLL maintenance */ |
39 | u8 pll_address; | 44 | u8 pll_address; |
40 | struct dvb_pll_desc *pll_desc; | 45 | struct dvb_pll_desc *pll_desc; |
diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c index f73b5f48e235..5afeaa9b43b4 100644 --- a/drivers/media/dvb/frontends/dvb-pll.c +++ b/drivers/media/dvb/frontends/dvb-pll.c | |||
@@ -55,7 +55,7 @@ struct dvb_pll_desc dvb_pll_thomson_dtt7610 = { | |||
55 | }; | 55 | }; |
56 | EXPORT_SYMBOL(dvb_pll_thomson_dtt7610); | 56 | EXPORT_SYMBOL(dvb_pll_thomson_dtt7610); |
57 | 57 | ||
58 | static void thomson_dtt759x_bw(u8 *buf, int bandwidth) | 58 | static void thomson_dtt759x_bw(u8 *buf, u32 freq, int bandwidth) |
59 | { | 59 | { |
60 | if (BANDWIDTH_7_MHZ == bandwidth) | 60 | if (BANDWIDTH_7_MHZ == bandwidth) |
61 | buf[3] |= 0x10; | 61 | buf[3] |= 0x10; |
@@ -93,6 +93,32 @@ struct dvb_pll_desc dvb_pll_lg_z201 = { | |||
93 | }; | 93 | }; |
94 | EXPORT_SYMBOL(dvb_pll_lg_z201); | 94 | EXPORT_SYMBOL(dvb_pll_lg_z201); |
95 | 95 | ||
96 | struct dvb_pll_desc dvb_pll_microtune_4042 = { | ||
97 | .name = "Microtune 4042 FI5", | ||
98 | .min = 57000000, | ||
99 | .max = 858000000, | ||
100 | .count = 3, | ||
101 | .entries = { | ||
102 | { 162000000, 44000000, 62500, 0x8e, 0xa1 }, | ||
103 | { 457000000, 44000000, 62500, 0x8e, 0x91 }, | ||
104 | { 999999999, 44000000, 62500, 0x8e, 0x31 }, | ||
105 | }, | ||
106 | }; | ||
107 | EXPORT_SYMBOL(dvb_pll_microtune_4042); | ||
108 | |||
109 | struct dvb_pll_desc dvb_pll_thomson_dtt7611 = { | ||
110 | .name = "Thomson dtt7611", | ||
111 | .min = 44000000, | ||
112 | .max = 958000000, | ||
113 | .count = 3, | ||
114 | .entries = { | ||
115 | { 157250000, 44000000, 62500, 0x8e, 0x39 }, | ||
116 | { 454000000, 44000000, 62500, 0x8e, 0x3a }, | ||
117 | { 999999999, 44000000, 62500, 0x8e, 0x3c }, | ||
118 | }, | ||
119 | }; | ||
120 | EXPORT_SYMBOL(dvb_pll_thomson_dtt7611); | ||
121 | |||
96 | struct dvb_pll_desc dvb_pll_unknown_1 = { | 122 | struct dvb_pll_desc dvb_pll_unknown_1 = { |
97 | .name = "unknown 1", /* used by dntv live dvb-t */ | 123 | .name = "unknown 1", /* used by dntv live dvb-t */ |
98 | .min = 174000000, | 124 | .min = 174000000, |
@@ -146,7 +172,7 @@ EXPORT_SYMBOL(dvb_pll_env57h1xd5); | |||
146 | /* Philips TDA6650/TDA6651 | 172 | /* Philips TDA6650/TDA6651 |
147 | * used in Panasonic ENV77H11D5 | 173 | * used in Panasonic ENV77H11D5 |
148 | */ | 174 | */ |
149 | static void tda665x_bw(u8 *buf, int bandwidth) | 175 | static void tda665x_bw(u8 *buf, u32 freq, int bandwidth) |
150 | { | 176 | { |
151 | if (bandwidth == BANDWIDTH_8_MHZ) | 177 | if (bandwidth == BANDWIDTH_8_MHZ) |
152 | buf[3] |= 0x08; | 178 | buf[3] |= 0x08; |
@@ -178,7 +204,7 @@ EXPORT_SYMBOL(dvb_pll_tda665x); | |||
178 | /* Infineon TUA6034 | 204 | /* Infineon TUA6034 |
179 | * used in LG TDTP E102P | 205 | * used in LG TDTP E102P |
180 | */ | 206 | */ |
181 | static void tua6034_bw(u8 *buf, int bandwidth) | 207 | static void tua6034_bw(u8 *buf, u32 freq, int bandwidth) |
182 | { | 208 | { |
183 | if (BANDWIDTH_7_MHZ != bandwidth) | 209 | if (BANDWIDTH_7_MHZ != bandwidth) |
184 | buf[3] |= 0x08; | 210 | buf[3] |= 0x08; |
@@ -198,6 +224,57 @@ struct dvb_pll_desc dvb_pll_tua6034 = { | |||
198 | }; | 224 | }; |
199 | EXPORT_SYMBOL(dvb_pll_tua6034); | 225 | EXPORT_SYMBOL(dvb_pll_tua6034); |
200 | 226 | ||
227 | /* Philips FMD1216ME | ||
228 | * used in Medion Hybrid PCMCIA card and USB Box | ||
229 | */ | ||
230 | static void fmd1216me_bw(u8 *buf, u32 freq, int bandwidth) | ||
231 | { | ||
232 | if (bandwidth == BANDWIDTH_8_MHZ && freq >= 158870000) | ||
233 | buf[3] |= 0x08; | ||
234 | } | ||
235 | |||
236 | struct dvb_pll_desc dvb_pll_fmd1216me = { | ||
237 | .name = "Philips FMD1216ME", | ||
238 | .min = 50870000, | ||
239 | .max = 858000000, | ||
240 | .setbw = fmd1216me_bw, | ||
241 | .count = 7, | ||
242 | .entries = { | ||
243 | { 143870000, 36213333, 166667, 0xbc, 0x41 }, | ||
244 | { 158870000, 36213333, 166667, 0xf4, 0x41 }, | ||
245 | { 329870000, 36213333, 166667, 0xbc, 0x42 }, | ||
246 | { 441870000, 36213333, 166667, 0xf4, 0x42 }, | ||
247 | { 625870000, 36213333, 166667, 0xbc, 0x44 }, | ||
248 | { 803870000, 36213333, 166667, 0xf4, 0x44 }, | ||
249 | { 999999999, 36213333, 166667, 0xfc, 0x44 }, | ||
250 | } | ||
251 | }; | ||
252 | EXPORT_SYMBOL(dvb_pll_fmd1216me); | ||
253 | |||
254 | /* ALPS TDED4 | ||
255 | * used in Nebula-Cards and USB boxes | ||
256 | */ | ||
257 | static void tded4_bw(u8 *buf, u32 freq, int bandwidth) | ||
258 | { | ||
259 | if (bandwidth == BANDWIDTH_8_MHZ) | ||
260 | buf[3] |= 0x04; | ||
261 | } | ||
262 | |||
263 | struct dvb_pll_desc dvb_pll_tded4 = { | ||
264 | .name = "ALPS TDED4", | ||
265 | .min = 47000000, | ||
266 | .max = 863000000, | ||
267 | .setbw = tded4_bw, | ||
268 | .count = 4, | ||
269 | .entries = { | ||
270 | { 153000000, 36166667, 166667, 0x85, 0x01 }, | ||
271 | { 470000000, 36166667, 166667, 0x85, 0x02 }, | ||
272 | { 823000000, 36166667, 166667, 0x85, 0x08 }, | ||
273 | { 999999999, 36166667, 166667, 0x85, 0x88 }, | ||
274 | } | ||
275 | }; | ||
276 | EXPORT_SYMBOL(dvb_pll_tded4); | ||
277 | |||
201 | /* ----------------------------------------------------------- */ | 278 | /* ----------------------------------------------------------- */ |
202 | /* code */ | 279 | /* code */ |
203 | 280 | ||
@@ -231,7 +308,7 @@ int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf, | |||
231 | buf[3] = desc->entries[i].cb2; | 308 | buf[3] = desc->entries[i].cb2; |
232 | 309 | ||
233 | if (desc->setbw) | 310 | if (desc->setbw) |
234 | desc->setbw(buf, bandwidth); | 311 | desc->setbw(buf, freq, bandwidth); |
235 | 312 | ||
236 | if (debug) | 313 | if (debug) |
237 | printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", | 314 | printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", |
diff --git a/drivers/media/dvb/frontends/dvb-pll.h b/drivers/media/dvb/frontends/dvb-pll.h index b796778624b6..cb794759d89e 100644 --- a/drivers/media/dvb/frontends/dvb-pll.h +++ b/drivers/media/dvb/frontends/dvb-pll.h | |||
@@ -9,7 +9,7 @@ struct dvb_pll_desc { | |||
9 | char *name; | 9 | char *name; |
10 | u32 min; | 10 | u32 min; |
11 | u32 max; | 11 | u32 max; |
12 | void (*setbw)(u8 *buf, int bandwidth); | 12 | void (*setbw)(u8 *buf, u32 freq, int bandwidth); |
13 | int count; | 13 | int count; |
14 | struct { | 14 | struct { |
15 | u32 limit; | 15 | u32 limit; |
@@ -24,12 +24,16 @@ extern struct dvb_pll_desc dvb_pll_thomson_dtt7579; | |||
24 | extern struct dvb_pll_desc dvb_pll_thomson_dtt759x; | 24 | extern struct dvb_pll_desc dvb_pll_thomson_dtt759x; |
25 | extern struct dvb_pll_desc dvb_pll_thomson_dtt7610; | 25 | extern struct dvb_pll_desc dvb_pll_thomson_dtt7610; |
26 | extern struct dvb_pll_desc dvb_pll_lg_z201; | 26 | extern struct dvb_pll_desc dvb_pll_lg_z201; |
27 | extern struct dvb_pll_desc dvb_pll_microtune_4042; | ||
28 | extern struct dvb_pll_desc dvb_pll_thomson_dtt7611; | ||
27 | extern struct dvb_pll_desc dvb_pll_unknown_1; | 29 | extern struct dvb_pll_desc dvb_pll_unknown_1; |
28 | 30 | ||
29 | extern struct dvb_pll_desc dvb_pll_tua6010xs; | 31 | extern struct dvb_pll_desc dvb_pll_tua6010xs; |
30 | extern struct dvb_pll_desc dvb_pll_env57h1xd5; | 32 | extern struct dvb_pll_desc dvb_pll_env57h1xd5; |
31 | extern struct dvb_pll_desc dvb_pll_tua6034; | 33 | extern struct dvb_pll_desc dvb_pll_tua6034; |
32 | extern struct dvb_pll_desc dvb_pll_tda665x; | 34 | extern struct dvb_pll_desc dvb_pll_tda665x; |
35 | extern struct dvb_pll_desc dvb_pll_fmd1216me; | ||
36 | extern struct dvb_pll_desc dvb_pll_tded4; | ||
33 | 37 | ||
34 | int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf, | 38 | int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf, |
35 | u32 freq, int bandwidth); | 39 | u32 freq, int bandwidth); |
diff --git a/drivers/media/dvb/frontends/l64781.c b/drivers/media/dvb/frontends/l64781.c index 031a1ddc7d11..faaad1ae8559 100644 --- a/drivers/media/dvb/frontends/l64781.c +++ b/drivers/media/dvb/frontends/l64781.c | |||
@@ -474,11 +474,12 @@ static int l64781_init(struct dvb_frontend* fe) | |||
474 | return 0; | 474 | return 0; |
475 | } | 475 | } |
476 | 476 | ||
477 | static int l64781_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | 477 | static int l64781_get_tune_settings(struct dvb_frontend* fe, |
478 | struct dvb_frontend_tune_settings* fesettings) | ||
478 | { | 479 | { |
479 | fesettings->min_delay_ms = 200; | 480 | fesettings->min_delay_ms = 4000; |
480 | fesettings->step_size = 166667; | 481 | fesettings->step_size = 0; |
481 | fesettings->max_drift = 166667*2; | 482 | fesettings->max_drift = 0; |
482 | return 0; | 483 | return 0; |
483 | } | 484 | } |
484 | 485 | ||
diff --git a/drivers/media/dvb/frontends/lgdt3302.c b/drivers/media/dvb/frontends/lgdt3302.c new file mode 100644 index 000000000000..09c914256e49 --- /dev/null +++ b/drivers/media/dvb/frontends/lgdt3302.c | |||
@@ -0,0 +1,611 @@ | |||
1 | /* | ||
2 | * $Id: lgdt3302.c,v 1.5 2005/07/07 03:47:15 mkrufky Exp $ | ||
3 | * | ||
4 | * Support for LGDT3302 (DViCO FustionHDTV 3 Gold) - VSB/QAM | ||
5 | * | ||
6 | * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> | ||
7 | * | ||
8 | * Based on code from Kirk Lapray <kirk_lapray@bigfoot.com> | ||
9 | * Copyright (C) 2005 | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | * GNU General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
24 | * | ||
25 | */ | ||
26 | |||
27 | /* | ||
28 | * NOTES ABOUT THIS DRIVER | ||
29 | * | ||
30 | * This driver supports DViCO FusionHDTV 3 Gold under Linux. | ||
31 | * | ||
32 | * TODO: | ||
33 | * BER and signal strength always return 0. | ||
34 | * | ||
35 | */ | ||
36 | |||
37 | #include <linux/kernel.h> | ||
38 | #include <linux/module.h> | ||
39 | #include <linux/moduleparam.h> | ||
40 | #include <linux/init.h> | ||
41 | #include <linux/delay.h> | ||
42 | #include <asm/byteorder.h> | ||
43 | |||
44 | #include "dvb_frontend.h" | ||
45 | #include "dvb-pll.h" | ||
46 | #include "lgdt3302_priv.h" | ||
47 | #include "lgdt3302.h" | ||
48 | |||
49 | static int debug = 0; | ||
50 | module_param(debug, int, 0644); | ||
51 | MODULE_PARM_DESC(debug,"Turn on/off lgdt3302 frontend debugging (default:off)."); | ||
52 | #define dprintk(args...) \ | ||
53 | do { \ | ||
54 | if (debug) printk(KERN_DEBUG "lgdt3302: " args); \ | ||
55 | } while (0) | ||
56 | |||
57 | struct lgdt3302_state | ||
58 | { | ||
59 | struct i2c_adapter* i2c; | ||
60 | struct dvb_frontend_ops ops; | ||
61 | |||
62 | /* Configuration settings */ | ||
63 | const struct lgdt3302_config* config; | ||
64 | |||
65 | struct dvb_frontend frontend; | ||
66 | |||
67 | /* Demodulator private data */ | ||
68 | fe_modulation_t current_modulation; | ||
69 | |||
70 | /* Tuner private data */ | ||
71 | u32 current_frequency; | ||
72 | }; | ||
73 | |||
74 | static int i2c_writebytes (struct lgdt3302_state* state, | ||
75 | u8 addr, /* demod_address or pll_address */ | ||
76 | u8 *buf, /* data bytes to send */ | ||
77 | int len /* number of bytes to send */ ) | ||
78 | { | ||
79 | if (addr == state->config->pll_address) { | ||
80 | struct i2c_msg msg = | ||
81 | { .addr = addr, .flags = 0, .buf = buf, .len = len }; | ||
82 | int err; | ||
83 | |||
84 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { | ||
85 | printk(KERN_WARNING "lgdt3302: %s error (addr %02x <- %02x, err == %i)\n", __FUNCTION__, addr, buf[0], err); | ||
86 | return -EREMOTEIO; | ||
87 | } | ||
88 | } else { | ||
89 | u8 tmp[] = { buf[0], buf[1] }; | ||
90 | struct i2c_msg msg = | ||
91 | { .addr = addr, .flags = 0, .buf = tmp, .len = 2 }; | ||
92 | int err; | ||
93 | int i; | ||
94 | |||
95 | for (i=1; i<len; i++) { | ||
96 | tmp[1] = buf[i]; | ||
97 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { | ||
98 | printk(KERN_WARNING "lgdt3302: %s error (addr %02x <- %02x, err == %i)\n", __FUNCTION__, addr, buf[0], err); | ||
99 | return -EREMOTEIO; | ||
100 | } | ||
101 | tmp[0]++; | ||
102 | } | ||
103 | } | ||
104 | return 0; | ||
105 | } | ||
106 | static int i2c_readbytes (struct lgdt3302_state* state, | ||
107 | u8 addr, /* demod_address or pll_address */ | ||
108 | u8 *buf, /* holds data bytes read */ | ||
109 | int len /* number of bytes to read */ ) | ||
110 | { | ||
111 | struct i2c_msg msg = | ||
112 | { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len }; | ||
113 | int err; | ||
114 | |||
115 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { | ||
116 | printk(KERN_WARNING "lgdt3302: %s error (addr %02x, err == %i)\n", __FUNCTION__, addr, err); | ||
117 | return -EREMOTEIO; | ||
118 | } | ||
119 | return 0; | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * This routine writes the register (reg) to the demod bus | ||
124 | * then reads the data returned for (len) bytes. | ||
125 | */ | ||
126 | |||
127 | static u8 i2c_selectreadbytes (struct lgdt3302_state* state, | ||
128 | enum I2C_REG reg, u8* buf, int len) | ||
129 | { | ||
130 | u8 wr [] = { reg }; | ||
131 | struct i2c_msg msg [] = { | ||
132 | { .addr = state->config->demod_address, | ||
133 | .flags = 0, .buf = wr, .len = 1 }, | ||
134 | { .addr = state->config->demod_address, | ||
135 | .flags = I2C_M_RD, .buf = buf, .len = len }, | ||
136 | }; | ||
137 | int ret; | ||
138 | ret = i2c_transfer(state->i2c, msg, 2); | ||
139 | if (ret != 2) { | ||
140 | printk(KERN_WARNING "lgdt3302: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret); | ||
141 | } else { | ||
142 | ret = 0; | ||
143 | } | ||
144 | return ret; | ||
145 | } | ||
146 | |||
147 | /* Software reset */ | ||
148 | int lgdt3302_SwReset(struct lgdt3302_state* state) | ||
149 | { | ||
150 | u8 ret; | ||
151 | u8 reset[] = { | ||
152 | IRQ_MASK, | ||
153 | 0x00 /* bit 6 is active low software reset | ||
154 | * bits 5-0 are 1 to mask interrupts */ | ||
155 | }; | ||
156 | |||
157 | ret = i2c_writebytes(state, | ||
158 | state->config->demod_address, | ||
159 | reset, sizeof(reset)); | ||
160 | if (ret == 0) { | ||
161 | /* spec says reset takes 100 ns why wait */ | ||
162 | /* mdelay(100); */ /* keep low for 100mS */ | ||
163 | reset[1] = 0x7f; /* force reset high (inactive) | ||
164 | * and unmask interrupts */ | ||
165 | ret = i2c_writebytes(state, | ||
166 | state->config->demod_address, | ||
167 | reset, sizeof(reset)); | ||
168 | } | ||
169 | /* Spec does not indicate a need for this either */ | ||
170 | /*mdelay(5); */ /* wait 5 msec before doing more */ | ||
171 | return ret; | ||
172 | } | ||
173 | |||
174 | static int lgdt3302_init(struct dvb_frontend* fe) | ||
175 | { | ||
176 | /* Hardware reset is done using gpio[0] of cx23880x chip. | ||
177 | * I'd like to do it here, but don't know how to find chip address. | ||
178 | * cx88-cards.c arranges for the reset bit to be inactive (high). | ||
179 | * Maybe there needs to be a callable function in cx88-core or | ||
180 | * the caller of this function needs to do it. */ | ||
181 | |||
182 | dprintk("%s entered\n", __FUNCTION__); | ||
183 | return lgdt3302_SwReset((struct lgdt3302_state*) fe->demodulator_priv); | ||
184 | } | ||
185 | |||
186 | static int lgdt3302_read_ber(struct dvb_frontend* fe, u32* ber) | ||
187 | { | ||
188 | *ber = 0; /* Dummy out for now */ | ||
189 | return 0; | ||
190 | } | ||
191 | |||
192 | static int lgdt3302_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | ||
193 | { | ||
194 | struct lgdt3302_state* state = (struct lgdt3302_state*) fe->demodulator_priv; | ||
195 | u8 buf[2]; | ||
196 | |||
197 | i2c_selectreadbytes(state, PACKET_ERR_COUNTER1, buf, sizeof(buf)); | ||
198 | |||
199 | *ucblocks = (buf[0] << 8) | buf[1]; | ||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | static int lgdt3302_set_parameters(struct dvb_frontend* fe, | ||
204 | struct dvb_frontend_parameters *param) | ||
205 | { | ||
206 | u8 buf[4]; | ||
207 | struct lgdt3302_state* state = | ||
208 | (struct lgdt3302_state*) fe->demodulator_priv; | ||
209 | |||
210 | /* Use 50MHz parameter values from spec sheet since xtal is 50 */ | ||
211 | static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 }; | ||
212 | static u8 vsb_freq_cfg[] = { VSB_CARRIER_FREQ0, 0x00, 0x87, 0x8e, 0x01 }; | ||
213 | static u8 demux_ctrl_cfg[] = { DEMUX_CONTROL, 0xfb }; | ||
214 | static u8 agc_rf_cfg[] = { AGC_RF_BANDWIDTH0, 0x40, 0x93, 0x00 }; | ||
215 | static u8 agc_ctrl_cfg[] = { AGC_FUNC_CTRL2, 0xc6, 0x40 }; | ||
216 | static u8 agc_delay_cfg[] = { AGC_DELAY0, 0x00, 0x00, 0x00 }; | ||
217 | static u8 agc_loop_cfg[] = { AGC_LOOP_BANDWIDTH0, 0x08, 0x9a }; | ||
218 | |||
219 | /* Change only if we are actually changing the modulation */ | ||
220 | if (state->current_modulation != param->u.vsb.modulation) { | ||
221 | switch(param->u.vsb.modulation) { | ||
222 | case VSB_8: | ||
223 | dprintk("%s: VSB_8 MODE\n", __FUNCTION__); | ||
224 | |||
225 | /* Select VSB mode and serial MPEG interface */ | ||
226 | top_ctrl_cfg[1] = 0x07; | ||
227 | break; | ||
228 | |||
229 | case QAM_64: | ||
230 | dprintk("%s: QAM_64 MODE\n", __FUNCTION__); | ||
231 | |||
232 | /* Select QAM_64 mode and serial MPEG interface */ | ||
233 | top_ctrl_cfg[1] = 0x04; | ||
234 | break; | ||
235 | |||
236 | case QAM_256: | ||
237 | dprintk("%s: QAM_256 MODE\n", __FUNCTION__); | ||
238 | |||
239 | /* Select QAM_256 mode and serial MPEG interface */ | ||
240 | top_ctrl_cfg[1] = 0x05; | ||
241 | break; | ||
242 | default: | ||
243 | printk(KERN_WARNING "lgdt3302: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation); | ||
244 | return -1; | ||
245 | } | ||
246 | /* Initializations common to all modes */ | ||
247 | |||
248 | /* Select the requested mode */ | ||
249 | i2c_writebytes(state, state->config->demod_address, | ||
250 | top_ctrl_cfg, sizeof(top_ctrl_cfg)); | ||
251 | |||
252 | /* Change the value of IFBW[11:0] | ||
253 | of AGC IF/RF loop filter bandwidth register */ | ||
254 | i2c_writebytes(state, state->config->demod_address, | ||
255 | agc_rf_cfg, sizeof(agc_rf_cfg)); | ||
256 | |||
257 | /* Change the value of bit 6, 'nINAGCBY' and | ||
258 | 'NSSEL[1:0] of ACG function control register 2 */ | ||
259 | /* Change the value of bit 6 'RFFIX' | ||
260 | of AGC function control register 3 */ | ||
261 | i2c_writebytes(state, state->config->demod_address, | ||
262 | agc_ctrl_cfg, sizeof(agc_ctrl_cfg)); | ||
263 | |||
264 | /* Change the TPCLK pin polarity | ||
265 | data is valid on falling clock */ | ||
266 | i2c_writebytes(state, state->config->demod_address, | ||
267 | demux_ctrl_cfg, sizeof(demux_ctrl_cfg)); | ||
268 | |||
269 | if (param->u.vsb.modulation == VSB_8) { | ||
270 | /* Initialization for VSB modes only */ | ||
271 | /* Change the value of NCOCTFV[25:0]of carrier | ||
272 | recovery center frequency register for VSB */ | ||
273 | i2c_writebytes(state, state->config->demod_address, | ||
274 | vsb_freq_cfg, sizeof(vsb_freq_cfg)); | ||
275 | } else { | ||
276 | /* Initialization for QAM modes only */ | ||
277 | /* Set the value of 'INLVTHD' register 0x2a/0x2c | ||
278 | to value from 'IFACC' register 0x39/0x3b -1 */ | ||
279 | int value; | ||
280 | i2c_selectreadbytes(state, AGC_RFIF_ACC0, | ||
281 | &agc_delay_cfg[1], 3); | ||
282 | value = ((agc_delay_cfg[1] & 0x0f) << 8) | agc_delay_cfg[3]; | ||
283 | value = value -1; | ||
284 | dprintk("%s IFACC -1 = 0x%03x\n", __FUNCTION__, value); | ||
285 | agc_delay_cfg[1] = (value >> 8) & 0x0f; | ||
286 | agc_delay_cfg[2] = 0x00; | ||
287 | agc_delay_cfg[3] = value & 0xff; | ||
288 | i2c_writebytes(state, state->config->demod_address, | ||
289 | agc_delay_cfg, sizeof(agc_delay_cfg)); | ||
290 | |||
291 | /* Change the value of IAGCBW[15:8] | ||
292 | of inner AGC loop filter bandwith */ | ||
293 | i2c_writebytes(state, state->config->demod_address, | ||
294 | agc_loop_cfg, sizeof(agc_loop_cfg)); | ||
295 | } | ||
296 | |||
297 | state->config->set_ts_params(fe, 0); | ||
298 | lgdt3302_SwReset(state); | ||
299 | state->current_modulation = param->u.vsb.modulation; | ||
300 | } | ||
301 | |||
302 | /* Change only if we are actually changing the channel */ | ||
303 | if (state->current_frequency != param->frequency) { | ||
304 | dvb_pll_configure(state->config->pll_desc, buf, | ||
305 | param->frequency, 0); | ||
306 | dprintk("%s: tuner bytes: 0x%02x 0x%02x " | ||
307 | "0x%02x 0x%02x\n", __FUNCTION__, buf[0],buf[1],buf[2],buf[3]); | ||
308 | i2c_writebytes(state, state->config->pll_address ,buf, 4); | ||
309 | |||
310 | /* Check the status of the tuner pll */ | ||
311 | i2c_readbytes(state, state->config->pll_address, buf, 1); | ||
312 | dprintk("%s: tuner status byte = 0x%02x\n", __FUNCTION__, buf[0]); | ||
313 | |||
314 | lgdt3302_SwReset(state); | ||
315 | |||
316 | /* Update current frequency */ | ||
317 | state->current_frequency = param->frequency; | ||
318 | } | ||
319 | return 0; | ||
320 | } | ||
321 | |||
322 | static int lgdt3302_get_frontend(struct dvb_frontend* fe, | ||
323 | struct dvb_frontend_parameters* param) | ||
324 | { | ||
325 | struct lgdt3302_state *state = fe->demodulator_priv; | ||
326 | param->frequency = state->current_frequency; | ||
327 | return 0; | ||
328 | } | ||
329 | |||
330 | static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status) | ||
331 | { | ||
332 | struct lgdt3302_state* state = (struct lgdt3302_state*) fe->demodulator_priv; | ||
333 | u8 buf[3]; | ||
334 | |||
335 | *status = 0; /* Reset status result */ | ||
336 | |||
337 | /* Check the status of the tuner pll */ | ||
338 | i2c_readbytes(state, state->config->pll_address, buf, 1); | ||
339 | dprintk("%s: tuner status byte = 0x%02x\n", __FUNCTION__, buf[0]); | ||
340 | if ((buf[0] & 0xc0) != 0x40) | ||
341 | return 0; /* Tuner PLL not locked or not powered on */ | ||
342 | |||
343 | /* | ||
344 | * You must set the Mask bits to 1 in the IRQ_MASK in order | ||
345 | * to see that status bit in the IRQ_STATUS register. | ||
346 | * This is done in SwReset(); | ||
347 | */ | ||
348 | |||
349 | /* AGC status register */ | ||
350 | i2c_selectreadbytes(state, AGC_STATUS, buf, 1); | ||
351 | dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]); | ||
352 | if ((buf[0] & 0x0c) == 0x8){ | ||
353 | /* Test signal does not exist flag */ | ||
354 | /* as well as the AGC lock flag. */ | ||
355 | *status |= FE_HAS_SIGNAL; | ||
356 | } else { | ||
357 | /* Without a signal all other status bits are meaningless */ | ||
358 | return 0; | ||
359 | } | ||
360 | |||
361 | /* signal status */ | ||
362 | i2c_selectreadbytes(state, TOP_CONTROL, buf, sizeof(buf)); | ||
363 | dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]); | ||
364 | |||
365 | #if 0 | ||
366 | /* Alternative method to check for a signal */ | ||
367 | /* using the SNR good/bad interrupts. */ | ||
368 | if ((buf[2] & 0x30) == 0x10) | ||
369 | *status |= FE_HAS_SIGNAL; | ||
370 | #endif | ||
371 | |||
372 | /* sync status */ | ||
373 | if ((buf[2] & 0x03) == 0x01) { | ||
374 | *status |= FE_HAS_SYNC; | ||
375 | } | ||
376 | |||
377 | /* FEC error status */ | ||
378 | if ((buf[2] & 0x0c) == 0x08) { | ||
379 | *status |= FE_HAS_LOCK; | ||
380 | *status |= FE_HAS_VITERBI; | ||
381 | } | ||
382 | |||
383 | /* Carrier Recovery Lock Status Register */ | ||
384 | i2c_selectreadbytes(state, CARRIER_LOCK, buf, 1); | ||
385 | dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]); | ||
386 | switch (state->current_modulation) { | ||
387 | case QAM_256: | ||
388 | case QAM_64: | ||
389 | /* Need to undestand why there are 3 lock levels here */ | ||
390 | if ((buf[0] & 0x07) == 0x07) | ||
391 | *status |= FE_HAS_CARRIER; | ||
392 | break; | ||
393 | case VSB_8: | ||
394 | if ((buf[0] & 0x80) == 0x80) | ||
395 | *status |= FE_HAS_CARRIER; | ||
396 | break; | ||
397 | default: | ||
398 | printk("KERN_WARNING lgdt3302: %s: Modulation set to unsupported value\n", __FUNCTION__); | ||
399 | } | ||
400 | |||
401 | return 0; | ||
402 | } | ||
403 | |||
404 | static int lgdt3302_read_signal_strength(struct dvb_frontend* fe, u16* strength) | ||
405 | { | ||
406 | /* not directly available. */ | ||
407 | return 0; | ||
408 | } | ||
409 | |||
410 | static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr) | ||
411 | { | ||
412 | #ifdef SNR_IN_DB | ||
413 | /* | ||
414 | * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise) | ||
415 | * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker | ||
416 | * respectively. The following tables are built on these formulas. | ||
417 | * The usual definition is SNR = 20 log10(signal/noise) | ||
418 | * If the specification is wrong the value retuned is 1/2 the actual SNR in db. | ||
419 | * | ||
420 | * This table is a an ordered list of noise values computed by the | ||
421 | * formula from the spec sheet such that the index into the table | ||
422 | * starting at 43 or 45 is the SNR value in db. There are duplicate noise | ||
423 | * value entries at the beginning because the SNR varies more than | ||
424 | * 1 db for a change of 1 digit in noise at very small values of noise. | ||
425 | * | ||
426 | * Examples from SNR_EQ table: | ||
427 | * noise SNR | ||
428 | * 0 43 | ||
429 | * 1 42 | ||
430 | * 2 39 | ||
431 | * 3 37 | ||
432 | * 4 36 | ||
433 | * 5 35 | ||
434 | * 6 34 | ||
435 | * 7 33 | ||
436 | * 8 33 | ||
437 | * 9 32 | ||
438 | * 10 32 | ||
439 | * 11 31 | ||
440 | * 12 31 | ||
441 | * 13 30 | ||
442 | */ | ||
443 | |||
444 | static const u32 SNR_EQ[] = | ||
445 | { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7, | ||
446 | 9, 11, 13, 17, 21, 26, 33, 41, 52, 65, | ||
447 | 81, 102, 129, 162, 204, 257, 323, 406, 511, 644, | ||
448 | 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433, | ||
449 | 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323, | ||
450 | 80978, 101945, 128341, 161571, 203406, 256073, 0x40000 | ||
451 | }; | ||
452 | |||
453 | static const u32 SNR_PH[] = | ||
454 | { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8, | ||
455 | 10, 12, 15, 19, 23, 29, 37, 46, 58, 73, | ||
456 | 91, 115, 144, 182, 229, 288, 362, 456, 574, 722, | ||
457 | 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216, | ||
458 | 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151, | ||
459 | 90833, 114351, 143960, 181235, 228161, 0x040000 | ||
460 | }; | ||
461 | |||
462 | static u8 buf[5];/* read data buffer */ | ||
463 | static u32 noise; /* noise value */ | ||
464 | static u32 snr_db; /* index into SNR_EQ[] */ | ||
465 | struct lgdt3302_state* state = (struct lgdt3302_state*) fe->demodulator_priv; | ||
466 | |||
467 | /* read both equalizer and pase tracker noise data */ | ||
468 | i2c_selectreadbytes(state, EQPH_ERR0, buf, sizeof(buf)); | ||
469 | |||
470 | if (state->current_modulation == VSB_8) { | ||
471 | /* Equalizer Mean-Square Error Register for VSB */ | ||
472 | noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2]; | ||
473 | |||
474 | /* | ||
475 | * Look up noise value in table. | ||
476 | * A better search algorithm could be used... | ||
477 | * watch out there are duplicate entries. | ||
478 | */ | ||
479 | for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) { | ||
480 | if (noise < SNR_EQ[snr_db]) { | ||
481 | *snr = 43 - snr_db; | ||
482 | break; | ||
483 | } | ||
484 | } | ||
485 | } else { | ||
486 | /* Phase Tracker Mean-Square Error Register for QAM */ | ||
487 | noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4]; | ||
488 | |||
489 | /* Look up noise value in table. */ | ||
490 | for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) { | ||
491 | if (noise < SNR_PH[snr_db]) { | ||
492 | *snr = 45 - snr_db; | ||
493 | break; | ||
494 | } | ||
495 | } | ||
496 | } | ||
497 | #else | ||
498 | /* Return the raw noise value */ | ||
499 | static u8 buf[5];/* read data buffer */ | ||
500 | static u32 noise; /* noise value */ | ||
501 | struct lgdt3302_state* state = (struct lgdt3302_state*) fe->demodulator_priv; | ||
502 | |||
503 | /* read both equalizer and pase tracker noise data */ | ||
504 | i2c_selectreadbytes(state, EQPH_ERR0, buf, sizeof(buf)); | ||
505 | |||
506 | if (state->current_modulation == VSB_8) { | ||
507 | /* Equalizer Mean-Square Error Register for VSB */ | ||
508 | noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2]; | ||
509 | } else { | ||
510 | /* Phase Tracker Mean-Square Error Register for QAM */ | ||
511 | noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4]; | ||
512 | } | ||
513 | |||
514 | /* Small values for noise mean signal is better so invert noise */ | ||
515 | /* Noise is 19 bit value so discard 3 LSB*/ | ||
516 | *snr = ~noise>>3; | ||
517 | #endif | ||
518 | |||
519 | dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr); | ||
520 | |||
521 | return 0; | ||
522 | } | ||
523 | |||
524 | static int lgdt3302_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings) | ||
525 | { | ||
526 | /* I have no idea about this - it may not be needed */ | ||
527 | fe_tune_settings->min_delay_ms = 500; | ||
528 | fe_tune_settings->step_size = 0; | ||
529 | fe_tune_settings->max_drift = 0; | ||
530 | return 0; | ||
531 | } | ||
532 | |||
533 | static void lgdt3302_release(struct dvb_frontend* fe) | ||
534 | { | ||
535 | struct lgdt3302_state* state = (struct lgdt3302_state*) fe->demodulator_priv; | ||
536 | kfree(state); | ||
537 | } | ||
538 | |||
539 | static struct dvb_frontend_ops lgdt3302_ops; | ||
540 | |||
541 | struct dvb_frontend* lgdt3302_attach(const struct lgdt3302_config* config, | ||
542 | struct i2c_adapter* i2c) | ||
543 | { | ||
544 | struct lgdt3302_state* state = NULL; | ||
545 | u8 buf[1]; | ||
546 | |||
547 | /* Allocate memory for the internal state */ | ||
548 | state = (struct lgdt3302_state*) kmalloc(sizeof(struct lgdt3302_state), GFP_KERNEL); | ||
549 | if (state == NULL) | ||
550 | goto error; | ||
551 | memset(state,0,sizeof(*state)); | ||
552 | |||
553 | /* Setup the state */ | ||
554 | state->config = config; | ||
555 | state->i2c = i2c; | ||
556 | memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops)); | ||
557 | /* Verify communication with demod chip */ | ||
558 | if (i2c_selectreadbytes(state, 2, buf, 1)) | ||
559 | goto error; | ||
560 | |||
561 | state->current_frequency = -1; | ||
562 | state->current_modulation = -1; | ||
563 | |||
564 | /* Create dvb_frontend */ | ||
565 | state->frontend.ops = &state->ops; | ||
566 | state->frontend.demodulator_priv = state; | ||
567 | return &state->frontend; | ||
568 | |||
569 | error: | ||
570 | if (state) | ||
571 | kfree(state); | ||
572 | dprintk("%s: ERROR\n",__FUNCTION__); | ||
573 | return NULL; | ||
574 | } | ||
575 | |||
576 | static struct dvb_frontend_ops lgdt3302_ops = { | ||
577 | .info = { | ||
578 | .name= "LG Electronics LGDT3302 VSB/QAM Frontend", | ||
579 | .type = FE_ATSC, | ||
580 | .frequency_min= 54000000, | ||
581 | .frequency_max= 858000000, | ||
582 | .frequency_stepsize= 62500, | ||
583 | /* Symbol rate is for all VSB modes need to check QAM */ | ||
584 | .symbol_rate_min = 10762000, | ||
585 | .symbol_rate_max = 10762000, | ||
586 | .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB | ||
587 | }, | ||
588 | .init = lgdt3302_init, | ||
589 | .set_frontend = lgdt3302_set_parameters, | ||
590 | .get_frontend = lgdt3302_get_frontend, | ||
591 | .get_tune_settings = lgdt3302_get_tune_settings, | ||
592 | .read_status = lgdt3302_read_status, | ||
593 | .read_ber = lgdt3302_read_ber, | ||
594 | .read_signal_strength = lgdt3302_read_signal_strength, | ||
595 | .read_snr = lgdt3302_read_snr, | ||
596 | .read_ucblocks = lgdt3302_read_ucblocks, | ||
597 | .release = lgdt3302_release, | ||
598 | }; | ||
599 | |||
600 | MODULE_DESCRIPTION("LGDT3302 [DViCO FusionHDTV 3 Gold] (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); | ||
601 | MODULE_AUTHOR("Wilson Michaels"); | ||
602 | MODULE_LICENSE("GPL"); | ||
603 | |||
604 | EXPORT_SYMBOL(lgdt3302_attach); | ||
605 | |||
606 | /* | ||
607 | * Local variables: | ||
608 | * c-basic-offset: 8 | ||
609 | * compile-command: "make DVB=1" | ||
610 | * End: | ||
611 | */ | ||
diff --git a/drivers/media/dvb/frontends/lgdt3302.h b/drivers/media/dvb/frontends/lgdt3302.h new file mode 100644 index 000000000000..81587a40032b --- /dev/null +++ b/drivers/media/dvb/frontends/lgdt3302.h | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * $Id: lgdt3302.h,v 1.2 2005/06/28 23:50:48 mkrufky Exp $ | ||
3 | * | ||
4 | * Support for LGDT3302 (DViCO FustionHDTV 3 Gold) - VSB/QAM | ||
5 | * | ||
6 | * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #ifndef LGDT3302_H | ||
25 | #define LGDT3302_H | ||
26 | |||
27 | #include <linux/dvb/frontend.h> | ||
28 | |||
29 | struct lgdt3302_config | ||
30 | { | ||
31 | /* The demodulator's i2c address */ | ||
32 | u8 demod_address; | ||
33 | u8 pll_address; | ||
34 | struct dvb_pll_desc *pll_desc; | ||
35 | |||
36 | /* Need to set device param for start_dma */ | ||
37 | int (*set_ts_params)(struct dvb_frontend* fe, int is_punctured); | ||
38 | }; | ||
39 | |||
40 | extern struct dvb_frontend* lgdt3302_attach(const struct lgdt3302_config* config, | ||
41 | struct i2c_adapter* i2c); | ||
42 | |||
43 | #endif /* LGDT3302_H */ | ||
44 | |||
45 | /* | ||
46 | * Local variables: | ||
47 | * c-basic-offset: 8 | ||
48 | * End: | ||
49 | */ | ||
diff --git a/drivers/media/dvb/frontends/lgdt3302_priv.h b/drivers/media/dvb/frontends/lgdt3302_priv.h new file mode 100644 index 000000000000..6193fa7a569d --- /dev/null +++ b/drivers/media/dvb/frontends/lgdt3302_priv.h | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * $Id: lgdt3302_priv.h,v 1.2 2005/06/28 23:50:48 mkrufky Exp $ | ||
3 | * | ||
4 | * Support for LGDT3302 (DViCO FustionHDTV 3 Gold) - VSB/QAM | ||
5 | * | ||
6 | * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #ifndef _LGDT3302_PRIV_ | ||
25 | #define _LGDT3302_PRIV_ | ||
26 | |||
27 | /* i2c control register addresses */ | ||
28 | enum I2C_REG { | ||
29 | TOP_CONTROL= 0x00, | ||
30 | IRQ_MASK= 0x01, | ||
31 | IRQ_STATUS= 0x02, | ||
32 | VSB_CARRIER_FREQ0= 0x16, | ||
33 | VSB_CARRIER_FREQ1= 0x17, | ||
34 | VSB_CARRIER_FREQ2= 0x18, | ||
35 | VSB_CARRIER_FREQ3= 0x19, | ||
36 | CARRIER_MSEQAM1= 0x1a, | ||
37 | CARRIER_MSEQAM2= 0x1b, | ||
38 | CARRIER_LOCK= 0x1c, | ||
39 | TIMING_RECOVERY= 0x1d, | ||
40 | AGC_DELAY0= 0x2a, | ||
41 | AGC_DELAY1= 0x2b, | ||
42 | AGC_DELAY2= 0x2c, | ||
43 | AGC_RF_BANDWIDTH0= 0x2d, | ||
44 | AGC_RF_BANDWIDTH1= 0x2e, | ||
45 | AGC_RF_BANDWIDTH2= 0x2f, | ||
46 | AGC_LOOP_BANDWIDTH0= 0x30, | ||
47 | AGC_LOOP_BANDWIDTH1= 0x31, | ||
48 | AGC_FUNC_CTRL1= 0x32, | ||
49 | AGC_FUNC_CTRL2= 0x33, | ||
50 | AGC_FUNC_CTRL3= 0x34, | ||
51 | AGC_RFIF_ACC0= 0x39, | ||
52 | AGC_RFIF_ACC1= 0x3a, | ||
53 | AGC_RFIF_ACC2= 0x3b, | ||
54 | AGC_STATUS= 0x3f, | ||
55 | SYNC_STATUS_VSB= 0x43, | ||
56 | EQPH_ERR0= 0x47, | ||
57 | EQ_ERR1= 0x48, | ||
58 | EQ_ERR2= 0x49, | ||
59 | PH_ERR1= 0x4a, | ||
60 | PH_ERR2= 0x4b, | ||
61 | DEMUX_CONTROL= 0x66, | ||
62 | PACKET_ERR_COUNTER1= 0x6a, | ||
63 | PACKET_ERR_COUNTER2= 0x6b, | ||
64 | }; | ||
65 | |||
66 | #endif /* _LGDT3302_PRIV_ */ | ||
67 | |||
68 | /* | ||
69 | * Local variables: | ||
70 | * c-basic-offset: 8 | ||
71 | * End: | ||
72 | */ | ||
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c new file mode 100644 index 000000000000..4f396ac8de77 --- /dev/null +++ b/drivers/media/dvb/frontends/s5h1420.c | |||
@@ -0,0 +1,800 @@ | |||
1 | /* | ||
2 | Driver for Samsung S5H1420 QPSK Demodulator | ||
3 | |||
4 | Copyright (C) 2005 Andrew de Quincey <adq_dvb@lidskialf.net> | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify | ||
7 | it under the terms of the GNU General Public License as published by | ||
8 | the Free Software Foundation; either version 2 of the License, or | ||
9 | (at your option) any later version. | ||
10 | |||
11 | This program is distributed in the hope that it will be useful, | ||
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | |||
15 | GNU General Public License for more details. | ||
16 | |||
17 | You should have received a copy of the GNU General Public License | ||
18 | along with this program; if not, write to the Free Software | ||
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | |||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/string.h> | ||
27 | #include <linux/slab.h> | ||
28 | #include <linux/delay.h> | ||
29 | |||
30 | #include "dvb_frontend.h" | ||
31 | #include "s5h1420.h" | ||
32 | |||
33 | |||
34 | |||
35 | #define TONE_FREQ 22000 | ||
36 | |||
37 | struct s5h1420_state { | ||
38 | struct i2c_adapter* i2c; | ||
39 | struct dvb_frontend_ops ops; | ||
40 | const struct s5h1420_config* config; | ||
41 | struct dvb_frontend frontend; | ||
42 | |||
43 | u8 postlocked:1; | ||
44 | u32 fclk; | ||
45 | u32 tunedfreq; | ||
46 | fe_code_rate_t fec_inner; | ||
47 | u32 symbol_rate; | ||
48 | }; | ||
49 | |||
50 | static u32 s5h1420_getsymbolrate(struct s5h1420_state* state); | ||
51 | static int s5h1420_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings); | ||
52 | |||
53 | |||
54 | static int debug = 0; | ||
55 | #define dprintk if (debug) printk | ||
56 | |||
57 | static int s5h1420_writereg (struct s5h1420_state* state, u8 reg, u8 data) | ||
58 | { | ||
59 | u8 buf [] = { reg, data }; | ||
60 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | ||
61 | int err; | ||
62 | |||
63 | if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { | ||
64 | dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data); | ||
65 | return -EREMOTEIO; | ||
66 | } | ||
67 | |||
68 | return 0; | ||
69 | } | ||
70 | |||
71 | static u8 s5h1420_readreg (struct s5h1420_state* state, u8 reg) | ||
72 | { | ||
73 | int ret; | ||
74 | u8 b0 [] = { reg }; | ||
75 | u8 b1 [] = { 0 }; | ||
76 | struct i2c_msg msg1 = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }; | ||
77 | struct i2c_msg msg2 = { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 }; | ||
78 | |||
79 | if ((ret = i2c_transfer (state->i2c, &msg1, 1)) != 1) | ||
80 | return ret; | ||
81 | |||
82 | if ((ret = i2c_transfer (state->i2c, &msg2, 1)) != 1) | ||
83 | return ret; | ||
84 | |||
85 | return b1[0]; | ||
86 | } | ||
87 | |||
88 | static int s5h1420_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage) | ||
89 | { | ||
90 | struct s5h1420_state* state = fe->demodulator_priv; | ||
91 | |||
92 | switch(voltage) { | ||
93 | case SEC_VOLTAGE_13: | ||
94 | s5h1420_writereg(state, 0x3c, (s5h1420_readreg(state, 0x3c) & 0xfe) | 0x02); | ||
95 | break; | ||
96 | |||
97 | case SEC_VOLTAGE_18: | ||
98 | s5h1420_writereg(state, 0x3c, s5h1420_readreg(state, 0x3c) | 0x03); | ||
99 | break; | ||
100 | |||
101 | case SEC_VOLTAGE_OFF: | ||
102 | s5h1420_writereg(state, 0x3c, s5h1420_readreg(state, 0x3c) & 0xfd); | ||
103 | break; | ||
104 | } | ||
105 | |||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | static int s5h1420_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | ||
110 | { | ||
111 | struct s5h1420_state* state = fe->demodulator_priv; | ||
112 | |||
113 | switch(tone) { | ||
114 | case SEC_TONE_ON: | ||
115 | s5h1420_writereg(state, 0x3b, (s5h1420_readreg(state, 0x3b) & 0x74) | 0x08); | ||
116 | break; | ||
117 | |||
118 | case SEC_TONE_OFF: | ||
119 | s5h1420_writereg(state, 0x3b, (s5h1420_readreg(state, 0x3b) & 0x74) | 0x01); | ||
120 | break; | ||
121 | } | ||
122 | |||
123 | return 0; | ||
124 | } | ||
125 | |||
126 | static int s5h1420_send_master_cmd (struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | ||
127 | { | ||
128 | struct s5h1420_state* state = fe->demodulator_priv; | ||
129 | u8 val; | ||
130 | int i; | ||
131 | unsigned long timeout; | ||
132 | int result = 0; | ||
133 | |||
134 | /* setup for DISEQC */ | ||
135 | val = s5h1420_readreg(state, 0x3b); | ||
136 | s5h1420_writereg(state, 0x3b, 0x02); | ||
137 | msleep(15); | ||
138 | |||
139 | /* write the DISEQC command bytes */ | ||
140 | for(i=0; i< cmd->msg_len; i++) { | ||
141 | s5h1420_writereg(state, 0x3c + i, cmd->msg[i]); | ||
142 | } | ||
143 | |||
144 | /* kick off transmission */ | ||
145 | s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | ((cmd->msg_len-1) << 4) | 0x08); | ||
146 | |||
147 | /* wait for transmission to complete */ | ||
148 | timeout = jiffies + ((100*HZ) / 1000); | ||
149 | while(time_before(jiffies, timeout)) { | ||
150 | if (s5h1420_readreg(state, 0x3b) & 0x08) | ||
151 | break; | ||
152 | |||
153 | msleep(5); | ||
154 | } | ||
155 | if (time_after(jiffies, timeout)) | ||
156 | result = -ETIMEDOUT; | ||
157 | |||
158 | /* restore original settings */ | ||
159 | s5h1420_writereg(state, 0x3b, val); | ||
160 | msleep(15); | ||
161 | return result; | ||
162 | } | ||
163 | |||
164 | static int s5h1420_recv_slave_reply (struct dvb_frontend* fe, struct dvb_diseqc_slave_reply* reply) | ||
165 | { | ||
166 | struct s5h1420_state* state = fe->demodulator_priv; | ||
167 | u8 val; | ||
168 | int i; | ||
169 | int length; | ||
170 | unsigned long timeout; | ||
171 | int result = 0; | ||
172 | |||
173 | /* setup for DISEQC recieve */ | ||
174 | val = s5h1420_readreg(state, 0x3b); | ||
175 | s5h1420_writereg(state, 0x3b, 0x82); /* FIXME: guess - do we need to set DIS_RDY(0x08) in receive mode? */ | ||
176 | msleep(15); | ||
177 | |||
178 | /* wait for reception to complete */ | ||
179 | timeout = jiffies + ((reply->timeout*HZ) / 1000); | ||
180 | while(time_before(jiffies, timeout)) { | ||
181 | if (!(s5h1420_readreg(state, 0x3b) & 0x80)) /* FIXME: do we test DIS_RDY(0x08) or RCV_EN(0x80)? */ | ||
182 | break; | ||
183 | |||
184 | msleep(5); | ||
185 | } | ||
186 | if (time_after(jiffies, timeout)) { | ||
187 | result = -ETIMEDOUT; | ||
188 | goto exit; | ||
189 | } | ||
190 | |||
191 | /* check error flag - FIXME: not sure what this does - docs do not describe | ||
192 | * beyond "error flag for diseqc receive data :( */ | ||
193 | if (s5h1420_readreg(state, 0x49)) { | ||
194 | result = -EIO; | ||
195 | goto exit; | ||
196 | } | ||
197 | |||
198 | /* check length */ | ||
199 | length = (s5h1420_readreg(state, 0x3b) & 0x70) >> 4; | ||
200 | if (length > sizeof(reply->msg)) { | ||
201 | result = -EOVERFLOW; | ||
202 | goto exit; | ||
203 | } | ||
204 | reply->msg_len = length; | ||
205 | |||
206 | /* extract data */ | ||
207 | for(i=0; i< length; i++) { | ||
208 | reply->msg[i] = s5h1420_readreg(state, 0x3c + i); | ||
209 | } | ||
210 | |||
211 | exit: | ||
212 | /* restore original settings */ | ||
213 | s5h1420_writereg(state, 0x3b, val); | ||
214 | msleep(15); | ||
215 | return result; | ||
216 | } | ||
217 | |||
218 | static int s5h1420_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | ||
219 | { | ||
220 | struct s5h1420_state* state = fe->demodulator_priv; | ||
221 | u8 val; | ||
222 | int result = 0; | ||
223 | unsigned long timeout; | ||
224 | |||
225 | /* setup for tone burst */ | ||
226 | val = s5h1420_readreg(state, 0x3b); | ||
227 | s5h1420_writereg(state, 0x3b, (s5h1420_readreg(state, 0x3b) & 0x70) | 0x01); | ||
228 | |||
229 | /* set value for B position if requested */ | ||
230 | if (minicmd == SEC_MINI_B) { | ||
231 | s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | 0x04); | ||
232 | } | ||
233 | msleep(15); | ||
234 | |||
235 | /* start transmission */ | ||
236 | s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | 0x08); | ||
237 | |||
238 | /* wait for transmission to complete */ | ||
239 | timeout = jiffies + ((20*HZ) / 1000); | ||
240 | while(time_before(jiffies, timeout)) { | ||
241 | if (!(s5h1420_readreg(state, 0x3b) & 0x08)) | ||
242 | break; | ||
243 | |||
244 | msleep(5); | ||
245 | } | ||
246 | if (time_after(jiffies, timeout)) | ||
247 | result = -ETIMEDOUT; | ||
248 | |||
249 | /* restore original settings */ | ||
250 | s5h1420_writereg(state, 0x3b, val); | ||
251 | msleep(15); | ||
252 | return result; | ||
253 | } | ||
254 | |||
255 | static fe_status_t s5h1420_get_status_bits(struct s5h1420_state* state) | ||
256 | { | ||
257 | u8 val; | ||
258 | fe_status_t status = 0; | ||
259 | |||
260 | val = s5h1420_readreg(state, 0x14); | ||
261 | if (val & 0x02) | ||
262 | status |= FE_HAS_SIGNAL; // FIXME: not sure if this is right | ||
263 | if (val & 0x01) | ||
264 | status |= FE_HAS_CARRIER; // FIXME: not sure if this is right | ||
265 | val = s5h1420_readreg(state, 0x36); | ||
266 | if (val & 0x01) | ||
267 | status |= FE_HAS_VITERBI; | ||
268 | if (val & 0x20) | ||
269 | status |= FE_HAS_SYNC; | ||
270 | if (status == (FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|FE_HAS_SYNC)) | ||
271 | status |= FE_HAS_LOCK; | ||
272 | |||
273 | return status; | ||
274 | } | ||
275 | |||
276 | static int s5h1420_read_status(struct dvb_frontend* fe, fe_status_t* status) | ||
277 | { | ||
278 | struct s5h1420_state* state = fe->demodulator_priv; | ||
279 | u8 val; | ||
280 | |||
281 | if (status == NULL) | ||
282 | return -EINVAL; | ||
283 | |||
284 | /* determine lock state */ | ||
285 | *status = s5h1420_get_status_bits(state); | ||
286 | |||
287 | /* fix for FEC 5/6 inversion issue - if it doesn't quite lock, invert the inversion, | ||
288 | wait a bit and check again */ | ||
289 | if (*status == (FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI)) { | ||
290 | val = s5h1420_readreg(state, 0x32); | ||
291 | if ((val & 0x07) == 0x03) { | ||
292 | if (val & 0x08) | ||
293 | s5h1420_writereg(state, 0x31, 0x13); | ||
294 | else | ||
295 | s5h1420_writereg(state, 0x31, 0x1b); | ||
296 | |||
297 | /* wait a bit then update lock status */ | ||
298 | mdelay(200); | ||
299 | *status = s5h1420_get_status_bits(state); | ||
300 | } | ||
301 | } | ||
302 | |||
303 | /* perform post lock setup */ | ||
304 | if ((*status & FE_HAS_LOCK) && (!state->postlocked)) { | ||
305 | |||
306 | /* calculate the data rate */ | ||
307 | u32 tmp = s5h1420_getsymbolrate(state); | ||
308 | switch(s5h1420_readreg(state, 0x32) & 0x07) { | ||
309 | case 0: | ||
310 | tmp = (tmp * 2 * 1) / 2; | ||
311 | break; | ||
312 | |||
313 | case 1: | ||
314 | tmp = (tmp * 2 * 2) / 3; | ||
315 | break; | ||
316 | |||
317 | case 2: | ||
318 | tmp = (tmp * 2 * 3) / 4; | ||
319 | break; | ||
320 | |||
321 | case 3: | ||
322 | tmp = (tmp * 2 * 5) / 6; | ||
323 | break; | ||
324 | |||
325 | case 4: | ||
326 | tmp = (tmp * 2 * 6) / 7; | ||
327 | break; | ||
328 | |||
329 | case 5: | ||
330 | tmp = (tmp * 2 * 7) / 8; | ||
331 | break; | ||
332 | } | ||
333 | tmp = state->fclk / tmp; | ||
334 | |||
335 | /* set the MPEG_CLK_INTL for the calculated data rate */ | ||
336 | if (tmp < 4) | ||
337 | val = 0x00; | ||
338 | else if (tmp < 8) | ||
339 | val = 0x01; | ||
340 | else if (tmp < 12) | ||
341 | val = 0x02; | ||
342 | else if (tmp < 16) | ||
343 | val = 0x03; | ||
344 | else if (tmp < 24) | ||
345 | val = 0x04; | ||
346 | else if (tmp < 32) | ||
347 | val = 0x05; | ||
348 | else | ||
349 | val = 0x06; | ||
350 | s5h1420_writereg(state, 0x22, val); | ||
351 | |||
352 | /* DC freeze */ | ||
353 | s5h1420_writereg(state, 0x1f, s5h1420_readreg(state, 0x1f) | 0x01); | ||
354 | |||
355 | /* kicker disable + remove DC offset */ | ||
356 | s5h1420_writereg(state, 0x05, s5h1420_readreg(state, 0x05) & 0x6f); | ||
357 | |||
358 | /* post-lock processing has been done! */ | ||
359 | state->postlocked = 1; | ||
360 | } | ||
361 | |||
362 | return 0; | ||
363 | } | ||
364 | |||
365 | static int s5h1420_read_ber(struct dvb_frontend* fe, u32* ber) | ||
366 | { | ||
367 | struct s5h1420_state* state = fe->demodulator_priv; | ||
368 | |||
369 | s5h1420_writereg(state, 0x46, 0x1d); | ||
370 | mdelay(25); | ||
371 | return (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47); | ||
372 | } | ||
373 | |||
374 | static int s5h1420_read_signal_strength(struct dvb_frontend* fe, u16* strength) | ||
375 | { | ||
376 | struct s5h1420_state* state = fe->demodulator_priv; | ||
377 | |||
378 | u8 val = 0xff - s5h1420_readreg(state, 0x15); | ||
379 | |||
380 | return (int) ((val << 8) | val); | ||
381 | } | ||
382 | |||
383 | static int s5h1420_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | ||
384 | { | ||
385 | struct s5h1420_state* state = fe->demodulator_priv; | ||
386 | |||
387 | s5h1420_writereg(state, 0x46, 0x1f); | ||
388 | mdelay(25); | ||
389 | return (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47); | ||
390 | } | ||
391 | |||
392 | static void s5h1420_reset(struct s5h1420_state* state) | ||
393 | { | ||
394 | s5h1420_writereg (state, 0x01, 0x08); | ||
395 | s5h1420_writereg (state, 0x01, 0x00); | ||
396 | udelay(10); | ||
397 | } | ||
398 | |||
399 | static void s5h1420_setsymbolrate(struct s5h1420_state* state, struct dvb_frontend_parameters *p) | ||
400 | { | ||
401 | u64 val; | ||
402 | |||
403 | val = (p->u.qpsk.symbol_rate / 1000) * (1<<24); | ||
404 | if (p->u.qpsk.symbol_rate <= 21000000) { | ||
405 | val *= 2; | ||
406 | } | ||
407 | do_div(val, (state->fclk / 1000)); | ||
408 | |||
409 | s5h1420_writereg(state, 0x09, s5h1420_readreg(state, 0x09) & 0x7f); | ||
410 | s5h1420_writereg(state, 0x11, val >> 16); | ||
411 | s5h1420_writereg(state, 0x12, val >> 8); | ||
412 | s5h1420_writereg(state, 0x13, val & 0xff); | ||
413 | s5h1420_writereg(state, 0x09, s5h1420_readreg(state, 0x09) | 0x80); | ||
414 | } | ||
415 | |||
416 | static u32 s5h1420_getsymbolrate(struct s5h1420_state* state) | ||
417 | { | ||
418 | u64 val; | ||
419 | int sampling = 2; | ||
420 | |||
421 | if (s5h1420_readreg(state, 0x05) & 0x2) | ||
422 | sampling = 1; | ||
423 | |||
424 | s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) | 0x08); | ||
425 | val = s5h1420_readreg(state, 0x11) << 16; | ||
426 | val |= s5h1420_readreg(state, 0x12) << 8; | ||
427 | val |= s5h1420_readreg(state, 0x13); | ||
428 | s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) & 0xf7); | ||
429 | |||
430 | val *= (state->fclk / 1000); | ||
431 | do_div(val, ((1<<24) * sampling)); | ||
432 | |||
433 | return (u32) (val * 1000); | ||
434 | } | ||
435 | |||
436 | static void s5h1420_setfreqoffset(struct s5h1420_state* state, int freqoffset) | ||
437 | { | ||
438 | int val; | ||
439 | |||
440 | /* remember freqoffset is in kHz, but the chip wants the offset in Hz, so | ||
441 | * divide fclk by 1000000 to get the correct value. */ | ||
442 | val = -(int) ((freqoffset * (1<<24)) / (state->fclk / 1000000)); | ||
443 | |||
444 | s5h1420_writereg(state, 0x09, s5h1420_readreg(state, 0x09) & 0xbf); | ||
445 | s5h1420_writereg(state, 0x0e, val >> 16); | ||
446 | s5h1420_writereg(state, 0x0f, val >> 8); | ||
447 | s5h1420_writereg(state, 0x10, val & 0xff); | ||
448 | s5h1420_writereg(state, 0x09, s5h1420_readreg(state, 0x09) | 0x40); | ||
449 | } | ||
450 | |||
451 | static int s5h1420_getfreqoffset(struct s5h1420_state* state) | ||
452 | { | ||
453 | int val; | ||
454 | |||
455 | s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) | 0x08); | ||
456 | val = s5h1420_readreg(state, 0x0e) << 16; | ||
457 | val |= s5h1420_readreg(state, 0x0f) << 8; | ||
458 | val |= s5h1420_readreg(state, 0x10); | ||
459 | s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) & 0xf7); | ||
460 | |||
461 | if (val & 0x800000) | ||
462 | val |= 0xff000000; | ||
463 | |||
464 | /* remember freqoffset is in kHz, but the chip wants the offset in Hz, so | ||
465 | * divide fclk by 1000000 to get the correct value. */ | ||
466 | val = - ((val * (state->fclk/1000000)) / (1<<24)); | ||
467 | |||
468 | return val; | ||
469 | } | ||
470 | |||
471 | static void s5h1420_setfec(struct s5h1420_state* state, struct dvb_frontend_parameters *p) | ||
472 | { | ||
473 | if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) { | ||
474 | s5h1420_writereg(state, 0x31, 0x00); | ||
475 | s5h1420_writereg(state, 0x30, 0x3f); | ||
476 | } else { | ||
477 | switch(p->u.qpsk.fec_inner) { | ||
478 | case FEC_1_2: | ||
479 | s5h1420_writereg(state, 0x31, 0x10); | ||
480 | s5h1420_writereg(state, 0x30, 0x01); | ||
481 | break; | ||
482 | |||
483 | case FEC_2_3: | ||
484 | s5h1420_writereg(state, 0x31, 0x11); | ||
485 | s5h1420_writereg(state, 0x30, 0x02); | ||
486 | break; | ||
487 | |||
488 | case FEC_3_4: | ||
489 | s5h1420_writereg(state, 0x31, 0x12); | ||
490 | s5h1420_writereg(state, 0x30, 0x04); | ||
491 | break; | ||
492 | |||
493 | case FEC_5_6: | ||
494 | s5h1420_writereg(state, 0x31, 0x13); | ||
495 | s5h1420_writereg(state, 0x30, 0x08); | ||
496 | break; | ||
497 | |||
498 | case FEC_6_7: | ||
499 | s5h1420_writereg(state, 0x31, 0x14); | ||
500 | s5h1420_writereg(state, 0x30, 0x10); | ||
501 | break; | ||
502 | |||
503 | case FEC_7_8: | ||
504 | s5h1420_writereg(state, 0x31, 0x15); | ||
505 | s5h1420_writereg(state, 0x30, 0x20); | ||
506 | break; | ||
507 | |||
508 | default: | ||
509 | return; | ||
510 | } | ||
511 | } | ||
512 | } | ||
513 | |||
514 | static fe_code_rate_t s5h1420_getfec(struct s5h1420_state* state) | ||
515 | { | ||
516 | switch(s5h1420_readreg(state, 0x32) & 0x07) { | ||
517 | case 0: | ||
518 | return FEC_1_2; | ||
519 | |||
520 | case 1: | ||
521 | return FEC_2_3; | ||
522 | |||
523 | case 2: | ||
524 | return FEC_3_4; | ||
525 | |||
526 | case 3: | ||
527 | return FEC_5_6; | ||
528 | |||
529 | case 4: | ||
530 | return FEC_6_7; | ||
531 | |||
532 | case 5: | ||
533 | return FEC_7_8; | ||
534 | } | ||
535 | |||
536 | return FEC_NONE; | ||
537 | } | ||
538 | |||
539 | static void s5h1420_setinversion(struct s5h1420_state* state, struct dvb_frontend_parameters *p) | ||
540 | { | ||
541 | if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) { | ||
542 | s5h1420_writereg(state, 0x31, 0x00); | ||
543 | s5h1420_writereg(state, 0x30, 0x3f); | ||
544 | } else { | ||
545 | u8 tmp = s5h1420_readreg(state, 0x31) & 0xf7; | ||
546 | tmp |= 0x10; | ||
547 | |||
548 | if (p->inversion == INVERSION_ON) | ||
549 | tmp |= 0x80; | ||
550 | |||
551 | s5h1420_writereg(state, 0x31, tmp); | ||
552 | } | ||
553 | } | ||
554 | |||
555 | static fe_spectral_inversion_t s5h1420_getinversion(struct s5h1420_state* state) | ||
556 | { | ||
557 | if (s5h1420_readreg(state, 0x32) & 0x08) | ||
558 | return INVERSION_ON; | ||
559 | |||
560 | return INVERSION_OFF; | ||
561 | } | ||
562 | |||
563 | static int s5h1420_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | ||
564 | { | ||
565 | struct s5h1420_state* state = fe->demodulator_priv; | ||
566 | u32 frequency_delta; | ||
567 | struct dvb_frontend_tune_settings fesettings; | ||
568 | |||
569 | /* check if we should do a fast-tune */ | ||
570 | memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters)); | ||
571 | s5h1420_get_tune_settings(fe, &fesettings); | ||
572 | frequency_delta = p->frequency - state->tunedfreq; | ||
573 | if ((frequency_delta > -fesettings.max_drift) && (frequency_delta < fesettings.max_drift) && | ||
574 | (frequency_delta != 0) && | ||
575 | (state->fec_inner == p->u.qpsk.fec_inner) && | ||
576 | (state->symbol_rate == p->u.qpsk.symbol_rate)) { | ||
577 | |||
578 | s5h1420_setfreqoffset(state, frequency_delta); | ||
579 | return 0; | ||
580 | } | ||
581 | |||
582 | /* first of all, software reset */ | ||
583 | s5h1420_reset(state); | ||
584 | |||
585 | /* set tuner PLL */ | ||
586 | if (state->config->pll_set) { | ||
587 | s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1); | ||
588 | state->config->pll_set(fe, p, &state->tunedfreq); | ||
589 | s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) & 0xfe); | ||
590 | } | ||
591 | |||
592 | /* set s5h1420 fclk PLL according to desired symbol rate */ | ||
593 | if (p->u.qpsk.symbol_rate > 28000000) { | ||
594 | state->fclk = 88000000; | ||
595 | s5h1420_writereg(state, 0x03, 0x50); | ||
596 | s5h1420_writereg(state, 0x04, 0x40); | ||
597 | s5h1420_writereg(state, 0x05, 0xae); | ||
598 | } else if (p->u.qpsk.symbol_rate > 21000000) { | ||
599 | state->fclk = 59000000; | ||
600 | s5h1420_writereg(state, 0x03, 0x33); | ||
601 | s5h1420_writereg(state, 0x04, 0x40); | ||
602 | s5h1420_writereg(state, 0x05, 0xae); | ||
603 | } else { | ||
604 | state->fclk = 88000000; | ||
605 | s5h1420_writereg(state, 0x03, 0x50); | ||
606 | s5h1420_writereg(state, 0x04, 0x40); | ||
607 | s5h1420_writereg(state, 0x05, 0xac); | ||
608 | } | ||
609 | |||
610 | /* set misc registers */ | ||
611 | s5h1420_writereg(state, 0x02, 0x00); | ||
612 | s5h1420_writereg(state, 0x07, 0xb0); | ||
613 | s5h1420_writereg(state, 0x0a, 0x67); | ||
614 | s5h1420_writereg(state, 0x0b, 0x78); | ||
615 | s5h1420_writereg(state, 0x0c, 0x48); | ||
616 | s5h1420_writereg(state, 0x0d, 0x6b); | ||
617 | s5h1420_writereg(state, 0x2e, 0x8e); | ||
618 | s5h1420_writereg(state, 0x35, 0x33); | ||
619 | s5h1420_writereg(state, 0x38, 0x01); | ||
620 | s5h1420_writereg(state, 0x39, 0x7d); | ||
621 | s5h1420_writereg(state, 0x3a, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32)); | ||
622 | s5h1420_writereg(state, 0x3c, 0x00); | ||
623 | s5h1420_writereg(state, 0x45, 0x61); | ||
624 | s5h1420_writereg(state, 0x46, 0x1d); | ||
625 | |||
626 | /* start QPSK */ | ||
627 | s5h1420_writereg(state, 0x05, s5h1420_readreg(state, 0x05) | 1); | ||
628 | |||
629 | /* set the frequency offset to adjust for PLL inaccuracy */ | ||
630 | s5h1420_setfreqoffset(state, p->frequency - state->tunedfreq); | ||
631 | |||
632 | /* set the reset of the parameters */ | ||
633 | s5h1420_setsymbolrate(state, p); | ||
634 | s5h1420_setinversion(state, p); | ||
635 | s5h1420_setfec(state, p); | ||
636 | |||
637 | state->fec_inner = p->u.qpsk.fec_inner; | ||
638 | state->symbol_rate = p->u.qpsk.symbol_rate; | ||
639 | state->postlocked = 0; | ||
640 | return 0; | ||
641 | } | ||
642 | |||
643 | static int s5h1420_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | ||
644 | { | ||
645 | struct s5h1420_state* state = fe->demodulator_priv; | ||
646 | |||
647 | p->frequency = state->tunedfreq + s5h1420_getfreqoffset(state); | ||
648 | p->inversion = s5h1420_getinversion(state); | ||
649 | p->u.qpsk.symbol_rate = s5h1420_getsymbolrate(state); | ||
650 | p->u.qpsk.fec_inner = s5h1420_getfec(state); | ||
651 | |||
652 | return 0; | ||
653 | } | ||
654 | |||
655 | static int s5h1420_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | ||
656 | { | ||
657 | if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) { | ||
658 | fesettings->min_delay_ms = 50; | ||
659 | fesettings->step_size = 2000; | ||
660 | fesettings->max_drift = 8000; | ||
661 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) { | ||
662 | fesettings->min_delay_ms = 100; | ||
663 | fesettings->step_size = 1500; | ||
664 | fesettings->max_drift = 9000; | ||
665 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) { | ||
666 | fesettings->min_delay_ms = 100; | ||
667 | fesettings->step_size = 1000; | ||
668 | fesettings->max_drift = 8000; | ||
669 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) { | ||
670 | fesettings->min_delay_ms = 100; | ||
671 | fesettings->step_size = 500; | ||
672 | fesettings->max_drift = 7000; | ||
673 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) { | ||
674 | fesettings->min_delay_ms = 200; | ||
675 | fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); | ||
676 | fesettings->max_drift = 14 * fesettings->step_size; | ||
677 | } else { | ||
678 | fesettings->min_delay_ms = 200; | ||
679 | fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); | ||
680 | fesettings->max_drift = 18 * fesettings->step_size; | ||
681 | } | ||
682 | |||
683 | return 0; | ||
684 | } | ||
685 | |||
686 | static int s5h1420_init (struct dvb_frontend* fe) | ||
687 | { | ||
688 | struct s5h1420_state* state = fe->demodulator_priv; | ||
689 | |||
690 | /* disable power down and do reset */ | ||
691 | s5h1420_writereg(state, 0x02, 0x10); | ||
692 | msleep(10); | ||
693 | s5h1420_reset(state); | ||
694 | |||
695 | /* init PLL */ | ||
696 | if (state->config->pll_init) { | ||
697 | s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1); | ||
698 | state->config->pll_init(fe); | ||
699 | s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) & 0xfe); | ||
700 | } | ||
701 | |||
702 | return 0; | ||
703 | } | ||
704 | |||
705 | static int s5h1420_sleep(struct dvb_frontend* fe) | ||
706 | { | ||
707 | struct s5h1420_state* state = fe->demodulator_priv; | ||
708 | |||
709 | return s5h1420_writereg(state, 0x02, 0x12); | ||
710 | } | ||
711 | |||
712 | static void s5h1420_release(struct dvb_frontend* fe) | ||
713 | { | ||
714 | struct s5h1420_state* state = fe->demodulator_priv; | ||
715 | kfree(state); | ||
716 | } | ||
717 | |||
718 | static struct dvb_frontend_ops s5h1420_ops; | ||
719 | |||
720 | struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config, struct i2c_adapter* i2c) | ||
721 | { | ||
722 | struct s5h1420_state* state = NULL; | ||
723 | u8 identity; | ||
724 | |||
725 | /* allocate memory for the internal state */ | ||
726 | state = kmalloc(sizeof(struct s5h1420_state), GFP_KERNEL); | ||
727 | if (state == NULL) | ||
728 | goto error; | ||
729 | |||
730 | /* setup the state */ | ||
731 | state->config = config; | ||
732 | state->i2c = i2c; | ||
733 | memcpy(&state->ops, &s5h1420_ops, sizeof(struct dvb_frontend_ops)); | ||
734 | state->postlocked = 0; | ||
735 | state->fclk = 88000000; | ||
736 | state->tunedfreq = 0; | ||
737 | state->fec_inner = FEC_NONE; | ||
738 | state->symbol_rate = 0; | ||
739 | |||
740 | /* check if the demod is there + identify it */ | ||
741 | identity = s5h1420_readreg(state, 0x00); | ||
742 | if (identity != 0x03) | ||
743 | goto error; | ||
744 | |||
745 | /* create dvb_frontend */ | ||
746 | state->frontend.ops = &state->ops; | ||
747 | state->frontend.demodulator_priv = state; | ||
748 | return &state->frontend; | ||
749 | |||
750 | error: | ||
751 | kfree(state); | ||
752 | return NULL; | ||
753 | } | ||
754 | |||
755 | static struct dvb_frontend_ops s5h1420_ops = { | ||
756 | |||
757 | .info = { | ||
758 | .name = "Samsung S5H1420 DVB-S", | ||
759 | .type = FE_QPSK, | ||
760 | .frequency_min = 950000, | ||
761 | .frequency_max = 2150000, | ||
762 | .frequency_stepsize = 125, /* kHz for QPSK frontends */ | ||
763 | .frequency_tolerance = 29500, | ||
764 | .symbol_rate_min = 1000000, | ||
765 | .symbol_rate_max = 45000000, | ||
766 | /* .symbol_rate_tolerance = ???,*/ | ||
767 | .caps = FE_CAN_INVERSION_AUTO | | ||
768 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | ||
769 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | ||
770 | FE_CAN_QPSK | ||
771 | }, | ||
772 | |||
773 | .release = s5h1420_release, | ||
774 | |||
775 | .init = s5h1420_init, | ||
776 | .sleep = s5h1420_sleep, | ||
777 | |||
778 | .set_frontend = s5h1420_set_frontend, | ||
779 | .get_frontend = s5h1420_get_frontend, | ||
780 | .get_tune_settings = s5h1420_get_tune_settings, | ||
781 | |||
782 | .read_status = s5h1420_read_status, | ||
783 | .read_ber = s5h1420_read_ber, | ||
784 | .read_signal_strength = s5h1420_read_signal_strength, | ||
785 | .read_ucblocks = s5h1420_read_ucblocks, | ||
786 | |||
787 | .diseqc_send_master_cmd = s5h1420_send_master_cmd, | ||
788 | .diseqc_recv_slave_reply = s5h1420_recv_slave_reply, | ||
789 | .diseqc_send_burst = s5h1420_send_burst, | ||
790 | .set_tone = s5h1420_set_tone, | ||
791 | .set_voltage = s5h1420_set_voltage, | ||
792 | }; | ||
793 | |||
794 | module_param(debug, int, 0644); | ||
795 | |||
796 | MODULE_DESCRIPTION("Samsung S5H1420 DVB-S Demodulator driver"); | ||
797 | MODULE_AUTHOR("Andrew de Quincey"); | ||
798 | MODULE_LICENSE("GPL"); | ||
799 | |||
800 | EXPORT_SYMBOL(s5h1420_attach); | ||
diff --git a/drivers/media/dvb/frontends/s5h1420.h b/drivers/media/dvb/frontends/s5h1420.h new file mode 100644 index 000000000000..b687fc77ceb3 --- /dev/null +++ b/drivers/media/dvb/frontends/s5h1420.h | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | Driver for S5H1420 QPSK Demodulators | ||
3 | |||
4 | Copyright (C) 2005 Andrew de Quincey <adq_dvb@lidskialf.net> | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify | ||
7 | it under the terms of the GNU General Public License as published by | ||
8 | the Free Software Foundation; either version 2 of the License, or | ||
9 | (at your option) any later version. | ||
10 | |||
11 | This program is distributed in the hope that it will be useful, | ||
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | |||
15 | GNU General Public License for more details. | ||
16 | |||
17 | You should have received a copy of the GNU General Public License | ||
18 | along with this program; if not, write to the Free Software | ||
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | |||
21 | */ | ||
22 | |||
23 | #ifndef S5H1420_H | ||
24 | #define S5H1420_H | ||
25 | |||
26 | #include <linux/dvb/frontend.h> | ||
27 | |||
28 | struct s5h1420_config | ||
29 | { | ||
30 | /* the demodulator's i2c address */ | ||
31 | u8 demod_address; | ||
32 | |||
33 | /* PLL maintenance */ | ||
34 | int (*pll_init)(struct dvb_frontend* fe); | ||
35 | int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u32* freqout); | ||
36 | }; | ||
37 | |||
38 | extern struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config, | ||
39 | struct i2c_adapter* i2c); | ||
40 | |||
41 | #endif // S5H1420_H | ||
diff --git a/drivers/media/dvb/frontends/stv0297.c b/drivers/media/dvb/frontends/stv0297.c index e681263bf079..928aca052afe 100644 --- a/drivers/media/dvb/frontends/stv0297.c +++ b/drivers/media/dvb/frontends/stv0297.c | |||
@@ -617,7 +617,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par | |||
617 | 617 | ||
618 | /* wait for WGAGC lock */ | 618 | /* wait for WGAGC lock */ |
619 | starttime = jiffies; | 619 | starttime = jiffies; |
620 | timeout = jiffies + (200 * HZ) / 1000; | 620 | timeout = jiffies + msecs_to_jiffies(2000); |
621 | while (time_before(jiffies, timeout)) { | 621 | while (time_before(jiffies, timeout)) { |
622 | msleep(10); | 622 | msleep(10); |
623 | if (stv0297_readreg(state, 0x43) & 0x08) | 623 | if (stv0297_readreg(state, 0x43) & 0x08) |
@@ -629,7 +629,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par | |||
629 | msleep(20); | 629 | msleep(20); |
630 | 630 | ||
631 | /* wait for equaliser partial convergence */ | 631 | /* wait for equaliser partial convergence */ |
632 | timeout = jiffies + (50 * HZ) / 1000; | 632 | timeout = jiffies + msecs_to_jiffies(500); |
633 | while (time_before(jiffies, timeout)) { | 633 | while (time_before(jiffies, timeout)) { |
634 | msleep(10); | 634 | msleep(10); |
635 | 635 | ||
@@ -642,7 +642,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par | |||
642 | } | 642 | } |
643 | 643 | ||
644 | /* wait for equaliser full convergence */ | 644 | /* wait for equaliser full convergence */ |
645 | timeout = jiffies + (delay * HZ) / 1000; | 645 | timeout = jiffies + msecs_to_jiffies(delay); |
646 | while (time_before(jiffies, timeout)) { | 646 | while (time_before(jiffies, timeout)) { |
647 | msleep(10); | 647 | msleep(10); |
648 | 648 | ||
@@ -659,7 +659,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par | |||
659 | stv0297_writereg_mask(state, 0x88, 8, 0); | 659 | stv0297_writereg_mask(state, 0x88, 8, 0); |
660 | 660 | ||
661 | /* wait for main lock */ | 661 | /* wait for main lock */ |
662 | timeout = jiffies + (20 * HZ) / 1000; | 662 | timeout = jiffies + msecs_to_jiffies(20); |
663 | while (time_before(jiffies, timeout)) { | 663 | while (time_before(jiffies, timeout)) { |
664 | msleep(10); | 664 | msleep(10); |
665 | 665 | ||
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c index 0beb370792ae..ab0c032472cc 100644 --- a/drivers/media/dvb/frontends/tda1004x.c +++ b/drivers/media/dvb/frontends/tda1004x.c | |||
@@ -49,10 +49,8 @@ struct tda1004x_state { | |||
49 | /* private demod data */ | 49 | /* private demod data */ |
50 | u8 initialised; | 50 | u8 initialised; |
51 | enum tda1004x_demod demod_type; | 51 | enum tda1004x_demod demod_type; |
52 | u8 fw_version; | ||
53 | }; | 52 | }; |
54 | 53 | ||
55 | |||
56 | static int debug; | 54 | static int debug; |
57 | #define dprintk(args...) \ | 55 | #define dprintk(args...) \ |
58 | do { \ | 56 | do { \ |
@@ -122,6 +120,8 @@ static int debug; | |||
122 | #define TDA10046H_GPIO_OUT_SEL 0x41 | 120 | #define TDA10046H_GPIO_OUT_SEL 0x41 |
123 | #define TDA10046H_GPIO_SELECT 0x42 | 121 | #define TDA10046H_GPIO_SELECT 0x42 |
124 | #define TDA10046H_AGC_CONF 0x43 | 122 | #define TDA10046H_AGC_CONF 0x43 |
123 | #define TDA10046H_AGC_THR 0x44 | ||
124 | #define TDA10046H_AGC_RENORM 0x45 | ||
125 | #define TDA10046H_AGC_GAINS 0x46 | 125 | #define TDA10046H_AGC_GAINS 0x46 |
126 | #define TDA10046H_AGC_TUN_MIN 0x47 | 126 | #define TDA10046H_AGC_TUN_MIN 0x47 |
127 | #define TDA10046H_AGC_TUN_MAX 0x48 | 127 | #define TDA10046H_AGC_TUN_MAX 0x48 |
@@ -274,14 +274,26 @@ static int tda10046h_set_bandwidth(struct tda1004x_state *state, | |||
274 | switch (bandwidth) { | 274 | switch (bandwidth) { |
275 | case BANDWIDTH_6_MHZ: | 275 | case BANDWIDTH_6_MHZ: |
276 | tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz, sizeof(bandwidth_6mhz)); | 276 | tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz, sizeof(bandwidth_6mhz)); |
277 | if (state->config->if_freq == TDA10046_FREQ_045) { | ||
278 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x09); | ||
279 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x4f); | ||
280 | } | ||
277 | break; | 281 | break; |
278 | 282 | ||
279 | case BANDWIDTH_7_MHZ: | 283 | case BANDWIDTH_7_MHZ: |
280 | tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz, sizeof(bandwidth_7mhz)); | 284 | tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz, sizeof(bandwidth_7mhz)); |
285 | if (state->config->if_freq == TDA10046_FREQ_045) { | ||
286 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0a); | ||
287 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x79); | ||
288 | } | ||
281 | break; | 289 | break; |
282 | 290 | ||
283 | case BANDWIDTH_8_MHZ: | 291 | case BANDWIDTH_8_MHZ: |
284 | tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz, sizeof(bandwidth_8mhz)); | 292 | tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz, sizeof(bandwidth_8mhz)); |
293 | if (state->config->if_freq == TDA10046_FREQ_045) { | ||
294 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0b); | ||
295 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xa3); | ||
296 | } | ||
285 | break; | 297 | break; |
286 | 298 | ||
287 | default: | 299 | default: |
@@ -315,20 +327,35 @@ static int tda1004x_do_upload(struct tda1004x_state *state, | |||
315 | memcpy(buf + 1, mem + pos, tx_size); | 327 | memcpy(buf + 1, mem + pos, tx_size); |
316 | fw_msg.len = tx_size + 1; | 328 | fw_msg.len = tx_size + 1; |
317 | if (i2c_transfer(state->i2c, &fw_msg, 1) != 1) { | 329 | if (i2c_transfer(state->i2c, &fw_msg, 1) != 1) { |
318 | printk("tda1004x: Error during firmware upload\n"); | 330 | printk(KERN_ERR "tda1004x: Error during firmware upload\n"); |
319 | return -EIO; | 331 | return -EIO; |
320 | } | 332 | } |
321 | pos += tx_size; | 333 | pos += tx_size; |
322 | 334 | ||
323 | dprintk("%s: fw_pos=0x%x\n", __FUNCTION__, pos); | 335 | dprintk("%s: fw_pos=0x%x\n", __FUNCTION__, pos); |
324 | } | 336 | } |
337 | // give the DSP a chance to settle 03/10/05 Hac | ||
338 | msleep(100); | ||
325 | 339 | ||
326 | return 0; | 340 | return 0; |
327 | } | 341 | } |
328 | 342 | ||
329 | static int tda1004x_check_upload_ok(struct tda1004x_state *state, u8 dspVersion) | 343 | static int tda1004x_check_upload_ok(struct tda1004x_state *state) |
330 | { | 344 | { |
331 | u8 data1, data2; | 345 | u8 data1, data2; |
346 | unsigned long timeout; | ||
347 | |||
348 | if (state->demod_type == TDA1004X_DEMOD_TDA10046) { | ||
349 | timeout = jiffies + 2 * HZ; | ||
350 | while(!(tda1004x_read_byte(state, TDA1004X_STATUS_CD) & 0x20)) { | ||
351 | if (time_after(jiffies, timeout)) { | ||
352 | printk(KERN_ERR "tda1004x: timeout waiting for DSP ready\n"); | ||
353 | break; | ||
354 | } | ||
355 | msleep(1); | ||
356 | } | ||
357 | } else | ||
358 | msleep(100); | ||
332 | 359 | ||
333 | // check upload was OK | 360 | // check upload was OK |
334 | tda1004x_write_mask(state, TDA1004X_CONFC4, 0x10, 0); // we want to read from the DSP | 361 | tda1004x_write_mask(state, TDA1004X_CONFC4, 0x10, 0); // we want to read from the DSP |
@@ -336,9 +363,11 @@ static int tda1004x_check_upload_ok(struct tda1004x_state *state, u8 dspVersion) | |||
336 | 363 | ||
337 | data1 = tda1004x_read_byte(state, TDA1004X_DSP_DATA1); | 364 | data1 = tda1004x_read_byte(state, TDA1004X_DSP_DATA1); |
338 | data2 = tda1004x_read_byte(state, TDA1004X_DSP_DATA2); | 365 | data2 = tda1004x_read_byte(state, TDA1004X_DSP_DATA2); |
339 | if ((data1 != 0x67) || (data2 != dspVersion)) | 366 | if (data1 != 0x67 || data2 < 0x20 || data2 > 0x2e) { |
367 | printk(KERN_INFO "tda1004x: found firmware revision %x -- invalid\n", data2); | ||
340 | return -EIO; | 368 | return -EIO; |
341 | 369 | } | |
370 | printk(KERN_INFO "tda1004x: found firmware revision %x -- ok\n", data2); | ||
342 | return 0; | 371 | return 0; |
343 | } | 372 | } |
344 | 373 | ||
@@ -349,14 +378,14 @@ static int tda10045_fwupload(struct dvb_frontend* fe) | |||
349 | const struct firmware *fw; | 378 | const struct firmware *fw; |
350 | 379 | ||
351 | /* don't re-upload unless necessary */ | 380 | /* don't re-upload unless necessary */ |
352 | if (tda1004x_check_upload_ok(state, 0x2c) == 0) | 381 | if (tda1004x_check_upload_ok(state) == 0) |
353 | return 0; | 382 | return 0; |
354 | 383 | ||
355 | /* request the firmware, this will block until someone uploads it */ | 384 | /* request the firmware, this will block until someone uploads it */ |
356 | printk("tda1004x: waiting for firmware upload (%s)...\n", TDA10045_DEFAULT_FIRMWARE); | 385 | printk(KERN_INFO "tda1004x: waiting for firmware upload (%s)...\n", TDA10045_DEFAULT_FIRMWARE); |
357 | ret = state->config->request_firmware(fe, &fw, TDA10045_DEFAULT_FIRMWARE); | 386 | ret = state->config->request_firmware(fe, &fw, TDA10045_DEFAULT_FIRMWARE); |
358 | if (ret) { | 387 | if (ret) { |
359 | printk("tda1004x: no firmware upload (timeout or file not found?)\n"); | 388 | printk(KERN_ERR "tda1004x: no firmware upload (timeout or file not found?)\n"); |
360 | return ret; | 389 | return ret; |
361 | } | 390 | } |
362 | 391 | ||
@@ -370,95 +399,93 @@ static int tda10045_fwupload(struct dvb_frontend* fe) | |||
370 | tda10045h_set_bandwidth(state, BANDWIDTH_8_MHZ); | 399 | tda10045h_set_bandwidth(state, BANDWIDTH_8_MHZ); |
371 | 400 | ||
372 | ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10045H_FWPAGE, TDA10045H_CODE_IN); | 401 | ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10045H_FWPAGE, TDA10045H_CODE_IN); |
402 | release_firmware(fw); | ||
373 | if (ret) | 403 | if (ret) |
374 | return ret; | 404 | return ret; |
375 | printk("tda1004x: firmware upload complete\n"); | 405 | printk(KERN_INFO "tda1004x: firmware upload complete\n"); |
376 | 406 | ||
377 | /* wait for DSP to initialise */ | 407 | /* wait for DSP to initialise */ |
378 | /* DSPREADY doesn't seem to work on the TDA10045H */ | 408 | /* DSPREADY doesn't seem to work on the TDA10045H */ |
379 | msleep(100); | 409 | msleep(100); |
380 | 410 | ||
381 | return tda1004x_check_upload_ok(state, 0x2c); | 411 | return tda1004x_check_upload_ok(state); |
382 | } | 412 | } |
383 | 413 | ||
384 | static int tda10046_get_fw_version(struct tda1004x_state *state, | 414 | static void tda10046_init_plls(struct dvb_frontend* fe) |
385 | const struct firmware *fw) | ||
386 | { | 415 | { |
387 | const unsigned char pattern[] = { 0x67, 0x00, 0x50, 0x62, 0x5e, 0x18, 0x67 }; | 416 | struct tda1004x_state* state = fe->demodulator_priv; |
388 | unsigned int i; | ||
389 | |||
390 | /* area guessed from firmware v20, v21 and v25 */ | ||
391 | for (i = 0x660; i < 0x700; i++) { | ||
392 | if (!memcmp(&fw->data[i], pattern, sizeof(pattern))) { | ||
393 | state->fw_version = fw->data[i + sizeof(pattern)]; | ||
394 | printk(KERN_INFO "tda1004x: using firmware v%02x\n", | ||
395 | state->fw_version); | ||
396 | return 0; | ||
397 | } | ||
398 | } | ||
399 | 417 | ||
400 | return -EINVAL; | 418 | tda1004x_write_byteI(state, TDA10046H_CONFPLL1, 0xf0); |
419 | tda1004x_write_byteI(state, TDA10046H_CONFPLL2, 10); // PLL M = 10 | ||
420 | if (state->config->xtal_freq == TDA10046_XTAL_4M ) { | ||
421 | dprintk("%s: setting up PLLs for a 4 MHz Xtal\n", __FUNCTION__); | ||
422 | tda1004x_write_byteI(state, TDA10046H_CONFPLL3, 0); // PLL P = N = 0 | ||
423 | } else { | ||
424 | dprintk("%s: setting up PLLs for a 16 MHz Xtal\n", __FUNCTION__); | ||
425 | tda1004x_write_byteI(state, TDA10046H_CONFPLL3, 3); // PLL P = 0, N = 3 | ||
426 | } | ||
427 | tda1004x_write_byteI(state, TDA10046H_FREQ_OFFSET, 99); | ||
428 | switch (state->config->if_freq) { | ||
429 | case TDA10046_FREQ_3617: | ||
430 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4); | ||
431 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x2c); | ||
432 | break; | ||
433 | case TDA10046_FREQ_3613: | ||
434 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4); | ||
435 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x13); | ||
436 | break; | ||
437 | case TDA10046_FREQ_045: | ||
438 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0b); | ||
439 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xa3); | ||
440 | break; | ||
441 | case TDA10046_FREQ_052: | ||
442 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0c); | ||
443 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x06); | ||
444 | break; | ||
445 | } | ||
446 | tda10046h_set_bandwidth(state, BANDWIDTH_8_MHZ); // default bandwidth 8 MHz | ||
401 | } | 447 | } |
402 | 448 | ||
403 | static int tda10046_fwupload(struct dvb_frontend* fe) | 449 | static int tda10046_fwupload(struct dvb_frontend* fe) |
404 | { | 450 | { |
405 | struct tda1004x_state* state = fe->demodulator_priv; | 451 | struct tda1004x_state* state = fe->demodulator_priv; |
406 | unsigned long timeout; | ||
407 | int ret; | 452 | int ret; |
408 | const struct firmware *fw; | 453 | const struct firmware *fw; |
409 | 454 | ||
410 | /* reset + wake up chip */ | 455 | /* reset + wake up chip */ |
411 | tda1004x_write_mask(state, TDA1004X_CONFC4, 1, 0); | 456 | tda1004x_write_byteI(state, TDA1004X_CONFC4, 0); |
412 | tda1004x_write_mask(state, TDA10046H_CONF_TRISTATE1, 1, 0); | 457 | tda1004x_write_mask(state, TDA10046H_CONF_TRISTATE1, 1, 0); |
413 | msleep(100); | 458 | /* let the clocks recover from sleep */ |
459 | msleep(5); | ||
414 | 460 | ||
415 | /* don't re-upload unless necessary */ | 461 | /* don't re-upload unless necessary */ |
416 | if (tda1004x_check_upload_ok(state, state->fw_version) == 0) | 462 | if (tda1004x_check_upload_ok(state) == 0) |
417 | return 0; | 463 | return 0; |
418 | 464 | ||
419 | /* request the firmware, this will block until someone uploads it */ | ||
420 | printk("tda1004x: waiting for firmware upload (%s)...\n", TDA10046_DEFAULT_FIRMWARE); | ||
421 | ret = state->config->request_firmware(fe, &fw, TDA10046_DEFAULT_FIRMWARE); | ||
422 | if (ret) { | ||
423 | printk("tda1004x: no firmware upload (timeout or file not found?)\n"); | ||
424 | return ret; | ||
425 | } | ||
426 | |||
427 | if (fw->size < 24478) { /* size of firmware v20, which is the smallest of v20, v21 and v25 */ | ||
428 | printk("tda1004x: firmware file seems to be too small (%d bytes)\n", fw->size); | ||
429 | return -EINVAL; | ||
430 | } | ||
431 | |||
432 | ret = tda10046_get_fw_version(state, fw); | ||
433 | if (ret < 0) { | ||
434 | printk("tda1004x: unable to find firmware version\n"); | ||
435 | return ret; | ||
436 | } | ||
437 | |||
438 | /* set parameters */ | 465 | /* set parameters */ |
439 | tda1004x_write_byteI(state, TDA10046H_CONFPLL2, 10); | 466 | tda10046_init_plls(fe); |
440 | tda1004x_write_byteI(state, TDA10046H_CONFPLL3, state->config->n_i2c); | 467 | |
441 | tda1004x_write_byteI(state, TDA10046H_FREQ_OFFSET, 99); | 468 | if (state->config->request_firmware != NULL) { |
442 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4); | 469 | /* request the firmware, this will block until someone uploads it */ |
443 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x2c); | 470 | printk(KERN_INFO "tda1004x: waiting for firmware upload...\n"); |
444 | tda1004x_write_mask(state, TDA1004X_CONFC4, 8, 8); // going to boot from HOST | 471 | ret = state->config->request_firmware(fe, &fw, TDA10046_DEFAULT_FIRMWARE); |
445 | 472 | if (ret) { | |
446 | ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10046H_CODE_CPT, TDA10046H_CODE_IN); | 473 | printk(KERN_ERR "tda1004x: no firmware upload (timeout or file not found?)\n"); |
447 | if (ret) | 474 | return ret; |
448 | return ret; | ||
449 | printk("tda1004x: firmware upload complete\n"); | ||
450 | |||
451 | /* wait for DSP to initialise */ | ||
452 | timeout = jiffies + HZ; | ||
453 | while (!(tda1004x_read_byte(state, TDA1004X_STATUS_CD) & 0x20)) { | ||
454 | if (time_after(jiffies, timeout)) { | ||
455 | printk("tda1004x: DSP failed to initialised.\n"); | ||
456 | return -EIO; | ||
457 | } | 475 | } |
458 | msleep(1); | 476 | tda1004x_write_mask(state, TDA1004X_CONFC4, 8, 8); // going to boot from HOST |
477 | ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10046H_CODE_CPT, TDA10046H_CODE_IN); | ||
478 | release_firmware(fw); | ||
479 | if (ret) | ||
480 | return ret; | ||
481 | } else { | ||
482 | /* boot from firmware eeprom */ | ||
483 | /* Hac Note: we might need to do some GPIO Magic here */ | ||
484 | printk(KERN_INFO "tda1004x: booting from eeprom\n"); | ||
485 | tda1004x_write_mask(state, TDA1004X_CONFC4, 4, 4); | ||
486 | msleep(300); | ||
459 | } | 487 | } |
460 | 488 | return tda1004x_check_upload_ok(state); | |
461 | return tda1004x_check_upload_ok(state, state->fw_version); | ||
462 | } | 489 | } |
463 | 490 | ||
464 | static int tda1004x_encode_fec(int fec) | 491 | static int tda1004x_encode_fec(int fec) |
@@ -560,12 +587,10 @@ static int tda10046_init(struct dvb_frontend* fe) | |||
560 | 587 | ||
561 | if (tda10046_fwupload(fe)) { | 588 | if (tda10046_fwupload(fe)) { |
562 | printk("tda1004x: firmware upload failed\n"); | 589 | printk("tda1004x: firmware upload failed\n"); |
563 | return -EIO; | 590 | return -EIO; |
564 | } | 591 | } |
565 | 592 | ||
566 | tda1004x_write_mask(state, TDA1004X_CONFC4, 1, 0); // wake up the chip | 593 | // Init the tuner PLL |
567 | |||
568 | // Init the PLL | ||
569 | if (state->config->pll_init) { | 594 | if (state->config->pll_init) { |
570 | tda1004x_enable_tuner_i2c(state); | 595 | tda1004x_enable_tuner_i2c(state); |
571 | state->config->pll_init(fe); | 596 | state->config->pll_init(fe); |
@@ -574,32 +599,44 @@ static int tda10046_init(struct dvb_frontend* fe) | |||
574 | 599 | ||
575 | // tda setup | 600 | // tda setup |
576 | tda1004x_write_mask(state, TDA1004X_CONFC4, 0x20, 0); // disable DSP watchdog timer | 601 | tda1004x_write_mask(state, TDA1004X_CONFC4, 0x20, 0); // disable DSP watchdog timer |
577 | tda1004x_write_mask(state, TDA1004X_CONFC1, 0x40, 0x40); | 602 | tda1004x_write_byteI(state, TDA1004X_AUTO, 7); // select HP stream |
578 | tda1004x_write_mask(state, TDA1004X_AUTO, 8, 0); // select HP stream | 603 | tda1004x_write_byteI(state, TDA1004X_CONFC1, 8); // disable pulse killer |
579 | tda1004x_write_mask(state, TDA1004X_CONFC1, 0x80, 0); // disable pulse killer | 604 | |
580 | tda1004x_write_byteI(state, TDA10046H_CONFPLL2, 10); // PLL M = 10 | 605 | tda10046_init_plls(fe); |
581 | tda1004x_write_byteI(state, TDA10046H_CONFPLL3, state->config->n_i2c); // PLL P = N = 0 | 606 | switch (state->config->agc_config) { |
582 | tda1004x_write_byteI(state, TDA10046H_FREQ_OFFSET, 99); // FREQOFFS = 99 | 607 | case TDA10046_AGC_DEFAULT: |
583 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4); // } PHY2 = -11221 | 608 | tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x00); // AGC setup |
584 | tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x2c); // } | 609 | tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x60); // set AGC polarities |
585 | tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0); // AGC setup | 610 | break; |
586 | tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0x60, 0x60); // set AGC polarities | 611 | case TDA10046_AGC_IFO_AUTO_NEG: |
612 | tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x0a); // AGC setup | ||
613 | tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x60); // set AGC polarities | ||
614 | break; | ||
615 | case TDA10046_AGC_IFO_AUTO_POS: | ||
616 | tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x0a); // AGC setup | ||
617 | tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x00); // set AGC polarities | ||
618 | break; | ||
619 | case TDA10046_AGC_TDA827X: | ||
620 | tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x02); // AGC setup | ||
621 | tda1004x_write_byteI(state, TDA10046H_AGC_THR, 0x70); // AGC Threshold | ||
622 | tda1004x_write_byteI(state, TDA10046H_AGC_RENORM, 0x0E); // Gain Renormalize | ||
623 | tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x60); // set AGC polarities | ||
624 | break; | ||
625 | } | ||
626 | tda1004x_write_byteI(state, TDA10046H_CONF_TRISTATE1, 0x61); // Turn both AGC outputs on | ||
587 | tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MIN, 0); // } | 627 | tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MIN, 0); // } |
588 | tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MAX, 0xff); // } AGC min/max values | 628 | tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MAX, 0xff); // } AGC min/max values |
589 | tda1004x_write_byteI(state, TDA10046H_AGC_IF_MIN, 0); // } | 629 | tda1004x_write_byteI(state, TDA10046H_AGC_IF_MIN, 0); // } |
590 | tda1004x_write_byteI(state, TDA10046H_AGC_IF_MAX, 0xff); // } | 630 | tda1004x_write_byteI(state, TDA10046H_AGC_IF_MAX, 0xff); // } |
591 | tda1004x_write_mask(state, TDA10046H_CVBER_CTRL, 0x30, 0x10); // 10^6 VBER measurement bits | ||
592 | tda1004x_write_byteI(state, TDA10046H_AGC_GAINS, 1); // IF gain 2, TUN gain 1 | 631 | tda1004x_write_byteI(state, TDA10046H_AGC_GAINS, 1); // IF gain 2, TUN gain 1 |
593 | tda1004x_write_mask(state, TDA1004X_AUTO, 0x80, 0); // crystal is 50ppm | 632 | tda1004x_write_byteI(state, TDA10046H_CVBER_CTRL, 0x1a); // 10^6 VBER measurement bits |
594 | tda1004x_write_byteI(state, TDA1004X_CONF_TS1, 7); // MPEG2 interface config | 633 | tda1004x_write_byteI(state, TDA1004X_CONF_TS1, 7); // MPEG2 interface config |
595 | tda1004x_write_mask(state, TDA1004X_CONF_TS2, 0x31, 0); // MPEG2 interface config | 634 | tda1004x_write_byteI(state, TDA1004X_CONF_TS2, 0xc0); // MPEG2 interface config |
596 | tda1004x_write_mask(state, TDA10046H_CONF_TRISTATE1, 0x9e, 0); // disable AGC_TUN | 635 | tda1004x_write_mask(state, 0x3a, 0x80, state->config->invert_oclk << 7); |
636 | |||
597 | tda1004x_write_byteI(state, TDA10046H_CONF_TRISTATE2, 0xe1); // tristate setup | 637 | tda1004x_write_byteI(state, TDA10046H_CONF_TRISTATE2, 0xe1); // tristate setup |
598 | tda1004x_write_byteI(state, TDA10046H_GPIO_OUT_SEL, 0xcc); // GPIO output config | 638 | tda1004x_write_byteI(state, TDA10046H_GPIO_OUT_SEL, 0xcc); // GPIO output config |
599 | tda1004x_write_mask(state, TDA10046H_GPIO_SELECT, 8, 8); // GPIO select | 639 | tda1004x_write_byteI(state, TDA10046H_GPIO_SELECT, 8); // GPIO select |
600 | tda10046h_set_bandwidth(state, BANDWIDTH_8_MHZ); // default bandwidth 8 MHz | ||
601 | |||
602 | tda1004x_write_mask(state, 0x3a, 0x80, state->config->invert_oclk << 7); | ||
603 | 640 | ||
604 | state->initialised = 1; | 641 | state->initialised = 1; |
605 | return 0; | 642 | return 0; |
@@ -629,9 +666,6 @@ static int tda1004x_set_fe(struct dvb_frontend* fe, | |||
629 | state->config->pll_set(fe, fe_params); | 666 | state->config->pll_set(fe, fe_params); |
630 | tda1004x_disable_tuner_i2c(state); | 667 | tda1004x_disable_tuner_i2c(state); |
631 | 668 | ||
632 | if (state->demod_type == TDA1004X_DEMOD_TDA10046) | ||
633 | tda1004x_write_mask(state, TDA10046H_AGC_CONF, 4, 4); | ||
634 | |||
635 | // Hardcoded to use auto as much as possible on the TDA10045 as it | 669 | // Hardcoded to use auto as much as possible on the TDA10045 as it |
636 | // is very unreliable if AUTO mode is _not_ used. | 670 | // is very unreliable if AUTO mode is _not_ used. |
637 | if (state->demod_type == TDA1004X_DEMOD_TDA10045) { | 671 | if (state->demod_type == TDA1004X_DEMOD_TDA10045) { |
@@ -1089,6 +1123,11 @@ static int tda1004x_sleep(struct dvb_frontend* fe) | |||
1089 | break; | 1123 | break; |
1090 | 1124 | ||
1091 | case TDA1004X_DEMOD_TDA10046: | 1125 | case TDA1004X_DEMOD_TDA10046: |
1126 | if (state->config->pll_sleep != NULL) { | ||
1127 | tda1004x_enable_tuner_i2c(state); | ||
1128 | state->config->pll_sleep(fe); | ||
1129 | tda1004x_disable_tuner_i2c(state); | ||
1130 | } | ||
1092 | tda1004x_write_mask(state, TDA1004X_CONFC4, 1, 1); | 1131 | tda1004x_write_mask(state, TDA1004X_CONFC4, 1, 1); |
1093 | break; | 1132 | break; |
1094 | } | 1133 | } |
@@ -1100,8 +1139,9 @@ static int tda1004x_sleep(struct dvb_frontend* fe) | |||
1100 | static int tda1004x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | 1139 | static int tda1004x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
1101 | { | 1140 | { |
1102 | fesettings->min_delay_ms = 800; | 1141 | fesettings->min_delay_ms = 800; |
1103 | fesettings->step_size = 166667; | 1142 | /* Drift compensation makes no sense for DVB-T */ |
1104 | fesettings->max_drift = 166667*2; | 1143 | fesettings->step_size = 0; |
1144 | fesettings->max_drift = 0; | ||
1105 | return 0; | 1145 | return 0; |
1106 | } | 1146 | } |
1107 | 1147 | ||
@@ -1216,7 +1256,6 @@ struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config, | |||
1216 | memcpy(&state->ops, &tda10046_ops, sizeof(struct dvb_frontend_ops)); | 1256 | memcpy(&state->ops, &tda10046_ops, sizeof(struct dvb_frontend_ops)); |
1217 | state->initialised = 0; | 1257 | state->initialised = 0; |
1218 | state->demod_type = TDA1004X_DEMOD_TDA10046; | 1258 | state->demod_type = TDA1004X_DEMOD_TDA10046; |
1219 | state->fw_version = 0x20; /* dummy default value */ | ||
1220 | 1259 | ||
1221 | /* check if the demod is there */ | 1260 | /* check if the demod is there */ |
1222 | if (tda1004x_read_byte(state, TDA1004X_CHIPID) != 0x46) { | 1261 | if (tda1004x_read_byte(state, TDA1004X_CHIPID) != 0x46) { |
diff --git a/drivers/media/dvb/frontends/tda1004x.h b/drivers/media/dvb/frontends/tda1004x.h index c8e1d54ff262..8659c52647ad 100644 --- a/drivers/media/dvb/frontends/tda1004x.h +++ b/drivers/media/dvb/frontends/tda1004x.h | |||
@@ -26,6 +26,25 @@ | |||
26 | #include <linux/dvb/frontend.h> | 26 | #include <linux/dvb/frontend.h> |
27 | #include <linux/firmware.h> | 27 | #include <linux/firmware.h> |
28 | 28 | ||
29 | enum tda10046_xtal { | ||
30 | TDA10046_XTAL_4M, | ||
31 | TDA10046_XTAL_16M, | ||
32 | }; | ||
33 | |||
34 | enum tda10046_agc { | ||
35 | TDA10046_AGC_DEFAULT, /* original configuration */ | ||
36 | TDA10046_AGC_IFO_AUTO_NEG, /* IF AGC only, automatic, negtive */ | ||
37 | TDA10046_AGC_IFO_AUTO_POS, /* IF AGC only, automatic, positive */ | ||
38 | TDA10046_AGC_TDA827X, /* IF AGC only, special setup for tda827x */ | ||
39 | }; | ||
40 | |||
41 | enum tda10046_if { | ||
42 | TDA10046_FREQ_3617, /* original config, 36,166 MHZ */ | ||
43 | TDA10046_FREQ_3613, /* 36,13 MHZ */ | ||
44 | TDA10046_FREQ_045, /* low IF, 4.0, 4.5, or 5.0 MHZ */ | ||
45 | TDA10046_FREQ_052, /* low IF, 5.1667 MHZ for tda9889 */ | ||
46 | }; | ||
47 | |||
29 | struct tda1004x_config | 48 | struct tda1004x_config |
30 | { | 49 | { |
31 | /* the demodulator's i2c address */ | 50 | /* the demodulator's i2c address */ |
@@ -37,14 +56,22 @@ struct tda1004x_config | |||
37 | /* Does the OCLK signal need inverted? */ | 56 | /* Does the OCLK signal need inverted? */ |
38 | u8 invert_oclk; | 57 | u8 invert_oclk; |
39 | 58 | ||
40 | /* value of N_I2C of the CONF_PLL3 register */ | 59 | /* Xtal frequency, 4 or 16MHz*/ |
41 | u8 n_i2c; | 60 | enum tda10046_xtal xtal_freq; |
61 | |||
62 | /* IF frequency */ | ||
63 | enum tda10046_if if_freq; | ||
64 | |||
65 | /* AGC configuration */ | ||
66 | enum tda10046_agc agc_config; | ||
42 | 67 | ||
43 | /* PLL maintenance */ | 68 | /* PLL maintenance */ |
44 | int (*pll_init)(struct dvb_frontend* fe); | 69 | int (*pll_init)(struct dvb_frontend* fe); |
70 | void (*pll_sleep)(struct dvb_frontend* fe); | ||
45 | int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); | 71 | int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); |
46 | 72 | ||
47 | /* request firmware for device */ | 73 | /* request firmware for device */ |
74 | /* set this to NULL if the card has a firmware EEPROM */ | ||
48 | int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name); | 75 | int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name); |
49 | }; | 76 | }; |
50 | 77 | ||
diff --git a/drivers/media/dvb/frontends/tda80xx.c b/drivers/media/dvb/frontends/tda80xx.c index 032d348dafb7..88e125079ca1 100644 --- a/drivers/media/dvb/frontends/tda80xx.c +++ b/drivers/media/dvb/frontends/tda80xx.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
28 | #include <linux/threads.h> | 28 | #include <linux/threads.h> |
29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
30 | #include <linux/irq.h> | ||
31 | #include <linux/kernel.h> | 30 | #include <linux/kernel.h> |
32 | #include <linux/module.h> | 31 | #include <linux/module.h> |
33 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
diff --git a/drivers/media/dvb/pluto2/Kconfig b/drivers/media/dvb/pluto2/Kconfig new file mode 100644 index 000000000000..f02842be0d60 --- /dev/null +++ b/drivers/media/dvb/pluto2/Kconfig | |||
@@ -0,0 +1,16 @@ | |||
1 | config DVB_PLUTO2 | ||
2 | tristate "Pluto2 cards" | ||
3 | depends on DVB_CORE && PCI | ||
4 | select I2C | ||
5 | select I2C_ALGOBIT | ||
6 | select DVB_TDA1004X | ||
7 | help | ||
8 | Support for PCI cards based on the Pluto2 FPGA like the Satelco | ||
9 | Easywatch Mobile Terrestrial DVB-T Receiver. | ||
10 | |||
11 | Since these cards have no MPEG decoder onboard, they transmit | ||
12 | only compressed MPEG data over the PCI bus, so you need | ||
13 | an external software decoder to watch TV on your computer. | ||
14 | |||
15 | Say Y or M if you own such a device and want to use it. | ||
16 | |||
diff --git a/drivers/media/dvb/pluto2/Makefile b/drivers/media/dvb/pluto2/Makefile new file mode 100644 index 000000000000..86ca84b2be6e --- /dev/null +++ b/drivers/media/dvb/pluto2/Makefile | |||
@@ -0,0 +1,3 @@ | |||
1 | obj-$(CONFIG_DVB_PLUTO2) = pluto2.o | ||
2 | |||
3 | EXTRA_CFLAGS = -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/ | ||
diff --git a/drivers/media/dvb/pluto2/pluto2.c b/drivers/media/dvb/pluto2/pluto2.c new file mode 100644 index 000000000000..706e0bcb5ede --- /dev/null +++ b/drivers/media/dvb/pluto2/pluto2.c | |||
@@ -0,0 +1,809 @@ | |||
1 | /* | ||
2 | * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T] | ||
3 | * | ||
4 | * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org> | ||
5 | * | ||
6 | * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/ | ||
7 | * by Dany Salman <salmandany@yahoo.fr> | ||
8 | * Copyright (c) 2004 TDF | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
23 | * | ||
24 | */ | ||
25 | |||
26 | #include <linux/i2c.h> | ||
27 | #include <linux/i2c-algo-bit.h> | ||
28 | #include <linux/init.h> | ||
29 | #include <linux/kernel.h> | ||
30 | #include <linux/module.h> | ||
31 | #include <linux/pci.h> | ||
32 | #include <linux/dma-mapping.h> | ||
33 | |||
34 | #include "demux.h" | ||
35 | #include "dmxdev.h" | ||
36 | #include "dvb_demux.h" | ||
37 | #include "dvb_frontend.h" | ||
38 | #include "dvb_net.h" | ||
39 | #include "dvbdev.h" | ||
40 | #include "tda1004x.h" | ||
41 | |||
42 | #define DRIVER_NAME "pluto2" | ||
43 | |||
44 | #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */ | ||
45 | #define REG_PCAR 0x0020 /* PC address register */ | ||
46 | #define REG_TSCR 0x0024 /* TS ctrl & status */ | ||
47 | #define REG_MISC 0x0028 /* miscellaneous */ | ||
48 | #define REG_MMAC 0x002c /* MSB MAC address */ | ||
49 | #define REG_IMAC 0x0030 /* ISB MAC address */ | ||
50 | #define REG_LMAC 0x0034 /* LSB MAC address */ | ||
51 | #define REG_SPID 0x0038 /* SPI data */ | ||
52 | #define REG_SLCS 0x003c /* serial links ctrl/status */ | ||
53 | |||
54 | #define PID0_NOFIL (0x0001 << 16) | ||
55 | #define PIDn_ENP (0x0001 << 15) | ||
56 | #define PID0_END (0x0001 << 14) | ||
57 | #define PID0_AFIL (0x0001 << 13) | ||
58 | #define PIDn_PID (0x1fff << 0) | ||
59 | |||
60 | #define TSCR_NBPACKETS (0x00ff << 24) | ||
61 | #define TSCR_DEM (0x0001 << 17) | ||
62 | #define TSCR_DE (0x0001 << 16) | ||
63 | #define TSCR_RSTN (0x0001 << 15) | ||
64 | #define TSCR_MSKO (0x0001 << 14) | ||
65 | #define TSCR_MSKA (0x0001 << 13) | ||
66 | #define TSCR_MSKL (0x0001 << 12) | ||
67 | #define TSCR_OVR (0x0001 << 11) | ||
68 | #define TSCR_AFUL (0x0001 << 10) | ||
69 | #define TSCR_LOCK (0x0001 << 9) | ||
70 | #define TSCR_IACK (0x0001 << 8) | ||
71 | #define TSCR_ADEF (0x007f << 0) | ||
72 | |||
73 | #define MISC_DVR (0x0fff << 4) | ||
74 | #define MISC_ALED (0x0001 << 3) | ||
75 | #define MISC_FRST (0x0001 << 2) | ||
76 | #define MISC_LED1 (0x0001 << 1) | ||
77 | #define MISC_LED0 (0x0001 << 0) | ||
78 | |||
79 | #define SPID_SPIDR (0x00ff << 0) | ||
80 | |||
81 | #define SLCS_SCL (0x0001 << 7) | ||
82 | #define SLCS_SDA (0x0001 << 6) | ||
83 | #define SLCS_CSN (0x0001 << 2) | ||
84 | #define SLCS_OVR (0x0001 << 1) | ||
85 | #define SLCS_SWC (0x0001 << 0) | ||
86 | |||
87 | #define TS_DMA_PACKETS (8) | ||
88 | #define TS_DMA_BYTES (188 * TS_DMA_PACKETS) | ||
89 | |||
90 | #define I2C_ADDR_TDA10046 0x10 | ||
91 | #define I2C_ADDR_TUA6034 0xc2 | ||
92 | #define NHWFILTERS 8 | ||
93 | |||
94 | struct pluto { | ||
95 | /* pci */ | ||
96 | struct pci_dev *pdev; | ||
97 | u8 __iomem *io_mem; | ||
98 | |||
99 | /* dvb */ | ||
100 | struct dmx_frontend hw_frontend; | ||
101 | struct dmx_frontend mem_frontend; | ||
102 | struct dmxdev dmxdev; | ||
103 | struct dvb_adapter dvb_adapter; | ||
104 | struct dvb_demux demux; | ||
105 | struct dvb_frontend *fe; | ||
106 | struct dvb_net dvbnet; | ||
107 | unsigned int full_ts_users; | ||
108 | unsigned int users; | ||
109 | |||
110 | /* i2c */ | ||
111 | struct i2c_algo_bit_data i2c_bit; | ||
112 | struct i2c_adapter i2c_adap; | ||
113 | unsigned int i2cbug; | ||
114 | |||
115 | /* irq */ | ||
116 | unsigned int overflow; | ||
117 | |||
118 | /* dma */ | ||
119 | dma_addr_t dma_addr; | ||
120 | u8 dma_buf[TS_DMA_BYTES]; | ||
121 | u8 dummy[4096]; | ||
122 | }; | ||
123 | |||
124 | static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed) | ||
125 | { | ||
126 | return container_of(feed->demux, struct pluto, demux); | ||
127 | } | ||
128 | |||
129 | static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe) | ||
130 | { | ||
131 | return container_of(fe->dvb, struct pluto, dvb_adapter); | ||
132 | } | ||
133 | |||
134 | static inline u32 pluto_readreg(struct pluto *pluto, u32 reg) | ||
135 | { | ||
136 | return readl(&pluto->io_mem[reg]); | ||
137 | } | ||
138 | |||
139 | static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val) | ||
140 | { | ||
141 | writel(val, &pluto->io_mem[reg]); | ||
142 | } | ||
143 | |||
144 | static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits) | ||
145 | { | ||
146 | u32 val = readl(&pluto->io_mem[reg]); | ||
147 | val &= ~mask; | ||
148 | val |= bits; | ||
149 | writel(val, &pluto->io_mem[reg]); | ||
150 | } | ||
151 | |||
152 | static void pluto_setsda(void *data, int state) | ||
153 | { | ||
154 | struct pluto *pluto = data; | ||
155 | |||
156 | if (state) | ||
157 | pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA); | ||
158 | else | ||
159 | pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0); | ||
160 | } | ||
161 | |||
162 | static void pluto_setscl(void *data, int state) | ||
163 | { | ||
164 | struct pluto *pluto = data; | ||
165 | |||
166 | if (state) | ||
167 | pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL); | ||
168 | else | ||
169 | pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0); | ||
170 | |||
171 | /* try to detect i2c_inb() to workaround hardware bug: | ||
172 | * reset SDA to high after SCL has been set to low */ | ||
173 | if ((state) && (pluto->i2cbug == 0)) { | ||
174 | pluto->i2cbug = 1; | ||
175 | } else { | ||
176 | if ((!state) && (pluto->i2cbug == 1)) | ||
177 | pluto_setsda(pluto, 1); | ||
178 | pluto->i2cbug = 0; | ||
179 | } | ||
180 | } | ||
181 | |||
182 | static int pluto_getsda(void *data) | ||
183 | { | ||
184 | struct pluto *pluto = data; | ||
185 | |||
186 | return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA; | ||
187 | } | ||
188 | |||
189 | static int pluto_getscl(void *data) | ||
190 | { | ||
191 | struct pluto *pluto = data; | ||
192 | |||
193 | return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL; | ||
194 | } | ||
195 | |||
196 | static void pluto_reset_frontend(struct pluto *pluto, int reenable) | ||
197 | { | ||
198 | u32 val = pluto_readreg(pluto, REG_MISC); | ||
199 | |||
200 | if (val & MISC_FRST) { | ||
201 | val &= ~MISC_FRST; | ||
202 | pluto_writereg(pluto, REG_MISC, val); | ||
203 | } | ||
204 | if (reenable) { | ||
205 | val |= MISC_FRST; | ||
206 | pluto_writereg(pluto, REG_MISC, val); | ||
207 | } | ||
208 | } | ||
209 | |||
210 | static void pluto_reset_ts(struct pluto *pluto, int reenable) | ||
211 | { | ||
212 | u32 val = pluto_readreg(pluto, REG_TSCR); | ||
213 | |||
214 | if (val & TSCR_RSTN) { | ||
215 | val &= ~TSCR_RSTN; | ||
216 | pluto_writereg(pluto, REG_TSCR, val); | ||
217 | } | ||
218 | if (reenable) { | ||
219 | val |= TSCR_RSTN; | ||
220 | pluto_writereg(pluto, REG_TSCR, val); | ||
221 | } | ||
222 | } | ||
223 | |||
224 | static void pluto_set_dma_addr(struct pluto *pluto) | ||
225 | { | ||
226 | pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr)); | ||
227 | } | ||
228 | |||
229 | static int __devinit pluto_dma_map(struct pluto *pluto) | ||
230 | { | ||
231 | pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf, | ||
232 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); | ||
233 | |||
234 | return pci_dma_mapping_error(pluto->dma_addr); | ||
235 | } | ||
236 | |||
237 | static void pluto_dma_unmap(struct pluto *pluto) | ||
238 | { | ||
239 | pci_unmap_single(pluto->pdev, pluto->dma_addr, | ||
240 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); | ||
241 | } | ||
242 | |||
243 | static int pluto_start_feed(struct dvb_demux_feed *f) | ||
244 | { | ||
245 | struct pluto *pluto = feed_to_pluto(f); | ||
246 | |||
247 | /* enable PID filtering */ | ||
248 | if (pluto->users++ == 0) | ||
249 | pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0); | ||
250 | |||
251 | if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) | ||
252 | pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid); | ||
253 | else if (pluto->full_ts_users++ == 0) | ||
254 | pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL); | ||
255 | |||
256 | return 0; | ||
257 | } | ||
258 | |||
259 | static int pluto_stop_feed(struct dvb_demux_feed *f) | ||
260 | { | ||
261 | struct pluto *pluto = feed_to_pluto(f); | ||
262 | |||
263 | /* disable PID filtering */ | ||
264 | if (--pluto->users == 0) | ||
265 | pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL); | ||
266 | |||
267 | if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) | ||
268 | pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff); | ||
269 | else if (--pluto->full_ts_users == 0) | ||
270 | pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0); | ||
271 | |||
272 | return 0; | ||
273 | } | ||
274 | |||
275 | static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets) | ||
276 | { | ||
277 | /* synchronize the DMA transfer with the CPU | ||
278 | * first so that we see updated contents. */ | ||
279 | pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr, | ||
280 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); | ||
281 | |||
282 | /* Workaround for broken hardware: | ||
283 | * [1] On startup NBPACKETS seems to contain an uninitialized value, | ||
284 | * but no packets have been transfered. | ||
285 | * [2] Sometimes (actually very often) NBPACKETS stays at zero | ||
286 | * although one packet has been transfered. | ||
287 | */ | ||
288 | if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) { | ||
289 | unsigned int i = 0, valid; | ||
290 | while (pluto->dma_buf[i] == 0x47) | ||
291 | i += 188; | ||
292 | valid = i / 188; | ||
293 | if (nbpackets != valid) { | ||
294 | dev_err(&pluto->pdev->dev, "nbpackets=%u valid=%u\n", | ||
295 | nbpackets, valid); | ||
296 | nbpackets = valid; | ||
297 | } | ||
298 | } | ||
299 | |||
300 | dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets); | ||
301 | |||
302 | /* clear the dma buffer. this is needed to be able to identify | ||
303 | * new valid ts packets above */ | ||
304 | memset(pluto->dma_buf, 0, nbpackets * 188); | ||
305 | |||
306 | /* reset the dma address */ | ||
307 | pluto_set_dma_addr(pluto); | ||
308 | |||
309 | /* sync the buffer and give it back to the card */ | ||
310 | pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr, | ||
311 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); | ||
312 | } | ||
313 | |||
314 | static irqreturn_t pluto_irq(int irq, void *dev_id, struct pt_regs *regs) | ||
315 | { | ||
316 | struct pluto *pluto = dev_id; | ||
317 | u32 tscr; | ||
318 | |||
319 | /* check whether an interrupt occured on this device */ | ||
320 | tscr = pluto_readreg(pluto, REG_TSCR); | ||
321 | if (!(tscr & (TSCR_DE | TSCR_OVR))) | ||
322 | return IRQ_NONE; | ||
323 | |||
324 | if (tscr == 0xffffffff) { | ||
325 | // FIXME: maybe recover somehow | ||
326 | dev_err(&pluto->pdev->dev, "card hung up :(\n"); | ||
327 | return IRQ_HANDLED; | ||
328 | } | ||
329 | |||
330 | /* dma end interrupt */ | ||
331 | if (tscr & TSCR_DE) { | ||
332 | pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24); | ||
333 | /* overflow interrupt */ | ||
334 | if (tscr & TSCR_OVR) | ||
335 | pluto->overflow++; | ||
336 | if (pluto->overflow) { | ||
337 | dev_err(&pluto->pdev->dev, "overflow irq (%d)\n", | ||
338 | pluto->overflow); | ||
339 | pluto_reset_ts(pluto, 1); | ||
340 | pluto->overflow = 0; | ||
341 | } | ||
342 | } else if (tscr & TSCR_OVR) { | ||
343 | pluto->overflow++; | ||
344 | } | ||
345 | |||
346 | /* ACK the interrupt */ | ||
347 | pluto_writereg(pluto, REG_TSCR, tscr | TSCR_IACK); | ||
348 | |||
349 | return IRQ_HANDLED; | ||
350 | } | ||
351 | |||
352 | static void __devinit pluto_enable_irqs(struct pluto *pluto) | ||
353 | { | ||
354 | u32 val = pluto_readreg(pluto, REG_TSCR); | ||
355 | |||
356 | /* set the number of packets */ | ||
357 | val &= ~TSCR_ADEF; | ||
358 | val |= TS_DMA_PACKETS / 2; | ||
359 | /* disable AFUL and LOCK interrupts */ | ||
360 | val |= (TSCR_MSKA | TSCR_MSKL); | ||
361 | /* enable DMA and OVERFLOW interrupts */ | ||
362 | val &= ~(TSCR_DEM | TSCR_MSKO); | ||
363 | /* clear pending interrupts */ | ||
364 | val |= TSCR_IACK; | ||
365 | |||
366 | pluto_writereg(pluto, REG_TSCR, val); | ||
367 | } | ||
368 | |||
369 | static void pluto_disable_irqs(struct pluto *pluto) | ||
370 | { | ||
371 | u32 val = pluto_readreg(pluto, REG_TSCR); | ||
372 | |||
373 | /* disable all interrupts */ | ||
374 | val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL); | ||
375 | /* clear pending interrupts */ | ||
376 | val |= TSCR_IACK; | ||
377 | |||
378 | pluto_writereg(pluto, REG_TSCR, val); | ||
379 | } | ||
380 | |||
381 | static int __devinit pluto_hw_init(struct pluto *pluto) | ||
382 | { | ||
383 | pluto_reset_frontend(pluto, 1); | ||
384 | |||
385 | /* set automatic LED control by FPGA */ | ||
386 | pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED); | ||
387 | |||
388 | /* set data endianess */ | ||
389 | #ifdef __LITTLE_ENDIAN | ||
390 | pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END); | ||
391 | #else | ||
392 | pluto_rw(pluto, REG_PIDn(0), PID0_END, 0); | ||
393 | #endif | ||
394 | /* map DMA and set address */ | ||
395 | pluto_dma_map(pluto); | ||
396 | pluto_set_dma_addr(pluto); | ||
397 | |||
398 | /* enable interrupts */ | ||
399 | pluto_enable_irqs(pluto); | ||
400 | |||
401 | /* reset TS logic */ | ||
402 | pluto_reset_ts(pluto, 1); | ||
403 | |||
404 | return 0; | ||
405 | } | ||
406 | |||
407 | static void pluto_hw_exit(struct pluto *pluto) | ||
408 | { | ||
409 | /* disable interrupts */ | ||
410 | pluto_disable_irqs(pluto); | ||
411 | |||
412 | pluto_reset_ts(pluto, 0); | ||
413 | |||
414 | /* LED: disable automatic control, enable yellow, disable green */ | ||
415 | pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1); | ||
416 | |||
417 | /* unmap DMA */ | ||
418 | pluto_dma_unmap(pluto); | ||
419 | |||
420 | pluto_reset_frontend(pluto, 0); | ||
421 | } | ||
422 | |||
423 | static inline u32 divide(u32 numerator, u32 denominator) | ||
424 | { | ||
425 | if (denominator == 0) | ||
426 | return ~0; | ||
427 | |||
428 | return (numerator + denominator / 2) / denominator; | ||
429 | } | ||
430 | |||
431 | /* LG Innotek TDTE-E001P (Infineon TUA6034) */ | ||
432 | static int lg_tdtpe001p_pll_set(struct dvb_frontend *fe, | ||
433 | struct dvb_frontend_parameters *p) | ||
434 | { | ||
435 | struct pluto *pluto = frontend_to_pluto(fe); | ||
436 | struct i2c_msg msg; | ||
437 | int ret; | ||
438 | u8 buf[4]; | ||
439 | u32 div; | ||
440 | |||
441 | // Fref = 166.667 Hz | ||
442 | // Fref * 3 = 500.000 Hz | ||
443 | // IF = 36166667 | ||
444 | // IF / Fref = 217 | ||
445 | //div = divide(p->frequency + 36166667, 166667); | ||
446 | div = divide(p->frequency * 3, 500000) + 217; | ||
447 | buf[0] = (div >> 8) & 0x7f; | ||
448 | buf[1] = (div >> 0) & 0xff; | ||
449 | |||
450 | if (p->frequency < 611000000) | ||
451 | buf[2] = 0xb4; | ||
452 | else if (p->frequency < 811000000) | ||
453 | buf[2] = 0xbc; | ||
454 | else | ||
455 | buf[2] = 0xf4; | ||
456 | |||
457 | // VHF: 174-230 MHz | ||
458 | // center: 350 MHz | ||
459 | // UHF: 470-862 MHz | ||
460 | if (p->frequency < 350000000) | ||
461 | buf[3] = 0x02; | ||
462 | else | ||
463 | buf[3] = 0x04; | ||
464 | |||
465 | if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) | ||
466 | buf[3] |= 0x08; | ||
467 | |||
468 | if (sizeof(buf) == 6) { | ||
469 | buf[4] = buf[2]; | ||
470 | buf[4] &= ~0x1c; | ||
471 | buf[4] |= 0x18; | ||
472 | |||
473 | buf[5] = (0 << 7) | (2 << 4); | ||
474 | } | ||
475 | |||
476 | msg.addr = I2C_ADDR_TUA6034 >> 1; | ||
477 | msg.flags = 0; | ||
478 | msg.buf = buf; | ||
479 | msg.len = sizeof(buf); | ||
480 | |||
481 | ret = i2c_transfer(&pluto->i2c_adap, &msg, 1); | ||
482 | if (ret < 0) | ||
483 | return ret; | ||
484 | else if (ret == 0) | ||
485 | return -EREMOTEIO; | ||
486 | |||
487 | return 0; | ||
488 | } | ||
489 | |||
490 | static int pluto2_request_firmware(struct dvb_frontend *fe, | ||
491 | const struct firmware **fw, char *name) | ||
492 | { | ||
493 | struct pluto *pluto = frontend_to_pluto(fe); | ||
494 | |||
495 | return request_firmware(fw, name, &pluto->pdev->dev); | ||
496 | } | ||
497 | |||
498 | static struct tda1004x_config pluto2_fe_config __devinitdata = { | ||
499 | .demod_address = I2C_ADDR_TDA10046 >> 1, | ||
500 | .invert = 1, | ||
501 | .invert_oclk = 0, | ||
502 | .xtal_freq = TDA10046_XTAL_16M, | ||
503 | .agc_config = TDA10046_AGC_DEFAULT, | ||
504 | .if_freq = TDA10046_FREQ_3617, | ||
505 | .pll_set = lg_tdtpe001p_pll_set, | ||
506 | .pll_sleep = NULL, | ||
507 | .request_firmware = pluto2_request_firmware, | ||
508 | }; | ||
509 | |||
510 | static int __devinit frontend_init(struct pluto *pluto) | ||
511 | { | ||
512 | int ret; | ||
513 | |||
514 | pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap); | ||
515 | if (!pluto->fe) { | ||
516 | dev_err(&pluto->pdev->dev, "could not attach frontend\n"); | ||
517 | return -ENODEV; | ||
518 | } | ||
519 | |||
520 | ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe); | ||
521 | if (ret < 0) { | ||
522 | if (pluto->fe->ops->release) | ||
523 | pluto->fe->ops->release(pluto->fe); | ||
524 | return ret; | ||
525 | } | ||
526 | |||
527 | return 0; | ||
528 | } | ||
529 | |||
530 | static void __devinit pluto_read_rev(struct pluto *pluto) | ||
531 | { | ||
532 | u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR; | ||
533 | dev_info(&pluto->pdev->dev, "board revision %d.%d\n", | ||
534 | (val >> 12) & 0x0f, (val >> 4) & 0xff); | ||
535 | } | ||
536 | |||
537 | static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac) | ||
538 | { | ||
539 | u32 val = pluto_readreg(pluto, REG_MMAC); | ||
540 | mac[0] = (val >> 8) & 0xff; | ||
541 | mac[1] = (val >> 0) & 0xff; | ||
542 | |||
543 | val = pluto_readreg(pluto, REG_IMAC); | ||
544 | mac[2] = (val >> 8) & 0xff; | ||
545 | mac[3] = (val >> 0) & 0xff; | ||
546 | |||
547 | val = pluto_readreg(pluto, REG_LMAC); | ||
548 | mac[4] = (val >> 8) & 0xff; | ||
549 | mac[5] = (val >> 0) & 0xff; | ||
550 | |||
551 | dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
552 | mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); | ||
553 | } | ||
554 | |||
555 | static int __devinit pluto_read_serial(struct pluto *pluto) | ||
556 | { | ||
557 | struct pci_dev *pdev = pluto->pdev; | ||
558 | unsigned int i, j; | ||
559 | u8 __iomem *cis; | ||
560 | |||
561 | cis = pci_iomap(pdev, 1, 0); | ||
562 | if (!cis) | ||
563 | return -EIO; | ||
564 | |||
565 | dev_info(&pdev->dev, "S/N "); | ||
566 | |||
567 | for (i = 0xe0; i < 0x100; i += 4) { | ||
568 | u32 val = readl(&cis[i]); | ||
569 | for (j = 0; j < 32; j += 8) { | ||
570 | if ((val & 0xff) == 0xff) | ||
571 | goto out; | ||
572 | printk("%c", val & 0xff); | ||
573 | val >>= 8; | ||
574 | } | ||
575 | } | ||
576 | out: | ||
577 | printk("\n"); | ||
578 | pci_iounmap(pdev, cis); | ||
579 | |||
580 | return 0; | ||
581 | } | ||
582 | |||
583 | static int __devinit pluto2_probe(struct pci_dev *pdev, | ||
584 | const struct pci_device_id *ent) | ||
585 | { | ||
586 | struct pluto *pluto; | ||
587 | struct dvb_adapter *dvb_adapter; | ||
588 | struct dvb_demux *dvbdemux; | ||
589 | struct dmx_demux *dmx; | ||
590 | int ret = -ENOMEM; | ||
591 | |||
592 | pluto = kmalloc(sizeof(struct pluto), GFP_KERNEL); | ||
593 | if (!pluto) | ||
594 | goto out; | ||
595 | |||
596 | memset(pluto, 0, sizeof(struct pluto)); | ||
597 | pluto->pdev = pdev; | ||
598 | |||
599 | ret = pci_enable_device(pdev); | ||
600 | if (ret < 0) | ||
601 | goto err_kfree; | ||
602 | |||
603 | /* enable interrupts */ | ||
604 | pci_write_config_dword(pdev, 0x6c, 0x8000); | ||
605 | |||
606 | ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | ||
607 | if (ret < 0) | ||
608 | goto err_pci_disable_device; | ||
609 | |||
610 | pci_set_master(pdev); | ||
611 | |||
612 | ret = pci_request_regions(pdev, DRIVER_NAME); | ||
613 | if (ret < 0) | ||
614 | goto err_pci_disable_device; | ||
615 | |||
616 | pluto->io_mem = pci_iomap(pdev, 0, 0x40); | ||
617 | if (!pluto->io_mem) { | ||
618 | ret = -EIO; | ||
619 | goto err_pci_release_regions; | ||
620 | } | ||
621 | |||
622 | pci_set_drvdata(pdev, pluto); | ||
623 | |||
624 | ret = request_irq(pdev->irq, pluto_irq, SA_SHIRQ, DRIVER_NAME, pluto); | ||
625 | if (ret < 0) | ||
626 | goto err_pci_iounmap; | ||
627 | |||
628 | ret = pluto_hw_init(pluto); | ||
629 | if (ret < 0) | ||
630 | goto err_free_irq; | ||
631 | |||
632 | /* i2c */ | ||
633 | i2c_set_adapdata(&pluto->i2c_adap, pluto); | ||
634 | strcpy(pluto->i2c_adap.name, DRIVER_NAME); | ||
635 | pluto->i2c_adap.owner = THIS_MODULE; | ||
636 | pluto->i2c_adap.id = I2C_ALGO_BIT; | ||
637 | pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL; | ||
638 | pluto->i2c_adap.dev.parent = &pdev->dev; | ||
639 | pluto->i2c_adap.algo_data = &pluto->i2c_bit; | ||
640 | pluto->i2c_bit.data = pluto; | ||
641 | pluto->i2c_bit.setsda = pluto_setsda; | ||
642 | pluto->i2c_bit.setscl = pluto_setscl; | ||
643 | pluto->i2c_bit.getsda = pluto_getsda; | ||
644 | pluto->i2c_bit.getscl = pluto_getscl; | ||
645 | pluto->i2c_bit.udelay = 10; | ||
646 | pluto->i2c_bit.timeout = 10; | ||
647 | |||
648 | /* Raise SCL and SDA */ | ||
649 | pluto_setsda(pluto, 1); | ||
650 | pluto_setscl(pluto, 1); | ||
651 | |||
652 | ret = i2c_bit_add_bus(&pluto->i2c_adap); | ||
653 | if (ret < 0) | ||
654 | goto err_pluto_hw_exit; | ||
655 | |||
656 | /* dvb */ | ||
657 | ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE); | ||
658 | if (ret < 0) | ||
659 | goto err_i2c_bit_del_bus; | ||
660 | |||
661 | dvb_adapter = &pluto->dvb_adapter; | ||
662 | |||
663 | pluto_read_rev(pluto); | ||
664 | pluto_read_serial(pluto); | ||
665 | pluto_read_mac(pluto, dvb_adapter->proposed_mac); | ||
666 | |||
667 | dvbdemux = &pluto->demux; | ||
668 | dvbdemux->filternum = 256; | ||
669 | dvbdemux->feednum = 256; | ||
670 | dvbdemux->start_feed = pluto_start_feed; | ||
671 | dvbdemux->stop_feed = pluto_stop_feed; | ||
672 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | | ||
673 | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); | ||
674 | ret = dvb_dmx_init(dvbdemux); | ||
675 | if (ret < 0) | ||
676 | goto err_dvb_unregister_adapter; | ||
677 | |||
678 | dmx = &dvbdemux->dmx; | ||
679 | |||
680 | pluto->hw_frontend.source = DMX_FRONTEND_0; | ||
681 | pluto->mem_frontend.source = DMX_MEMORY_FE; | ||
682 | pluto->dmxdev.filternum = NHWFILTERS; | ||
683 | pluto->dmxdev.demux = dmx; | ||
684 | |||
685 | ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter); | ||
686 | if (ret < 0) | ||
687 | goto err_dvb_dmx_release; | ||
688 | |||
689 | ret = dmx->add_frontend(dmx, &pluto->hw_frontend); | ||
690 | if (ret < 0) | ||
691 | goto err_dvb_dmxdev_release; | ||
692 | |||
693 | ret = dmx->add_frontend(dmx, &pluto->mem_frontend); | ||
694 | if (ret < 0) | ||
695 | goto err_remove_hw_frontend; | ||
696 | |||
697 | ret = dmx->connect_frontend(dmx, &pluto->hw_frontend); | ||
698 | if (ret < 0) | ||
699 | goto err_remove_mem_frontend; | ||
700 | |||
701 | ret = frontend_init(pluto); | ||
702 | if (ret < 0) | ||
703 | goto err_disconnect_frontend; | ||
704 | |||
705 | dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx); | ||
706 | out: | ||
707 | return ret; | ||
708 | |||
709 | err_disconnect_frontend: | ||
710 | dmx->disconnect_frontend(dmx); | ||
711 | err_remove_mem_frontend: | ||
712 | dmx->remove_frontend(dmx, &pluto->mem_frontend); | ||
713 | err_remove_hw_frontend: | ||
714 | dmx->remove_frontend(dmx, &pluto->hw_frontend); | ||
715 | err_dvb_dmxdev_release: | ||
716 | dvb_dmxdev_release(&pluto->dmxdev); | ||
717 | err_dvb_dmx_release: | ||
718 | dvb_dmx_release(dvbdemux); | ||
719 | err_dvb_unregister_adapter: | ||
720 | dvb_unregister_adapter(dvb_adapter); | ||
721 | err_i2c_bit_del_bus: | ||
722 | i2c_bit_del_bus(&pluto->i2c_adap); | ||
723 | err_pluto_hw_exit: | ||
724 | pluto_hw_exit(pluto); | ||
725 | err_free_irq: | ||
726 | free_irq(pdev->irq, pluto); | ||
727 | err_pci_iounmap: | ||
728 | pci_iounmap(pdev, pluto->io_mem); | ||
729 | err_pci_release_regions: | ||
730 | pci_release_regions(pdev); | ||
731 | err_pci_disable_device: | ||
732 | pci_disable_device(pdev); | ||
733 | err_kfree: | ||
734 | pci_set_drvdata(pdev, NULL); | ||
735 | kfree(pluto); | ||
736 | goto out; | ||
737 | } | ||
738 | |||
739 | static void __devexit pluto2_remove(struct pci_dev *pdev) | ||
740 | { | ||
741 | struct pluto *pluto = pci_get_drvdata(pdev); | ||
742 | struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter; | ||
743 | struct dvb_demux *dvbdemux = &pluto->demux; | ||
744 | struct dmx_demux *dmx = &dvbdemux->dmx; | ||
745 | |||
746 | dmx->close(dmx); | ||
747 | dvb_net_release(&pluto->dvbnet); | ||
748 | if (pluto->fe) | ||
749 | dvb_unregister_frontend(pluto->fe); | ||
750 | |||
751 | dmx->disconnect_frontend(dmx); | ||
752 | dmx->remove_frontend(dmx, &pluto->mem_frontend); | ||
753 | dmx->remove_frontend(dmx, &pluto->hw_frontend); | ||
754 | dvb_dmxdev_release(&pluto->dmxdev); | ||
755 | dvb_dmx_release(dvbdemux); | ||
756 | dvb_unregister_adapter(dvb_adapter); | ||
757 | i2c_bit_del_bus(&pluto->i2c_adap); | ||
758 | pluto_hw_exit(pluto); | ||
759 | free_irq(pdev->irq, pluto); | ||
760 | pci_iounmap(pdev, pluto->io_mem); | ||
761 | pci_release_regions(pdev); | ||
762 | pci_disable_device(pdev); | ||
763 | pci_set_drvdata(pdev, NULL); | ||
764 | kfree(pluto); | ||
765 | } | ||
766 | |||
767 | #ifndef PCI_VENDOR_ID_SCM | ||
768 | #define PCI_VENDOR_ID_SCM 0x0432 | ||
769 | #endif | ||
770 | #ifndef PCI_DEVICE_ID_PLUTO2 | ||
771 | #define PCI_DEVICE_ID_PLUTO2 0x0001 | ||
772 | #endif | ||
773 | |||
774 | static struct pci_device_id pluto2_id_table[] __devinitdata = { | ||
775 | { | ||
776 | .vendor = PCI_VENDOR_ID_SCM, | ||
777 | .device = PCI_DEVICE_ID_PLUTO2, | ||
778 | .subvendor = PCI_ANY_ID, | ||
779 | .subdevice = PCI_ANY_ID, | ||
780 | }, { | ||
781 | /* empty */ | ||
782 | }, | ||
783 | }; | ||
784 | |||
785 | MODULE_DEVICE_TABLE(pci, pluto2_id_table); | ||
786 | |||
787 | static struct pci_driver pluto2_driver = { | ||
788 | .name = DRIVER_NAME, | ||
789 | .id_table = pluto2_id_table, | ||
790 | .probe = pluto2_probe, | ||
791 | .remove = __devexit_p(pluto2_remove), | ||
792 | }; | ||
793 | |||
794 | static int __init pluto2_init(void) | ||
795 | { | ||
796 | return pci_register_driver(&pluto2_driver); | ||
797 | } | ||
798 | |||
799 | static void __exit pluto2_exit(void) | ||
800 | { | ||
801 | pci_unregister_driver(&pluto2_driver); | ||
802 | } | ||
803 | |||
804 | module_init(pluto2_init); | ||
805 | module_exit(pluto2_exit); | ||
806 | |||
807 | MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>"); | ||
808 | MODULE_DESCRIPTION("Pluto2 driver"); | ||
809 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/dvb/ttpci/Kconfig b/drivers/media/dvb/ttpci/Kconfig index 7ffa2c7315b3..bf3c011d2cfb 100644 --- a/drivers/media/dvb/ttpci/Kconfig +++ b/drivers/media/dvb/ttpci/Kconfig | |||
@@ -12,7 +12,7 @@ config DVB_AV7110 | |||
12 | select DVB_STV0297 | 12 | select DVB_STV0297 |
13 | select DVB_L64781 | 13 | select DVB_L64781 |
14 | help | 14 | help |
15 | Support for SAA7146 and AV7110 based DVB cards as produced | 15 | Support for SAA7146 and AV7110 based DVB cards as produced |
16 | by Fujitsu-Siemens, Technotrend, Hauppauge and others. | 16 | by Fujitsu-Siemens, Technotrend, Hauppauge and others. |
17 | 17 | ||
18 | This driver only supports the fullfeatured cards with | 18 | This driver only supports the fullfeatured cards with |
@@ -33,7 +33,7 @@ config DVB_AV7110_FIRMWARE | |||
33 | If you want to compile the firmware into the driver you need to say | 33 | If you want to compile the firmware into the driver you need to say |
34 | Y here and provide the correct path of the firmware. You need this | 34 | Y here and provide the correct path of the firmware. You need this |
35 | option if you want to compile the whole driver statically into the | 35 | option if you want to compile the whole driver statically into the |
36 | kernel. | 36 | kernel. |
37 | 37 | ||
38 | All other people say N. | 38 | All other people say N. |
39 | 39 | ||
@@ -66,6 +66,7 @@ config DVB_BUDGET | |||
66 | select DVB_L64781 | 66 | select DVB_L64781 |
67 | select DVB_TDA8083 | 67 | select DVB_TDA8083 |
68 | select DVB_TDA10021 | 68 | select DVB_TDA10021 |
69 | select DVB_S5H1420 | ||
69 | help | 70 | help |
70 | Support for simple SAA7146 based DVB cards | 71 | Support for simple SAA7146 based DVB cards |
71 | (so called Budget- or Nova-PCI cards) without onboard | 72 | (so called Budget- or Nova-PCI cards) without onboard |
@@ -119,9 +120,9 @@ config DVB_BUDGET_PATCH | |||
119 | select DVB_VES1X93 | 120 | select DVB_VES1X93 |
120 | select DVB_TDA8083 | 121 | select DVB_TDA8083 |
121 | help | 122 | help |
122 | Support for Budget Patch (full TS) modification on | 123 | Support for Budget Patch (full TS) modification on |
123 | SAA7146+AV7110 based cards (DVB-S cards). This | 124 | SAA7146+AV7110 based cards (DVB-S cards). This |
124 | driver doesn't use onboard MPEG2 decoder. The | 125 | driver doesn't use onboard MPEG2 decoder. The |
125 | card is driven in Budget-only mode. Card is | 126 | card is driven in Budget-only mode. Card is |
126 | required to have loaded firmware to tune properly. | 127 | required to have loaded firmware to tune properly. |
127 | Firmware can be loaded by insertion and removal of | 128 | Firmware can be loaded by insertion and removal of |
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c index 8e33a850e13e..e4c6e87f6c5d 100644 --- a/drivers/media/dvb/ttpci/av7110.c +++ b/drivers/media/dvb/ttpci/av7110.c | |||
@@ -116,13 +116,18 @@ static int av7110_num = 0; | |||
116 | 116 | ||
117 | static void init_av7110_av(struct av7110 *av7110) | 117 | static void init_av7110_av(struct av7110 *av7110) |
118 | { | 118 | { |
119 | int ret; | ||
119 | struct saa7146_dev *dev = av7110->dev; | 120 | struct saa7146_dev *dev = av7110->dev; |
120 | 121 | ||
121 | /* set internal volume control to maximum */ | 122 | /* set internal volume control to maximum */ |
122 | av7110->adac_type = DVB_ADAC_TI; | 123 | av7110->adac_type = DVB_ADAC_TI; |
123 | av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right); | 124 | ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right); |
125 | if (ret < 0) | ||
126 | printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret); | ||
124 | 127 | ||
125 | av7710_set_video_mode(av7110, vidmode); | 128 | ret = av7710_set_video_mode(av7110, vidmode); |
129 | if (ret < 0) | ||
130 | printk("dvb-ttpci:cannot set video mode:%d\n",ret); | ||
126 | 131 | ||
127 | /* handle different card types */ | 132 | /* handle different card types */ |
128 | /* remaining inits according to card and frontend type */ | 133 | /* remaining inits according to card and frontend type */ |
@@ -156,8 +161,12 @@ static void init_av7110_av(struct av7110 *av7110) | |||
156 | 161 | ||
157 | if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP) { | 162 | if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP) { |
158 | // switch DVB SCART on | 163 | // switch DVB SCART on |
159 | av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0); | 164 | ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0); |
160 | av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1); | 165 | if (ret < 0) |
166 | printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret); | ||
167 | ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1); | ||
168 | if (ret < 0) | ||
169 | printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret); | ||
161 | if (rgb_on && | 170 | if (rgb_on && |
162 | (av7110->dev->pci->subsystem_vendor == 0x110a) && (av7110->dev->pci->subsystem_device == 0x0000)) { | 171 | (av7110->dev->pci->subsystem_vendor == 0x110a) && (av7110->dev->pci->subsystem_device == 0x0000)) { |
163 | saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16 | 172 | saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16 |
@@ -165,8 +174,12 @@ static void init_av7110_av(struct av7110 *av7110) | |||
165 | } | 174 | } |
166 | } | 175 | } |
167 | 176 | ||
168 | av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right); | 177 | ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right); |
169 | av7110_setup_irc_config(av7110, 0); | 178 | if (ret < 0) |
179 | printk("dvb-ttpci:cannot set volume :%d\n",ret); | ||
180 | ret = av7110_setup_irc_config(av7110, 0); | ||
181 | if (ret < 0) | ||
182 | printk("dvb-ttpci:cannot setup irc config :%d\n",ret); | ||
170 | } | 183 | } |
171 | 184 | ||
172 | static void recover_arm(struct av7110 *av7110) | 185 | static void recover_arm(struct av7110 *av7110) |
@@ -258,8 +271,9 @@ static int arm_thread(void *data) | |||
258 | * | 271 | * |
259 | * If we want to support multiple controls we would have to do much more... | 272 | * If we want to support multiple controls we would have to do much more... |
260 | */ | 273 | */ |
261 | void av7110_setup_irc_config(struct av7110 *av7110, u32 ir_config) | 274 | int av7110_setup_irc_config(struct av7110 *av7110, u32 ir_config) |
262 | { | 275 | { |
276 | int ret = 0; | ||
263 | static struct av7110 *last; | 277 | static struct av7110 *last; |
264 | 278 | ||
265 | dprintk(4, "%p\n", av7110); | 279 | dprintk(4, "%p\n", av7110); |
@@ -270,9 +284,10 @@ void av7110_setup_irc_config(struct av7110 *av7110, u32 ir_config) | |||
270 | last = av7110; | 284 | last = av7110; |
271 | 285 | ||
272 | if (av7110) { | 286 | if (av7110) { |
273 | av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, ir_config); | 287 | ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, ir_config); |
274 | av7110->ir_config = ir_config; | 288 | av7110->ir_config = ir_config; |
275 | } | 289 | } |
290 | return ret; | ||
276 | } | 291 | } |
277 | 292 | ||
278 | static void (*irc_handler)(u32); | 293 | static void (*irc_handler)(u32); |
@@ -765,13 +780,14 @@ static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, | |||
765 | pcrpid, vpid, apid, ttpid, subpid); | 780 | pcrpid, vpid, apid, ttpid, subpid); |
766 | } | 781 | } |
767 | 782 | ||
768 | void ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, | 783 | int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, |
769 | u16 subpid, u16 pcrpid) | 784 | u16 subpid, u16 pcrpid) |
770 | { | 785 | { |
786 | int ret = 0; | ||
771 | dprintk(4, "%p\n", av7110); | 787 | dprintk(4, "%p\n", av7110); |
772 | 788 | ||
773 | if (down_interruptible(&av7110->pid_mutex)) | 789 | if (down_interruptible(&av7110->pid_mutex)) |
774 | return; | 790 | return -ERESTARTSYS; |
775 | 791 | ||
776 | if (!(vpid & 0x8000)) | 792 | if (!(vpid & 0x8000)) |
777 | av7110->pids[DMX_PES_VIDEO] = vpid; | 793 | av7110->pids[DMX_PES_VIDEO] = vpid; |
@@ -786,10 +802,11 @@ void ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, | |||
786 | 802 | ||
787 | if (av7110->fe_synced) { | 803 | if (av7110->fe_synced) { |
788 | pcrpid = av7110->pids[DMX_PES_PCR]; | 804 | pcrpid = av7110->pids[DMX_PES_PCR]; |
789 | SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid); | 805 | ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid); |
790 | } | 806 | } |
791 | 807 | ||
792 | up(&av7110->pid_mutex); | 808 | up(&av7110->pid_mutex); |
809 | return ret; | ||
793 | } | 810 | } |
794 | 811 | ||
795 | 812 | ||
@@ -832,11 +849,13 @@ static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter) | |||
832 | ret = av7110_fw_request(av7110, buf, 20, &handle, 1); | 849 | ret = av7110_fw_request(av7110, buf, 20, &handle, 1); |
833 | if (ret != 0 || handle >= 32) { | 850 | if (ret != 0 || handle >= 32) { |
834 | printk("dvb-ttpci: %s error buf %04x %04x %04x %04x " | 851 | printk("dvb-ttpci: %s error buf %04x %04x %04x %04x " |
835 | "ret %x handle %04x\n", | 852 | "ret %d handle %04x\n", |
836 | __FUNCTION__, buf[0], buf[1], buf[2], buf[3], | 853 | __FUNCTION__, buf[0], buf[1], buf[2], buf[3], |
837 | ret, handle); | 854 | ret, handle); |
838 | dvbdmxfilter->hw_handle = 0xffff; | 855 | dvbdmxfilter->hw_handle = 0xffff; |
839 | return -1; | 856 | if (!ret) |
857 | ret = -1; | ||
858 | return ret; | ||
840 | } | 859 | } |
841 | 860 | ||
842 | av7110->handle2filter[handle] = dvbdmxfilter; | 861 | av7110->handle2filter[handle] = dvbdmxfilter; |
@@ -859,7 +878,7 @@ static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter) | |||
859 | if (handle >= 32) { | 878 | if (handle >= 32) { |
860 | printk("%s tried to stop invalid filter %04x, filter type = %x\n", | 879 | printk("%s tried to stop invalid filter %04x, filter type = %x\n", |
861 | __FUNCTION__, handle, dvbdmxfilter->type); | 880 | __FUNCTION__, handle, dvbdmxfilter->type); |
862 | return 0; | 881 | return -EINVAL; |
863 | } | 882 | } |
864 | 883 | ||
865 | av7110->handle2filter[handle] = NULL; | 884 | av7110->handle2filter[handle] = NULL; |
@@ -873,18 +892,20 @@ static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter) | |||
873 | "resp %04x %04x pid %d\n", | 892 | "resp %04x %04x pid %d\n", |
874 | __FUNCTION__, buf[0], buf[1], buf[2], ret, | 893 | __FUNCTION__, buf[0], buf[1], buf[2], ret, |
875 | answ[0], answ[1], dvbdmxfilter->feed->pid); | 894 | answ[0], answ[1], dvbdmxfilter->feed->pid); |
876 | ret = -1; | 895 | if (!ret) |
896 | ret = -1; | ||
877 | } | 897 | } |
878 | return ret; | 898 | return ret; |
879 | } | 899 | } |
880 | 900 | ||
881 | 901 | ||
882 | static void dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed) | 902 | static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed) |
883 | { | 903 | { |
884 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | 904 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; |
885 | struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv; | 905 | struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv; |
886 | u16 *pid = dvbdmx->pids, npids[5]; | 906 | u16 *pid = dvbdmx->pids, npids[5]; |
887 | int i; | 907 | int i; |
908 | int ret = 0; | ||
888 | 909 | ||
889 | dprintk(4, "%p\n", av7110); | 910 | dprintk(4, "%p\n", av7110); |
890 | 911 | ||
@@ -893,36 +914,49 @@ static void dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed) | |||
893 | npids[i] = (pid[i]&0x8000) ? 0 : pid[i]; | 914 | npids[i] = (pid[i]&0x8000) ? 0 : pid[i]; |
894 | if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) { | 915 | if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) { |
895 | npids[i] = 0; | 916 | npids[i] = 0; |
896 | ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | 917 | ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); |
897 | StartHWFilter(dvbdmxfeed->filter); | 918 | if (!ret) |
898 | return; | 919 | ret = StartHWFilter(dvbdmxfeed->filter); |
920 | return ret; | ||
921 | } | ||
922 | if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) { | ||
923 | ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | ||
924 | if (ret) | ||
925 | return ret; | ||
899 | } | 926 | } |
900 | if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) | ||
901 | ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | ||
902 | 927 | ||
903 | if (dvbdmxfeed->pes_type < 2 && npids[0]) | 928 | if (dvbdmxfeed->pes_type < 2 && npids[0]) |
904 | if (av7110->fe_synced) | 929 | if (av7110->fe_synced) |
905 | av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | 930 | { |
931 | ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | ||
932 | if (ret) | ||
933 | return ret; | ||
934 | } | ||
906 | 935 | ||
907 | if ((dvbdmxfeed->ts_type & TS_PACKET)) { | 936 | if ((dvbdmxfeed->ts_type & TS_PACKET)) { |
908 | if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000)) | 937 | if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000)) |
909 | av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed); | 938 | ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed); |
910 | if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000)) | 939 | if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000)) |
911 | av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed); | 940 | ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed); |
912 | } | 941 | } |
942 | return ret; | ||
913 | } | 943 | } |
914 | 944 | ||
915 | static void dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed) | 945 | static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed) |
916 | { | 946 | { |
917 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | 947 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; |
918 | struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv; | 948 | struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv; |
919 | u16 *pid = dvbdmx->pids, npids[5]; | 949 | u16 *pid = dvbdmx->pids, npids[5]; |
920 | int i; | 950 | int i; |
921 | 951 | ||
952 | int ret = 0; | ||
953 | |||
922 | dprintk(4, "%p\n", av7110); | 954 | dprintk(4, "%p\n", av7110); |
923 | 955 | ||
924 | if (dvbdmxfeed->pes_type <= 1) { | 956 | if (dvbdmxfeed->pes_type <= 1) { |
925 | av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO); | 957 | ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO); |
958 | if (ret) | ||
959 | return ret; | ||
926 | if (!av7110->rec_mode) | 960 | if (!av7110->rec_mode) |
927 | dvbdmx->recording = 0; | 961 | dvbdmx->recording = 0; |
928 | if (!av7110->playing) | 962 | if (!av7110->playing) |
@@ -933,24 +967,27 @@ static void dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed) | |||
933 | switch (i) { | 967 | switch (i) { |
934 | case 2: //teletext | 968 | case 2: //teletext |
935 | if (dvbdmxfeed->ts_type & TS_PACKET) | 969 | if (dvbdmxfeed->ts_type & TS_PACKET) |
936 | StopHWFilter(dvbdmxfeed->filter); | 970 | ret = StopHWFilter(dvbdmxfeed->filter); |
937 | npids[2] = 0; | 971 | npids[2] = 0; |
938 | break; | 972 | break; |
939 | case 0: | 973 | case 0: |
940 | case 1: | 974 | case 1: |
941 | case 4: | 975 | case 4: |
942 | if (!pids_off) | 976 | if (!pids_off) |
943 | return; | 977 | return 0; |
944 | npids[i] = (pid[i]&0x8000) ? 0 : pid[i]; | 978 | npids[i] = (pid[i]&0x8000) ? 0 : pid[i]; |
945 | break; | 979 | break; |
946 | } | 980 | } |
947 | ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | 981 | if (!ret) |
982 | ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | ||
983 | return ret; | ||
948 | } | 984 | } |
949 | 985 | ||
950 | static int av7110_start_feed(struct dvb_demux_feed *feed) | 986 | static int av7110_start_feed(struct dvb_demux_feed *feed) |
951 | { | 987 | { |
952 | struct dvb_demux *demux = feed->demux; | 988 | struct dvb_demux *demux = feed->demux; |
953 | struct av7110 *av7110 = demux->priv; | 989 | struct av7110 *av7110 = demux->priv; |
990 | int ret = 0; | ||
954 | 991 | ||
955 | dprintk(4, "%p\n", av7110); | 992 | dprintk(4, "%p\n", av7110); |
956 | 993 | ||
@@ -971,21 +1008,22 @@ static int av7110_start_feed(struct dvb_demux_feed *feed) | |||
971 | !(demux->pids[1] & 0x8000)) { | 1008 | !(demux->pids[1] & 0x8000)) { |
972 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout); | 1009 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout); |
973 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout); | 1010 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout); |
974 | av7110_av_start_play(av7110,RP_AV); | 1011 | ret = av7110_av_start_play(av7110,RP_AV); |
975 | demux->playing = 1; | 1012 | if (!ret) |
1013 | demux->playing = 1; | ||
976 | } | 1014 | } |
977 | break; | 1015 | break; |
978 | default: | 1016 | default: |
979 | dvb_feed_start_pid(feed); | 1017 | ret = dvb_feed_start_pid(feed); |
980 | break; | 1018 | break; |
981 | } | 1019 | } |
982 | } else if ((feed->ts_type & TS_PACKET) && | 1020 | } else if ((feed->ts_type & TS_PACKET) && |
983 | (demux->dmx.frontend->source != DMX_MEMORY_FE)) { | 1021 | (demux->dmx.frontend->source != DMX_MEMORY_FE)) { |
984 | StartHWFilter(feed->filter); | 1022 | ret = StartHWFilter(feed->filter); |
985 | } | 1023 | } |
986 | } | 1024 | } |
987 | 1025 | ||
988 | if (feed->type == DMX_TYPE_SEC) { | 1026 | else if (feed->type == DMX_TYPE_SEC) { |
989 | int i; | 1027 | int i; |
990 | 1028 | ||
991 | for (i = 0; i < demux->filternum; i++) { | 1029 | for (i = 0; i < demux->filternum; i++) { |
@@ -996,12 +1034,15 @@ static int av7110_start_feed(struct dvb_demux_feed *feed) | |||
996 | if (demux->filter[i].filter.parent != &feed->feed.sec) | 1034 | if (demux->filter[i].filter.parent != &feed->feed.sec) |
997 | continue; | 1035 | continue; |
998 | demux->filter[i].state = DMX_STATE_GO; | 1036 | demux->filter[i].state = DMX_STATE_GO; |
999 | if (demux->dmx.frontend->source != DMX_MEMORY_FE) | 1037 | if (demux->dmx.frontend->source != DMX_MEMORY_FE) { |
1000 | StartHWFilter(&demux->filter[i]); | 1038 | ret = StartHWFilter(&demux->filter[i]); |
1039 | if (ret) | ||
1040 | break; | ||
1041 | } | ||
1001 | } | 1042 | } |
1002 | } | 1043 | } |
1003 | 1044 | ||
1004 | return 0; | 1045 | return ret; |
1005 | } | 1046 | } |
1006 | 1047 | ||
1007 | 1048 | ||
@@ -1009,7 +1050,7 @@ static int av7110_stop_feed(struct dvb_demux_feed *feed) | |||
1009 | { | 1050 | { |
1010 | struct dvb_demux *demux = feed->demux; | 1051 | struct dvb_demux *demux = feed->demux; |
1011 | struct av7110 *av7110 = demux->priv; | 1052 | struct av7110 *av7110 = demux->priv; |
1012 | 1053 | int i, rc, ret = 0; | |
1013 | dprintk(4, "%p\n", av7110); | 1054 | dprintk(4, "%p\n", av7110); |
1014 | 1055 | ||
1015 | if (feed->type == DMX_TYPE_TS) { | 1056 | if (feed->type == DMX_TYPE_TS) { |
@@ -1022,26 +1063,29 @@ static int av7110_stop_feed(struct dvb_demux_feed *feed) | |||
1022 | } | 1063 | } |
1023 | if (feed->ts_type & TS_DECODER && | 1064 | if (feed->ts_type & TS_DECODER && |
1024 | feed->pes_type < DMX_TS_PES_OTHER) { | 1065 | feed->pes_type < DMX_TS_PES_OTHER) { |
1025 | dvb_feed_stop_pid(feed); | 1066 | ret = dvb_feed_stop_pid(feed); |
1026 | } else | 1067 | } else |
1027 | if ((feed->ts_type & TS_PACKET) && | 1068 | if ((feed->ts_type & TS_PACKET) && |
1028 | (demux->dmx.frontend->source != DMX_MEMORY_FE)) | 1069 | (demux->dmx.frontend->source != DMX_MEMORY_FE)) |
1029 | StopHWFilter(feed->filter); | 1070 | ret = StopHWFilter(feed->filter); |
1030 | } | 1071 | } |
1031 | 1072 | ||
1032 | if (feed->type == DMX_TYPE_SEC) { | 1073 | if (!ret && feed->type == DMX_TYPE_SEC) { |
1033 | int i; | 1074 | for (i = 0; i<demux->filternum; i++) { |
1034 | |||
1035 | for (i = 0; i<demux->filternum; i++) | ||
1036 | if (demux->filter[i].state == DMX_STATE_GO && | 1075 | if (demux->filter[i].state == DMX_STATE_GO && |
1037 | demux->filter[i].filter.parent == &feed->feed.sec) { | 1076 | demux->filter[i].filter.parent == &feed->feed.sec) { |
1038 | demux->filter[i].state = DMX_STATE_READY; | 1077 | demux->filter[i].state = DMX_STATE_READY; |
1039 | if (demux->dmx.frontend->source != DMX_MEMORY_FE) | 1078 | if (demux->dmx.frontend->source != DMX_MEMORY_FE) { |
1040 | StopHWFilter(&demux->filter[i]); | 1079 | rc = StopHWFilter(&demux->filter[i]); |
1080 | if (!ret) | ||
1081 | ret = rc; | ||
1082 | /* keep going, stop as many filters as possible */ | ||
1083 | } | ||
1084 | } | ||
1041 | } | 1085 | } |
1042 | } | 1086 | } |
1043 | 1087 | ||
1044 | return 0; | 1088 | return ret; |
1045 | } | 1089 | } |
1046 | 1090 | ||
1047 | 1091 | ||
@@ -1093,7 +1137,7 @@ static int dvb_get_stc(struct dmx_demux *demux, unsigned int num, | |||
1093 | ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4); | 1137 | ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4); |
1094 | if (ret) { | 1138 | if (ret) { |
1095 | printk(KERN_ERR "%s: av7110_fw_request error\n", __FUNCTION__); | 1139 | printk(KERN_ERR "%s: av7110_fw_request error\n", __FUNCTION__); |
1096 | return -EIO; | 1140 | return ret; |
1097 | } | 1141 | } |
1098 | dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n", | 1142 | dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n", |
1099 | fwstc[0], fwstc[1], fwstc[2], fwstc[3]); | 1143 | fwstc[0], fwstc[1], fwstc[2], fwstc[3]); |
@@ -1119,18 +1163,14 @@ static int av7110_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |||
1119 | 1163 | ||
1120 | switch (tone) { | 1164 | switch (tone) { |
1121 | case SEC_TONE_ON: | 1165 | case SEC_TONE_ON: |
1122 | Set22K(av7110, 1); | 1166 | return Set22K(av7110, 1); |
1123 | break; | ||
1124 | 1167 | ||
1125 | case SEC_TONE_OFF: | 1168 | case SEC_TONE_OFF: |
1126 | Set22K(av7110, 0); | 1169 | return Set22K(av7110, 0); |
1127 | break; | ||
1128 | 1170 | ||
1129 | default: | 1171 | default: |
1130 | return -EINVAL; | 1172 | return -EINVAL; |
1131 | } | 1173 | } |
1132 | |||
1133 | return 0; | ||
1134 | } | 1174 | } |
1135 | 1175 | ||
1136 | static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe, | 1176 | static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe, |
@@ -1138,9 +1178,7 @@ static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe, | |||
1138 | { | 1178 | { |
1139 | struct av7110* av7110 = fe->dvb->priv; | 1179 | struct av7110* av7110 = fe->dvb->priv; |
1140 | 1180 | ||
1141 | av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1); | 1181 | return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1); |
1142 | |||
1143 | return 0; | ||
1144 | } | 1182 | } |
1145 | 1183 | ||
1146 | static int av7110_diseqc_send_burst(struct dvb_frontend* fe, | 1184 | static int av7110_diseqc_send_burst(struct dvb_frontend* fe, |
@@ -1148,9 +1186,7 @@ static int av7110_diseqc_send_burst(struct dvb_frontend* fe, | |||
1148 | { | 1186 | { |
1149 | struct av7110* av7110 = fe->dvb->priv; | 1187 | struct av7110* av7110 = fe->dvb->priv; |
1150 | 1188 | ||
1151 | av7110_diseqc_send(av7110, 0, NULL, minicmd); | 1189 | return av7110_diseqc_send(av7110, 0, NULL, minicmd); |
1152 | |||
1153 | return 0; | ||
1154 | } | 1190 | } |
1155 | 1191 | ||
1156 | /* simplified code from budget-core.c */ | 1192 | /* simplified code from budget-core.c */ |
@@ -1992,76 +2028,85 @@ static struct l64781_config grundig_29504_401_config = { | |||
1992 | 2028 | ||
1993 | 2029 | ||
1994 | 2030 | ||
1995 | static void av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status) | 2031 | static int av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status) |
1996 | { | 2032 | { |
2033 | int ret = 0; | ||
1997 | int synced = (status & FE_HAS_LOCK) ? 1 : 0; | 2034 | int synced = (status & FE_HAS_LOCK) ? 1 : 0; |
1998 | 2035 | ||
1999 | av7110->fe_status = status; | 2036 | av7110->fe_status = status; |
2000 | 2037 | ||
2001 | if (av7110->fe_synced == synced) | 2038 | if (av7110->fe_synced == synced) |
2002 | return; | 2039 | return 0; |
2003 | |||
2004 | av7110->fe_synced = synced; | ||
2005 | 2040 | ||
2006 | if (av7110->playing) | 2041 | if (av7110->playing) |
2007 | return; | 2042 | return 0; |
2008 | 2043 | ||
2009 | if (down_interruptible(&av7110->pid_mutex)) | 2044 | if (down_interruptible(&av7110->pid_mutex)) |
2010 | return; | 2045 | return -ERESTARTSYS; |
2011 | 2046 | ||
2012 | if (av7110->fe_synced) { | 2047 | if (synced) { |
2013 | SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO], | 2048 | ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO], |
2014 | av7110->pids[DMX_PES_AUDIO], | 2049 | av7110->pids[DMX_PES_AUDIO], |
2015 | av7110->pids[DMX_PES_TELETEXT], 0, | 2050 | av7110->pids[DMX_PES_TELETEXT], 0, |
2016 | av7110->pids[DMX_PES_PCR]); | 2051 | av7110->pids[DMX_PES_PCR]); |
2017 | av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | 2052 | if (!ret) |
2053 | ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | ||
2018 | } else { | 2054 | } else { |
2019 | SetPIDs(av7110, 0, 0, 0, 0, 0); | 2055 | ret = SetPIDs(av7110, 0, 0, 0, 0, 0); |
2020 | av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0); | 2056 | if (!ret) { |
2021 | av7110_wait_msgstate(av7110, GPMQBusy); | 2057 | ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0); |
2058 | if (!ret) | ||
2059 | ret = av7110_wait_msgstate(av7110, GPMQBusy); | ||
2060 | } | ||
2022 | } | 2061 | } |
2023 | 2062 | ||
2063 | if (!ret) | ||
2064 | av7110->fe_synced = synced; | ||
2065 | |||
2024 | up(&av7110->pid_mutex); | 2066 | up(&av7110->pid_mutex); |
2067 | return ret; | ||
2025 | } | 2068 | } |
2026 | 2069 | ||
2027 | static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) | 2070 | static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
2028 | { | 2071 | { |
2029 | struct av7110* av7110 = fe->dvb->priv; | 2072 | struct av7110* av7110 = fe->dvb->priv; |
2030 | av7110_fe_lock_fix(av7110, 0); | 2073 | |
2031 | return av7110->fe_set_frontend(fe, params); | 2074 | int ret = av7110_fe_lock_fix(av7110, 0); |
2075 | if (!ret) | ||
2076 | ret = av7110->fe_set_frontend(fe, params); | ||
2077 | return ret; | ||
2032 | } | 2078 | } |
2033 | 2079 | ||
2034 | static int av7110_fe_init(struct dvb_frontend* fe) | 2080 | static int av7110_fe_init(struct dvb_frontend* fe) |
2035 | { | 2081 | { |
2036 | struct av7110* av7110 = fe->dvb->priv; | 2082 | struct av7110* av7110 = fe->dvb->priv; |
2037 | 2083 | ||
2038 | av7110_fe_lock_fix(av7110, 0); | 2084 | int ret = av7110_fe_lock_fix(av7110, 0); |
2039 | return av7110->fe_init(fe); | 2085 | if (!ret) |
2086 | ret = av7110->fe_init(fe); | ||
2087 | return ret; | ||
2040 | } | 2088 | } |
2041 | 2089 | ||
2042 | static int av7110_fe_read_status(struct dvb_frontend* fe, fe_status_t* status) | 2090 | static int av7110_fe_read_status(struct dvb_frontend* fe, fe_status_t* status) |
2043 | { | 2091 | { |
2044 | struct av7110* av7110 = fe->dvb->priv; | 2092 | struct av7110* av7110 = fe->dvb->priv; |
2045 | int ret; | ||
2046 | 2093 | ||
2047 | /* call the real implementation */ | 2094 | /* call the real implementation */ |
2048 | ret = av7110->fe_read_status(fe, status); | 2095 | int ret = av7110->fe_read_status(fe, status); |
2049 | if (ret) | 2096 | if (!ret) |
2050 | return ret; | 2097 | if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK)) |
2051 | 2098 | ret = av7110_fe_lock_fix(av7110, *status); | |
2052 | if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK)) { | 2099 | return ret; |
2053 | av7110_fe_lock_fix(av7110, *status); | ||
2054 | } | ||
2055 | |||
2056 | return 0; | ||
2057 | } | 2100 | } |
2058 | 2101 | ||
2059 | static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe) | 2102 | static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe) |
2060 | { | 2103 | { |
2061 | struct av7110* av7110 = fe->dvb->priv; | 2104 | struct av7110* av7110 = fe->dvb->priv; |
2062 | 2105 | ||
2063 | av7110_fe_lock_fix(av7110, 0); | 2106 | int ret = av7110_fe_lock_fix(av7110, 0); |
2064 | return av7110->fe_diseqc_reset_overload(fe); | 2107 | if (!ret) |
2108 | ret = av7110->fe_diseqc_reset_overload(fe); | ||
2109 | return ret; | ||
2065 | } | 2110 | } |
2066 | 2111 | ||
2067 | static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe, | 2112 | static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe, |
@@ -2069,40 +2114,50 @@ static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe, | |||
2069 | { | 2114 | { |
2070 | struct av7110* av7110 = fe->dvb->priv; | 2115 | struct av7110* av7110 = fe->dvb->priv; |
2071 | 2116 | ||
2072 | av7110_fe_lock_fix(av7110, 0); | 2117 | int ret = av7110_fe_lock_fix(av7110, 0); |
2073 | return av7110->fe_diseqc_send_master_cmd(fe, cmd); | 2118 | if (!ret) |
2119 | ret = av7110->fe_diseqc_send_master_cmd(fe, cmd); | ||
2120 | return ret; | ||
2074 | } | 2121 | } |
2075 | 2122 | ||
2076 | static int av7110_fe_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | 2123 | static int av7110_fe_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) |
2077 | { | 2124 | { |
2078 | struct av7110* av7110 = fe->dvb->priv; | 2125 | struct av7110* av7110 = fe->dvb->priv; |
2079 | 2126 | ||
2080 | av7110_fe_lock_fix(av7110, 0); | 2127 | int ret = av7110_fe_lock_fix(av7110, 0); |
2081 | return av7110->fe_diseqc_send_burst(fe, minicmd); | 2128 | if (!ret) |
2129 | ret = av7110->fe_diseqc_send_burst(fe, minicmd); | ||
2130 | return ret; | ||
2082 | } | 2131 | } |
2083 | 2132 | ||
2084 | static int av7110_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | 2133 | static int av7110_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) |
2085 | { | 2134 | { |
2086 | struct av7110* av7110 = fe->dvb->priv; | 2135 | struct av7110* av7110 = fe->dvb->priv; |
2087 | 2136 | ||
2088 | av7110_fe_lock_fix(av7110, 0); | 2137 | int ret = av7110_fe_lock_fix(av7110, 0); |
2089 | return av7110->fe_set_tone(fe, tone); | 2138 | if (!ret) |
2139 | ret = av7110->fe_set_tone(fe, tone); | ||
2140 | return ret; | ||
2090 | } | 2141 | } |
2091 | 2142 | ||
2092 | static int av7110_fe_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | 2143 | static int av7110_fe_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) |
2093 | { | 2144 | { |
2094 | struct av7110* av7110 = fe->dvb->priv; | 2145 | struct av7110* av7110 = fe->dvb->priv; |
2095 | 2146 | ||
2096 | av7110_fe_lock_fix(av7110, 0); | 2147 | int ret = av7110_fe_lock_fix(av7110, 0); |
2097 | return av7110->fe_set_voltage(fe, voltage); | 2148 | if (!ret) |
2149 | ret = av7110->fe_set_voltage(fe, voltage); | ||
2150 | return ret; | ||
2098 | } | 2151 | } |
2099 | 2152 | ||
2100 | static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned int cmd) | 2153 | static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned int cmd) |
2101 | { | 2154 | { |
2102 | struct av7110* av7110 = fe->dvb->priv; | 2155 | struct av7110* av7110 = fe->dvb->priv; |
2103 | 2156 | ||
2104 | av7110_fe_lock_fix(av7110, 0); | 2157 | int ret = av7110_fe_lock_fix(av7110, 0); |
2105 | return av7110->fe_dishnetwork_send_legacy_command(fe, cmd); | 2158 | if (!ret) |
2159 | ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd); | ||
2160 | return ret; | ||
2106 | } | 2161 | } |
2107 | 2162 | ||
2108 | static u8 read_pwm(struct av7110* av7110) | 2163 | static u8 read_pwm(struct av7110* av7110) |
diff --git a/drivers/media/dvb/ttpci/av7110.h b/drivers/media/dvb/ttpci/av7110.h index 4f69b4d01479..508b7739c609 100644 --- a/drivers/media/dvb/ttpci/av7110.h +++ b/drivers/media/dvb/ttpci/av7110.h | |||
@@ -119,8 +119,7 @@ struct av7110 { | |||
119 | volatile int bmp_state; | 119 | volatile int bmp_state; |
120 | #define BMP_NONE 0 | 120 | #define BMP_NONE 0 |
121 | #define BMP_LOADING 1 | 121 | #define BMP_LOADING 1 |
122 | #define BMP_LOADINGS 2 | 122 | #define BMP_LOADED 2 |
123 | #define BMP_LOADED 3 | ||
124 | wait_queue_head_t bmpq; | 123 | wait_queue_head_t bmpq; |
125 | 124 | ||
126 | 125 | ||
@@ -255,12 +254,12 @@ struct av7110 { | |||
255 | }; | 254 | }; |
256 | 255 | ||
257 | 256 | ||
258 | extern void ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, | 257 | extern int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, |
259 | u16 subpid, u16 pcrpid); | 258 | u16 subpid, u16 pcrpid); |
260 | 259 | ||
261 | extern void av7110_register_irc_handler(void (*func)(u32)); | 260 | extern void av7110_register_irc_handler(void (*func)(u32)); |
262 | extern void av7110_unregister_irc_handler(void (*func)(u32)); | 261 | extern void av7110_unregister_irc_handler(void (*func)(u32)); |
263 | extern void av7110_setup_irc_config (struct av7110 *av7110, u32 ir_config); | 262 | extern int av7110_setup_irc_config (struct av7110 *av7110, u32 ir_config); |
264 | 263 | ||
265 | extern int av7110_ir_init (void); | 264 | extern int av7110_ir_init (void); |
266 | extern void av7110_ir_exit (void); | 265 | extern void av7110_ir_exit (void); |
diff --git a/drivers/media/dvb/ttpci/av7110_av.c b/drivers/media/dvb/ttpci/av7110_av.c index ccf946125d02..0696a5a4f855 100644 --- a/drivers/media/dvb/ttpci/av7110_av.c +++ b/drivers/media/dvb/ttpci/av7110_av.c | |||
@@ -121,6 +121,7 @@ static int dvb_filter_pes2ts_cb(void *priv, unsigned char *data) | |||
121 | int av7110_av_start_record(struct av7110 *av7110, int av, | 121 | int av7110_av_start_record(struct av7110 *av7110, int av, |
122 | struct dvb_demux_feed *dvbdmxfeed) | 122 | struct dvb_demux_feed *dvbdmxfeed) |
123 | { | 123 | { |
124 | int ret = 0; | ||
124 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | 125 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; |
125 | 126 | ||
126 | dprintk(2, "av7110:%p, , dvb_demux_feed:%p\n", av7110, dvbdmxfeed); | 127 | dprintk(2, "av7110:%p, , dvb_demux_feed:%p\n", av7110, dvbdmxfeed); |
@@ -137,7 +138,7 @@ int av7110_av_start_record(struct av7110 *av7110, int av, | |||
137 | dvbdmx->pesfilter[0]->pid, | 138 | dvbdmx->pesfilter[0]->pid, |
138 | dvb_filter_pes2ts_cb, | 139 | dvb_filter_pes2ts_cb, |
139 | (void *) dvbdmx->pesfilter[0]); | 140 | (void *) dvbdmx->pesfilter[0]); |
140 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, AudioPES, 0); | 141 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, AudioPES, 0); |
141 | break; | 142 | break; |
142 | 143 | ||
143 | case RP_VIDEO: | 144 | case RP_VIDEO: |
@@ -145,7 +146,7 @@ int av7110_av_start_record(struct av7110 *av7110, int av, | |||
145 | dvbdmx->pesfilter[1]->pid, | 146 | dvbdmx->pesfilter[1]->pid, |
146 | dvb_filter_pes2ts_cb, | 147 | dvb_filter_pes2ts_cb, |
147 | (void *) dvbdmx->pesfilter[1]); | 148 | (void *) dvbdmx->pesfilter[1]); |
148 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, VideoPES, 0); | 149 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, VideoPES, 0); |
149 | break; | 150 | break; |
150 | 151 | ||
151 | case RP_AV: | 152 | case RP_AV: |
@@ -157,14 +158,15 @@ int av7110_av_start_record(struct av7110 *av7110, int av, | |||
157 | dvbdmx->pesfilter[1]->pid, | 158 | dvbdmx->pesfilter[1]->pid, |
158 | dvb_filter_pes2ts_cb, | 159 | dvb_filter_pes2ts_cb, |
159 | (void *) dvbdmx->pesfilter[1]); | 160 | (void *) dvbdmx->pesfilter[1]); |
160 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, AV_PES, 0); | 161 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, AV_PES, 0); |
161 | break; | 162 | break; |
162 | } | 163 | } |
163 | return 0; | 164 | return ret; |
164 | } | 165 | } |
165 | 166 | ||
166 | int av7110_av_start_play(struct av7110 *av7110, int av) | 167 | int av7110_av_start_play(struct av7110 *av7110, int av) |
167 | { | 168 | { |
169 | int ret = 0; | ||
168 | dprintk(2, "av7110:%p, \n", av7110); | 170 | dprintk(2, "av7110:%p, \n", av7110); |
169 | 171 | ||
170 | if (av7110->rec_mode) | 172 | if (av7110->rec_mode) |
@@ -182,54 +184,57 @@ int av7110_av_start_play(struct av7110 *av7110, int av) | |||
182 | av7110->playing |= av; | 184 | av7110->playing |= av; |
183 | switch (av7110->playing) { | 185 | switch (av7110->playing) { |
184 | case RP_AUDIO: | 186 | case RP_AUDIO: |
185 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, AudioPES, 0); | 187 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, AudioPES, 0); |
186 | break; | 188 | break; |
187 | case RP_VIDEO: | 189 | case RP_VIDEO: |
188 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, VideoPES, 0); | 190 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, VideoPES, 0); |
189 | av7110->sinfo = 0; | 191 | av7110->sinfo = 0; |
190 | break; | 192 | break; |
191 | case RP_AV: | 193 | case RP_AV: |
192 | av7110->sinfo = 0; | 194 | av7110->sinfo = 0; |
193 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, AV_PES, 0); | 195 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, AV_PES, 0); |
194 | break; | 196 | break; |
195 | } | 197 | } |
196 | return av7110->playing; | 198 | if (!ret) |
199 | ret = av7110->playing; | ||
200 | return ret; | ||
197 | } | 201 | } |
198 | 202 | ||
199 | void av7110_av_stop(struct av7110 *av7110, int av) | 203 | int av7110_av_stop(struct av7110 *av7110, int av) |
200 | { | 204 | { |
205 | int ret = 0; | ||
201 | dprintk(2, "av7110:%p, \n", av7110); | 206 | dprintk(2, "av7110:%p, \n", av7110); |
202 | 207 | ||
203 | if (!(av7110->playing & av) && !(av7110->rec_mode & av)) | 208 | if (!(av7110->playing & av) && !(av7110->rec_mode & av)) |
204 | return; | 209 | return 0; |
205 | |||
206 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Stop, 0); | 210 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Stop, 0); |
207 | if (av7110->playing) { | 211 | if (av7110->playing) { |
208 | av7110->playing &= ~av; | 212 | av7110->playing &= ~av; |
209 | switch (av7110->playing) { | 213 | switch (av7110->playing) { |
210 | case RP_AUDIO: | 214 | case RP_AUDIO: |
211 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, AudioPES, 0); | 215 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, AudioPES, 0); |
212 | break; | 216 | break; |
213 | case RP_VIDEO: | 217 | case RP_VIDEO: |
214 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, VideoPES, 0); | 218 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Play, 2, VideoPES, 0); |
215 | break; | 219 | break; |
216 | case RP_NONE: | 220 | case RP_NONE: |
217 | av7110_set_vidmode(av7110, av7110->vidmode); | 221 | ret = av7110_set_vidmode(av7110, av7110->vidmode); |
218 | break; | 222 | break; |
219 | } | 223 | } |
220 | } else { | 224 | } else { |
221 | av7110->rec_mode &= ~av; | 225 | av7110->rec_mode &= ~av; |
222 | switch (av7110->rec_mode) { | 226 | switch (av7110->rec_mode) { |
223 | case RP_AUDIO: | 227 | case RP_AUDIO: |
224 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, AudioPES, 0); | 228 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, AudioPES, 0); |
225 | break; | 229 | break; |
226 | case RP_VIDEO: | 230 | case RP_VIDEO: |
227 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, VideoPES, 0); | 231 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Record, 2, VideoPES, 0); |
228 | break; | 232 | break; |
229 | case RP_NONE: | 233 | case RP_NONE: |
230 | break; | 234 | break; |
231 | } | 235 | } |
232 | } | 236 | } |
237 | return ret; | ||
233 | } | 238 | } |
234 | 239 | ||
235 | 240 | ||
@@ -317,19 +322,22 @@ int av7110_set_volume(struct av7110 *av7110, int volleft, int volright) | |||
317 | return 0; | 322 | return 0; |
318 | } | 323 | } |
319 | 324 | ||
320 | void av7110_set_vidmode(struct av7110 *av7110, int mode) | 325 | int av7110_set_vidmode(struct av7110 *av7110, int mode) |
321 | { | 326 | { |
327 | int ret; | ||
322 | dprintk(2, "av7110:%p, \n", av7110); | 328 | dprintk(2, "av7110:%p, \n", av7110); |
323 | 329 | ||
324 | av7110_fw_cmd(av7110, COMTYPE_ENCODER, LoadVidCode, 1, mode); | 330 | ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, LoadVidCode, 1, mode); |
325 | 331 | ||
326 | if (!av7110->playing) { | 332 | if (!ret && !av7110->playing) { |
327 | ChangePIDs(av7110, av7110->pids[DMX_PES_VIDEO], | 333 | ret = ChangePIDs(av7110, av7110->pids[DMX_PES_VIDEO], |
328 | av7110->pids[DMX_PES_AUDIO], | 334 | av7110->pids[DMX_PES_AUDIO], |
329 | av7110->pids[DMX_PES_TELETEXT], | 335 | av7110->pids[DMX_PES_TELETEXT], |
330 | 0, av7110->pids[DMX_PES_PCR]); | 336 | 0, av7110->pids[DMX_PES_PCR]); |
331 | av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | 337 | if (!ret) |
338 | ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | ||
332 | } | 339 | } |
340 | return ret; | ||
333 | } | 341 | } |
334 | 342 | ||
335 | 343 | ||
@@ -340,17 +348,18 @@ static int sw2mode[16] = { | |||
340 | VIDEO_MODE_PAL, VIDEO_MODE_PAL, VIDEO_MODE_PAL, VIDEO_MODE_PAL, | 348 | VIDEO_MODE_PAL, VIDEO_MODE_PAL, VIDEO_MODE_PAL, VIDEO_MODE_PAL, |
341 | }; | 349 | }; |
342 | 350 | ||
343 | static void get_video_format(struct av7110 *av7110, u8 *buf, int count) | 351 | static int get_video_format(struct av7110 *av7110, u8 *buf, int count) |
344 | { | 352 | { |
345 | int i; | 353 | int i; |
346 | int hsize, vsize; | 354 | int hsize, vsize; |
347 | int sw; | 355 | int sw; |
348 | u8 *p; | 356 | u8 *p; |
357 | int ret = 0; | ||
349 | 358 | ||
350 | dprintk(2, "av7110:%p, \n", av7110); | 359 | dprintk(2, "av7110:%p, \n", av7110); |
351 | 360 | ||
352 | if (av7110->sinfo) | 361 | if (av7110->sinfo) |
353 | return; | 362 | return 0; |
354 | for (i = 7; i < count - 10; i++) { | 363 | for (i = 7; i < count - 10; i++) { |
355 | p = buf + i; | 364 | p = buf + i; |
356 | if (p[0] || p[1] || p[2] != 0x01 || p[3] != 0xb3) | 365 | if (p[0] || p[1] || p[2] != 0x01 || p[3] != 0xb3) |
@@ -359,11 +368,14 @@ static void get_video_format(struct av7110 *av7110, u8 *buf, int count) | |||
359 | hsize = ((p[1] &0xF0) >> 4) | (p[0] << 4); | 368 | hsize = ((p[1] &0xF0) >> 4) | (p[0] << 4); |
360 | vsize = ((p[1] &0x0F) << 8) | (p[2]); | 369 | vsize = ((p[1] &0x0F) << 8) | (p[2]); |
361 | sw = (p[3] & 0x0F); | 370 | sw = (p[3] & 0x0F); |
362 | av7110_set_vidmode(av7110, sw2mode[sw]); | 371 | ret = av7110_set_vidmode(av7110, sw2mode[sw]); |
363 | dprintk(2, "playback %dx%d fr=%d\n", hsize, vsize, sw); | 372 | if (!ret) { |
364 | av7110->sinfo = 1; | 373 | dprintk(2, "playback %dx%d fr=%d\n", hsize, vsize, sw); |
374 | av7110->sinfo = 1; | ||
375 | } | ||
365 | break; | 376 | break; |
366 | } | 377 | } |
378 | return ret; | ||
367 | } | 379 | } |
368 | 380 | ||
369 | 381 | ||
@@ -974,7 +986,7 @@ static int dvb_video_ioctl(struct inode *inode, struct file *file, | |||
974 | unsigned long arg = (unsigned long) parg; | 986 | unsigned long arg = (unsigned long) parg; |
975 | int ret = 0; | 987 | int ret = 0; |
976 | 988 | ||
977 | dprintk(2, "av7110:%p, \n", av7110); | 989 | dprintk(1, "av7110:%p, cmd=%04x\n", av7110,cmd); |
978 | 990 | ||
979 | if ((file->f_flags & O_ACCMODE) == O_RDONLY) { | 991 | if ((file->f_flags & O_ACCMODE) == O_RDONLY) { |
980 | if ( cmd != VIDEO_GET_STATUS && cmd != VIDEO_GET_EVENT && | 992 | if ( cmd != VIDEO_GET_STATUS && cmd != VIDEO_GET_EVENT && |
@@ -987,49 +999,57 @@ static int dvb_video_ioctl(struct inode *inode, struct file *file, | |||
987 | case VIDEO_STOP: | 999 | case VIDEO_STOP: |
988 | av7110->videostate.play_state = VIDEO_STOPPED; | 1000 | av7110->videostate.play_state = VIDEO_STOPPED; |
989 | if (av7110->videostate.stream_source == VIDEO_SOURCE_MEMORY) | 1001 | if (av7110->videostate.stream_source == VIDEO_SOURCE_MEMORY) |
990 | av7110_av_stop(av7110, RP_VIDEO); | 1002 | ret = av7110_av_stop(av7110, RP_VIDEO); |
991 | else | 1003 | else |
992 | vidcom(av7110, VIDEO_CMD_STOP, | 1004 | ret = vidcom(av7110, VIDEO_CMD_STOP, |
993 | av7110->videostate.video_blank ? 0 : 1); | 1005 | av7110->videostate.video_blank ? 0 : 1); |
994 | av7110->trickmode = TRICK_NONE; | 1006 | if (!ret) |
1007 | av7110->trickmode = TRICK_NONE; | ||
995 | break; | 1008 | break; |
996 | 1009 | ||
997 | case VIDEO_PLAY: | 1010 | case VIDEO_PLAY: |
998 | av7110->trickmode = TRICK_NONE; | 1011 | av7110->trickmode = TRICK_NONE; |
999 | if (av7110->videostate.play_state == VIDEO_FREEZED) { | 1012 | if (av7110->videostate.play_state == VIDEO_FREEZED) { |
1000 | av7110->videostate.play_state = VIDEO_PLAYING; | 1013 | av7110->videostate.play_state = VIDEO_PLAYING; |
1001 | vidcom(av7110, VIDEO_CMD_PLAY, 0); | 1014 | ret = vidcom(av7110, VIDEO_CMD_PLAY, 0); |
1015 | if (ret) | ||
1016 | break; | ||
1002 | } | 1017 | } |
1003 | 1018 | ||
1004 | if (av7110->videostate.stream_source == VIDEO_SOURCE_MEMORY) { | 1019 | if (av7110->videostate.stream_source == VIDEO_SOURCE_MEMORY) { |
1005 | if (av7110->playing == RP_AV) { | 1020 | if (av7110->playing == RP_AV) { |
1006 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Stop, 0); | 1021 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Stop, 0); |
1022 | if (ret) | ||
1023 | break; | ||
1007 | av7110->playing &= ~RP_VIDEO; | 1024 | av7110->playing &= ~RP_VIDEO; |
1008 | } | 1025 | } |
1009 | av7110_av_start_play(av7110, RP_VIDEO); | 1026 | ret = av7110_av_start_play(av7110, RP_VIDEO); |
1010 | vidcom(av7110, VIDEO_CMD_PLAY, 0); | ||
1011 | } else { | ||
1012 | //av7110_av_stop(av7110, RP_VIDEO); | ||
1013 | vidcom(av7110, VIDEO_CMD_PLAY, 0); | ||
1014 | } | 1027 | } |
1015 | av7110->videostate.play_state = VIDEO_PLAYING; | 1028 | if (!ret) |
1029 | ret = vidcom(av7110, VIDEO_CMD_PLAY, 0); | ||
1030 | if (!ret) | ||
1031 | av7110->videostate.play_state = VIDEO_PLAYING; | ||
1016 | break; | 1032 | break; |
1017 | 1033 | ||
1018 | case VIDEO_FREEZE: | 1034 | case VIDEO_FREEZE: |
1019 | av7110->videostate.play_state = VIDEO_FREEZED; | 1035 | av7110->videostate.play_state = VIDEO_FREEZED; |
1020 | if (av7110->playing & RP_VIDEO) | 1036 | if (av7110->playing & RP_VIDEO) |
1021 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Pause, 0); | 1037 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Pause, 0); |
1022 | else | 1038 | else |
1023 | vidcom(av7110, VIDEO_CMD_FREEZE, 1); | 1039 | ret = vidcom(av7110, VIDEO_CMD_FREEZE, 1); |
1024 | av7110->trickmode = TRICK_FREEZE; | 1040 | if (!ret) |
1041 | av7110->trickmode = TRICK_FREEZE; | ||
1025 | break; | 1042 | break; |
1026 | 1043 | ||
1027 | case VIDEO_CONTINUE: | 1044 | case VIDEO_CONTINUE: |
1028 | if (av7110->playing & RP_VIDEO) | 1045 | if (av7110->playing & RP_VIDEO) |
1029 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Continue, 0); | 1046 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Continue, 0); |
1030 | vidcom(av7110, VIDEO_CMD_PLAY, 0); | 1047 | if (!ret) |
1031 | av7110->videostate.play_state = VIDEO_PLAYING; | 1048 | ret = vidcom(av7110, VIDEO_CMD_PLAY, 0); |
1032 | av7110->trickmode = TRICK_NONE; | 1049 | if (!ret) { |
1050 | av7110->videostate.play_state = VIDEO_PLAYING; | ||
1051 | av7110->trickmode = TRICK_NONE; | ||
1052 | } | ||
1033 | break; | 1053 | break; |
1034 | 1054 | ||
1035 | case VIDEO_SELECT_SOURCE: | 1055 | case VIDEO_SELECT_SOURCE: |
@@ -1045,7 +1065,7 @@ static int dvb_video_ioctl(struct inode *inode, struct file *file, | |||
1045 | break; | 1065 | break; |
1046 | 1066 | ||
1047 | case VIDEO_GET_EVENT: | 1067 | case VIDEO_GET_EVENT: |
1048 | ret=dvb_video_get_event(av7110, parg, file->f_flags); | 1068 | ret = dvb_video_get_event(av7110, parg, file->f_flags); |
1049 | break; | 1069 | break; |
1050 | 1070 | ||
1051 | case VIDEO_GET_SIZE: | 1071 | case VIDEO_GET_SIZE: |
@@ -1105,25 +1125,32 @@ static int dvb_video_ioctl(struct inode *inode, struct file *file, | |||
1105 | case VIDEO_FAST_FORWARD: | 1125 | case VIDEO_FAST_FORWARD: |
1106 | //note: arg is ignored by firmware | 1126 | //note: arg is ignored by firmware |
1107 | if (av7110->playing & RP_VIDEO) | 1127 | if (av7110->playing & RP_VIDEO) |
1108 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, | 1128 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, |
1109 | __Scan_I, 2, AV_PES, 0); | 1129 | __Scan_I, 2, AV_PES, 0); |
1110 | else | 1130 | else |
1111 | vidcom(av7110, VIDEO_CMD_FFWD, arg); | 1131 | ret = vidcom(av7110, VIDEO_CMD_FFWD, arg); |
1112 | av7110->trickmode = TRICK_FAST; | 1132 | if (!ret) { |
1113 | av7110->videostate.play_state = VIDEO_PLAYING; | 1133 | av7110->trickmode = TRICK_FAST; |
1134 | av7110->videostate.play_state = VIDEO_PLAYING; | ||
1135 | } | ||
1114 | break; | 1136 | break; |
1115 | 1137 | ||
1116 | case VIDEO_SLOWMOTION: | 1138 | case VIDEO_SLOWMOTION: |
1117 | if (av7110->playing&RP_VIDEO) { | 1139 | if (av7110->playing&RP_VIDEO) { |
1118 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Slow, 2, 0, 0); | 1140 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, __Slow, 2, 0, 0); |
1119 | vidcom(av7110, VIDEO_CMD_SLOW, arg); | 1141 | if (!ret) |
1142 | ret = vidcom(av7110, VIDEO_CMD_SLOW, arg); | ||
1120 | } else { | 1143 | } else { |
1121 | vidcom(av7110, VIDEO_CMD_PLAY, 0); | 1144 | ret = vidcom(av7110, VIDEO_CMD_PLAY, 0); |
1122 | vidcom(av7110, VIDEO_CMD_STOP, 0); | 1145 | if (!ret) |
1123 | vidcom(av7110, VIDEO_CMD_SLOW, arg); | 1146 | ret = vidcom(av7110, VIDEO_CMD_STOP, 0); |
1147 | if (!ret) | ||
1148 | ret = vidcom(av7110, VIDEO_CMD_SLOW, arg); | ||
1149 | } | ||
1150 | if (!ret) { | ||
1151 | av7110->trickmode = TRICK_SLOW; | ||
1152 | av7110->videostate.play_state = VIDEO_PLAYING; | ||
1124 | } | 1153 | } |
1125 | av7110->trickmode = TRICK_SLOW; | ||
1126 | av7110->videostate.play_state = VIDEO_PLAYING; | ||
1127 | break; | 1154 | break; |
1128 | 1155 | ||
1129 | case VIDEO_GET_CAPABILITIES: | 1156 | case VIDEO_GET_CAPABILITIES: |
@@ -1136,18 +1163,21 @@ static int dvb_video_ioctl(struct inode *inode, struct file *file, | |||
1136 | av7110_ipack_reset(&av7110->ipack[1]); | 1163 | av7110_ipack_reset(&av7110->ipack[1]); |
1137 | 1164 | ||
1138 | if (av7110->playing == RP_AV) { | 1165 | if (av7110->playing == RP_AV) { |
1139 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, | 1166 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, |
1140 | __Play, 2, AV_PES, 0); | 1167 | __Play, 2, AV_PES, 0); |
1168 | if (ret) | ||
1169 | break; | ||
1141 | if (av7110->trickmode == TRICK_FAST) | 1170 | if (av7110->trickmode == TRICK_FAST) |
1142 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, | 1171 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, |
1143 | __Scan_I, 2, AV_PES, 0); | 1172 | __Scan_I, 2, AV_PES, 0); |
1144 | if (av7110->trickmode == TRICK_SLOW) { | 1173 | if (av7110->trickmode == TRICK_SLOW) { |
1145 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, | 1174 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, |
1146 | __Slow, 2, 0, 0); | 1175 | __Slow, 2, 0, 0); |
1147 | vidcom(av7110, VIDEO_CMD_SLOW, arg); | 1176 | if (!ret) |
1177 | ret = vidcom(av7110, VIDEO_CMD_SLOW, arg); | ||
1148 | } | 1178 | } |
1149 | if (av7110->trickmode == TRICK_FREEZE) | 1179 | if (av7110->trickmode == TRICK_FREEZE) |
1150 | vidcom(av7110, VIDEO_CMD_STOP, 1); | 1180 | ret = vidcom(av7110, VIDEO_CMD_STOP, 1); |
1151 | } | 1181 | } |
1152 | break; | 1182 | break; |
1153 | 1183 | ||
@@ -1170,7 +1200,7 @@ static int dvb_audio_ioctl(struct inode *inode, struct file *file, | |||
1170 | unsigned long arg = (unsigned long) parg; | 1200 | unsigned long arg = (unsigned long) parg; |
1171 | int ret = 0; | 1201 | int ret = 0; |
1172 | 1202 | ||
1173 | dprintk(2, "av7110:%p, \n", av7110); | 1203 | dprintk(1, "av7110:%p, cmd=%04x\n", av7110,cmd); |
1174 | 1204 | ||
1175 | if (((file->f_flags & O_ACCMODE) == O_RDONLY) && | 1205 | if (((file->f_flags & O_ACCMODE) == O_RDONLY) && |
1176 | (cmd != AUDIO_GET_STATUS)) | 1206 | (cmd != AUDIO_GET_STATUS)) |
@@ -1179,28 +1209,32 @@ static int dvb_audio_ioctl(struct inode *inode, struct file *file, | |||
1179 | switch (cmd) { | 1209 | switch (cmd) { |
1180 | case AUDIO_STOP: | 1210 | case AUDIO_STOP: |
1181 | if (av7110->audiostate.stream_source == AUDIO_SOURCE_MEMORY) | 1211 | if (av7110->audiostate.stream_source == AUDIO_SOURCE_MEMORY) |
1182 | av7110_av_stop(av7110, RP_AUDIO); | 1212 | ret = av7110_av_stop(av7110, RP_AUDIO); |
1183 | else | 1213 | else |
1184 | audcom(av7110, AUDIO_CMD_MUTE); | 1214 | ret = audcom(av7110, AUDIO_CMD_MUTE); |
1185 | av7110->audiostate.play_state = AUDIO_STOPPED; | 1215 | if (!ret) |
1216 | av7110->audiostate.play_state = AUDIO_STOPPED; | ||
1186 | break; | 1217 | break; |
1187 | 1218 | ||
1188 | case AUDIO_PLAY: | 1219 | case AUDIO_PLAY: |
1189 | if (av7110->audiostate.stream_source == AUDIO_SOURCE_MEMORY) | 1220 | if (av7110->audiostate.stream_source == AUDIO_SOURCE_MEMORY) |
1190 | av7110_av_start_play(av7110, RP_AUDIO); | 1221 | ret = av7110_av_start_play(av7110, RP_AUDIO); |
1191 | audcom(av7110, AUDIO_CMD_UNMUTE); | 1222 | if (!ret) |
1192 | av7110->audiostate.play_state = AUDIO_PLAYING; | 1223 | ret = audcom(av7110, AUDIO_CMD_UNMUTE); |
1224 | if (!ret) | ||
1225 | av7110->audiostate.play_state = AUDIO_PLAYING; | ||
1193 | break; | 1226 | break; |
1194 | 1227 | ||
1195 | case AUDIO_PAUSE: | 1228 | case AUDIO_PAUSE: |
1196 | audcom(av7110, AUDIO_CMD_MUTE); | 1229 | ret = audcom(av7110, AUDIO_CMD_MUTE); |
1197 | av7110->audiostate.play_state = AUDIO_PAUSED; | 1230 | if (!ret) |
1231 | av7110->audiostate.play_state = AUDIO_PAUSED; | ||
1198 | break; | 1232 | break; |
1199 | 1233 | ||
1200 | case AUDIO_CONTINUE: | 1234 | case AUDIO_CONTINUE: |
1201 | if (av7110->audiostate.play_state == AUDIO_PAUSED) { | 1235 | if (av7110->audiostate.play_state == AUDIO_PAUSED) { |
1202 | av7110->audiostate.play_state = AUDIO_PLAYING; | 1236 | av7110->audiostate.play_state = AUDIO_PLAYING; |
1203 | audcom(av7110, AUDIO_CMD_MUTE | AUDIO_CMD_PCM16); | 1237 | ret = audcom(av7110, AUDIO_CMD_UNMUTE | AUDIO_CMD_PCM16); |
1204 | } | 1238 | } |
1205 | break; | 1239 | break; |
1206 | 1240 | ||
@@ -1210,14 +1244,15 @@ static int dvb_audio_ioctl(struct inode *inode, struct file *file, | |||
1210 | 1244 | ||
1211 | case AUDIO_SET_MUTE: | 1245 | case AUDIO_SET_MUTE: |
1212 | { | 1246 | { |
1213 | audcom(av7110, arg ? AUDIO_CMD_MUTE : AUDIO_CMD_UNMUTE); | 1247 | ret = audcom(av7110, arg ? AUDIO_CMD_MUTE : AUDIO_CMD_UNMUTE); |
1214 | av7110->audiostate.mute_state = (int) arg; | 1248 | if (!ret) |
1249 | av7110->audiostate.mute_state = (int) arg; | ||
1215 | break; | 1250 | break; |
1216 | } | 1251 | } |
1217 | 1252 | ||
1218 | case AUDIO_SET_AV_SYNC: | 1253 | case AUDIO_SET_AV_SYNC: |
1219 | av7110->audiostate.AV_sync_state = (int) arg; | 1254 | av7110->audiostate.AV_sync_state = (int) arg; |
1220 | audcom(av7110, arg ? AUDIO_CMD_SYNC_ON : AUDIO_CMD_SYNC_OFF); | 1255 | ret = audcom(av7110, arg ? AUDIO_CMD_SYNC_ON : AUDIO_CMD_SYNC_OFF); |
1221 | break; | 1256 | break; |
1222 | 1257 | ||
1223 | case AUDIO_SET_BYPASS_MODE: | 1258 | case AUDIO_SET_BYPASS_MODE: |
@@ -1229,21 +1264,24 @@ static int dvb_audio_ioctl(struct inode *inode, struct file *file, | |||
1229 | 1264 | ||
1230 | switch(av7110->audiostate.channel_select) { | 1265 | switch(av7110->audiostate.channel_select) { |
1231 | case AUDIO_STEREO: | 1266 | case AUDIO_STEREO: |
1232 | audcom(av7110, AUDIO_CMD_STEREO); | 1267 | ret = audcom(av7110, AUDIO_CMD_STEREO); |
1233 | if (av7110->adac_type == DVB_ADAC_CRYSTAL) | 1268 | if (!ret) |
1234 | i2c_writereg(av7110, 0x20, 0x02, 0x49); | 1269 | if (av7110->adac_type == DVB_ADAC_CRYSTAL) |
1270 | i2c_writereg(av7110, 0x20, 0x02, 0x49); | ||
1235 | break; | 1271 | break; |
1236 | 1272 | ||
1237 | case AUDIO_MONO_LEFT: | 1273 | case AUDIO_MONO_LEFT: |
1238 | audcom(av7110, AUDIO_CMD_MONO_L); | 1274 | ret = audcom(av7110, AUDIO_CMD_MONO_L); |
1239 | if (av7110->adac_type == DVB_ADAC_CRYSTAL) | 1275 | if (!ret) |
1240 | i2c_writereg(av7110, 0x20, 0x02, 0x4a); | 1276 | if (av7110->adac_type == DVB_ADAC_CRYSTAL) |
1277 | i2c_writereg(av7110, 0x20, 0x02, 0x4a); | ||
1241 | break; | 1278 | break; |
1242 | 1279 | ||
1243 | case AUDIO_MONO_RIGHT: | 1280 | case AUDIO_MONO_RIGHT: |
1244 | audcom(av7110, AUDIO_CMD_MONO_R); | 1281 | ret = audcom(av7110, AUDIO_CMD_MONO_R); |
1245 | if (av7110->adac_type == DVB_ADAC_CRYSTAL) | 1282 | if (!ret) |
1246 | i2c_writereg(av7110, 0x20, 0x02, 0x45); | 1283 | if (av7110->adac_type == DVB_ADAC_CRYSTAL) |
1284 | i2c_writereg(av7110, 0x20, 0x02, 0x45); | ||
1247 | break; | 1285 | break; |
1248 | 1286 | ||
1249 | default: | 1287 | default: |
@@ -1264,8 +1302,8 @@ static int dvb_audio_ioctl(struct inode *inode, struct file *file, | |||
1264 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout); | 1302 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout); |
1265 | av7110_ipack_reset(&av7110->ipack[0]); | 1303 | av7110_ipack_reset(&av7110->ipack[0]); |
1266 | if (av7110->playing == RP_AV) | 1304 | if (av7110->playing == RP_AV) |
1267 | av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, | 1305 | ret = av7110_fw_cmd(av7110, COMTYPE_REC_PLAY, |
1268 | __Play, 2, AV_PES, 0); | 1306 | __Play, 2, AV_PES, 0); |
1269 | break; | 1307 | break; |
1270 | case AUDIO_SET_ID: | 1308 | case AUDIO_SET_ID: |
1271 | 1309 | ||
@@ -1274,7 +1312,7 @@ static int dvb_audio_ioctl(struct inode *inode, struct file *file, | |||
1274 | { | 1312 | { |
1275 | struct audio_mixer *amix = (struct audio_mixer *)parg; | 1313 | struct audio_mixer *amix = (struct audio_mixer *)parg; |
1276 | 1314 | ||
1277 | av7110_set_volume(av7110, amix->volume_left, amix->volume_right); | 1315 | ret = av7110_set_volume(av7110, amix->volume_left, amix->volume_right); |
1278 | break; | 1316 | break; |
1279 | } | 1317 | } |
1280 | case AUDIO_SET_STREAMTYPE: | 1318 | case AUDIO_SET_STREAMTYPE: |
diff --git a/drivers/media/dvb/ttpci/av7110_av.h b/drivers/media/dvb/ttpci/av7110_av.h index cc5e7a7e87c3..45dc144b8b43 100644 --- a/drivers/media/dvb/ttpci/av7110_av.h +++ b/drivers/media/dvb/ttpci/av7110_av.h | |||
@@ -3,14 +3,14 @@ | |||
3 | 3 | ||
4 | struct av7110; | 4 | struct av7110; |
5 | 5 | ||
6 | extern void av7110_set_vidmode(struct av7110 *av7110, int mode); | 6 | extern int av7110_set_vidmode(struct av7110 *av7110, int mode); |
7 | 7 | ||
8 | extern int av7110_record_cb(struct dvb_filter_pes2ts *p2t, u8 *buf, size_t len); | 8 | extern int av7110_record_cb(struct dvb_filter_pes2ts *p2t, u8 *buf, size_t len); |
9 | extern int av7110_pes_play(void *dest, struct dvb_ringbuffer *buf, int dlen); | 9 | extern int av7110_pes_play(void *dest, struct dvb_ringbuffer *buf, int dlen); |
10 | extern int av7110_write_to_decoder(struct dvb_demux_feed *feed, const u8 *buf, size_t len); | 10 | extern int av7110_write_to_decoder(struct dvb_demux_feed *feed, const u8 *buf, size_t len); |
11 | 11 | ||
12 | extern int av7110_set_volume(struct av7110 *av7110, int volleft, int volright); | 12 | extern int av7110_set_volume(struct av7110 *av7110, int volleft, int volright); |
13 | extern void av7110_av_stop(struct av7110 *av7110, int av); | 13 | extern int av7110_av_stop(struct av7110 *av7110, int av); |
14 | extern int av7110_av_start_record(struct av7110 *av7110, int av, | 14 | extern int av7110_av_start_record(struct av7110 *av7110, int av, |
15 | struct dvb_demux_feed *dvbdmxfeed); | 15 | struct dvb_demux_feed *dvbdmxfeed); |
16 | extern int av7110_av_start_play(struct av7110 *av7110, int av); | 16 | extern int av7110_av_start_play(struct av7110 *av7110, int av); |
diff --git a/drivers/media/dvb/ttpci/av7110_hw.c b/drivers/media/dvb/ttpci/av7110_hw.c index 7fa4a0ebe133..1220826696c5 100644 --- a/drivers/media/dvb/ttpci/av7110_hw.c +++ b/drivers/media/dvb/ttpci/av7110_hw.c | |||
@@ -137,7 +137,7 @@ static int waitdebi(struct av7110 *av7110, int adr, int state) | |||
137 | return 0; | 137 | return 0; |
138 | udelay(5); | 138 | udelay(5); |
139 | } | 139 | } |
140 | return -1; | 140 | return -ETIMEDOUT; |
141 | } | 141 | } |
142 | 142 | ||
143 | static int load_dram(struct av7110 *av7110, u32 *data, int len) | 143 | static int load_dram(struct av7110 *av7110, u32 *data, int len) |
@@ -155,7 +155,7 @@ static int load_dram(struct av7110 *av7110, u32 *data, int len) | |||
155 | for (i = 0; i < blocks; i++) { | 155 | for (i = 0; i < blocks; i++) { |
156 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { | 156 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { |
157 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at block %d\n", i); | 157 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at block %d\n", i); |
158 | return -1; | 158 | return -ETIMEDOUT; |
159 | } | 159 | } |
160 | dprintk(4, "writing DRAM block %d\n", i); | 160 | dprintk(4, "writing DRAM block %d\n", i); |
161 | mwdebi(av7110, DEBISWAB, bootblock, | 161 | mwdebi(av7110, DEBISWAB, bootblock, |
@@ -170,7 +170,7 @@ static int load_dram(struct av7110 *av7110, u32 *data, int len) | |||
170 | if (rest > 0) { | 170 | if (rest > 0) { |
171 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { | 171 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { |
172 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at last block\n"); | 172 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at last block\n"); |
173 | return -1; | 173 | return -ETIMEDOUT; |
174 | } | 174 | } |
175 | if (rest > 4) | 175 | if (rest > 4) |
176 | mwdebi(av7110, DEBISWAB, bootblock, | 176 | mwdebi(av7110, DEBISWAB, bootblock, |
@@ -185,13 +185,13 @@ static int load_dram(struct av7110 *av7110, u32 *data, int len) | |||
185 | } | 185 | } |
186 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { | 186 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) { |
187 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout after last block\n"); | 187 | printk(KERN_ERR "dvb-ttpci: load_dram(): timeout after last block\n"); |
188 | return -1; | 188 | return -ETIMEDOUT; |
189 | } | 189 | } |
190 | iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, 0, 2); | 190 | iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, 0, 2); |
191 | iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); | 191 | iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2); |
192 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BOOT_COMPLETE) < 0) { | 192 | if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BOOT_COMPLETE) < 0) { |
193 | printk(KERN_ERR "dvb-ttpci: load_dram(): final handshake timeout\n"); | 193 | printk(KERN_ERR "dvb-ttpci: load_dram(): final handshake timeout\n"); |
194 | return -1; | 194 | return -ETIMEDOUT; |
195 | } | 195 | } |
196 | return 0; | 196 | return 0; |
197 | } | 197 | } |
@@ -263,7 +263,7 @@ int av7110_bootarm(struct av7110 *av7110) | |||
263 | if (saa7146_wait_for_debi_done(av7110->dev, 1)) { | 263 | if (saa7146_wait_for_debi_done(av7110->dev, 1)) { |
264 | printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): " | 264 | printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): " |
265 | "saa7146_wait_for_debi_done() timed out\n"); | 265 | "saa7146_wait_for_debi_done() timed out\n"); |
266 | return -1; | 266 | return -ETIMEDOUT; |
267 | } | 267 | } |
268 | saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTHI); | 268 | saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTHI); |
269 | mdelay(1); | 269 | mdelay(1); |
@@ -284,7 +284,7 @@ int av7110_bootarm(struct av7110 *av7110) | |||
284 | if (saa7146_wait_for_debi_done(av7110->dev, 1)) { | 284 | if (saa7146_wait_for_debi_done(av7110->dev, 1)) { |
285 | printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): " | 285 | printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): " |
286 | "saa7146_wait_for_debi_done() timed out after loading DRAM\n"); | 286 | "saa7146_wait_for_debi_done() timed out after loading DRAM\n"); |
287 | return -1; | 287 | return -ETIMEDOUT; |
288 | } | 288 | } |
289 | saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTHI); | 289 | saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTHI); |
290 | msleep(30); /* the firmware needs some time to initialize */ | 290 | msleep(30); /* the firmware needs some time to initialize */ |
@@ -308,6 +308,7 @@ int av7110_wait_msgstate(struct av7110 *av7110, u16 flags) | |||
308 | { | 308 | { |
309 | unsigned long start; | 309 | unsigned long start; |
310 | u32 stat; | 310 | u32 stat; |
311 | int err; | ||
311 | 312 | ||
312 | if (FW_VERSION(av7110->arm_app) <= 0x261c) { | 313 | if (FW_VERSION(av7110->arm_app) <= 0x261c) { |
313 | /* not supported by old firmware */ | 314 | /* not supported by old firmware */ |
@@ -318,17 +319,17 @@ int av7110_wait_msgstate(struct av7110 *av7110, u16 flags) | |||
318 | /* new firmware */ | 319 | /* new firmware */ |
319 | start = jiffies; | 320 | start = jiffies; |
320 | for (;;) { | 321 | for (;;) { |
322 | err = time_after(jiffies, start + ARM_WAIT_FREE); | ||
321 | if (down_interruptible(&av7110->dcomlock)) | 323 | if (down_interruptible(&av7110->dcomlock)) |
322 | return -ERESTARTSYS; | 324 | return -ERESTARTSYS; |
323 | stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2); | 325 | stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2); |
324 | up(&av7110->dcomlock); | 326 | up(&av7110->dcomlock); |
325 | if ((stat & flags) == 0) { | 327 | if ((stat & flags) == 0) |
326 | break; | 328 | break; |
327 | } | 329 | if (err) { |
328 | if (time_after(jiffies, start + ARM_WAIT_FREE)) { | ||
329 | printk(KERN_ERR "%s: timeout waiting for MSGSTATE %04x\n", | 330 | printk(KERN_ERR "%s: timeout waiting for MSGSTATE %04x\n", |
330 | __FUNCTION__, stat & flags); | 331 | __FUNCTION__, stat & flags); |
331 | return -1; | 332 | return -ETIMEDOUT; |
332 | } | 333 | } |
333 | msleep(1); | 334 | msleep(1); |
334 | } | 335 | } |
@@ -342,6 +343,7 @@ static int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
342 | char *type = NULL; | 343 | char *type = NULL; |
343 | u16 flags[2] = {0, 0}; | 344 | u16 flags[2] = {0, 0}; |
344 | u32 stat; | 345 | u32 stat; |
346 | int err; | ||
345 | 347 | ||
346 | // dprintk(4, "%p\n", av7110); | 348 | // dprintk(4, "%p\n", av7110); |
347 | 349 | ||
@@ -351,24 +353,30 @@ static int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
351 | } | 353 | } |
352 | 354 | ||
353 | start = jiffies; | 355 | start = jiffies; |
354 | while (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2 )) { | 356 | while (1) { |
355 | msleep(1); | 357 | err = time_after(jiffies, start + ARM_WAIT_FREE); |
356 | if (time_after(jiffies, start + ARM_WAIT_FREE)) { | 358 | if (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2) == 0) |
359 | break; | ||
360 | if (err) { | ||
357 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for COMMAND idle\n", __FUNCTION__); | 361 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for COMMAND idle\n", __FUNCTION__); |
358 | return -ETIMEDOUT; | 362 | return -ETIMEDOUT; |
359 | } | 363 | } |
364 | msleep(1); | ||
360 | } | 365 | } |
361 | 366 | ||
362 | wdebi(av7110, DEBINOSWAP, COM_IF_LOCK, 0xffff, 2); | 367 | wdebi(av7110, DEBINOSWAP, COM_IF_LOCK, 0xffff, 2); |
363 | 368 | ||
364 | #ifndef _NOHANDSHAKE | 369 | #ifndef _NOHANDSHAKE |
365 | start = jiffies; | 370 | start = jiffies; |
366 | while (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2 )) { | 371 | while (1) { |
367 | msleep(1); | 372 | err = time_after(jiffies, start + ARM_WAIT_SHAKE); |
368 | if (time_after(jiffies, start + ARM_WAIT_SHAKE)) { | 373 | if (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2) == 0) |
374 | break; | ||
375 | if (err) { | ||
369 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for HANDSHAKE_REG\n", __FUNCTION__); | 376 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for HANDSHAKE_REG\n", __FUNCTION__); |
370 | return -ETIMEDOUT; | 377 | return -ETIMEDOUT; |
371 | } | 378 | } |
379 | msleep(1); | ||
372 | } | 380 | } |
373 | #endif | 381 | #endif |
374 | 382 | ||
@@ -401,6 +409,7 @@ static int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
401 | /* non-immediate COMMAND type */ | 409 | /* non-immediate COMMAND type */ |
402 | start = jiffies; | 410 | start = jiffies; |
403 | for (;;) { | 411 | for (;;) { |
412 | err = time_after(jiffies, start + ARM_WAIT_FREE); | ||
404 | stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2); | 413 | stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2); |
405 | if (stat & flags[0]) { | 414 | if (stat & flags[0]) { |
406 | printk(KERN_ERR "%s: %s QUEUE overflow\n", | 415 | printk(KERN_ERR "%s: %s QUEUE overflow\n", |
@@ -409,10 +418,10 @@ static int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
409 | } | 418 | } |
410 | if ((stat & flags[1]) == 0) | 419 | if ((stat & flags[1]) == 0) |
411 | break; | 420 | break; |
412 | if (time_after(jiffies, start + ARM_WAIT_FREE)) { | 421 | if (err) { |
413 | printk(KERN_ERR "%s: timeout waiting on busy %s QUEUE\n", | 422 | printk(KERN_ERR "%s: timeout waiting on busy %s QUEUE\n", |
414 | __FUNCTION__, type); | 423 | __FUNCTION__, type); |
415 | return -1; | 424 | return -ETIMEDOUT; |
416 | } | 425 | } |
417 | msleep(1); | 426 | msleep(1); |
418 | } | 427 | } |
@@ -432,13 +441,16 @@ static int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
432 | 441 | ||
433 | #ifdef COM_DEBUG | 442 | #ifdef COM_DEBUG |
434 | start = jiffies; | 443 | start = jiffies; |
435 | while (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2 )) { | 444 | while (1) { |
436 | msleep(1); | 445 | err = time_after(jiffies, start + ARM_WAIT_FREE); |
437 | if (time_after(jiffies, start + ARM_WAIT_FREE)) { | 446 | if (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2) == 0) |
438 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for COMMAND to complete\n", | 447 | break; |
439 | __FUNCTION__); | 448 | if (err) { |
449 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for COMMAND %d to complete\n", | ||
450 | __FUNCTION__, (buf[0] >> 8) & 0xff); | ||
440 | return -ETIMEDOUT; | 451 | return -ETIMEDOUT; |
441 | } | 452 | } |
453 | msleep(1); | ||
442 | } | 454 | } |
443 | 455 | ||
444 | stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2); | 456 | stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2); |
@@ -470,7 +482,7 @@ static int av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
470 | 482 | ||
471 | ret = __av7110_send_fw_cmd(av7110, buf, length); | 483 | ret = __av7110_send_fw_cmd(av7110, buf, length); |
472 | up(&av7110->dcomlock); | 484 | up(&av7110->dcomlock); |
473 | if (ret) | 485 | if (ret && ret!=-ERESTARTSYS) |
474 | printk(KERN_ERR "dvb-ttpci: %s(): av7110_send_fw_cmd error %d\n", | 486 | printk(KERN_ERR "dvb-ttpci: %s(): av7110_send_fw_cmd error %d\n", |
475 | __FUNCTION__, ret); | 487 | __FUNCTION__, ret); |
476 | return ret; | 488 | return ret; |
@@ -495,7 +507,7 @@ int av7110_fw_cmd(struct av7110 *av7110, int type, int com, int num, ...) | |||
495 | } | 507 | } |
496 | 508 | ||
497 | ret = av7110_send_fw_cmd(av7110, buf, num + 2); | 509 | ret = av7110_send_fw_cmd(av7110, buf, num + 2); |
498 | if (ret) | 510 | if (ret && ret != -ERESTARTSYS) |
499 | printk(KERN_ERR "dvb-ttpci: av7110_fw_cmd error %d\n", ret); | 511 | printk(KERN_ERR "dvb-ttpci: av7110_fw_cmd error %d\n", ret); |
500 | return ret; | 512 | return ret; |
501 | } | 513 | } |
@@ -518,7 +530,7 @@ int av7110_send_ci_cmd(struct av7110 *av7110, u8 subcom, u8 *buf, u8 len) | |||
518 | } | 530 | } |
519 | 531 | ||
520 | ret = av7110_send_fw_cmd(av7110, cmd, 18); | 532 | ret = av7110_send_fw_cmd(av7110, cmd, 18); |
521 | if (ret) | 533 | if (ret && ret != -ERESTARTSYS) |
522 | printk(KERN_ERR "dvb-ttpci: av7110_send_ci_cmd error %d\n", ret); | 534 | printk(KERN_ERR "dvb-ttpci: av7110_send_ci_cmd error %d\n", ret); |
523 | return ret; | 535 | return ret; |
524 | } | 536 | } |
@@ -551,26 +563,32 @@ int av7110_fw_request(struct av7110 *av7110, u16 *request_buf, | |||
551 | } | 563 | } |
552 | 564 | ||
553 | start = jiffies; | 565 | start = jiffies; |
554 | while (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2)) { | 566 | while (1) { |
555 | #ifdef _NOHANDSHAKE | 567 | err = time_after(jiffies, start + ARM_WAIT_FREE); |
556 | msleep(1); | 568 | if (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2) == 0) |
557 | #endif | 569 | break; |
558 | if (time_after(jiffies, start + ARM_WAIT_FREE)) { | 570 | if (err) { |
559 | printk(KERN_ERR "%s: timeout waiting for COMMAND to complete\n", __FUNCTION__); | 571 | printk(KERN_ERR "%s: timeout waiting for COMMAND to complete\n", __FUNCTION__); |
560 | up(&av7110->dcomlock); | 572 | up(&av7110->dcomlock); |
561 | return -1; | 573 | return -ETIMEDOUT; |
562 | } | 574 | } |
575 | #ifdef _NOHANDSHAKE | ||
576 | msleep(1); | ||
577 | #endif | ||
563 | } | 578 | } |
564 | 579 | ||
565 | #ifndef _NOHANDSHAKE | 580 | #ifndef _NOHANDSHAKE |
566 | start = jiffies; | 581 | start = jiffies; |
567 | while (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2 )) { | 582 | while (1) { |
568 | msleep(1); | 583 | err = time_after(jiffies, start + ARM_WAIT_SHAKE); |
569 | if (time_after(jiffies, start + ARM_WAIT_SHAKE)) { | 584 | if (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2) == 0) |
585 | break; | ||
586 | if (err) { | ||
570 | printk(KERN_ERR "%s: timeout waiting for HANDSHAKE_REG\n", __FUNCTION__); | 587 | printk(KERN_ERR "%s: timeout waiting for HANDSHAKE_REG\n", __FUNCTION__); |
571 | up(&av7110->dcomlock); | 588 | up(&av7110->dcomlock); |
572 | return -1; | 589 | return -ETIMEDOUT; |
573 | } | 590 | } |
591 | msleep(1); | ||
574 | } | 592 | } |
575 | #endif | 593 | #endif |
576 | 594 | ||
@@ -667,10 +685,10 @@ int av7110_diseqc_send(struct av7110 *av7110, int len, u8 *msg, unsigned long bu | |||
667 | for (i = 0; i < len; i++) | 685 | for (i = 0; i < len; i++) |
668 | buf[i + 4] = msg[i]; | 686 | buf[i + 4] = msg[i]; |
669 | 687 | ||
670 | if ((ret = av7110_send_fw_cmd(av7110, buf, 18))) | 688 | ret = av7110_send_fw_cmd(av7110, buf, 18); |
689 | if (ret && ret!=-ERESTARTSYS) | ||
671 | printk(KERN_ERR "dvb-ttpci: av7110_diseqc_send error %d\n", ret); | 690 | printk(KERN_ERR "dvb-ttpci: av7110_diseqc_send error %d\n", ret); |
672 | 691 | return ret; | |
673 | return 0; | ||
674 | } | 692 | } |
675 | 693 | ||
676 | 694 | ||
@@ -705,18 +723,22 @@ static inline int SetFont(struct av7110 *av7110, u8 windownr, u8 fontsize, | |||
705 | static int FlushText(struct av7110 *av7110) | 723 | static int FlushText(struct av7110 *av7110) |
706 | { | 724 | { |
707 | unsigned long start; | 725 | unsigned long start; |
726 | int err; | ||
708 | 727 | ||
709 | if (down_interruptible(&av7110->dcomlock)) | 728 | if (down_interruptible(&av7110->dcomlock)) |
710 | return -ERESTARTSYS; | 729 | return -ERESTARTSYS; |
711 | start = jiffies; | 730 | start = jiffies; |
712 | while (rdebi(av7110, DEBINOSWAP, BUFF1_BASE, 0, 2)) { | 731 | while (1) { |
713 | msleep(1); | 732 | err = time_after(jiffies, start + ARM_WAIT_OSD); |
714 | if (time_after(jiffies, start + ARM_WAIT_OSD)) { | 733 | if (rdebi(av7110, DEBINOSWAP, BUFF1_BASE, 0, 2) == 0) |
734 | break; | ||
735 | if (err) { | ||
715 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for BUFF1_BASE == 0\n", | 736 | printk(KERN_ERR "dvb-ttpci: %s(): timeout waiting for BUFF1_BASE == 0\n", |
716 | __FUNCTION__); | 737 | __FUNCTION__); |
717 | up(&av7110->dcomlock); | 738 | up(&av7110->dcomlock); |
718 | return -1; | 739 | return -ETIMEDOUT; |
719 | } | 740 | } |
741 | msleep(1); | ||
720 | } | 742 | } |
721 | up(&av7110->dcomlock); | 743 | up(&av7110->dcomlock); |
722 | return 0; | 744 | return 0; |
@@ -733,25 +755,31 @@ static int WriteText(struct av7110 *av7110, u8 win, u16 x, u16 y, u8* buf) | |||
733 | return -ERESTARTSYS; | 755 | return -ERESTARTSYS; |
734 | 756 | ||
735 | start = jiffies; | 757 | start = jiffies; |
736 | while (rdebi(av7110, DEBINOSWAP, BUFF1_BASE, 0, 2)) { | 758 | while (1) { |
737 | msleep(1); | 759 | ret = time_after(jiffies, start + ARM_WAIT_OSD); |
738 | if (time_after(jiffies, start + ARM_WAIT_OSD)) { | 760 | if (rdebi(av7110, DEBINOSWAP, BUFF1_BASE, 0, 2) == 0) |
761 | break; | ||
762 | if (ret) { | ||
739 | printk(KERN_ERR "dvb-ttpci: %s: timeout waiting for BUFF1_BASE == 0\n", | 763 | printk(KERN_ERR "dvb-ttpci: %s: timeout waiting for BUFF1_BASE == 0\n", |
740 | __FUNCTION__); | 764 | __FUNCTION__); |
741 | up(&av7110->dcomlock); | 765 | up(&av7110->dcomlock); |
742 | return -1; | 766 | return -ETIMEDOUT; |
743 | } | 767 | } |
768 | msleep(1); | ||
744 | } | 769 | } |
745 | #ifndef _NOHANDSHAKE | 770 | #ifndef _NOHANDSHAKE |
746 | start = jiffies; | 771 | start = jiffies; |
747 | while (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2)) { | 772 | while (1) { |
748 | msleep(1); | 773 | ret = time_after(jiffies, start + ARM_WAIT_SHAKE); |
749 | if (time_after(jiffies, start + ARM_WAIT_SHAKE)) { | 774 | if (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2) == 0) |
775 | break; | ||
776 | if (ret) { | ||
750 | printk(KERN_ERR "dvb-ttpci: %s: timeout waiting for HANDSHAKE_REG\n", | 777 | printk(KERN_ERR "dvb-ttpci: %s: timeout waiting for HANDSHAKE_REG\n", |
751 | __FUNCTION__); | 778 | __FUNCTION__); |
752 | up(&av7110->dcomlock); | 779 | up(&av7110->dcomlock); |
753 | return -1; | 780 | return -ETIMEDOUT; |
754 | } | 781 | } |
782 | msleep(1); | ||
755 | } | 783 | } |
756 | #endif | 784 | #endif |
757 | for (i = 0; i < length / 2; i++) | 785 | for (i = 0; i < length / 2; i++) |
@@ -761,7 +789,7 @@ static int WriteText(struct av7110 *av7110, u8 win, u16 x, u16 y, u8* buf) | |||
761 | wdebi(av7110, DEBINOSWAP, BUFF1_BASE + i * 2, 0, 2); | 789 | wdebi(av7110, DEBINOSWAP, BUFF1_BASE + i * 2, 0, 2); |
762 | ret = __av7110_send_fw_cmd(av7110, cbuf, 5); | 790 | ret = __av7110_send_fw_cmd(av7110, cbuf, 5); |
763 | up(&av7110->dcomlock); | 791 | up(&av7110->dcomlock); |
764 | if (ret) | 792 | if (ret && ret!=-ERESTARTSYS) |
765 | printk(KERN_ERR "dvb-ttpci: WriteText error %d\n", ret); | 793 | printk(KERN_ERR "dvb-ttpci: WriteText error %d\n", ret); |
766 | return ret; | 794 | return ret; |
767 | } | 795 | } |
@@ -816,9 +844,25 @@ static osd_raw_window_t bpp2bit[8] = { | |||
816 | OSD_BITMAP1, OSD_BITMAP2, 0, OSD_BITMAP4, 0, 0, 0, OSD_BITMAP8 | 844 | OSD_BITMAP1, OSD_BITMAP2, 0, OSD_BITMAP4, 0, 0, 0, OSD_BITMAP8 |
817 | }; | 845 | }; |
818 | 846 | ||
819 | static inline int LoadBitmap(struct av7110 *av7110, u16 format, | 847 | static inline int WaitUntilBmpLoaded(struct av7110 *av7110) |
848 | { | ||
849 | int ret = wait_event_interruptible_timeout(av7110->bmpq, | ||
850 | av7110->bmp_state != BMP_LOADING, 10*HZ); | ||
851 | if (ret == -ERESTARTSYS) | ||
852 | return ret; | ||
853 | if (ret == 0) { | ||
854 | printk("dvb-ttpci: warning: timeout waiting in LoadBitmap: %d, %d\n", | ||
855 | ret, av7110->bmp_state); | ||
856 | av7110->bmp_state = BMP_NONE; | ||
857 | return -ETIMEDOUT; | ||
858 | } | ||
859 | return 0; | ||
860 | } | ||
861 | |||
862 | static inline int LoadBitmap(struct av7110 *av7110, | ||
820 | u16 dx, u16 dy, int inc, u8 __user * data) | 863 | u16 dx, u16 dy, int inc, u8 __user * data) |
821 | { | 864 | { |
865 | u16 format; | ||
822 | int bpp; | 866 | int bpp; |
823 | int i; | 867 | int i; |
824 | int d, delta; | 868 | int d, delta; |
@@ -827,14 +871,7 @@ static inline int LoadBitmap(struct av7110 *av7110, u16 format, | |||
827 | 871 | ||
828 | dprintk(4, "%p\n", av7110); | 872 | dprintk(4, "%p\n", av7110); |
829 | 873 | ||
830 | ret = wait_event_interruptible_timeout(av7110->bmpq, av7110->bmp_state != BMP_LOADING, HZ); | 874 | format = bpp2bit[av7110->osdbpp[av7110->osdwin]]; |
831 | if (ret == -ERESTARTSYS || ret == 0) { | ||
832 | printk("dvb-ttpci: warning: timeout waiting in LoadBitmap: %d, %d\n", | ||
833 | ret, av7110->bmp_state); | ||
834 | av7110->bmp_state = BMP_NONE; | ||
835 | return -1; | ||
836 | } | ||
837 | BUG_ON (av7110->bmp_state == BMP_LOADING); | ||
838 | 875 | ||
839 | av7110->bmp_state = BMP_LOADING; | 876 | av7110->bmp_state = BMP_LOADING; |
840 | if (format == OSD_BITMAP8) { | 877 | if (format == OSD_BITMAP8) { |
@@ -847,18 +884,18 @@ static inline int LoadBitmap(struct av7110 *av7110, u16 format, | |||
847 | bpp=1; delta = 8; | 884 | bpp=1; delta = 8; |
848 | } else { | 885 | } else { |
849 | av7110->bmp_state = BMP_NONE; | 886 | av7110->bmp_state = BMP_NONE; |
850 | return -1; | 887 | return -EINVAL; |
851 | } | 888 | } |
852 | av7110->bmplen = ((dx * dy * bpp + 7) & ~7) / 8; | 889 | av7110->bmplen = ((dx * dy * bpp + 7) & ~7) / 8; |
853 | av7110->bmpp = 0; | 890 | av7110->bmpp = 0; |
854 | if (av7110->bmplen > 32768) { | 891 | if (av7110->bmplen > 32768) { |
855 | av7110->bmp_state = BMP_NONE; | 892 | av7110->bmp_state = BMP_NONE; |
856 | return -1; | 893 | return -EINVAL; |
857 | } | 894 | } |
858 | for (i = 0; i < dy; i++) { | 895 | for (i = 0; i < dy; i++) { |
859 | if (copy_from_user(av7110->bmpbuf + 1024 + i * dx, data + i * inc, dx)) { | 896 | if (copy_from_user(av7110->bmpbuf + 1024 + i * dx, data + i * inc, dx)) { |
860 | av7110->bmp_state = BMP_NONE; | 897 | av7110->bmp_state = BMP_NONE; |
861 | return -1; | 898 | return -EINVAL; |
862 | } | 899 | } |
863 | } | 900 | } |
864 | if (format != OSD_BITMAP8) { | 901 | if (format != OSD_BITMAP8) { |
@@ -873,37 +910,27 @@ static inline int LoadBitmap(struct av7110 *av7110, u16 format, | |||
873 | } | 910 | } |
874 | av7110->bmplen += 1024; | 911 | av7110->bmplen += 1024; |
875 | dprintk(4, "av7110_fw_cmd: LoadBmp size %d\n", av7110->bmplen); | 912 | dprintk(4, "av7110_fw_cmd: LoadBmp size %d\n", av7110->bmplen); |
876 | return av7110_fw_cmd(av7110, COMTYPE_OSD, LoadBmp, 3, format, dx, dy); | 913 | ret = av7110_fw_cmd(av7110, COMTYPE_OSD, LoadBmp, 3, format, dx, dy); |
914 | if (!ret) | ||
915 | ret = WaitUntilBmpLoaded(av7110); | ||
916 | return ret; | ||
877 | } | 917 | } |
878 | 918 | ||
879 | static int BlitBitmap(struct av7110 *av7110, u16 win, u16 x, u16 y, u16 trans) | 919 | static int BlitBitmap(struct av7110 *av7110, u16 x, u16 y) |
880 | { | 920 | { |
881 | int ret; | ||
882 | |||
883 | dprintk(4, "%p\n", av7110); | 921 | dprintk(4, "%p\n", av7110); |
884 | 922 | ||
885 | BUG_ON (av7110->bmp_state == BMP_NONE); | 923 | return av7110_fw_cmd(av7110, COMTYPE_OSD, BlitBmp, 4, av7110->osdwin, x, y, 0); |
886 | |||
887 | ret = wait_event_interruptible_timeout(av7110->bmpq, | ||
888 | av7110->bmp_state != BMP_LOADING, 10*HZ); | ||
889 | if (ret == -ERESTARTSYS || ret == 0) { | ||
890 | printk("dvb-ttpci: warning: timeout waiting in BlitBitmap: %d, %d\n", | ||
891 | ret, av7110->bmp_state); | ||
892 | av7110->bmp_state = BMP_NONE; | ||
893 | return (ret == 0) ? -ETIMEDOUT : ret; | ||
894 | } | ||
895 | |||
896 | BUG_ON (av7110->bmp_state != BMP_LOADED); | ||
897 | |||
898 | return av7110_fw_cmd(av7110, COMTYPE_OSD, BlitBmp, 4, win, x, y, trans); | ||
899 | } | 924 | } |
900 | 925 | ||
901 | static inline int ReleaseBitmap(struct av7110 *av7110) | 926 | static inline int ReleaseBitmap(struct av7110 *av7110) |
902 | { | 927 | { |
903 | dprintk(4, "%p\n", av7110); | 928 | dprintk(4, "%p\n", av7110); |
904 | 929 | ||
905 | if (av7110->bmp_state != BMP_LOADED) | 930 | if (av7110->bmp_state != BMP_LOADED && FW_VERSION(av7110->arm_app) < 0x261e) |
906 | return -1; | 931 | return -1; |
932 | if (av7110->bmp_state == BMP_LOADING) | ||
933 | dprintk(1,"ReleaseBitmap called while BMP_LOADING\n"); | ||
907 | av7110->bmp_state = BMP_NONE; | 934 | av7110->bmp_state = BMP_NONE; |
908 | return av7110_fw_cmd(av7110, COMTYPE_OSD, ReleaseBmp, 0); | 935 | return av7110_fw_cmd(av7110, COMTYPE_OSD, ReleaseBmp, 0); |
909 | } | 936 | } |
@@ -924,18 +951,22 @@ static u32 RGB2YUV(u16 R, u16 G, u16 B) | |||
924 | return Cr | (Cb << 16) | (Y << 8); | 951 | return Cr | (Cb << 16) | (Y << 8); |
925 | } | 952 | } |
926 | 953 | ||
927 | static void OSDSetColor(struct av7110 *av7110, u8 color, u8 r, u8 g, u8 b, u8 blend) | 954 | static int OSDSetColor(struct av7110 *av7110, u8 color, u8 r, u8 g, u8 b, u8 blend) |
928 | { | 955 | { |
956 | int ret; | ||
957 | |||
929 | u16 ch, cl; | 958 | u16 ch, cl; |
930 | u32 yuv; | 959 | u32 yuv; |
931 | 960 | ||
932 | yuv = blend ? RGB2YUV(r,g,b) : 0; | 961 | yuv = blend ? RGB2YUV(r,g,b) : 0; |
933 | cl = (yuv & 0xffff); | 962 | cl = (yuv & 0xffff); |
934 | ch = ((yuv >> 16) & 0xffff); | 963 | ch = ((yuv >> 16) & 0xffff); |
935 | SetColor_(av7110, av7110->osdwin, bpp2pal[av7110->osdbpp[av7110->osdwin]], | 964 | ret = SetColor_(av7110, av7110->osdwin, bpp2pal[av7110->osdbpp[av7110->osdwin]], |
936 | color, ch, cl); | 965 | color, ch, cl); |
937 | SetBlend_(av7110, av7110->osdwin, bpp2pal[av7110->osdbpp[av7110->osdwin]], | 966 | if (!ret) |
938 | color, ((blend >> 4) & 0x0f)); | 967 | ret = SetBlend_(av7110, av7110->osdwin, bpp2pal[av7110->osdbpp[av7110->osdwin]], |
968 | color, ((blend >> 4) & 0x0f)); | ||
969 | return ret; | ||
939 | } | 970 | } |
940 | 971 | ||
941 | static int OSDSetPalette(struct av7110 *av7110, u32 __user * colors, u8 first, u8 last) | 972 | static int OSDSetPalette(struct av7110 *av7110, u32 __user * colors, u8 first, u8 last) |
@@ -968,14 +999,14 @@ static int OSDSetBlock(struct av7110 *av7110, int x0, int y0, | |||
968 | { | 999 | { |
969 | uint w, h, bpp, bpl, size, lpb, bnum, brest; | 1000 | uint w, h, bpp, bpl, size, lpb, bnum, brest; |
970 | int i; | 1001 | int i; |
971 | int rc; | 1002 | int rc,release_rc; |
972 | 1003 | ||
973 | w = x1 - x0 + 1; | 1004 | w = x1 - x0 + 1; |
974 | h = y1 - y0 + 1; | 1005 | h = y1 - y0 + 1; |
975 | if (inc <= 0) | 1006 | if (inc <= 0) |
976 | inc = w; | 1007 | inc = w; |
977 | if (w <= 0 || w > 720 || h <= 0 || h > 576) | 1008 | if (w <= 0 || w > 720 || h <= 0 || h > 576) |
978 | return -1; | 1009 | return -EINVAL; |
979 | bpp = av7110->osdbpp[av7110->osdwin] + 1; | 1010 | bpp = av7110->osdbpp[av7110->osdwin] + 1; |
980 | bpl = ((w * bpp + 7) & ~7) / 8; | 1011 | bpl = ((w * bpp + 7) & ~7) / 8; |
981 | size = h * bpl; | 1012 | size = h * bpl; |
@@ -983,176 +1014,186 @@ static int OSDSetBlock(struct av7110 *av7110, int x0, int y0, | |||
983 | bnum = size / (lpb * bpl); | 1014 | bnum = size / (lpb * bpl); |
984 | brest = size - bnum * lpb * bpl; | 1015 | brest = size - bnum * lpb * bpl; |
985 | 1016 | ||
986 | for (i = 0; i < bnum; i++) { | 1017 | if (av7110->bmp_state == BMP_LOADING) { |
987 | rc = LoadBitmap(av7110, bpp2bit[av7110->osdbpp[av7110->osdwin]], | 1018 | /* possible if syscall is repeated by -ERESTARTSYS and if firmware cannot abort */ |
988 | w, lpb, inc, data); | 1019 | BUG_ON (FW_VERSION(av7110->arm_app) >= 0x261e); |
989 | if (rc) | 1020 | rc = WaitUntilBmpLoaded(av7110); |
990 | return rc; | ||
991 | rc = BlitBitmap(av7110, av7110->osdwin, x0, y0 + i * lpb, 0); | ||
992 | if (rc) | 1021 | if (rc) |
993 | return rc; | 1022 | return rc; |
994 | data += lpb * inc; | 1023 | /* just continue. This should work for all fw versions |
1024 | * if bnum==1 && !brest && LoadBitmap was successful | ||
1025 | */ | ||
995 | } | 1026 | } |
996 | if (brest) { | 1027 | |
997 | rc = LoadBitmap(av7110, bpp2bit[av7110->osdbpp[av7110->osdwin]], | 1028 | rc = 0; |
998 | w, brest / bpl, inc, data); | 1029 | for (i = 0; i < bnum; i++) { |
1030 | rc = LoadBitmap(av7110, w, lpb, inc, data); | ||
999 | if (rc) | 1031 | if (rc) |
1000 | return rc; | 1032 | break; |
1001 | rc = BlitBitmap(av7110, av7110->osdwin, x0, y0 + bnum * lpb, 0); | 1033 | rc = BlitBitmap(av7110, x0, y0 + i * lpb); |
1002 | if (rc) | 1034 | if (rc) |
1003 | return rc; | 1035 | break; |
1036 | data += lpb * inc; | ||
1004 | } | 1037 | } |
1005 | ReleaseBitmap(av7110); | 1038 | if (!rc && brest) { |
1006 | return 0; | 1039 | rc = LoadBitmap(av7110, w, brest / bpl, inc, data); |
1040 | if (!rc) | ||
1041 | rc = BlitBitmap(av7110, x0, y0 + bnum * lpb); | ||
1042 | } | ||
1043 | release_rc = ReleaseBitmap(av7110); | ||
1044 | if (!rc) | ||
1045 | rc = release_rc; | ||
1046 | if (rc) | ||
1047 | dprintk(1,"returns %d\n",rc); | ||
1048 | return rc; | ||
1007 | } | 1049 | } |
1008 | 1050 | ||
1009 | int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc) | 1051 | int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc) |
1010 | { | 1052 | { |
1011 | int ret; | 1053 | int ret; |
1012 | 1054 | ||
1013 | ret = down_interruptible(&av7110->osd_sema); | 1055 | if (down_interruptible(&av7110->osd_sema)) |
1014 | if (ret) | ||
1015 | return -ERESTARTSYS; | 1056 | return -ERESTARTSYS; |
1016 | 1057 | ||
1017 | /* stupid, but OSD functions don't provide a return code anyway */ | ||
1018 | ret = 0; | ||
1019 | |||
1020 | switch (dc->cmd) { | 1058 | switch (dc->cmd) { |
1021 | case OSD_Close: | 1059 | case OSD_Close: |
1022 | DestroyOSDWindow(av7110, av7110->osdwin); | 1060 | ret = DestroyOSDWindow(av7110, av7110->osdwin); |
1023 | goto out; | 1061 | break; |
1024 | case OSD_Open: | 1062 | case OSD_Open: |
1025 | av7110->osdbpp[av7110->osdwin] = (dc->color - 1) & 7; | 1063 | av7110->osdbpp[av7110->osdwin] = (dc->color - 1) & 7; |
1026 | CreateOSDWindow(av7110, av7110->osdwin, | 1064 | ret = CreateOSDWindow(av7110, av7110->osdwin, |
1027 | bpp2bit[av7110->osdbpp[av7110->osdwin]], | 1065 | bpp2bit[av7110->osdbpp[av7110->osdwin]], |
1028 | dc->x1 - dc->x0 + 1, dc->y1 - dc->y0 + 1); | 1066 | dc->x1 - dc->x0 + 1, dc->y1 - dc->y0 + 1); |
1067 | if (ret) | ||
1068 | break; | ||
1029 | if (!dc->data) { | 1069 | if (!dc->data) { |
1030 | MoveWindowAbs(av7110, av7110->osdwin, dc->x0, dc->y0); | 1070 | ret = MoveWindowAbs(av7110, av7110->osdwin, dc->x0, dc->y0); |
1031 | SetColorBlend(av7110, av7110->osdwin); | 1071 | if (ret) |
1072 | break; | ||
1073 | ret = SetColorBlend(av7110, av7110->osdwin); | ||
1032 | } | 1074 | } |
1033 | goto out; | 1075 | break; |
1034 | case OSD_Show: | 1076 | case OSD_Show: |
1035 | MoveWindowRel(av7110, av7110->osdwin, 0, 0); | 1077 | ret = MoveWindowRel(av7110, av7110->osdwin, 0, 0); |
1036 | goto out; | 1078 | break; |
1037 | case OSD_Hide: | 1079 | case OSD_Hide: |
1038 | HideWindow(av7110, av7110->osdwin); | 1080 | ret = HideWindow(av7110, av7110->osdwin); |
1039 | goto out; | 1081 | break; |
1040 | case OSD_Clear: | 1082 | case OSD_Clear: |
1041 | DrawBlock(av7110, av7110->osdwin, 0, 0, 720, 576, 0); | 1083 | ret = DrawBlock(av7110, av7110->osdwin, 0, 0, 720, 576, 0); |
1042 | goto out; | 1084 | break; |
1043 | case OSD_Fill: | 1085 | case OSD_Fill: |
1044 | DrawBlock(av7110, av7110->osdwin, 0, 0, 720, 576, dc->color); | 1086 | ret = DrawBlock(av7110, av7110->osdwin, 0, 0, 720, 576, dc->color); |
1045 | goto out; | 1087 | break; |
1046 | case OSD_SetColor: | 1088 | case OSD_SetColor: |
1047 | OSDSetColor(av7110, dc->color, dc->x0, dc->y0, dc->x1, dc->y1); | 1089 | ret = OSDSetColor(av7110, dc->color, dc->x0, dc->y0, dc->x1, dc->y1); |
1048 | goto out; | 1090 | break; |
1049 | case OSD_SetPalette: | 1091 | case OSD_SetPalette: |
1050 | { | 1092 | if (FW_VERSION(av7110->arm_app) >= 0x2618) |
1051 | if (FW_VERSION(av7110->arm_app) >= 0x2618) { | ||
1052 | ret = OSDSetPalette(av7110, dc->data, dc->color, dc->x0); | 1093 | ret = OSDSetPalette(av7110, dc->data, dc->color, dc->x0); |
1053 | goto out; | 1094 | else { |
1054 | } else { | ||
1055 | int i, len = dc->x0-dc->color+1; | 1095 | int i, len = dc->x0-dc->color+1; |
1056 | u8 __user *colors = (u8 __user *)dc->data; | 1096 | u8 __user *colors = (u8 __user *)dc->data; |
1057 | u8 r, g, b, blend; | 1097 | u8 r, g, b, blend; |
1058 | 1098 | ret = 0; | |
1059 | for (i = 0; i<len; i++) { | 1099 | for (i = 0; i<len; i++) { |
1060 | if (get_user(r, colors + i * 4) || | 1100 | if (get_user(r, colors + i * 4) || |
1061 | get_user(g, colors + i * 4 + 1) || | 1101 | get_user(g, colors + i * 4 + 1) || |
1062 | get_user(b, colors + i * 4 + 2) || | 1102 | get_user(b, colors + i * 4 + 2) || |
1063 | get_user(blend, colors + i * 4 + 3)) { | 1103 | get_user(blend, colors + i * 4 + 3)) { |
1064 | ret = -EFAULT; | 1104 | ret = -EFAULT; |
1065 | goto out; | 1105 | break; |
1066 | } | 1106 | } |
1067 | OSDSetColor(av7110, dc->color + i, r, g, b, blend); | 1107 | ret = OSDSetColor(av7110, dc->color + i, r, g, b, blend); |
1108 | if (ret) | ||
1109 | break; | ||
1068 | } | 1110 | } |
1069 | } | 1111 | } |
1070 | ret = 0; | 1112 | break; |
1071 | goto out; | ||
1072 | } | ||
1073 | case OSD_SetTrans: | ||
1074 | goto out; | ||
1075 | case OSD_SetPixel: | 1113 | case OSD_SetPixel: |
1076 | DrawLine(av7110, av7110->osdwin, | 1114 | ret = DrawLine(av7110, av7110->osdwin, |
1077 | dc->x0, dc->y0, 0, 0, dc->color); | 1115 | dc->x0, dc->y0, 0, 0, dc->color); |
1078 | goto out; | 1116 | break; |
1079 | case OSD_GetPixel: | ||
1080 | goto out; | ||
1081 | case OSD_SetRow: | 1117 | case OSD_SetRow: |
1082 | dc->y1 = dc->y0; | 1118 | dc->y1 = dc->y0; |
1083 | /* fall through */ | 1119 | /* fall through */ |
1084 | case OSD_SetBlock: | 1120 | case OSD_SetBlock: |
1085 | ret = OSDSetBlock(av7110, dc->x0, dc->y0, dc->x1, dc->y1, dc->color, dc->data); | 1121 | ret = OSDSetBlock(av7110, dc->x0, dc->y0, dc->x1, dc->y1, dc->color, dc->data); |
1086 | goto out; | 1122 | break; |
1087 | case OSD_FillRow: | 1123 | case OSD_FillRow: |
1088 | DrawBlock(av7110, av7110->osdwin, dc->x0, dc->y0, | 1124 | ret = DrawBlock(av7110, av7110->osdwin, dc->x0, dc->y0, |
1089 | dc->x1-dc->x0+1, dc->y1, dc->color); | 1125 | dc->x1-dc->x0+1, dc->y1, dc->color); |
1090 | goto out; | 1126 | break; |
1091 | case OSD_FillBlock: | 1127 | case OSD_FillBlock: |
1092 | DrawBlock(av7110, av7110->osdwin, dc->x0, dc->y0, | 1128 | ret = DrawBlock(av7110, av7110->osdwin, dc->x0, dc->y0, |
1093 | dc->x1 - dc->x0 + 1, dc->y1 - dc->y0 + 1, dc->color); | 1129 | dc->x1 - dc->x0 + 1, dc->y1 - dc->y0 + 1, dc->color); |
1094 | goto out; | 1130 | break; |
1095 | case OSD_Line: | 1131 | case OSD_Line: |
1096 | DrawLine(av7110, av7110->osdwin, | 1132 | ret = DrawLine(av7110, av7110->osdwin, |
1097 | dc->x0, dc->y0, dc->x1 - dc->x0, dc->y1 - dc->y0, dc->color); | 1133 | dc->x0, dc->y0, dc->x1 - dc->x0, dc->y1 - dc->y0, dc->color); |
1098 | goto out; | 1134 | break; |
1099 | case OSD_Query: | ||
1100 | goto out; | ||
1101 | case OSD_Test: | ||
1102 | goto out; | ||
1103 | case OSD_Text: | 1135 | case OSD_Text: |
1104 | { | 1136 | { |
1105 | char textbuf[240]; | 1137 | char textbuf[240]; |
1106 | 1138 | ||
1107 | if (strncpy_from_user(textbuf, dc->data, 240) < 0) { | 1139 | if (strncpy_from_user(textbuf, dc->data, 240) < 0) { |
1108 | ret = -EFAULT; | 1140 | ret = -EFAULT; |
1109 | goto out; | 1141 | break; |
1110 | } | 1142 | } |
1111 | textbuf[239] = 0; | 1143 | textbuf[239] = 0; |
1112 | if (dc->x1 > 3) | 1144 | if (dc->x1 > 3) |
1113 | dc->x1 = 3; | 1145 | dc->x1 = 3; |
1114 | SetFont(av7110, av7110->osdwin, dc->x1, | 1146 | ret = SetFont(av7110, av7110->osdwin, dc->x1, |
1115 | (u16) (dc->color & 0xffff), (u16) (dc->color >> 16)); | 1147 | (u16) (dc->color & 0xffff), (u16) (dc->color >> 16)); |
1116 | FlushText(av7110); | 1148 | if (!ret) |
1117 | WriteText(av7110, av7110->osdwin, dc->x0, dc->y0, textbuf); | 1149 | ret = FlushText(av7110); |
1118 | goto out; | 1150 | if (!ret) |
1151 | ret = WriteText(av7110, av7110->osdwin, dc->x0, dc->y0, textbuf); | ||
1152 | break; | ||
1119 | } | 1153 | } |
1120 | case OSD_SetWindow: | 1154 | case OSD_SetWindow: |
1121 | if (dc->x0 < 1 || dc->x0 > 7) { | 1155 | if (dc->x0 < 1 || dc->x0 > 7) |
1122 | ret = -EINVAL; | 1156 | ret = -EINVAL; |
1123 | goto out; | 1157 | else { |
1158 | av7110->osdwin = dc->x0; | ||
1159 | ret = 0; | ||
1124 | } | 1160 | } |
1125 | av7110->osdwin = dc->x0; | 1161 | break; |
1126 | goto out; | ||
1127 | case OSD_MoveWindow: | 1162 | case OSD_MoveWindow: |
1128 | MoveWindowAbs(av7110, av7110->osdwin, dc->x0, dc->y0); | 1163 | ret = MoveWindowAbs(av7110, av7110->osdwin, dc->x0, dc->y0); |
1129 | SetColorBlend(av7110, av7110->osdwin); | 1164 | if (!ret) |
1130 | goto out; | 1165 | ret = SetColorBlend(av7110, av7110->osdwin); |
1166 | break; | ||
1131 | case OSD_OpenRaw: | 1167 | case OSD_OpenRaw: |
1132 | if (dc->color < OSD_BITMAP1 || dc->color > OSD_CURSOR) { | 1168 | if (dc->color < OSD_BITMAP1 || dc->color > OSD_CURSOR) { |
1133 | ret = -EINVAL; | 1169 | ret = -EINVAL; |
1134 | goto out; | 1170 | break; |
1135 | } | 1171 | } |
1136 | if (dc->color >= OSD_BITMAP1 && dc->color <= OSD_BITMAP8HR) { | 1172 | if (dc->color >= OSD_BITMAP1 && dc->color <= OSD_BITMAP8HR) |
1137 | av7110->osdbpp[av7110->osdwin] = (1 << (dc->color & 3)) - 1; | 1173 | av7110->osdbpp[av7110->osdwin] = (1 << (dc->color & 3)) - 1; |
1138 | } | 1174 | else |
1139 | else { | ||
1140 | av7110->osdbpp[av7110->osdwin] = 0; | 1175 | av7110->osdbpp[av7110->osdwin] = 0; |
1141 | } | 1176 | ret = CreateOSDWindow(av7110, av7110->osdwin, (osd_raw_window_t)dc->color, |
1142 | CreateOSDWindow(av7110, av7110->osdwin, (osd_raw_window_t)dc->color, | ||
1143 | dc->x1 - dc->x0 + 1, dc->y1 - dc->y0 + 1); | 1177 | dc->x1 - dc->x0 + 1, dc->y1 - dc->y0 + 1); |
1178 | if (ret) | ||
1179 | break; | ||
1144 | if (!dc->data) { | 1180 | if (!dc->data) { |
1145 | MoveWindowAbs(av7110, av7110->osdwin, dc->x0, dc->y0); | 1181 | ret = MoveWindowAbs(av7110, av7110->osdwin, dc->x0, dc->y0); |
1146 | SetColorBlend(av7110, av7110->osdwin); | 1182 | if (!ret) |
1183 | ret = SetColorBlend(av7110, av7110->osdwin); | ||
1147 | } | 1184 | } |
1148 | goto out; | 1185 | break; |
1149 | default: | 1186 | default: |
1150 | ret = -EINVAL; | 1187 | ret = -EINVAL; |
1151 | goto out; | 1188 | break; |
1152 | } | 1189 | } |
1153 | 1190 | ||
1154 | out: | ||
1155 | up(&av7110->osd_sema); | 1191 | up(&av7110->osd_sema); |
1192 | if (ret==-ERESTARTSYS) | ||
1193 | dprintk(1, "av7110_osd_cmd(%d) returns with -ERESTARTSYS\n",dc->cmd); | ||
1194 | else if (ret) | ||
1195 | dprintk(1, "av7110_osd_cmd(%d) returns with %d\n",dc->cmd,ret); | ||
1196 | |||
1156 | return ret; | 1197 | return ret; |
1157 | } | 1198 | } |
1158 | 1199 | ||
diff --git a/drivers/media/dvb/ttpci/av7110_hw.h b/drivers/media/dvb/ttpci/av7110_hw.h index 52061e17c6dd..fedd20f9815d 100644 --- a/drivers/media/dvb/ttpci/av7110_hw.h +++ b/drivers/media/dvb/ttpci/av7110_hw.h | |||
@@ -458,27 +458,27 @@ static inline int SendDAC(struct av7110 *av7110, u8 addr, u8 data) | |||
458 | return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, AudioDAC, 2, addr, data); | 458 | return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, AudioDAC, 2, addr, data); |
459 | } | 459 | } |
460 | 460 | ||
461 | static inline void av7710_set_video_mode(struct av7110 *av7110, int mode) | 461 | static inline int av7710_set_video_mode(struct av7110 *av7110, int mode) |
462 | { | 462 | { |
463 | av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetVidMode, 1, mode); | 463 | return av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetVidMode, 1, mode); |
464 | } | 464 | } |
465 | 465 | ||
466 | static int inline vidcom(struct av7110 *av7110, u32 com, u32 arg) | 466 | static inline int vidcom(struct av7110 *av7110, u32 com, u32 arg) |
467 | { | 467 | { |
468 | return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_VIDEO_COMMAND, 4, | 468 | return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_VIDEO_COMMAND, 4, |
469 | (com>>16), (com&0xffff), | 469 | (com>>16), (com&0xffff), |
470 | (arg>>16), (arg&0xffff)); | 470 | (arg>>16), (arg&0xffff)); |
471 | } | 471 | } |
472 | 472 | ||
473 | static int inline audcom(struct av7110 *av7110, u32 com) | 473 | static inline int audcom(struct av7110 *av7110, u32 com) |
474 | { | 474 | { |
475 | return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_AUDIO_COMMAND, 2, | 475 | return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_AUDIO_COMMAND, 2, |
476 | (com>>16), (com&0xffff)); | 476 | (com>>16), (com&0xffff)); |
477 | } | 477 | } |
478 | 478 | ||
479 | static inline void Set22K(struct av7110 *av7110, int state) | 479 | static inline int Set22K(struct av7110 *av7110, int state) |
480 | { | 480 | { |
481 | av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, (state ? ON22K : OFF22K), 0); | 481 | return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, (state ? ON22K : OFF22K), 0); |
482 | } | 482 | } |
483 | 483 | ||
484 | 484 | ||
diff --git a/drivers/media/dvb/ttpci/av7110_ipack.c b/drivers/media/dvb/ttpci/av7110_ipack.c index 246640741888..699ef8b5b99a 100644 --- a/drivers/media/dvb/ttpci/av7110_ipack.c +++ b/drivers/media/dvb/ttpci/av7110_ipack.c | |||
@@ -24,7 +24,7 @@ int av7110_ipack_init(struct ipack *p, int size, | |||
24 | void (*func)(u8 *buf, int size, void *priv)) | 24 | void (*func)(u8 *buf, int size, void *priv)) |
25 | { | 25 | { |
26 | if (!(p->buf = vmalloc(size*sizeof(u8)))) { | 26 | if (!(p->buf = vmalloc(size*sizeof(u8)))) { |
27 | printk ("Couldn't allocate memory for ipack\n"); | 27 | printk(KERN_WARNING "Couldn't allocate memory for ipack\n"); |
28 | return -ENOMEM; | 28 | return -ENOMEM; |
29 | } | 29 | } |
30 | p->size = size; | 30 | p->size = size; |
diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c index 6e0f5d307c52..b65f4b0a481f 100644 --- a/drivers/media/dvb/ttpci/budget-av.c +++ b/drivers/media/dvb/ttpci/budget-av.c | |||
@@ -570,9 +570,9 @@ static int philips_cu1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_p | |||
570 | 570 | ||
571 | buf[0] = (div >> 8) & 0x7f; | 571 | buf[0] = (div >> 8) & 0x7f; |
572 | buf[1] = div & 0xff; | 572 | buf[1] = div & 0xff; |
573 | buf[2] = 0x8e; | 573 | buf[2] = 0x86; |
574 | buf[3] = (params->frequency < 174500000 ? 0xa1 : | 574 | buf[3] = (params->frequency < 150000000 ? 0x01 : |
575 | params->frequency < 454000000 ? 0x92 : 0x34); | 575 | params->frequency < 445000000 ? 0x02 : 0x04); |
576 | 576 | ||
577 | if (i2c_transfer(&budget->i2c_adap, &msg, 1) != 1) | 577 | if (i2c_transfer(&budget->i2c_adap, &msg, 1) != 1) |
578 | return -EIO; | 578 | return -EIO; |
@@ -695,8 +695,12 @@ static struct tda1004x_config philips_tu1216_config = { | |||
695 | .demod_address = 0x8, | 695 | .demod_address = 0x8, |
696 | .invert = 1, | 696 | .invert = 1, |
697 | .invert_oclk = 1, | 697 | .invert_oclk = 1, |
698 | .xtal_freq = TDA10046_XTAL_4M, | ||
699 | .agc_config = TDA10046_AGC_DEFAULT, | ||
700 | .if_freq = TDA10046_FREQ_3617, | ||
698 | .pll_init = philips_tu1216_pll_init, | 701 | .pll_init = philips_tu1216_pll_init, |
699 | .pll_set = philips_tu1216_pll_set, | 702 | .pll_set = philips_tu1216_pll_set, |
703 | .pll_sleep = NULL, | ||
700 | .request_firmware = philips_tu1216_request_firmware, | 704 | .request_firmware = philips_tu1216_request_firmware, |
701 | }; | 705 | }; |
702 | 706 | ||
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c index dce116111376..a1267054bc01 100644 --- a/drivers/media/dvb/ttpci/budget-ci.c +++ b/drivers/media/dvb/ttpci/budget-ci.c | |||
@@ -69,6 +69,7 @@ struct budget_ci { | |||
69 | int slot_status; | 69 | int slot_status; |
70 | struct dvb_ca_en50221 ca; | 70 | struct dvb_ca_en50221 ca; |
71 | char ir_dev_name[50]; | 71 | char ir_dev_name[50]; |
72 | u8 tuner_pll_address; /* used for philips_tdm1316l configs */ | ||
72 | }; | 73 | }; |
73 | 74 | ||
74 | /* from reading the following remotes: | 75 | /* from reading the following remotes: |
@@ -723,7 +724,7 @@ static int philips_tdm1316l_pll_init(struct dvb_frontend *fe) | |||
723 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; | 724 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; |
724 | static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab }; | 725 | static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
725 | static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 }; | 726 | static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 }; |
726 | struct i2c_msg tuner_msg = {.addr = 0x63,.flags = 0,.buf = td1316_init,.len = | 727 | struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len = |
727 | sizeof(td1316_init) }; | 728 | sizeof(td1316_init) }; |
728 | 729 | ||
729 | // setup PLL configuration | 730 | // setup PLL configuration |
@@ -746,7 +747,7 @@ static int philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend | |||
746 | { | 747 | { |
747 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; | 748 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; |
748 | u8 tuner_buf[4]; | 749 | u8 tuner_buf[4]; |
749 | struct i2c_msg tuner_msg = {.addr = 0x63,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) }; | 750 | struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) }; |
750 | int tuner_frequency = 0; | 751 | int tuner_frequency = 0; |
751 | u8 band, cp, filter; | 752 | u8 band, cp, filter; |
752 | 753 | ||
@@ -838,8 +839,12 @@ static struct tda1004x_config philips_tdm1316l_config = { | |||
838 | .demod_address = 0x8, | 839 | .demod_address = 0x8, |
839 | .invert = 0, | 840 | .invert = 0, |
840 | .invert_oclk = 0, | 841 | .invert_oclk = 0, |
842 | .xtal_freq = TDA10046_XTAL_4M, | ||
843 | .agc_config = TDA10046_AGC_DEFAULT, | ||
844 | .if_freq = TDA10046_FREQ_3617, | ||
841 | .pll_init = philips_tdm1316l_pll_init, | 845 | .pll_init = philips_tdm1316l_pll_init, |
842 | .pll_set = philips_tdm1316l_pll_set, | 846 | .pll_set = philips_tdm1316l_pll_set, |
847 | .pll_sleep = NULL, | ||
843 | .request_firmware = philips_tdm1316l_request_firmware, | 848 | .request_firmware = philips_tdm1316l_request_firmware, |
844 | }; | 849 | }; |
845 | 850 | ||
@@ -865,12 +870,22 @@ static void frontend_init(struct budget_ci *budget_ci) | |||
865 | break; | 870 | break; |
866 | 871 | ||
867 | case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889) | 872 | case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889) |
873 | budget_ci->tuner_pll_address = 0x63; | ||
868 | budget_ci->budget.dvb_frontend = | 874 | budget_ci->budget.dvb_frontend = |
869 | tda10045_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap); | 875 | tda10045_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap); |
870 | if (budget_ci->budget.dvb_frontend) { | 876 | if (budget_ci->budget.dvb_frontend) { |
871 | break; | 877 | break; |
872 | } | 878 | } |
873 | break; | 879 | break; |
880 | |||
881 | case 0x1012: // Hauppauge/TT Nova-T CI budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889) | ||
882 | budget_ci->tuner_pll_address = 0x60; | ||
883 | budget_ci->budget.dvb_frontend = | ||
884 | tda10046_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap); | ||
885 | if (budget_ci->budget.dvb_frontend) { | ||
886 | break; | ||
887 | } | ||
888 | break; | ||
874 | } | 889 | } |
875 | 890 | ||
876 | if (budget_ci->budget.dvb_frontend == NULL) { | 891 | if (budget_ci->budget.dvb_frontend == NULL) { |
@@ -950,11 +965,13 @@ static struct saa7146_extension budget_extension; | |||
950 | 965 | ||
951 | MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC); | 966 | MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC); |
952 | MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT); | 967 | MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT); |
968 | MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT); | ||
953 | 969 | ||
954 | static struct pci_device_id pci_tbl[] = { | 970 | static struct pci_device_id pci_tbl[] = { |
955 | MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c), | 971 | MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c), |
956 | MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f), | 972 | MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f), |
957 | MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011), | 973 | MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011), |
974 | MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012), | ||
958 | { | 975 | { |
959 | .vendor = 0, | 976 | .vendor = 0, |
960 | } | 977 | } |
diff --git a/drivers/media/dvb/ttpci/budget.c b/drivers/media/dvb/ttpci/budget.c index 083fd44e5f90..9961917e8a7f 100644 --- a/drivers/media/dvb/ttpci/budget.c +++ b/drivers/media/dvb/ttpci/budget.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include "ves1820.h" | 40 | #include "ves1820.h" |
41 | #include "l64781.h" | 41 | #include "l64781.h" |
42 | #include "tda8083.h" | 42 | #include "tda8083.h" |
43 | #include "s5h1420.h" | ||
43 | 44 | ||
44 | static void Set22K (struct budget *budget, int state) | 45 | static void Set22K (struct budget *budget, int state) |
45 | { | 46 | { |
@@ -177,6 +178,62 @@ static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t m | |||
177 | return 0; | 178 | return 0; |
178 | } | 179 | } |
179 | 180 | ||
181 | static int lnbp21_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | ||
182 | { | ||
183 | struct budget* budget = (struct budget*) fe->dvb->priv; | ||
184 | u8 buf; | ||
185 | struct i2c_msg msg = { .addr = 0x08, .flags = I2C_M_RD, .buf = &buf, .len = sizeof(buf) }; | ||
186 | |||
187 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | ||
188 | |||
189 | switch(voltage) { | ||
190 | case SEC_VOLTAGE_13: | ||
191 | buf = (buf & 0xf7) | 0x04; | ||
192 | break; | ||
193 | |||
194 | case SEC_VOLTAGE_18: | ||
195 | buf = (buf & 0xf7) | 0x0c; | ||
196 | break; | ||
197 | |||
198 | case SEC_VOLTAGE_OFF: | ||
199 | buf = buf & 0xf0; | ||
200 | break; | ||
201 | } | ||
202 | |||
203 | msg.flags = 0; | ||
204 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | ||
205 | |||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | static int lnbp21_enable_high_lnb_voltage(struct dvb_frontend* fe, int arg) | ||
210 | { | ||
211 | struct budget* budget = (struct budget*) fe->dvb->priv; | ||
212 | u8 buf; | ||
213 | struct i2c_msg msg = { .addr = 0x08, .flags = I2C_M_RD, .buf = &buf, .len = sizeof(buf) }; | ||
214 | |||
215 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | ||
216 | |||
217 | if (arg) { | ||
218 | buf = buf | 0x10; | ||
219 | } else { | ||
220 | buf = buf & 0xef; | ||
221 | } | ||
222 | |||
223 | msg.flags = 0; | ||
224 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | ||
225 | |||
226 | return 0; | ||
227 | } | ||
228 | |||
229 | static void lnbp21_init(struct budget* budget) | ||
230 | { | ||
231 | u8 buf = 0x00; | ||
232 | struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = &buf, .len = sizeof(buf) }; | ||
233 | |||
234 | i2c_transfer (&budget->i2c_adap, &msg, 1); | ||
235 | } | ||
236 | |||
180 | static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) | 237 | static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
181 | { | 238 | { |
182 | struct budget* budget = (struct budget*) fe->dvb->priv; | 239 | struct budget* budget = (struct budget*) fe->dvb->priv; |
@@ -395,6 +452,38 @@ static struct tda8083_config grundig_29504_451_config = { | |||
395 | .pll_set = grundig_29504_451_pll_set, | 452 | .pll_set = grundig_29504_451_pll_set, |
396 | }; | 453 | }; |
397 | 454 | ||
455 | static int s5h1420_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u32* freqout) | ||
456 | { | ||
457 | struct budget* budget = (struct budget*) fe->dvb->priv; | ||
458 | u32 div; | ||
459 | u8 data[4]; | ||
460 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; | ||
461 | |||
462 | div = params->frequency / 1000; | ||
463 | data[0] = (div >> 8) & 0x7f; | ||
464 | data[1] = div & 0xff; | ||
465 | data[2] = 0xc2; | ||
466 | |||
467 | if (div < 1450) | ||
468 | data[3] = 0x00; | ||
469 | else if (div < 1850) | ||
470 | data[3] = 0x40; | ||
471 | else if (div < 2000) | ||
472 | data[3] = 0x80; | ||
473 | else | ||
474 | data[3] = 0xc0; | ||
475 | |||
476 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | ||
477 | |||
478 | *freqout = div * 1000; | ||
479 | return 0; | ||
480 | } | ||
481 | |||
482 | static struct s5h1420_config s5h1420_config = { | ||
483 | .demod_address = 0x53, | ||
484 | .pll_set = s5h1420_pll_set, | ||
485 | }; | ||
486 | |||
398 | static u8 read_pwm(struct budget* budget) | 487 | static u8 read_pwm(struct budget* budget) |
399 | { | 488 | { |
400 | u8 b = 0xff; | 489 | u8 b = 0xff; |
@@ -459,6 +548,15 @@ static void frontend_init(struct budget *budget) | |||
459 | break; | 548 | break; |
460 | } | 549 | } |
461 | break; | 550 | break; |
551 | |||
552 | case 0x1016: // Hauppauge/TT Nova-S SE (samsung s5h1420/????(tda8260)) | ||
553 | budget->dvb_frontend = s5h1420_attach(&s5h1420_config, &budget->i2c_adap); | ||
554 | if (budget->dvb_frontend) { | ||
555 | budget->dvb_frontend->ops->set_voltage = lnbp21_set_voltage; | ||
556 | budget->dvb_frontend->ops->enable_high_lnb_voltage = lnbp21_enable_high_lnb_voltage; | ||
557 | lnbp21_init(budget); | ||
558 | break; | ||
559 | } | ||
462 | } | 560 | } |
463 | 561 | ||
464 | if (budget->dvb_frontend == NULL) { | 562 | if (budget->dvb_frontend == NULL) { |
@@ -532,6 +630,7 @@ static struct pci_device_id pci_tbl[] = { | |||
532 | MAKE_EXTENSION_PCI(ttbc, 0x13c2, 0x1004), | 630 | MAKE_EXTENSION_PCI(ttbc, 0x13c2, 0x1004), |
533 | MAKE_EXTENSION_PCI(ttbt, 0x13c2, 0x1005), | 631 | MAKE_EXTENSION_PCI(ttbt, 0x13c2, 0x1005), |
534 | MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013), | 632 | MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013), |
633 | MAKE_EXTENSION_PCI(ttbs, 0x13c2, 0x1016), | ||
535 | MAKE_EXTENSION_PCI(fsacs1,0x1131, 0x4f60), | 634 | MAKE_EXTENSION_PCI(fsacs1,0x1131, 0x4f60), |
536 | MAKE_EXTENSION_PCI(fsacs0,0x1131, 0x4f61), | 635 | MAKE_EXTENSION_PCI(fsacs0,0x1131, 0x4f61), |
537 | { | 636 | { |
diff --git a/drivers/media/dvb/ttusb-budget/Kconfig b/drivers/media/dvb/ttusb-budget/Kconfig index 4aa714ab4c28..c6c1d41a2efb 100644 --- a/drivers/media/dvb/ttusb-budget/Kconfig +++ b/drivers/media/dvb/ttusb-budget/Kconfig | |||
@@ -3,6 +3,7 @@ config DVB_TTUSB_BUDGET | |||
3 | depends on DVB_CORE && USB | 3 | depends on DVB_CORE && USB |
4 | select DVB_CX22700 | 4 | select DVB_CX22700 |
5 | select DVB_TDA1004X | 5 | select DVB_TDA1004X |
6 | select DVB_VES1820 | ||
6 | select DVB_TDA8083 | 7 | select DVB_TDA8083 |
7 | select DVB_STV0299 | 8 | select DVB_STV0299 |
8 | help | 9 | help |
diff --git a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c index afa0e7a0e506..2c17a5f58340 100644 --- a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c +++ b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include "dmxdev.h" | 24 | #include "dmxdev.h" |
25 | #include "dvb_demux.h" | 25 | #include "dvb_demux.h" |
26 | #include "dvb_net.h" | 26 | #include "dvb_net.h" |
27 | #include "ves1820.h" | ||
27 | #include "cx22700.h" | 28 | #include "cx22700.h" |
28 | #include "tda1004x.h" | 29 | #include "tda1004x.h" |
29 | #include "stv0299.h" | 30 | #include "stv0299.h" |
@@ -1367,6 +1368,47 @@ static struct tda8083_config ttusb_novas_grundig_29504_491_config = { | |||
1367 | .pll_set = ttusb_novas_grundig_29504_491_pll_set, | 1368 | .pll_set = ttusb_novas_grundig_29504_491_pll_set, |
1368 | }; | 1369 | }; |
1369 | 1370 | ||
1371 | static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) | ||
1372 | { | ||
1373 | struct ttusb* ttusb = fe->dvb->priv; | ||
1374 | u32 div; | ||
1375 | u8 data[4]; | ||
1376 | struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) }; | ||
1377 | |||
1378 | div = (params->frequency + 35937500 + 31250) / 62500; | ||
1379 | |||
1380 | data[0] = (div >> 8) & 0x7f; | ||
1381 | data[1] = div & 0xff; | ||
1382 | data[2] = 0x85 | ((div >> 10) & 0x60); | ||
1383 | data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81); | ||
1384 | |||
1385 | if (i2c_transfer (&ttusb->i2c_adap, &msg, 1) != 1) | ||
1386 | return -EIO; | ||
1387 | |||
1388 | return 0; | ||
1389 | } | ||
1390 | |||
1391 | |||
1392 | static struct ves1820_config alps_tdbe2_config = { | ||
1393 | .demod_address = 0x09, | ||
1394 | .xin = 57840000UL, | ||
1395 | .invert = 1, | ||
1396 | .selagc = VES1820_SELAGC_SIGNAMPERR, | ||
1397 | .pll_set = alps_tdbe2_pll_set, | ||
1398 | }; | ||
1399 | |||
1400 | static u8 read_pwm(struct ttusb* ttusb) | ||
1401 | { | ||
1402 | u8 b = 0xff; | ||
1403 | u8 pwm; | ||
1404 | struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 }, | ||
1405 | { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} }; | ||
1406 | |||
1407 | if ((i2c_transfer(&ttusb->i2c_adap, msg, 2) != 2) || (pwm == 0xff)) | ||
1408 | pwm = 0x48; | ||
1409 | |||
1410 | return pwm; | ||
1411 | } | ||
1370 | 1412 | ||
1371 | 1413 | ||
1372 | static void frontend_init(struct ttusb* ttusb) | 1414 | static void frontend_init(struct ttusb* ttusb) |
@@ -1394,6 +1436,12 @@ static void frontend_init(struct ttusb* ttusb) | |||
1394 | 1436 | ||
1395 | break; | 1437 | break; |
1396 | 1438 | ||
1439 | case 0x1004: // Hauppauge/TT DVB-C budget (ves1820/ALPS TDBE2(sp5659)) | ||
1440 | ttusb->fe = ves1820_attach(&alps_tdbe2_config, &ttusb->i2c_adap, read_pwm(ttusb)); | ||
1441 | if (ttusb->fe != NULL) | ||
1442 | break; | ||
1443 | break; | ||
1444 | |||
1397 | case 0x1005: // Hauppauge/TT Nova-USB-t budget (tda10046/Philips td1316(tda6651tt) OR cx22700/ALPS TDMB7(??)) | 1445 | case 0x1005: // Hauppauge/TT Nova-USB-t budget (tda10046/Philips td1316(tda6651tt) OR cx22700/ALPS TDMB7(??)) |
1398 | // try the ALPS TDMB7 first | 1446 | // try the ALPS TDMB7 first |
1399 | ttusb->fe = cx22700_attach(&alps_tdmb7_config, &ttusb->i2c_adap); | 1447 | ttusb->fe = cx22700_attach(&alps_tdmb7_config, &ttusb->i2c_adap); |
@@ -1570,7 +1618,7 @@ static void ttusb_disconnect(struct usb_interface *intf) | |||
1570 | 1618 | ||
1571 | static struct usb_device_id ttusb_table[] = { | 1619 | static struct usb_device_id ttusb_table[] = { |
1572 | {USB_DEVICE(0xb48, 0x1003)}, | 1620 | {USB_DEVICE(0xb48, 0x1003)}, |
1573 | /* {USB_DEVICE(0xb48, 0x1004)},UNDEFINED HARDWARE - mail linuxtv.org list*/ /* to be confirmed ???? */ | 1621 | {USB_DEVICE(0xb48, 0x1004)}, |
1574 | {USB_DEVICE(0xb48, 0x1005)}, | 1622 | {USB_DEVICE(0xb48, 0x1005)}, |
1575 | {} | 1623 | {} |
1576 | }; | 1624 | }; |
diff --git a/drivers/media/dvb/ttusb-dec/ttusb_dec.c b/drivers/media/dvb/ttusb-dec/ttusb_dec.c index 505bdaff5a7e..45c9a9a08e4d 100644 --- a/drivers/media/dvb/ttusb-dec/ttusb_dec.c +++ b/drivers/media/dvb/ttusb-dec/ttusb_dec.c | |||
@@ -1281,6 +1281,7 @@ static int ttusb_dec_boot_dsp(struct ttusb_dec *dec) | |||
1281 | if (firmware_size < 60) { | 1281 | if (firmware_size < 60) { |
1282 | printk("%s: firmware size too small for DSP code (%zu < 60).\n", | 1282 | printk("%s: firmware size too small for DSP code (%zu < 60).\n", |
1283 | __FUNCTION__, firmware_size); | 1283 | __FUNCTION__, firmware_size); |
1284 | release_firmware(fw_entry); | ||
1284 | return -1; | 1285 | return -1; |
1285 | } | 1286 | } |
1286 | 1287 | ||
@@ -1294,6 +1295,7 @@ static int ttusb_dec_boot_dsp(struct ttusb_dec *dec) | |||
1294 | printk("%s: crc32 check of DSP code failed (calculated " | 1295 | printk("%s: crc32 check of DSP code failed (calculated " |
1295 | "0x%08x != 0x%08x in file), file invalid.\n", | 1296 | "0x%08x != 0x%08x in file), file invalid.\n", |
1296 | __FUNCTION__, crc32_csum, crc32_check); | 1297 | __FUNCTION__, crc32_csum, crc32_check); |
1298 | release_firmware(fw_entry); | ||
1297 | return -1; | 1299 | return -1; |
1298 | } | 1300 | } |
1299 | memcpy(idstring, &firmware[36], 20); | 1301 | memcpy(idstring, &firmware[36], 20); |
@@ -1308,15 +1310,19 @@ static int ttusb_dec_boot_dsp(struct ttusb_dec *dec) | |||
1308 | 1310 | ||
1309 | result = ttusb_dec_send_command(dec, 0x41, sizeof(b0), b0, NULL, NULL); | 1311 | result = ttusb_dec_send_command(dec, 0x41, sizeof(b0), b0, NULL, NULL); |
1310 | 1312 | ||
1311 | if (result) | 1313 | if (result) { |
1314 | release_firmware(fw_entry); | ||
1312 | return result; | 1315 | return result; |
1316 | } | ||
1313 | 1317 | ||
1314 | trans_count = 0; | 1318 | trans_count = 0; |
1315 | j = 0; | 1319 | j = 0; |
1316 | 1320 | ||
1317 | b = kmalloc(ARM_PACKET_SIZE, GFP_KERNEL); | 1321 | b = kmalloc(ARM_PACKET_SIZE, GFP_KERNEL); |
1318 | if (b == NULL) | 1322 | if (b == NULL) { |
1323 | release_firmware(fw_entry); | ||
1319 | return -ENOMEM; | 1324 | return -ENOMEM; |
1325 | } | ||
1320 | 1326 | ||
1321 | for (i = 0; i < firmware_size; i += COMMAND_PACKET_SIZE) { | 1327 | for (i = 0; i < firmware_size; i += COMMAND_PACKET_SIZE) { |
1322 | size = firmware_size - i; | 1328 | size = firmware_size - i; |
@@ -1345,6 +1351,7 @@ static int ttusb_dec_boot_dsp(struct ttusb_dec *dec) | |||
1345 | 1351 | ||
1346 | result = ttusb_dec_send_command(dec, 0x43, sizeof(b1), b1, NULL, NULL); | 1352 | result = ttusb_dec_send_command(dec, 0x43, sizeof(b1), b1, NULL, NULL); |
1347 | 1353 | ||
1354 | release_firmware(fw_entry); | ||
1348 | kfree(b); | 1355 | kfree(b); |
1349 | 1356 | ||
1350 | return result; | 1357 | return result; |
diff --git a/drivers/media/dvb/ttusb-dec/ttusbdecfe.c b/drivers/media/dvb/ttusb-dec/ttusbdecfe.c index 1699cc9f6bb0..725af3af5b27 100644 --- a/drivers/media/dvb/ttusb-dec/ttusbdecfe.c +++ b/drivers/media/dvb/ttusb-dec/ttusbdecfe.c | |||
@@ -157,7 +157,8 @@ struct dvb_frontend* ttusbdecfe_dvbt_attach(const struct ttusbdecfe_config* conf | |||
157 | 157 | ||
158 | /* allocate memory for the internal state */ | 158 | /* allocate memory for the internal state */ |
159 | state = (struct ttusbdecfe_state*) kmalloc(sizeof(struct ttusbdecfe_state), GFP_KERNEL); | 159 | state = (struct ttusbdecfe_state*) kmalloc(sizeof(struct ttusbdecfe_state), GFP_KERNEL); |
160 | if (state == NULL) goto error; | 160 | if (state == NULL) |
161 | return NULL; | ||
161 | 162 | ||
162 | /* setup the state */ | 163 | /* setup the state */ |
163 | state->config = config; | 164 | state->config = config; |
@@ -167,10 +168,6 @@ struct dvb_frontend* ttusbdecfe_dvbt_attach(const struct ttusbdecfe_config* conf | |||
167 | state->frontend.ops = &state->ops; | 168 | state->frontend.ops = &state->ops; |
168 | state->frontend.demodulator_priv = state; | 169 | state->frontend.demodulator_priv = state; |
169 | return &state->frontend; | 170 | return &state->frontend; |
170 | |||
171 | error: | ||
172 | kfree(state); | ||
173 | return NULL; | ||
174 | } | 171 | } |
175 | 172 | ||
176 | static struct dvb_frontend_ops ttusbdecfe_dvbs_ops; | 173 | static struct dvb_frontend_ops ttusbdecfe_dvbs_ops; |
@@ -181,7 +178,8 @@ struct dvb_frontend* ttusbdecfe_dvbs_attach(const struct ttusbdecfe_config* conf | |||
181 | 178 | ||
182 | /* allocate memory for the internal state */ | 179 | /* allocate memory for the internal state */ |
183 | state = (struct ttusbdecfe_state*) kmalloc(sizeof(struct ttusbdecfe_state), GFP_KERNEL); | 180 | state = (struct ttusbdecfe_state*) kmalloc(sizeof(struct ttusbdecfe_state), GFP_KERNEL); |
184 | if (state == NULL) goto error; | 181 | if (state == NULL) |
182 | return NULL; | ||
185 | 183 | ||
186 | /* setup the state */ | 184 | /* setup the state */ |
187 | state->config = config; | 185 | state->config = config; |
@@ -193,10 +191,6 @@ struct dvb_frontend* ttusbdecfe_dvbs_attach(const struct ttusbdecfe_config* conf | |||
193 | state->frontend.ops = &state->ops; | 191 | state->frontend.ops = &state->ops; |
194 | state->frontend.demodulator_priv = state; | 192 | state->frontend.demodulator_priv = state; |
195 | return &state->frontend; | 193 | return &state->frontend; |
196 | |||
197 | error: | ||
198 | kfree(state); | ||
199 | return NULL; | ||
200 | } | 194 | } |
201 | 195 | ||
202 | static struct dvb_frontend_ops ttusbdecfe_dvbt_ops = { | 196 | static struct dvb_frontend_ops ttusbdecfe_dvbt_ops = { |
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index 1b70f8b0feb9..e771064689e6 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
@@ -344,6 +344,7 @@ config VIDEO_CX88_DVB | |||
344 | select DVB_MT352 | 344 | select DVB_MT352 |
345 | select DVB_OR51132 | 345 | select DVB_OR51132 |
346 | select DVB_CX22702 | 346 | select DVB_CX22702 |
347 | select DVB_LGDT3302 | ||
347 | ---help--- | 348 | ---help--- |
348 | This adds support for DVB/ATSC cards based on the | 349 | This adds support for DVB/ATSC cards based on the |
349 | Connexant 2388x chip. | 350 | Connexant 2388x chip. |
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c index b3fb04356b71..b0b47c3cde3c 100644 --- a/drivers/media/video/cx88/cx88-cards.c +++ b/drivers/media/video/cx88/cx88-cards.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88-cards.c,v 1.76 2005/06/08 01:28:09 mchehab Exp $ | 2 | * $Id: cx88-cards.c,v 1.85 2005/07/04 19:35:05 mkrufky Exp $ |
3 | * | 3 | * |
4 | * device driver for Conexant 2388x based TV cards | 4 | * device driver for Conexant 2388x based TV cards |
5 | * card-specific stuff. | 5 | * card-specific stuff. |
@@ -401,7 +401,7 @@ struct cx88_board cx88_boards[] = { | |||
401 | .dvb = 1, | 401 | .dvb = 1, |
402 | }, | 402 | }, |
403 | [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1] = { | 403 | [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1] = { |
404 | .name = "DVICO FusionHDTV DVB-T1", | 404 | .name = "DViCO FusionHDTV DVB-T1", |
405 | .tuner_type = TUNER_ABSENT, /* No analog tuner */ | 405 | .tuner_type = TUNER_ABSENT, /* No analog tuner */ |
406 | .radio_type = UNSET, | 406 | .radio_type = UNSET, |
407 | .tuner_addr = ADDR_UNSET, | 407 | .tuner_addr = ADDR_UNSET, |
@@ -445,8 +445,8 @@ struct cx88_board cx88_boards[] = { | |||
445 | .gpio0 = 0x000007f8, | 445 | .gpio0 = 0x000007f8, |
446 | }, | 446 | }, |
447 | }, | 447 | }, |
448 | [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD] = { | 448 | [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q] = { |
449 | .name = "DViCO - FusionHDTV 3 Gold", | 449 | .name = "DViCO FusionHDTV 3 Gold-Q", |
450 | .tuner_type = TUNER_MICROTUNE_4042FI5, | 450 | .tuner_type = TUNER_MICROTUNE_4042FI5, |
451 | .radio_type = UNSET, | 451 | .radio_type = UNSET, |
452 | .tuner_addr = ADDR_UNSET, | 452 | .tuner_addr = ADDR_UNSET, |
@@ -464,6 +464,9 @@ struct cx88_board cx88_boards[] = { | |||
464 | GPIO[3] selects RF input connector on tuner module | 464 | GPIO[3] selects RF input connector on tuner module |
465 | 0 - RF connector labeled CABLE | 465 | 0 - RF connector labeled CABLE |
466 | 1 - RF connector labeled ANT | 466 | 1 - RF connector labeled ANT |
467 | GPIO[4] selects high RF for QAM256 mode | ||
468 | 0 - normal RF | ||
469 | 1 - high RF | ||
467 | */ | 470 | */ |
468 | .input = {{ | 471 | .input = {{ |
469 | .type = CX88_VMUX_TELEVISION, | 472 | .type = CX88_VMUX_TELEVISION, |
@@ -482,6 +485,7 @@ struct cx88_board cx88_boards[] = { | |||
482 | .vmux = 2, | 485 | .vmux = 2, |
483 | .gpio0 = 0x0f00, | 486 | .gpio0 = 0x0f00, |
484 | }}, | 487 | }}, |
488 | .dvb = 1, | ||
485 | }, | 489 | }, |
486 | [CX88_BOARD_HAUPPAUGE_DVB_T1] = { | 490 | [CX88_BOARD_HAUPPAUGE_DVB_T1] = { |
487 | .name = "Hauppauge Nova-T DVB-T", | 491 | .name = "Hauppauge Nova-T DVB-T", |
@@ -520,7 +524,7 @@ struct cx88_board cx88_boards[] = { | |||
520 | .blackbird = 1, | 524 | .blackbird = 1, |
521 | }, | 525 | }, |
522 | [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS] = { | 526 | [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS] = { |
523 | .name = "DVICO FusionHDTV DVB-T Plus", | 527 | .name = "DViCO FusionHDTV DVB-T Plus", |
524 | .tuner_type = TUNER_ABSENT, /* No analog tuner */ | 528 | .tuner_type = TUNER_ABSENT, /* No analog tuner */ |
525 | .radio_type = UNSET, | 529 | .radio_type = UNSET, |
526 | .tuner_addr = ADDR_UNSET, | 530 | .tuner_addr = ADDR_UNSET, |
@@ -700,21 +704,17 @@ struct cx88_board cx88_boards[] = { | |||
700 | }, | 704 | }, |
701 | }, | 705 | }, |
702 | [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T] = { | 706 | [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T] = { |
703 | .name = "DViCO - FusionHDTV 3 Gold-T", | 707 | .name = "DViCO FusionHDTV 3 Gold-T", |
704 | .tuner_type = TUNER_THOMSON_DTT7611, | 708 | .tuner_type = TUNER_THOMSON_DTT7611, |
705 | .radio_type = UNSET, | 709 | .radio_type = UNSET, |
706 | .tuner_addr = ADDR_UNSET, | 710 | .tuner_addr = ADDR_UNSET, |
707 | .radio_addr = ADDR_UNSET, | 711 | .radio_addr = ADDR_UNSET, |
708 | /* See DViCO FusionHDTV 3 Gold for GPIO documentation. */ | 712 | /* See DViCO FusionHDTV 3 Gold-Q for GPIO documentation. */ |
709 | .input = {{ | 713 | .input = {{ |
710 | .type = CX88_VMUX_TELEVISION, | 714 | .type = CX88_VMUX_TELEVISION, |
711 | .vmux = 0, | 715 | .vmux = 0, |
712 | .gpio0 = 0x0f0d, | 716 | .gpio0 = 0x0f0d, |
713 | },{ | 717 | },{ |
714 | .type = CX88_VMUX_CABLE, | ||
715 | .vmux = 0, | ||
716 | .gpio0 = 0x0f05, | ||
717 | },{ | ||
718 | .type = CX88_VMUX_COMPOSITE1, | 718 | .type = CX88_VMUX_COMPOSITE1, |
719 | .vmux = 1, | 719 | .vmux = 1, |
720 | .gpio0 = 0x0f00, | 720 | .gpio0 = 0x0f00, |
@@ -723,7 +723,36 @@ struct cx88_board cx88_boards[] = { | |||
723 | .vmux = 2, | 723 | .vmux = 2, |
724 | .gpio0 = 0x0f00, | 724 | .gpio0 = 0x0f00, |
725 | }}, | 725 | }}, |
726 | .dvb = 1, | ||
726 | }, | 727 | }, |
728 | [CX88_BOARD_ADSTECH_DVB_T_PCI] = { | ||
729 | .name = "ADS Tech Instant TV DVB-T PCI", | ||
730 | .tuner_type = TUNER_ABSENT, | ||
731 | .radio_type = UNSET, | ||
732 | .tuner_addr = ADDR_UNSET, | ||
733 | .radio_addr = ADDR_UNSET, | ||
734 | .input = {{ | ||
735 | .type = CX88_VMUX_COMPOSITE1, | ||
736 | .vmux = 1, | ||
737 | .gpio0 = 0x0700, | ||
738 | .gpio2 = 0x0101, | ||
739 | },{ | ||
740 | .type = CX88_VMUX_SVIDEO, | ||
741 | .vmux = 2, | ||
742 | .gpio0 = 0x0700, | ||
743 | .gpio2 = 0x0101, | ||
744 | }}, | ||
745 | .dvb = 1, | ||
746 | }, | ||
747 | [CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1] = { | ||
748 | .name = "TerraTec Cinergy 1400 DVB-T", | ||
749 | .tuner_type = TUNER_ABSENT, | ||
750 | .input = {{ | ||
751 | .type = CX88_VMUX_DVB, | ||
752 | .vmux = 0, | ||
753 | }}, | ||
754 | .dvb = 1, | ||
755 | }, | ||
727 | }; | 756 | }; |
728 | const unsigned int cx88_bcount = ARRAY_SIZE(cx88_boards); | 757 | const unsigned int cx88_bcount = ARRAY_SIZE(cx88_boards); |
729 | 758 | ||
@@ -794,7 +823,7 @@ struct cx88_subid cx88_subids[] = { | |||
794 | },{ | 823 | },{ |
795 | .subvendor = 0x18ac, | 824 | .subvendor = 0x18ac, |
796 | .subdevice = 0xd810, | 825 | .subdevice = 0xd810, |
797 | .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD, | 826 | .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q, |
798 | },{ | 827 | },{ |
799 | .subvendor = 0x18ac, | 828 | .subvendor = 0x18ac, |
800 | .subdevice = 0xd820, | 829 | .subdevice = 0xd820, |
@@ -843,7 +872,15 @@ struct cx88_subid cx88_subids[] = { | |||
843 | .subvendor = 0x10fc, | 872 | .subvendor = 0x10fc, |
844 | .subdevice = 0xd035, | 873 | .subdevice = 0xd035, |
845 | .card = CX88_BOARD_IODATA_GVBCTV7E, | 874 | .card = CX88_BOARD_IODATA_GVBCTV7E, |
846 | } | 875 | },{ |
876 | .subvendor = 0x1421, | ||
877 | .subdevice = 0x0334, | ||
878 | .card = CX88_BOARD_ADSTECH_DVB_T_PCI, | ||
879 | },{ | ||
880 | .subvendor = 0x153b, | ||
881 | .subdevice = 0x1166, | ||
882 | .card = CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1, | ||
883 | }, | ||
847 | }; | 884 | }; |
848 | const unsigned int cx88_idcount = ARRAY_SIZE(cx88_subids); | 885 | const unsigned int cx88_idcount = ARRAY_SIZE(cx88_subids); |
849 | 886 | ||
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c index c046a23537d3..96cb0ff33bbd 100644 --- a/drivers/media/video/cx88/cx88-core.c +++ b/drivers/media/video/cx88/cx88-core.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88-core.c,v 1.28 2005/06/12 04:19:19 mchehab Exp $ | 2 | * $Id: cx88-core.c,v 1.31 2005/06/22 22:58:04 mchehab Exp $ |
3 | * | 3 | * |
4 | * device driver for Conexant 2388x based TV cards | 4 | * device driver for Conexant 2388x based TV cards |
5 | * driver core | 5 | * driver core |
@@ -545,12 +545,14 @@ void cx88_sram_channel_dump(struct cx88_core *core, | |||
545 | core->name,cx_read(ch->cnt2_reg)); | 545 | core->name,cx_read(ch->cnt2_reg)); |
546 | } | 546 | } |
547 | 547 | ||
548 | /* Used only on cx88-core */ | ||
548 | static char *cx88_pci_irqs[32] = { | 549 | static char *cx88_pci_irqs[32] = { |
549 | "vid", "aud", "ts", "vip", "hst", "5", "6", "tm1", | 550 | "vid", "aud", "ts", "vip", "hst", "5", "6", "tm1", |
550 | "src_dma", "dst_dma", "risc_rd_err", "risc_wr_err", | 551 | "src_dma", "dst_dma", "risc_rd_err", "risc_wr_err", |
551 | "brdg_err", "src_dma_err", "dst_dma_err", "ipb_dma_err", | 552 | "brdg_err", "src_dma_err", "dst_dma_err", "ipb_dma_err", |
552 | "i2c", "i2c_rack", "ir_smp", "gpio0", "gpio1" | 553 | "i2c", "i2c_rack", "ir_smp", "gpio0", "gpio1" |
553 | }; | 554 | }; |
555 | /* Used only on cx88-video */ | ||
554 | char *cx88_vid_irqs[32] = { | 556 | char *cx88_vid_irqs[32] = { |
555 | "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", | 557 | "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", |
556 | "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", | 558 | "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", |
@@ -558,6 +560,7 @@ char *cx88_vid_irqs[32] = { | |||
558 | "y_sync", "u_sync", "v_sync", "vbi_sync", | 560 | "y_sync", "u_sync", "v_sync", "vbi_sync", |
559 | "opc_err", "par_err", "rip_err", "pci_abort", | 561 | "opc_err", "par_err", "rip_err", "pci_abort", |
560 | }; | 562 | }; |
563 | /* Used only on cx88-mpeg */ | ||
561 | char *cx88_mpeg_irqs[32] = { | 564 | char *cx88_mpeg_irqs[32] = { |
562 | "ts_risci1", NULL, NULL, NULL, | 565 | "ts_risci1", NULL, NULL, NULL, |
563 | "ts_risci2", NULL, NULL, NULL, | 566 | "ts_risci2", NULL, NULL, NULL, |
@@ -1006,21 +1009,7 @@ int cx88_set_tvnorm(struct cx88_core *core, struct cx88_tvnorm *norm) | |||
1006 | set_tvaudio(core); | 1009 | set_tvaudio(core); |
1007 | 1010 | ||
1008 | // tell i2c chips | 1011 | // tell i2c chips |
1009 | #ifdef V4L2_I2C_CLIENTS | ||
1010 | cx88_call_i2c_clients(core,VIDIOC_S_STD,&norm->id); | 1012 | cx88_call_i2c_clients(core,VIDIOC_S_STD,&norm->id); |
1011 | #else | ||
1012 | { | ||
1013 | struct video_channel c; | ||
1014 | memset(&c,0,sizeof(c)); | ||
1015 | c.channel = core->input; | ||
1016 | c.norm = VIDEO_MODE_PAL; | ||
1017 | if ((norm->id & (V4L2_STD_NTSC_M|V4L2_STD_NTSC_M_JP))) | ||
1018 | c.norm = VIDEO_MODE_NTSC; | ||
1019 | if (norm->id & V4L2_STD_SECAM) | ||
1020 | c.norm = VIDEO_MODE_SECAM; | ||
1021 | cx88_call_i2c_clients(core,VIDIOCSCHAN,&c); | ||
1022 | } | ||
1023 | #endif | ||
1024 | 1013 | ||
1025 | // done | 1014 | // done |
1026 | return 0; | 1015 | return 0; |
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c index 1a259c3966cd..690477a67917 100644 --- a/drivers/media/video/cx88/cx88-dvb.c +++ b/drivers/media/video/cx88/cx88-dvb.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88-dvb.c,v 1.33 2005/06/12 04:19:19 mchehab Exp $ | 2 | * $Id: cx88-dvb.c,v 1.39 2005/07/02 20:00:46 mkrufky Exp $ |
3 | * | 3 | * |
4 | * device driver for Conexant 2388x based TV cards | 4 | * device driver for Conexant 2388x based TV cards |
5 | * MPEG Transport Stream (DVB) routines | 5 | * MPEG Transport Stream (DVB) routines |
@@ -30,9 +30,10 @@ | |||
30 | #include <linux/file.h> | 30 | #include <linux/file.h> |
31 | #include <linux/suspend.h> | 31 | #include <linux/suspend.h> |
32 | 32 | ||
33 | /* those two frontends need merging via linuxtv cvs ... */ | 33 | /* these three frontends need merging via linuxtv cvs ... */ |
34 | #define HAVE_CX22702 1 | 34 | #define HAVE_CX22702 1 |
35 | #define HAVE_OR51132 1 | 35 | #define HAVE_OR51132 1 |
36 | #define HAVE_LGDT3302 1 | ||
36 | 37 | ||
37 | #include "cx88.h" | 38 | #include "cx88.h" |
38 | #include "dvb-pll.h" | 39 | #include "dvb-pll.h" |
@@ -44,6 +45,9 @@ | |||
44 | #if HAVE_OR51132 | 45 | #if HAVE_OR51132 |
45 | # include "or51132.h" | 46 | # include "or51132.h" |
46 | #endif | 47 | #endif |
48 | #if HAVE_LGDT3302 | ||
49 | # include "lgdt3302.h" | ||
50 | #endif | ||
47 | 51 | ||
48 | MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); | 52 | MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); |
49 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); | 53 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); |
@@ -199,6 +203,32 @@ static struct or51132_config pchdtv_hd3000 = { | |||
199 | }; | 203 | }; |
200 | #endif | 204 | #endif |
201 | 205 | ||
206 | #if HAVE_LGDT3302 | ||
207 | static int lgdt3302_set_ts_param(struct dvb_frontend* fe, int is_punctured) | ||
208 | { | ||
209 | struct cx8802_dev *dev= fe->dvb->priv; | ||
210 | if (is_punctured) | ||
211 | dev->ts_gen_cntrl |= 0x04; | ||
212 | else | ||
213 | dev->ts_gen_cntrl &= ~0x04; | ||
214 | return 0; | ||
215 | } | ||
216 | |||
217 | static struct lgdt3302_config fusionhdtv_3_gold_q = { | ||
218 | .demod_address = 0x0e, | ||
219 | .pll_address = 0x61, | ||
220 | .pll_desc = &dvb_pll_microtune_4042, | ||
221 | .set_ts_params = lgdt3302_set_ts_param, | ||
222 | }; | ||
223 | |||
224 | static struct lgdt3302_config fusionhdtv_3_gold_t = { | ||
225 | .demod_address = 0x0e, | ||
226 | .pll_address = 0x61, | ||
227 | .pll_desc = &dvb_pll_thomson_dtt7611, | ||
228 | .set_ts_params = lgdt3302_set_ts_param, | ||
229 | }; | ||
230 | #endif | ||
231 | |||
202 | static int dvb_register(struct cx8802_dev *dev) | 232 | static int dvb_register(struct cx8802_dev *dev) |
203 | { | 233 | { |
204 | /* init struct videobuf_dvb */ | 234 | /* init struct videobuf_dvb */ |
@@ -212,6 +242,7 @@ static int dvb_register(struct cx8802_dev *dev) | |||
212 | dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config, | 242 | dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config, |
213 | &dev->core->i2c_adap); | 243 | &dev->core->i2c_adap); |
214 | break; | 244 | break; |
245 | case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: | ||
215 | case CX88_BOARD_CONEXANT_DVB_T1: | 246 | case CX88_BOARD_CONEXANT_DVB_T1: |
216 | dev->dvb.frontend = cx22702_attach(&connexant_refboard_config, | 247 | dev->dvb.frontend = cx22702_attach(&connexant_refboard_config, |
217 | &dev->core->i2c_adap); | 248 | &dev->core->i2c_adap); |
@@ -231,6 +262,7 @@ static int dvb_register(struct cx8802_dev *dev) | |||
231 | break; | 262 | break; |
232 | case CX88_BOARD_KWORLD_DVB_T: | 263 | case CX88_BOARD_KWORLD_DVB_T: |
233 | case CX88_BOARD_DNTV_LIVE_DVB_T: | 264 | case CX88_BOARD_DNTV_LIVE_DVB_T: |
265 | case CX88_BOARD_ADSTECH_DVB_T_PCI: | ||
234 | dev->core->pll_addr = 0x61; | 266 | dev->core->pll_addr = 0x61; |
235 | dev->core->pll_desc = &dvb_pll_unknown_1; | 267 | dev->core->pll_desc = &dvb_pll_unknown_1; |
236 | dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config, | 268 | dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config, |
@@ -242,6 +274,36 @@ static int dvb_register(struct cx8802_dev *dev) | |||
242 | &dev->core->i2c_adap); | 274 | &dev->core->i2c_adap); |
243 | break; | 275 | break; |
244 | #endif | 276 | #endif |
277 | #if HAVE_LGDT3302 | ||
278 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: | ||
279 | dev->ts_gen_cntrl = 0x08; | ||
280 | { | ||
281 | /* Do a hardware reset of chip before using it. */ | ||
282 | struct cx88_core *core = dev->core; | ||
283 | |||
284 | cx_clear(MO_GP0_IO, 1); | ||
285 | mdelay(100); | ||
286 | cx_set(MO_GP0_IO, 9); // ANT connector too FIXME | ||
287 | mdelay(200); | ||
288 | dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold_q, | ||
289 | &dev->core->i2c_adap); | ||
290 | } | ||
291 | break; | ||
292 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: | ||
293 | dev->ts_gen_cntrl = 0x08; | ||
294 | { | ||
295 | /* Do a hardware reset of chip before using it. */ | ||
296 | struct cx88_core *core = dev->core; | ||
297 | |||
298 | cx_clear(MO_GP0_IO, 1); | ||
299 | mdelay(100); | ||
300 | cx_set(MO_GP0_IO, 9); /* ANT connector too FIXME */ | ||
301 | mdelay(200); | ||
302 | dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold_t, | ||
303 | &dev->core->i2c_adap); | ||
304 | } | ||
305 | break; | ||
306 | #endif | ||
245 | default: | 307 | default: |
246 | printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n", | 308 | printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n", |
247 | dev->core->name); | 309 | dev->core->name); |
diff --git a/drivers/media/video/cx88/cx88-i2c.c b/drivers/media/video/cx88/cx88-i2c.c index e20adefcfc6c..b5342234b305 100644 --- a/drivers/media/video/cx88/cx88-i2c.c +++ b/drivers/media/video/cx88/cx88-i2c.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | $Id: cx88-i2c.c,v 1.23 2005/06/12 04:19:19 mchehab Exp $ | 2 | $Id: cx88-i2c.c,v 1.24 2005/06/17 18:46:23 mkrufky Exp $ |
3 | 3 | ||
4 | cx88-i2c.c -- all the i2c code is here | 4 | cx88-i2c.c -- all the i2c code is here |
5 | 5 | ||
@@ -157,6 +157,7 @@ static struct i2c_client cx8800_i2c_client_template = { | |||
157 | }; | 157 | }; |
158 | 158 | ||
159 | static char *i2c_devs[128] = { | 159 | static char *i2c_devs[128] = { |
160 | [ 0x1c >> 1 ] = "lgdt3302", | ||
160 | [ 0x86 >> 1 ] = "tda9887/cx22702", | 161 | [ 0x86 >> 1 ] = "tda9887/cx22702", |
161 | [ 0xa0 >> 1 ] = "eeprom", | 162 | [ 0xa0 >> 1 ] = "eeprom", |
162 | [ 0xc0 >> 1 ] = "tuner (analog)", | 163 | [ 0xc0 >> 1 ] = "tuner (analog)", |
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c index dc0dcf249aac..bdc26e75ab5f 100644 --- a/drivers/media/video/cx88/cx88-input.c +++ b/drivers/media/video/cx88/cx88-input.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88-input.c,v 1.11 2005/05/22 20:57:56 nsh Exp $ | 2 | * $Id: cx88-input.c,v 1.13 2005/06/13 16:07:46 nsh Exp $ |
3 | * | 3 | * |
4 | * Device driver for GPIO attached remote control interfaces | 4 | * Device driver for GPIO attached remote control interfaces |
5 | * on Conexant 2388x based TV/DVB cards. | 5 | * on Conexant 2388x based TV/DVB cards. |
@@ -125,6 +125,86 @@ static IR_KEYTAB_TYPE ir_codes_iodata_bctv7e[IR_KEYTAB_SIZE] = { | |||
125 | 125 | ||
126 | /* ---------------------------------------------------------------------- */ | 126 | /* ---------------------------------------------------------------------- */ |
127 | 127 | ||
128 | /* ADS Tech Instant TV DVB-T PCI Remote */ | ||
129 | static IR_KEYTAB_TYPE ir_codes_adstech_dvb_t_pci[IR_KEYTAB_SIZE] = { | ||
130 | [ 0x5b ] = KEY_POWER, | ||
131 | [ 0x5f ] = KEY_MUTE, | ||
132 | [ 0x57 ] = KEY_1, | ||
133 | [ 0x4f ] = KEY_2, | ||
134 | [ 0x53 ] = KEY_3, | ||
135 | [ 0x56 ] = KEY_4, | ||
136 | [ 0x4e ] = KEY_5, | ||
137 | [ 0x5e ] = KEY_6, | ||
138 | [ 0x54 ] = KEY_7, | ||
139 | [ 0x4c ] = KEY_8, | ||
140 | [ 0x5c ] = KEY_9, | ||
141 | [ 0x4d ] = KEY_0, | ||
142 | [ 0x55 ] = KEY_GOTO, | ||
143 | [ 0x5d ] = KEY_SEARCH, | ||
144 | [ 0x17 ] = KEY_EPG, // Guide | ||
145 | [ 0x1f ] = KEY_MENU, | ||
146 | [ 0x0f ] = KEY_UP, | ||
147 | [ 0x46 ] = KEY_DOWN, | ||
148 | [ 0x16 ] = KEY_LEFT, | ||
149 | [ 0x1e ] = KEY_RIGHT, | ||
150 | [ 0x0e ] = KEY_SELECT, // Enter | ||
151 | [ 0x5a ] = KEY_INFO, | ||
152 | [ 0x52 ] = KEY_EXIT, | ||
153 | [ 0x59 ] = KEY_PREVIOUS, | ||
154 | [ 0x51 ] = KEY_NEXT, | ||
155 | [ 0x58 ] = KEY_REWIND, | ||
156 | [ 0x50 ] = KEY_FORWARD, | ||
157 | [ 0x44 ] = KEY_PLAYPAUSE, | ||
158 | [ 0x07 ] = KEY_STOP, | ||
159 | [ 0x1b ] = KEY_RECORD, | ||
160 | [ 0x13 ] = KEY_TUNER, // Live | ||
161 | [ 0x0a ] = KEY_A, | ||
162 | [ 0x12 ] = KEY_B, | ||
163 | [ 0x03 ] = KEY_PROG1, // 1 | ||
164 | [ 0x01 ] = KEY_PROG2, // 2 | ||
165 | [ 0x00 ] = KEY_PROG3, // 3 | ||
166 | [ 0x06 ] = KEY_DVD, | ||
167 | [ 0x48 ] = KEY_AUX, // Photo | ||
168 | [ 0x40 ] = KEY_VIDEO, | ||
169 | [ 0x19 ] = KEY_AUDIO, // Music | ||
170 | [ 0x0b ] = KEY_CHANNELUP, | ||
171 | [ 0x08 ] = KEY_CHANNELDOWN, | ||
172 | [ 0x15 ] = KEY_VOLUMEUP, | ||
173 | [ 0x1c ] = KEY_VOLUMEDOWN, | ||
174 | }; | ||
175 | |||
176 | /* ---------------------------------------------------------------------- */ | ||
177 | |||
178 | /* MSI TV@nywhere remote */ | ||
179 | static IR_KEYTAB_TYPE ir_codes_msi_tvanywhere[IR_KEYTAB_SIZE] = { | ||
180 | [ 0x00 ] = KEY_0, /* '0' */ | ||
181 | [ 0x01 ] = KEY_1, /* '1' */ | ||
182 | [ 0x02 ] = KEY_2, /* '2' */ | ||
183 | [ 0x03 ] = KEY_3, /* '3' */ | ||
184 | [ 0x04 ] = KEY_4, /* '4' */ | ||
185 | [ 0x05 ] = KEY_5, /* '5' */ | ||
186 | [ 0x06 ] = KEY_6, /* '6' */ | ||
187 | [ 0x07 ] = KEY_7, /* '7' */ | ||
188 | [ 0x08 ] = KEY_8, /* '8' */ | ||
189 | [ 0x09 ] = KEY_9, /* '9' */ | ||
190 | [ 0x0c ] = KEY_MUTE, /* 'Mute' */ | ||
191 | [ 0x0f ] = KEY_SCREEN, /* 'Full Screen' */ | ||
192 | [ 0x10 ] = KEY_F, /* 'Funtion' */ | ||
193 | [ 0x11 ] = KEY_T, /* 'Time shift' */ | ||
194 | [ 0x12 ] = KEY_POWER, /* 'Power' */ | ||
195 | [ 0x13 ] = KEY_MEDIA, /* 'MTS' */ | ||
196 | [ 0x14 ] = KEY_SLOW, /* 'Slow' */ | ||
197 | [ 0x16 ] = KEY_REWIND, /* 'backward <<' */ | ||
198 | [ 0x17 ] = KEY_ENTER, /* 'Return' */ | ||
199 | [ 0x18 ] = KEY_FASTFORWARD, /* 'forward >>' */ | ||
200 | [ 0x1a ] = KEY_CHANNELUP, /* 'Channel+' */ | ||
201 | [ 0x1b ] = KEY_VOLUMEUP, /* 'Volume+' */ | ||
202 | [ 0x1e ] = KEY_CHANNELDOWN, /* 'Channel-' */ | ||
203 | [ 0x1f ] = KEY_VOLUMEDOWN, /* 'Volume-' */ | ||
204 | }; | ||
205 | |||
206 | /* ---------------------------------------------------------------------- */ | ||
207 | |||
128 | struct cx88_IR { | 208 | struct cx88_IR { |
129 | struct cx88_core *core; | 209 | struct cx88_core *core; |
130 | struct input_dev input; | 210 | struct input_dev input; |
@@ -269,6 +349,20 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) | |||
269 | ir->mask_keyup = 0x80; | 349 | ir->mask_keyup = 0x80; |
270 | ir->polling = 1; // ms | 350 | ir->polling = 1; // ms |
271 | break; | 351 | break; |
352 | case CX88_BOARD_ADSTECH_DVB_T_PCI: | ||
353 | ir_codes = ir_codes_adstech_dvb_t_pci; | ||
354 | ir->gpio_addr = MO_GP1_IO; | ||
355 | ir->mask_keycode = 0xbf; | ||
356 | ir->mask_keyup = 0x40; | ||
357 | ir->polling = 50; // ms | ||
358 | break; | ||
359 | case CX88_BOARD_MSI_TVANYWHERE_MASTER: | ||
360 | ir_codes = ir_codes_msi_tvanywhere; | ||
361 | ir->gpio_addr = MO_GP1_IO; | ||
362 | ir->mask_keycode = 0x1f; | ||
363 | ir->mask_keyup = 0x40; | ||
364 | ir->polling = 1; | ||
365 | break; | ||
272 | } | 366 | } |
273 | 367 | ||
274 | if (NULL == ir_codes) { | 368 | if (NULL == ir_codes) { |
diff --git a/drivers/media/video/cx88/cx88-mpeg.c b/drivers/media/video/cx88/cx88-mpeg.c index 9ade2ae91e9b..85da6dc8d0e0 100644 --- a/drivers/media/video/cx88/cx88-mpeg.c +++ b/drivers/media/video/cx88/cx88-mpeg.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88-mpeg.c,v 1.26 2005/06/03 13:31:51 mchehab Exp $ | 2 | * $Id: cx88-mpeg.c,v 1.30 2005/07/05 19:44:40 mkrufky Exp $ |
3 | * | 3 | * |
4 | * Support for the mpeg transport stream transfers | 4 | * Support for the mpeg transport stream transfers |
5 | * PCI function #2 of the cx2388x. | 5 | * PCI function #2 of the cx2388x. |
@@ -70,11 +70,16 @@ static int cx8802_start_dma(struct cx8802_dev *dev, | |||
70 | 70 | ||
71 | if (cx88_boards[core->board].dvb) { | 71 | if (cx88_boards[core->board].dvb) { |
72 | /* negedge driven & software reset */ | 72 | /* negedge driven & software reset */ |
73 | cx_write(TS_GEN_CNTRL, 0x40); | 73 | cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl); |
74 | udelay(100); | 74 | udelay(100); |
75 | cx_write(MO_PINMUX_IO, 0x00); | 75 | cx_write(MO_PINMUX_IO, 0x00); |
76 | cx_write(TS_HW_SOP_CNTRL,47<<16|188<<4|0x00); | 76 | cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01); |
77 | cx_write(TS_SOP_STAT,0x00); | 77 | if ((core->board == CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q) || |
78 | (core->board == CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T)) { | ||
79 | cx_write(TS_SOP_STAT, 0<<16 | 0<<14 | 1<<13 | 0<<12); | ||
80 | } else { | ||
81 | cx_write(TS_SOP_STAT,0x00); | ||
82 | } | ||
78 | cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl); | 83 | cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl); |
79 | udelay(100); | 84 | udelay(100); |
80 | } | 85 | } |
diff --git a/drivers/media/video/cx88/cx88-video.c b/drivers/media/video/cx88/cx88-video.c index e4ca7350df15..dc997549b634 100644 --- a/drivers/media/video/cx88/cx88-video.c +++ b/drivers/media/video/cx88/cx88-video.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88-video.c,v 1.63 2005/06/12 04:19:19 mchehab Exp $ | 2 | * $Id: cx88-video.c,v 1.70 2005/06/20 03:36:00 mkrufky Exp $ |
3 | * | 3 | * |
4 | * device driver for Conexant 2388x based TV cards | 4 | * device driver for Conexant 2388x based TV cards |
5 | * video4linux video interface | 5 | * video4linux video interface |
@@ -261,7 +261,7 @@ static struct cx88_ctrl cx8800_ctls[] = { | |||
261 | .default_value = 0, | 261 | .default_value = 0, |
262 | .type = V4L2_CTRL_TYPE_INTEGER, | 262 | .type = V4L2_CTRL_TYPE_INTEGER, |
263 | }, | 263 | }, |
264 | .off = 0, | 264 | .off = 128, |
265 | .reg = MO_HUE, | 265 | .reg = MO_HUE, |
266 | .mask = 0x00ff, | 266 | .mask = 0x00ff, |
267 | .shift = 0, | 267 | .shift = 0, |
@@ -1351,9 +1351,6 @@ static int video_do_ioctl(struct inode *inode, struct file *file, | |||
1351 | V4L2_CAP_STREAMING | | 1351 | V4L2_CAP_STREAMING | |
1352 | V4L2_CAP_VBI_CAPTURE | | 1352 | V4L2_CAP_VBI_CAPTURE | |
1353 | #if 0 | 1353 | #if 0 |
1354 | V4L2_TUNER_CAP_LOW | | ||
1355 | #endif | ||
1356 | #if 0 | ||
1357 | V4L2_CAP_VIDEO_OVERLAY | | 1354 | V4L2_CAP_VIDEO_OVERLAY | |
1358 | #endif | 1355 | #endif |
1359 | 0; | 1356 | 0; |
@@ -1475,7 +1472,7 @@ static int video_do_ioctl(struct inode *inode, struct file *file, | |||
1475 | } | 1472 | } |
1476 | break; | 1473 | break; |
1477 | case 1: | 1474 | case 1: |
1478 | if (CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD == core->board) { | 1475 | if (CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q == core->board) { |
1479 | strcpy(a->name,"Line In"); | 1476 | strcpy(a->name,"Line In"); |
1480 | a->capability = V4L2_AUDCAP_STEREO; | 1477 | a->capability = V4L2_AUDCAP_STEREO; |
1481 | return 0; | 1478 | return 0; |
@@ -1588,11 +1585,11 @@ static int video_do_ioctl(struct inode *inode, struct file *file, | |||
1588 | { | 1585 | { |
1589 | struct v4l2_frequency *f = arg; | 1586 | struct v4l2_frequency *f = arg; |
1590 | 1587 | ||
1588 | memset(f,0,sizeof(*f)); | ||
1589 | |||
1591 | if (UNSET == core->tuner_type) | 1590 | if (UNSET == core->tuner_type) |
1592 | return -EINVAL; | 1591 | return -EINVAL; |
1593 | if (f->tuner != 0) | 1592 | |
1594 | return -EINVAL; | ||
1595 | memset(f,0,sizeof(*f)); | ||
1596 | f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; | 1593 | f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; |
1597 | f->frequency = dev->freq; | 1594 | f->frequency = dev->freq; |
1598 | return 0; | 1595 | return 0; |
@@ -1612,11 +1609,7 @@ static int video_do_ioctl(struct inode *inode, struct file *file, | |||
1612 | down(&dev->lock); | 1609 | down(&dev->lock); |
1613 | dev->freq = f->frequency; | 1610 | dev->freq = f->frequency; |
1614 | cx88_newstation(core); | 1611 | cx88_newstation(core); |
1615 | #ifdef V4L2_I2C_CLIENTS | ||
1616 | cx88_call_i2c_clients(dev->core,VIDIOC_S_FREQUENCY,f); | 1612 | cx88_call_i2c_clients(dev->core,VIDIOC_S_FREQUENCY,f); |
1617 | #else | ||
1618 | cx88_call_i2c_clients(dev->core,VIDIOCSFREQ,&dev->freq); | ||
1619 | #endif | ||
1620 | up(&dev->lock); | 1613 | up(&dev->lock); |
1621 | return 0; | 1614 | return 0; |
1622 | } | 1615 | } |
@@ -1714,11 +1707,7 @@ static int radio_do_ioctl(struct inode *inode, struct file *file, | |||
1714 | sizeof(cap->card)); | 1707 | sizeof(cap->card)); |
1715 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); | 1708 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); |
1716 | cap->version = CX88_VERSION_CODE; | 1709 | cap->version = CX88_VERSION_CODE; |
1717 | cap->capabilities = V4L2_CAP_TUNER | 1710 | cap->capabilities = V4L2_CAP_TUNER; |
1718 | #if 0 | ||
1719 | | V4L2_TUNER_CAP_LOW | ||
1720 | #endif | ||
1721 | ; | ||
1722 | return 0; | 1711 | return 0; |
1723 | } | 1712 | } |
1724 | case VIDIOC_G_TUNER: | 1713 | case VIDIOC_G_TUNER: |
@@ -1730,19 +1719,8 @@ static int radio_do_ioctl(struct inode *inode, struct file *file, | |||
1730 | 1719 | ||
1731 | memset(t,0,sizeof(*t)); | 1720 | memset(t,0,sizeof(*t)); |
1732 | strcpy(t->name, "Radio"); | 1721 | strcpy(t->name, "Radio"); |
1733 | t->rangelow = (int)(65*16); | ||
1734 | t->rangehigh = (int)(108*16); | ||
1735 | 1722 | ||
1736 | #ifdef V4L2_I2C_CLIENTS | ||
1737 | cx88_call_i2c_clients(dev->core,VIDIOC_G_TUNER,t); | 1723 | cx88_call_i2c_clients(dev->core,VIDIOC_G_TUNER,t); |
1738 | #else | ||
1739 | { | ||
1740 | struct video_tuner vt; | ||
1741 | memset(&vt,0,sizeof(vt)); | ||
1742 | cx88_call_i2c_clients(dev,VIDIOCGTUNER,&vt); | ||
1743 | t->signal = vt.signal; | ||
1744 | } | ||
1745 | #endif | ||
1746 | return 0; | 1724 | return 0; |
1747 | } | 1725 | } |
1748 | case VIDIOC_ENUMINPUT: | 1726 | case VIDIOC_ENUMINPUT: |
@@ -1775,8 +1753,29 @@ static int radio_do_ioctl(struct inode *inode, struct file *file, | |||
1775 | *id = 0; | 1753 | *id = 0; |
1776 | return 0; | 1754 | return 0; |
1777 | } | 1755 | } |
1778 | case VIDIOC_S_AUDIO: | 1756 | case VIDIOCSTUNER: |
1757 | { | ||
1758 | struct video_tuner *v = arg; | ||
1759 | |||
1760 | if (v->tuner) /* Only tuner 0 */ | ||
1761 | return -EINVAL; | ||
1762 | |||
1763 | cx88_call_i2c_clients(dev->core,VIDIOCSTUNER,v); | ||
1764 | return 0; | ||
1765 | } | ||
1779 | case VIDIOC_S_TUNER: | 1766 | case VIDIOC_S_TUNER: |
1767 | { | ||
1768 | struct v4l2_tuner *t = arg; | ||
1769 | |||
1770 | if (0 != t->index) | ||
1771 | return -EINVAL; | ||
1772 | |||
1773 | cx88_call_i2c_clients(dev->core,VIDIOC_S_TUNER,t); | ||
1774 | |||
1775 | return 0; | ||
1776 | } | ||
1777 | |||
1778 | case VIDIOC_S_AUDIO: | ||
1780 | case VIDIOC_S_INPUT: | 1779 | case VIDIOC_S_INPUT: |
1781 | case VIDIOC_S_STD: | 1780 | case VIDIOC_S_STD: |
1782 | return 0; | 1781 | return 0; |
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h index 867e988a5a93..bc5e038bc0fe 100644 --- a/drivers/media/video/cx88/cx88.h +++ b/drivers/media/video/cx88/cx88.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cx88.h,v 1.62 2005/06/12 04:19:19 mchehab Exp $ | 2 | * $Id: cx88.h,v 1.67 2005/07/01 12:10:07 mkrufky Exp $ |
3 | * | 3 | * |
4 | * v4l2 device driver for cx2388x based TV cards | 4 | * v4l2 device driver for cx2388x based TV cards |
5 | * | 5 | * |
@@ -51,8 +51,6 @@ | |||
51 | /* ----------------------------------------------------------- */ | 51 | /* ----------------------------------------------------------- */ |
52 | /* defines and enums */ | 52 | /* defines and enums */ |
53 | 53 | ||
54 | #define V4L2_I2C_CLIENTS 1 | ||
55 | |||
56 | #define FORMAT_FLAGS_PACKED 0x01 | 54 | #define FORMAT_FLAGS_PACKED 0x01 |
57 | #define FORMAT_FLAGS_PLANAR 0x02 | 55 | #define FORMAT_FLAGS_PLANAR 0x02 |
58 | 56 | ||
@@ -159,7 +157,7 @@ extern struct sram_channel cx88_sram_channels[]; | |||
159 | #define CX88_BOARD_KWORLD_DVB_T 14 | 157 | #define CX88_BOARD_KWORLD_DVB_T 14 |
160 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15 | 158 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15 |
161 | #define CX88_BOARD_KWORLD_LTV883 16 | 159 | #define CX88_BOARD_KWORLD_LTV883 16 |
162 | #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD 17 | 160 | #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q 17 |
163 | #define CX88_BOARD_HAUPPAUGE_DVB_T1 18 | 161 | #define CX88_BOARD_HAUPPAUGE_DVB_T1 18 |
164 | #define CX88_BOARD_CONEXANT_DVB_T1 19 | 162 | #define CX88_BOARD_CONEXANT_DVB_T1 19 |
165 | #define CX88_BOARD_PROVIDEO_PV259 20 | 163 | #define CX88_BOARD_PROVIDEO_PV259 20 |
@@ -167,10 +165,12 @@ extern struct sram_channel cx88_sram_channels[]; | |||
167 | #define CX88_BOARD_PCHDTV_HD3000 22 | 165 | #define CX88_BOARD_PCHDTV_HD3000 22 |
168 | #define CX88_BOARD_DNTV_LIVE_DVB_T 23 | 166 | #define CX88_BOARD_DNTV_LIVE_DVB_T 23 |
169 | #define CX88_BOARD_HAUPPAUGE_ROSLYN 24 | 167 | #define CX88_BOARD_HAUPPAUGE_ROSLYN 24 |
170 | #define CX88_BOARD_DIGITALLOGIC_MEC 25 | 168 | #define CX88_BOARD_DIGITALLOGIC_MEC 25 |
171 | #define CX88_BOARD_IODATA_GVBCTV7E 26 | 169 | #define CX88_BOARD_IODATA_GVBCTV7E 26 |
172 | #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27 | 170 | #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27 |
173 | #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T 28 | 171 | #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T 28 |
172 | #define CX88_BOARD_ADSTECH_DVB_T_PCI 29 | ||
173 | #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1 30 | ||
174 | 174 | ||
175 | enum cx88_itype { | 175 | enum cx88_itype { |
176 | CX88_VMUX_COMPOSITE1 = 1, | 176 | CX88_VMUX_COMPOSITE1 = 1, |