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-rw-r--r--drivers/media/video/m5mols/m5mols.h52
-rw-r--r--drivers/media/video/m5mols/m5mols_capture.c18
-rw-r--r--drivers/media/video/m5mols/m5mols_controls.c2
-rw-r--r--drivers/media/video/m5mols/m5mols_core.c96
4 files changed, 104 insertions, 64 deletions
diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h
index 10b55c854487..dbe8928855de 100644
--- a/drivers/media/video/m5mols/m5mols.h
+++ b/drivers/media/video/m5mols/m5mols.h
@@ -106,23 +106,23 @@ struct m5mols_capture {
106 * The each value according to each scenemode is recommended in the documents. 106 * The each value according to each scenemode is recommended in the documents.
107 */ 107 */
108struct m5mols_scenemode { 108struct m5mols_scenemode {
109 u32 metering; 109 u8 metering;
110 u32 ev_bias; 110 u8 ev_bias;
111 u32 wb_mode; 111 u8 wb_mode;
112 u32 wb_preset; 112 u8 wb_preset;
113 u32 chroma_en; 113 u8 chroma_en;
114 u32 chroma_lvl; 114 u8 chroma_lvl;
115 u32 edge_en; 115 u8 edge_en;
116 u32 edge_lvl; 116 u8 edge_lvl;
117 u32 af_range; 117 u8 af_range;
118 u32 fd_mode; 118 u8 fd_mode;
119 u32 mcc; 119 u8 mcc;
120 u32 light; 120 u8 light;
121 u32 flash; 121 u8 flash;
122 u32 tone; 122 u8 tone;
123 u32 iso; 123 u8 iso;
124 u32 capt_mode; 124 u8 capt_mode;
125 u32 wdr; 125 u8 wdr;
126}; 126};
127 127
128/** 128/**
@@ -216,9 +216,9 @@ struct m5mols_info {
216 bool lock_ae; 216 bool lock_ae;
217 bool lock_awb; 217 bool lock_awb;
218 u8 resolution; 218 u8 resolution;
219 u32 interrupt; 219 u8 interrupt;
220 u32 mode; 220 u8 mode;
221 u32 mode_save; 221 u8 mode_save;
222 int (*set_power)(struct device *dev, int on); 222 int (*set_power)(struct device *dev, int on);
223}; 223};
224 224
@@ -256,9 +256,11 @@ struct m5mols_info {
256 * +-------+---+----------+-----+------+------+------+------+ 256 * +-------+---+----------+-----+------+------+------+------+
257 * - d[0..3]: according to size1 257 * - d[0..3]: according to size1
258 */ 258 */
259int m5mols_read(struct v4l2_subdev *sd, u32 reg_comb, u32 *val); 259int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg_comb, u8 *val);
260int m5mols_read_u16(struct v4l2_subdev *sd, u32 reg_comb, u16 *val);
261int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg_comb, u32 *val);
260int m5mols_write(struct v4l2_subdev *sd, u32 reg_comb, u32 val); 262int m5mols_write(struct v4l2_subdev *sd, u32 reg_comb, u32 val);
261int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 value); 263int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 value);
262 264
263/* 265/*
264 * Mode operation of the M-5MOLS 266 * Mode operation of the M-5MOLS
@@ -280,12 +282,12 @@ int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 value);
280 * The available executing order between each modes are as follows: 282 * The available executing order between each modes are as follows:
281 * PARAMETER <---> MONITOR <---> CAPTURE 283 * PARAMETER <---> MONITOR <---> CAPTURE
282 */ 284 */
283int m5mols_mode(struct m5mols_info *info, u32 mode); 285int m5mols_mode(struct m5mols_info *info, u8 mode);
284 286
285int m5mols_enable_interrupt(struct v4l2_subdev *sd, u32 reg); 287int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg);
286int m5mols_sync_controls(struct m5mols_info *info); 288int m5mols_sync_controls(struct m5mols_info *info);
287int m5mols_start_capture(struct m5mols_info *info); 289int m5mols_start_capture(struct m5mols_info *info);
288int m5mols_do_scenemode(struct m5mols_info *info, u32 mode); 290int m5mols_do_scenemode(struct m5mols_info *info, u8 mode);
289int m5mols_lock_3a(struct m5mols_info *info, bool lock); 291int m5mols_lock_3a(struct m5mols_info *info, bool lock);
290int m5mols_set_ctrl(struct v4l2_ctrl *ctrl); 292int m5mols_set_ctrl(struct v4l2_ctrl *ctrl);
291 293
diff --git a/drivers/media/video/m5mols/m5mols_capture.c b/drivers/media/video/m5mols/m5mols_capture.c
index d71a3903b60f..751f4593da9b 100644
--- a/drivers/media/video/m5mols/m5mols_capture.c
+++ b/drivers/media/video/m5mols/m5mols_capture.c
@@ -58,9 +58,9 @@ static int m5mols_read_rational(struct v4l2_subdev *sd, u32 addr_num,
58{ 58{
59 u32 num, den; 59 u32 num, den;
60 60
61 int ret = m5mols_read(sd, addr_num, &num); 61 int ret = m5mols_read_u32(sd, addr_num, &num);
62 if (!ret) 62 if (!ret)
63 ret = m5mols_read(sd, addr_den, &den); 63 ret = m5mols_read_u32(sd, addr_den, &den);
64 if (ret) 64 if (ret)
65 return ret; 65 return ret;
66 *val = den == 0 ? 0 : num / den; 66 *val = den == 0 ? 0 : num / den;
@@ -99,20 +99,20 @@ static int m5mols_capture_info(struct m5mols_info *info)
99 if (ret) 99 if (ret)
100 return ret; 100 return ret;
101 101
102 ret = m5mols_read(sd, EXIF_INFO_ISO, (u32 *)&exif->iso_speed); 102 ret = m5mols_read_u16(sd, EXIF_INFO_ISO, &exif->iso_speed);
103 if (!ret) 103 if (!ret)
104 ret = m5mols_read(sd, EXIF_INFO_FLASH, (u32 *)&exif->flash); 104 ret = m5mols_read_u16(sd, EXIF_INFO_FLASH, &exif->flash);
105 if (!ret) 105 if (!ret)
106 ret = m5mols_read(sd, EXIF_INFO_SDR, (u32 *)&exif->sdr); 106 ret = m5mols_read_u16(sd, EXIF_INFO_SDR, &exif->sdr);
107 if (!ret) 107 if (!ret)
108 ret = m5mols_read(sd, EXIF_INFO_QVAL, (u32 *)&exif->qval); 108 ret = m5mols_read_u16(sd, EXIF_INFO_QVAL, &exif->qval);
109 if (ret) 109 if (ret)
110 return ret; 110 return ret;
111 111
112 if (!ret) 112 if (!ret)
113 ret = m5mols_read(sd, CAPC_IMAGE_SIZE, &info->cap.main); 113 ret = m5mols_read_u32(sd, CAPC_IMAGE_SIZE, &info->cap.main);
114 if (!ret) 114 if (!ret)
115 ret = m5mols_read(sd, CAPC_THUMB_SIZE, &info->cap.thumb); 115 ret = m5mols_read_u32(sd, CAPC_THUMB_SIZE, &info->cap.thumb);
116 if (!ret) 116 if (!ret)
117 info->cap.total = info->cap.main + info->cap.thumb; 117 info->cap.total = info->cap.main + info->cap.thumb;
118 118
@@ -122,7 +122,7 @@ static int m5mols_capture_info(struct m5mols_info *info)
122int m5mols_start_capture(struct m5mols_info *info) 122int m5mols_start_capture(struct m5mols_info *info)
123{ 123{
124 struct v4l2_subdev *sd = &info->sd; 124 struct v4l2_subdev *sd = &info->sd;
125 u32 resolution = info->resolution; 125 u8 resolution = info->resolution;
126 int timeout; 126 int timeout;
127 int ret; 127 int ret;
128 128
diff --git a/drivers/media/video/m5mols/m5mols_controls.c b/drivers/media/video/m5mols/m5mols_controls.c
index 817c16fec368..d392c83fbf05 100644
--- a/drivers/media/video/m5mols/m5mols_controls.c
+++ b/drivers/media/video/m5mols/m5mols_controls.c
@@ -130,7 +130,7 @@ static struct m5mols_scenemode m5mols_default_scenemode[] = {
130 * 130 *
131 * WARNING: The execution order is important. Do not change the order. 131 * WARNING: The execution order is important. Do not change the order.
132 */ 132 */
133int m5mols_do_scenemode(struct m5mols_info *info, u32 mode) 133int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)
134{ 134{
135 struct v4l2_subdev *sd = &info->sd; 135 struct v4l2_subdev *sd = &info->sd;
136 struct m5mols_scenemode scenemode = m5mols_default_scenemode[mode]; 136 struct m5mols_scenemode scenemode = m5mols_default_scenemode[mode];
diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c
index 76eac26e84ae..2b1f23f8d063 100644
--- a/drivers/media/video/m5mols/m5mols_core.c
+++ b/drivers/media/video/m5mols/m5mols_core.c
@@ -133,13 +133,13 @@ static u32 m5mols_swap_byte(u8 *data, u8 length)
133/** 133/**
134 * m5mols_read - I2C read function 134 * m5mols_read - I2C read function
135 * @reg: combination of size, category and command for the I2C packet 135 * @reg: combination of size, category and command for the I2C packet
136 * @size: desired size of I2C packet
136 * @val: read value 137 * @val: read value
137 */ 138 */
138int m5mols_read(struct v4l2_subdev *sd, u32 reg, u32 *val) 139static int m5mols_read(struct v4l2_subdev *sd, u32 size, u32 reg, u32 *val)
139{ 140{
140 struct i2c_client *client = v4l2_get_subdevdata(sd); 141 struct i2c_client *client = v4l2_get_subdevdata(sd);
141 u8 rbuf[M5MOLS_I2C_MAX_SIZE + 1]; 142 u8 rbuf[M5MOLS_I2C_MAX_SIZE + 1];
142 u8 size = I2C_SIZE(reg);
143 u8 category = I2C_CATEGORY(reg); 143 u8 category = I2C_CATEGORY(reg);
144 u8 cmd = I2C_COMMAND(reg); 144 u8 cmd = I2C_COMMAND(reg);
145 struct i2c_msg msg[2]; 145 struct i2c_msg msg[2];
@@ -149,11 +149,6 @@ int m5mols_read(struct v4l2_subdev *sd, u32 reg, u32 *val)
149 if (!client->adapter) 149 if (!client->adapter)
150 return -ENODEV; 150 return -ENODEV;
151 151
152 if (size != 1 && size != 2 && size != 4) {
153 v4l2_err(sd, "Wrong data size\n");
154 return -EINVAL;
155 }
156
157 msg[0].addr = client->addr; 152 msg[0].addr = client->addr;
158 msg[0].flags = 0; 153 msg[0].flags = 0;
159 msg[0].len = 5; 154 msg[0].len = 5;
@@ -184,6 +179,52 @@ int m5mols_read(struct v4l2_subdev *sd, u32 reg, u32 *val)
184 return 0; 179 return 0;
185} 180}
186 181
182int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg, u8 *val)
183{
184 u32 val_32;
185 int ret;
186
187 if (I2C_SIZE(reg) != 1) {
188 v4l2_err(sd, "Wrong data size\n");
189 return -EINVAL;
190 }
191
192 ret = m5mols_read(sd, I2C_SIZE(reg), reg, &val_32);
193 if (ret)
194 return ret;
195
196 *val = (u8)val_32;
197 return ret;
198}
199
200int m5mols_read_u16(struct v4l2_subdev *sd, u32 reg, u16 *val)
201{
202 u32 val_32;
203 int ret;
204
205 if (I2C_SIZE(reg) != 2) {
206 v4l2_err(sd, "Wrong data size\n");
207 return -EINVAL;
208 }
209
210 ret = m5mols_read(sd, I2C_SIZE(reg), reg, &val_32);
211 if (ret)
212 return ret;
213
214 *val = (u16)val_32;
215 return ret;
216}
217
218int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg, u32 *val)
219{
220 if (I2C_SIZE(reg) != 4) {
221 v4l2_err(sd, "Wrong data size\n");
222 return -EINVAL;
223 }
224
225 return m5mols_read(sd, I2C_SIZE(reg), reg, val);
226}
227
187/** 228/**
188 * m5mols_write - I2C command write function 229 * m5mols_write - I2C command write function
189 * @reg: combination of size, category and command for the I2C packet 230 * @reg: combination of size, category and command for the I2C packet
@@ -231,13 +272,14 @@ int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val)
231 return 0; 272 return 0;
232} 273}
233 274
234int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 mask) 275int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 mask)
235{ 276{
236 u32 busy, i; 277 u8 busy;
278 int i;
237 int ret; 279 int ret;
238 280
239 for (i = 0; i < M5MOLS_I2C_CHECK_RETRY; i++) { 281 for (i = 0; i < M5MOLS_I2C_CHECK_RETRY; i++) {
240 ret = m5mols_read(sd, I2C_REG(category, cmd, 1), &busy); 282 ret = m5mols_read_u8(sd, I2C_REG(category, cmd, 1), &busy);
241 if (ret < 0) 283 if (ret < 0)
242 return ret; 284 return ret;
243 if ((busy & mask) == mask) 285 if ((busy & mask) == mask)
@@ -252,14 +294,14 @@ int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u32 mask)
252 * Before writing desired interrupt value the INT_FACTOR register should 294 * Before writing desired interrupt value the INT_FACTOR register should
253 * be read to clear pending interrupts. 295 * be read to clear pending interrupts.
254 */ 296 */
255int m5mols_enable_interrupt(struct v4l2_subdev *sd, u32 reg) 297int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg)
256{ 298{
257 struct m5mols_info *info = to_m5mols(sd); 299 struct m5mols_info *info = to_m5mols(sd);
258 u32 mask = is_available_af(info) ? REG_INT_AF : 0; 300 u8 mask = is_available_af(info) ? REG_INT_AF : 0;
259 u32 dummy; 301 u8 dummy;
260 int ret; 302 int ret;
261 303
262 ret = m5mols_read(sd, SYSTEM_INT_FACTOR, &dummy); 304 ret = m5mols_read_u8(sd, SYSTEM_INT_FACTOR, &dummy);
263 if (!ret) 305 if (!ret)
264 ret = m5mols_write(sd, SYSTEM_INT_ENABLE, reg & ~mask); 306 ret = m5mols_write(sd, SYSTEM_INT_ENABLE, reg & ~mask);
265 return ret; 307 return ret;
@@ -271,7 +313,7 @@ int m5mols_enable_interrupt(struct v4l2_subdev *sd, u32 reg)
271 * It always accompanies a little delay changing the M-5MOLS mode, so it is 313 * It always accompanies a little delay changing the M-5MOLS mode, so it is
272 * needed checking current busy status to guarantee right mode. 314 * needed checking current busy status to guarantee right mode.
273 */ 315 */
274static int m5mols_reg_mode(struct v4l2_subdev *sd, u32 mode) 316static int m5mols_reg_mode(struct v4l2_subdev *sd, u8 mode)
275{ 317{
276 int ret = m5mols_write(sd, SYSTEM_SYSMODE, mode); 318 int ret = m5mols_write(sd, SYSTEM_SYSMODE, mode);
277 319
@@ -286,16 +328,16 @@ static int m5mols_reg_mode(struct v4l2_subdev *sd, u32 mode)
286 * can be guaranteed only when the sensor is operating in mode which which 328 * can be guaranteed only when the sensor is operating in mode which which
287 * a command belongs to. 329 * a command belongs to.
288 */ 330 */
289int m5mols_mode(struct m5mols_info *info, u32 mode) 331int m5mols_mode(struct m5mols_info *info, u8 mode)
290{ 332{
291 struct v4l2_subdev *sd = &info->sd; 333 struct v4l2_subdev *sd = &info->sd;
292 int ret = -EINVAL; 334 int ret = -EINVAL;
293 u32 reg; 335 u8 reg;
294 336
295 if (mode < REG_PARAMETER && mode > REG_CAPTURE) 337 if (mode < REG_PARAMETER && mode > REG_CAPTURE)
296 return ret; 338 return ret;
297 339
298 ret = m5mols_read(sd, SYSTEM_SYSMODE, &reg); 340 ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, &reg);
299 if ((!ret && reg == mode) || ret) 341 if ((!ret && reg == mode) || ret)
300 return ret; 342 return ret;
301 343
@@ -348,28 +390,24 @@ static int m5mols_get_version(struct v4l2_subdev *sd)
348 struct m5mols_version ver; 390 struct m5mols_version ver;
349 u8 bytes[VERSION_SIZE]; 391 u8 bytes[VERSION_SIZE];
350 } version; 392 } version;
351 u32 *value;
352 u8 cmd = CAT0_VER_CUSTOMER; 393 u8 cmd = CAT0_VER_CUSTOMER;
353 int ret; 394 int ret;
354 395
355 do { 396 do {
356 value = (u32 *)&version.bytes[cmd]; 397 ret = m5mols_read_u8(sd, SYSTEM_CMD(cmd), &version.bytes[cmd]);
357 ret = m5mols_read(sd, SYSTEM_CMD(cmd), value);
358 if (ret) 398 if (ret)
359 return ret; 399 return ret;
360 } while (cmd++ != CAT0_VER_AWB); 400 } while (cmd++ != CAT0_VER_AWB);
361 401
362 do { 402 do {
363 value = (u32 *)&version.bytes[cmd]; 403 ret = m5mols_read_u8(sd, SYSTEM_VER_STRING, &version.bytes[cmd]);
364 ret = m5mols_read(sd, SYSTEM_VER_STRING, value);
365 if (ret) 404 if (ret)
366 return ret; 405 return ret;
367 if (cmd >= VERSION_SIZE - 1) 406 if (cmd >= VERSION_SIZE - 1)
368 return -EINVAL; 407 return -EINVAL;
369 } while (version.bytes[cmd++]); 408 } while (version.bytes[cmd++]);
370 409
371 value = (u32 *)&version.bytes[cmd]; 410 ret = m5mols_read_u8(sd, AF_VERSION, &version.bytes[cmd]);
372 ret = m5mols_read(sd, AF_VERSION, value);
373 if (ret) 411 if (ret)
374 return ret; 412 return ret;
375 413
@@ -722,7 +760,7 @@ static int m5mols_init_controls(struct m5mols_info *info)
722 int ret; 760 int ret;
723 761
724 /* Determine value's range & step of controls for various FW version */ 762 /* Determine value's range & step of controls for various FW version */
725 ret = m5mols_read(sd, AE_MAX_GAIN_MON, (u32 *)&max_exposure); 763 ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &max_exposure);
726 if (!ret) 764 if (!ret)
727 step_zoom = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1; 765 step_zoom = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1;
728 if (ret) 766 if (ret)
@@ -842,18 +880,18 @@ static void m5mols_irq_work(struct work_struct *work)
842 struct m5mols_info *info = 880 struct m5mols_info *info =
843 container_of(work, struct m5mols_info, work_irq); 881 container_of(work, struct m5mols_info, work_irq);
844 struct v4l2_subdev *sd = &info->sd; 882 struct v4l2_subdev *sd = &info->sd;
845 u32 reg; 883 u8 reg;
846 int ret; 884 int ret;
847 885
848 if (!is_powered(info) || 886 if (!is_powered(info) ||
849 m5mols_read(sd, SYSTEM_INT_FACTOR, &info->interrupt)) 887 m5mols_read_u8(sd, SYSTEM_INT_FACTOR, &info->interrupt))
850 return; 888 return;
851 889
852 switch (info->interrupt & REG_INT_MASK) { 890 switch (info->interrupt & REG_INT_MASK) {
853 case REG_INT_AF: 891 case REG_INT_AF:
854 if (!is_available_af(info)) 892 if (!is_available_af(info))
855 break; 893 break;
856 ret = m5mols_read(sd, AF_STATUS, &reg); 894 ret = m5mols_read_u8(sd, AF_STATUS, &reg);
857 v4l2_dbg(2, m5mols_debug, sd, "AF %s\n", 895 v4l2_dbg(2, m5mols_debug, sd, "AF %s\n",
858 reg == REG_AF_FAIL ? "Failed" : 896 reg == REG_AF_FAIL ? "Failed" :
859 reg == REG_AF_SUCCESS ? "Success" : 897 reg == REG_AF_SUCCESS ? "Success" :