aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/video/zr36120.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/media/video/zr36120.h')
-rw-r--r--drivers/media/video/zr36120.h279
1 files changed, 0 insertions, 279 deletions
diff --git a/drivers/media/video/zr36120.h b/drivers/media/video/zr36120.h
deleted file mode 100644
index a71e485b0f98..000000000000
--- a/drivers/media/video/zr36120.h
+++ /dev/null
@@ -1,279 +0,0 @@
1/*
2 zr36120.h - Zoran 36120/36125 based framegrabbers
3
4 Copyright (C) 1998-1999 Pauline Middelink (middelin@polyware.nl)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef _ZR36120_H
22#define _ZR36120_H
23
24#ifdef __KERNEL__
25
26#include <linux/types.h>
27#include <linux/wait.h>
28
29#include <linux/i2c-old.h>
30#include <linux/videodev.h>
31
32#include <asm/io.h>
33
34/*
35 * Debug macro's, place an x behind the ) for actual debug-compilation
36 * E.g. #define DEBUG(x...) x
37 */
38#define DEBUG(x...) /* Debug driver */
39#define IDEBUG(x...) /* Debug interrupt handler */
40#define PDEBUG 0 /* Debug PCI writes */
41
42/* defined in zr36120_i2c */
43extern struct i2c_bus zoran_i2c_bus_template;
44
45#define ZORAN_MAX_FBUFFERS 2
46#define ZORAN_MAX_FBUFFER (768*576*2)
47#define ZORAN_MAX_FBUFSIZE (ZORAN_MAX_FBUFFERS*ZORAN_MAX_FBUFFER)
48
49#define ZORAN_VBI_BUFFERS 2
50#define ZORAN_VBI_BUFSIZE (22*1024*2)
51
52struct tvcard {
53 char* name; /* name of the cardtype */
54 int video_inputs; /* number of channels defined in video_mux */
55 int audio_inputs; /* number of channels defined in audio_mux */
56 __u32 swapi2c:1, /* need to swap i2c wires SDA/SCL? */
57 usegirq1:1, /* VSYNC at GIRQ1 instead of GIRQ0? */
58 vsync_pos:1, /* positive VSYNC signal? */
59 hsync_pos:1, /* positive HSYNC signal? */
60 gpdir:8, /* General Purpose Direction register */
61 gpval:8; /* General Purpose Value register */
62 int video_mux[6]; /* mapping channel number to physical input */
63#define IS_TUNER 0x80
64#define IS_SVHS 0x40
65#define CHANNEL_MASK 0x3F
66 int audio_mux[6]; /* mapping channel number to physical input */
67};
68#define TUNER(x) ((x)|IS_TUNER)
69#define SVHS(x) ((x)|IS_SVHS)
70
71struct vidinfo {
72 struct vidinfo* next; /* next active buffer */
73 uint kindof;
74#define FBUFFER_OVERLAY 0
75#define FBUFFER_GRAB 1
76#define FBUFFER_VBI 2
77 uint status;
78#define FBUFFER_FREE 0
79#define FBUFFER_BUSY 1
80#define FBUFFER_DONE 2
81 ulong fieldnr; /* # of field, not framer! */
82 uint x,y;
83 int w,h; /* w,h can be negative! */
84 uint format; /* index in palette2fmt[] */
85 uint bpp; /* lookup from palette2fmt[] */
86 uint bpl; /* calc: width * bpp */
87 ulong busadr; /* bus addr for DMA engine */
88 char* memadr; /* kernel addr for making copies */
89 ulong* overlay; /* kernel addr of overlay mask */
90};
91
92struct zoran
93{
94 struct video_device video_dev;
95#define CARD_DEBUG KERN_DEBUG "%s(%lu): "
96#define CARD_INFO KERN_INFO "%s(%lu): "
97#define CARD_ERR KERN_ERR "%s(%lu): "
98#define CARD ztv->video_dev.name,ztv->fieldnr
99
100 /* zoran chip specific details */
101 struct i2c_bus i2c; /* i2c registration data */
102 struct pci_dev* dev; /* ptr to PCI device */
103 ulong zoran_adr; /* bus address of IO memory */
104 char* zoran_mem; /* kernel address of IO memory */
105 struct tvcard* card; /* the cardtype */
106 uint norm; /* 0=PAL, 1=NTSC, 2=SECAM */
107 uint tuner_freq; /* Current freq in kHz */
108 struct video_picture picture; /* Current picture params */
109
110 /* videocard details */
111 uint swidth; /* screen width */
112 uint sheight; /* screen height */
113 uint depth; /* depth in bits */
114
115 /* State details */
116 char* fbuffer; /* framebuffers for mmap */
117 struct vidinfo overinfo; /* overlay data */
118 struct vidinfo grabinfo[ZORAN_MAX_FBUFFERS]; /* grabbing data*/
119 wait_queue_head_t grabq; /* grabbers queue */
120
121 /* VBI details */
122 struct video_device vbi_dev;
123 struct vidinfo readinfo[2]; /* VBI data - flip buffers */
124 wait_queue_head_t vbiq; /* vbi queue */
125
126 /* maintenance data */
127 int have_decoder; /* did we detect a mux? */
128 int have_tuner; /* did we detect a tuner? */
129 int users; /* howmany video/vbi open? */
130 int tuner_type; /* tuner type, when found */
131 int running; /* are we rolling? */
132 rwlock_t lock;
133 long state; /* what is requested of us? */
134#define STATE_OVERLAY 0
135#define STATE_VBI 1
136 struct vidinfo* workqueue; /* buffers to grab, head is active */
137 ulong fieldnr; /* #field, ticked every VSYNC */
138 ulong lastfieldnr; /* #field, ticked every GRAB */
139
140 int vidInterlace; /* calculated */
141 int vidXshift; /* calculated */
142 uint vidWidth; /* calculated */
143 uint vidHeight; /* calculated */
144};
145
146#define zrwrite(dat,adr) writel((dat),(char *) (ztv->zoran_mem+(adr)))
147#define zrread(adr) readl(ztv->zoran_mem+(adr))
148
149#if PDEBUG == 0
150#define zrand(dat,adr) zrwrite((dat) & zrread(adr), adr)
151#define zror(dat,adr) zrwrite((dat) | zrread(adr), adr)
152#define zraor(dat,mask,adr) zrwrite( ((dat)&~(mask)) | ((mask)&zrread(adr)), adr)
153#else
154#define zrand(dat, adr) \
155do { \
156 ulong data = (dat) & zrread((adr)); \
157 zrwrite(data, (adr)); \
158 if (0 != (~(dat) & zrread((adr)))) \
159 printk(KERN_DEBUG "zoran: zrand at %d(%d) detected set bits(%x)\n", __LINE__, (adr), (dat)); \
160} while(0)
161
162#define zror(dat, adr) \
163do { \
164 ulong data = (dat) | zrread((adr)); \
165 zrwrite(data, (adr)); \
166 if ((dat) != ((dat) & zrread(adr))) \
167 printk(KERN_DEBUG "zoran: zror at %d(%d) detected unset bits(%x)\n", __LINE__, (adr), (dat)); \
168} while(0)
169
170#define zraor(dat, mask, adr) \
171do { \
172 ulong data; \
173 if ((dat) & (mask)) \
174 printk(KERN_DEBUG "zoran: zraor at %d(%d) detected bits(%x:%x)\n", __LINE__, (adr), (dat), (mask)); \
175 data = ((dat)&~(mask)) | ((mask) & zrread((adr))); \
176 zrwrite(data,(adr)); \
177 if ( (dat) != (~(mask) & zrread((adr))) ) \
178 printk(KERN_DEBUG "zoran: zraor at %d(%d) could not set all bits(%x:%x)\n", __LINE__, (adr), (dat), (mask)); \
179} while(0)
180#endif
181
182#endif
183
184/* zoran PCI address space */
185#define ZORAN_VFEH 0x000 /* Video Front End Horizontal Conf. */
186#define ZORAN_VFEH_HSPOL (1<<30)
187#define ZORAN_VFEH_HSTART (0x3FF<<10)
188#define ZORAN_VFEH_HEND (0x3FF<<0)
189
190#define ZORAN_VFEV 0x004 /* Video Front End Vertical Conf. */
191#define ZORAN_VFEV_VSPOL (1<<30)
192#define ZORAN_VFEV_VSTART (0x3FF<<10)
193#define ZORAN_VFEV_VEND (0x3FF<<0)
194
195#define ZORAN_VFEC 0x008 /* Video Front End Scaler and Pixel */
196#define ZORAN_VFEC_EXTFL (1<<26)
197#define ZORAN_VFEC_TOPFIELD (1<<25)
198#define ZORAN_VFEC_VCLKPOL (1<<24)
199#define ZORAN_VFEC_HFILTER (7<<21)
200#define ZORAN_VFEC_HFILTER_1 (0<<21) /* no lumi, 3-tap chromo */
201#define ZORAN_VFEC_HFILTER_2 (1<<21) /* 3-tap lumi, 3-tap chromo */
202#define ZORAN_VFEC_HFILTER_3 (2<<21) /* 4-tap lumi, 4-tap chromo */
203#define ZORAN_VFEC_HFILTER_4 (3<<21) /* 5-tap lumi, 4-tap chromo */
204#define ZORAN_VFEC_HFILTER_5 (4<<21) /* 4-tap lumi, 4-tap chromo */
205#define ZORAN_VFEC_DUPFLD (1<<20)
206#define ZORAN_VFEC_HORDCM (63<<14)
207#define ZORAN_VFEC_VERDCM (63<<8)
208#define ZORAN_VFEC_DISPMOD (1<<6)
209#define ZORAN_VFEC_RGB (3<<3)
210#define ZORAN_VFEC_RGB_YUV422 (0<<3)
211#define ZORAN_VFEC_RGB_RGB888 (1<<3)
212#define ZORAN_VFEC_RGB_RGB565 (2<<3)
213#define ZORAN_VFEC_RGB_RGB555 (3<<3)
214#define ZORAN_VFEC_ERRDIF (1<<2)
215#define ZORAN_VFEC_PACK24 (1<<1)
216#define ZORAN_VFEC_LE (1<<0)
217
218#define ZORAN_VTOP 0x00C /* Video Display "Top" */
219
220#define ZORAN_VBOT 0x010 /* Video Display "Bottom" */
221
222#define ZORAN_VSTR 0x014 /* Video Display Stride */
223#define ZORAN_VSTR_DISPSTRIDE (0xFFFF<<16)
224#define ZORAN_VSTR_VIDOVF (1<<8)
225#define ZORAN_VSTR_SNAPSHOT (1<<1)
226#define ZORAN_VSTR_GRAB (1<<0)
227
228#define ZORAN_VDC 0x018 /* Video Display Conf. */
229#define ZORAN_VDC_VIDEN (1<<31)
230#define ZORAN_VDC_MINPIX (0x1F<<25)
231#define ZORAN_VDC_TRICOM (1<<24)
232#define ZORAN_VDC_VIDWINHT (0x3FF<<12)
233#define ZORAN_VDC_VIDWINWID (0x3FF<<0)
234
235#define ZORAN_MTOP 0x01C /* Masking Map "Top" */
236
237#define ZORAN_MBOT 0x020 /* Masking Map "Bottom" */
238
239#define ZORAN_OCR 0x024 /* Overlay Control */
240#define ZORAN_OCR_OVLEN (1<<15)
241#define ZORAN_OCR_MASKSTRIDE (0xFF<<0)
242
243#define ZORAN_PCI 0x028 /* System, PCI and GPP Control */
244#define ZORAN_PCI_SOFTRESET (1<<24)
245#define ZORAN_PCI_WAITSTATE (3<<16)
246#define ZORAN_PCI_GENPURDIR (0xFF<<0)
247
248#define ZORAN_GUEST 0x02C /* GuestBus Control */
249
250#define ZORAN_CSOURCE 0x030 /* Code Source Address */
251
252#define ZORAN_CTRANS 0x034 /* Code Transfer Control */
253
254#define ZORAN_CMEM 0x038 /* Code Memory Pointer */
255
256#define ZORAN_ISR 0x03C /* Interrupt Status Register */
257#define ZORAN_ISR_CODE (1<<28)
258#define ZORAN_ISR_GIRQ0 (1<<29)
259#define ZORAN_ISR_GIRQ1 (1<<30)
260
261#define ZORAN_ICR 0x040 /* Interrupt Control Register */
262#define ZORAN_ICR_EN (1<<24)
263#define ZORAN_ICR_CODE (1<<28)
264#define ZORAN_ICR_GIRQ0 (1<<29)
265#define ZORAN_ICR_GIRQ1 (1<<30)
266
267#define ZORAN_I2C 0x044 /* I2C-Bus */
268#define ZORAN_I2C_SCL (1<<1)
269#define ZORAN_I2C_SDA (1<<0)
270
271#define ZORAN_POST 0x48 /* PostOffice */
272#define ZORAN_POST_PEN (1<<25)
273#define ZORAN_POST_TIME (1<<24)
274#define ZORAN_POST_DIR (1<<23)
275#define ZORAN_POST_GUESTID (3<<20)
276#define ZORAN_POST_GUEST (7<<16)
277#define ZORAN_POST_DATA (0xFF<<0)
278
279#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 01:28:21 -0500