diff options
Diffstat (limited to 'drivers/media/video/sn9c102/sn9c102_ov7660.c')
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_ov7660.c | 234 |
1 files changed, 78 insertions, 156 deletions
diff --git a/drivers/media/video/sn9c102/sn9c102_ov7660.c b/drivers/media/video/sn9c102/sn9c102_ov7660.c index d670c24d4435..c898e948fe8d 100644 --- a/drivers/media/video/sn9c102/sn9c102_ov7660.c +++ b/drivers/media/video/sn9c102/sn9c102_ov7660.c | |||
@@ -22,160 +22,84 @@ | |||
22 | #include "sn9c102_sensor.h" | 22 | #include "sn9c102_sensor.h" |
23 | 23 | ||
24 | 24 | ||
25 | static struct sn9c102_sensor ov7660; | ||
26 | |||
27 | |||
28 | static int ov7660_init(struct sn9c102_device* cam) | 25 | static int ov7660_init(struct sn9c102_device* cam) |
29 | { | 26 | { |
30 | int err = 0; | 27 | int err = 0; |
31 | 28 | ||
32 | err += sn9c102_write_reg(cam, 0x40, 0x02); | 29 | err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03}, |
33 | err += sn9c102_write_reg(cam, 0x00, 0x03); | 30 | {0x1a, 0x04}, {0x03, 0x10}, |
34 | err += sn9c102_write_reg(cam, 0x1a, 0x04); | 31 | {0x08, 0x14}, {0x20, 0x17}, |
35 | err += sn9c102_write_reg(cam, 0x03, 0x10); | 32 | {0x8b, 0x18}, {0x00, 0x19}, |
36 | err += sn9c102_write_reg(cam, 0x08, 0x14); | 33 | {0x1d, 0x1a}, {0x10, 0x1b}, |
37 | err += sn9c102_write_reg(cam, 0x20, 0x17); | 34 | {0x02, 0x1c}, {0x03, 0x1d}, |
38 | err += sn9c102_write_reg(cam, 0x8b, 0x18); | 35 | {0x0f, 0x1e}, {0x0c, 0x1f}, |
39 | err += sn9c102_write_reg(cam, 0x00, 0x19); | 36 | {0x00, 0x20}, {0x29, 0x21}, |
40 | err += sn9c102_write_reg(cam, 0x1d, 0x1a); | 37 | {0x40, 0x22}, {0x54, 0x23}, |
41 | err += sn9c102_write_reg(cam, 0x10, 0x1b); | 38 | {0x66, 0x24}, {0x76, 0x25}, |
42 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 39 | {0x85, 0x26}, {0x94, 0x27}, |
43 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 40 | {0xa1, 0x28}, {0xae, 0x29}, |
44 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 41 | {0xbb, 0x2a}, {0xc7, 0x2b}, |
45 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 42 | {0xd3, 0x2c}, {0xde, 0x2d}, |
46 | err += sn9c102_write_reg(cam, 0x00, 0x20); | 43 | {0xea, 0x2e}, {0xf4, 0x2f}, |
47 | err += sn9c102_write_reg(cam, 0x29, 0x21); | 44 | {0xff, 0x30}, {0x00, 0x3F}, |
48 | err += sn9c102_write_reg(cam, 0x40, 0x22); | 45 | {0xC7, 0x40}, {0x01, 0x41}, |
49 | err += sn9c102_write_reg(cam, 0x54, 0x23); | 46 | {0x44, 0x42}, {0x00, 0x43}, |
50 | err += sn9c102_write_reg(cam, 0x66, 0x24); | 47 | {0x44, 0x44}, {0x00, 0x45}, |
51 | err += sn9c102_write_reg(cam, 0x76, 0x25); | 48 | {0x44, 0x46}, {0x00, 0x47}, |
52 | err += sn9c102_write_reg(cam, 0x85, 0x26); | 49 | {0xC7, 0x48}, {0x01, 0x49}, |
53 | err += sn9c102_write_reg(cam, 0x94, 0x27); | 50 | {0xC7, 0x4A}, {0x01, 0x4B}, |
54 | err += sn9c102_write_reg(cam, 0xa1, 0x28); | 51 | {0xC7, 0x4C}, {0x01, 0x4D}, |
55 | err += sn9c102_write_reg(cam, 0xae, 0x29); | 52 | {0x44, 0x4E}, {0x00, 0x4F}, |
56 | err += sn9c102_write_reg(cam, 0xbb, 0x2a); | 53 | {0x44, 0x50}, {0x00, 0x51}, |
57 | err += sn9c102_write_reg(cam, 0xc7, 0x2b); | 54 | {0x44, 0x52}, {0x00, 0x53}, |
58 | err += sn9c102_write_reg(cam, 0xd3, 0x2c); | 55 | {0xC7, 0x54}, {0x01, 0x55}, |
59 | err += sn9c102_write_reg(cam, 0xde, 0x2d); | 56 | {0xC7, 0x56}, {0x01, 0x57}, |
60 | err += sn9c102_write_reg(cam, 0xea, 0x2e); | 57 | {0xC7, 0x58}, {0x01, 0x59}, |
61 | err += sn9c102_write_reg(cam, 0xf4, 0x2f); | 58 | {0x44, 0x5A}, {0x00, 0x5B}, |
62 | err += sn9c102_write_reg(cam, 0xff, 0x30); | 59 | {0x44, 0x5C}, {0x00, 0x5D}, |
63 | err += sn9c102_write_reg(cam, 0x00, 0x3F); | 60 | {0x44, 0x5E}, {0x00, 0x5F}, |
64 | err += sn9c102_write_reg(cam, 0xC7, 0x40); | 61 | {0xC7, 0x60}, {0x01, 0x61}, |
65 | err += sn9c102_write_reg(cam, 0x01, 0x41); | 62 | {0xC7, 0x62}, {0x01, 0x63}, |
66 | err += sn9c102_write_reg(cam, 0x44, 0x42); | 63 | {0xC7, 0x64}, {0x01, 0x65}, |
67 | err += sn9c102_write_reg(cam, 0x00, 0x43); | 64 | {0x44, 0x66}, {0x00, 0x67}, |
68 | err += sn9c102_write_reg(cam, 0x44, 0x44); | 65 | {0x44, 0x68}, {0x00, 0x69}, |
69 | err += sn9c102_write_reg(cam, 0x00, 0x45); | 66 | {0x44, 0x6A}, {0x00, 0x6B}, |
70 | err += sn9c102_write_reg(cam, 0x44, 0x46); | 67 | {0xC7, 0x6C}, {0x01, 0x6D}, |
71 | err += sn9c102_write_reg(cam, 0x00, 0x47); | 68 | {0xC7, 0x6E}, {0x01, 0x6F}, |
72 | err += sn9c102_write_reg(cam, 0xC7, 0x48); | 69 | {0xC7, 0x70}, {0x01, 0x71}, |
73 | err += sn9c102_write_reg(cam, 0x01, 0x49); | 70 | {0x44, 0x72}, {0x00, 0x73}, |
74 | err += sn9c102_write_reg(cam, 0xC7, 0x4A); | 71 | {0x44, 0x74}, {0x00, 0x75}, |
75 | err += sn9c102_write_reg(cam, 0x01, 0x4B); | 72 | {0x44, 0x76}, {0x00, 0x77}, |
76 | err += sn9c102_write_reg(cam, 0xC7, 0x4C); | 73 | {0xC7, 0x78}, {0x01, 0x79}, |
77 | err += sn9c102_write_reg(cam, 0x01, 0x4D); | 74 | {0xC7, 0x7A}, {0x01, 0x7B}, |
78 | err += sn9c102_write_reg(cam, 0x44, 0x4E); | 75 | {0xC7, 0x7C}, {0x01, 0x7D}, |
79 | err += sn9c102_write_reg(cam, 0x00, 0x4F); | 76 | {0x44, 0x7E}, {0x00, 0x7F}, |
80 | err += sn9c102_write_reg(cam, 0x44, 0x50); | 77 | {0x14, 0x84}, {0x00, 0x85}, |
81 | err += sn9c102_write_reg(cam, 0x00, 0x51); | 78 | {0x27, 0x86}, {0x00, 0x87}, |
82 | err += sn9c102_write_reg(cam, 0x44, 0x52); | 79 | {0x07, 0x88}, {0x00, 0x89}, |
83 | err += sn9c102_write_reg(cam, 0x00, 0x53); | 80 | {0xEC, 0x8A}, {0x0f, 0x8B}, |
84 | err += sn9c102_write_reg(cam, 0xC7, 0x54); | 81 | {0xD8, 0x8C}, {0x0f, 0x8D}, |
85 | err += sn9c102_write_reg(cam, 0x01, 0x55); | 82 | {0x3D, 0x8E}, {0x00, 0x8F}, |
86 | err += sn9c102_write_reg(cam, 0xC7, 0x56); | 83 | {0x3D, 0x90}, {0x00, 0x91}, |
87 | err += sn9c102_write_reg(cam, 0x01, 0x57); | 84 | {0xCD, 0x92}, {0x0f, 0x93}, |
88 | err += sn9c102_write_reg(cam, 0xC7, 0x58); | 85 | {0xf7, 0x94}, {0x0f, 0x95}, |
89 | err += sn9c102_write_reg(cam, 0x01, 0x59); | 86 | {0x0C, 0x96}, {0x00, 0x97}, |
90 | err += sn9c102_write_reg(cam, 0x44, 0x5A); | 87 | {0x00, 0x98}, {0x66, 0x99}, |
91 | err += sn9c102_write_reg(cam, 0x00, 0x5B); | 88 | {0x05, 0x9A}, {0x00, 0x9B}, |
92 | err += sn9c102_write_reg(cam, 0x44, 0x5C); | 89 | {0x04, 0x9C}, {0x00, 0x9D}, |
93 | err += sn9c102_write_reg(cam, 0x00, 0x5D); | 90 | {0x08, 0x9E}, {0x00, 0x9F}, |
94 | err += sn9c102_write_reg(cam, 0x44, 0x5E); | 91 | {0x2D, 0xC0}, {0x2D, 0xC1}, |
95 | err += sn9c102_write_reg(cam, 0x00, 0x5F); | 92 | {0x3A, 0xC2}, {0x05, 0xC3}, |
96 | err += sn9c102_write_reg(cam, 0xC7, 0x60); | 93 | {0x04, 0xC4}, {0x3F, 0xC5}, |
97 | err += sn9c102_write_reg(cam, 0x01, 0x61); | 94 | {0x00, 0xC6}, {0x00, 0xC7}, |
98 | err += sn9c102_write_reg(cam, 0xC7, 0x62); | 95 | {0x50, 0xC8}, {0x3C, 0xC9}, |
99 | err += sn9c102_write_reg(cam, 0x01, 0x63); | 96 | {0x28, 0xCA}, {0xD8, 0xCB}, |
100 | err += sn9c102_write_reg(cam, 0xC7, 0x64); | 97 | {0x14, 0xCC}, {0xEC, 0xCD}, |
101 | err += sn9c102_write_reg(cam, 0x01, 0x65); | 98 | {0x32, 0xCE}, {0xDD, 0xCF}, |
102 | err += sn9c102_write_reg(cam, 0x44, 0x66); | 99 | {0x32, 0xD0}, {0xDD, 0xD1}, |
103 | err += sn9c102_write_reg(cam, 0x00, 0x67); | 100 | {0x6A, 0xD2}, {0x50, 0xD3}, |
104 | err += sn9c102_write_reg(cam, 0x44, 0x68); | 101 | {0x00, 0xD4}, {0x00, 0xD5}, |
105 | err += sn9c102_write_reg(cam, 0x00, 0x69); | 102 | {0x00, 0xD6}); |
106 | err += sn9c102_write_reg(cam, 0x44, 0x6A); | ||
107 | err += sn9c102_write_reg(cam, 0x00, 0x6B); | ||
108 | err += sn9c102_write_reg(cam, 0xC7, 0x6C); | ||
109 | err += sn9c102_write_reg(cam, 0x01, 0x6D); | ||
110 | err += sn9c102_write_reg(cam, 0xC7, 0x6E); | ||
111 | err += sn9c102_write_reg(cam, 0x01, 0x6F); | ||
112 | err += sn9c102_write_reg(cam, 0xC7, 0x70); | ||
113 | err += sn9c102_write_reg(cam, 0x01, 0x71); | ||
114 | err += sn9c102_write_reg(cam, 0x44, 0x72); | ||
115 | err += sn9c102_write_reg(cam, 0x00, 0x73); | ||
116 | err += sn9c102_write_reg(cam, 0x44, 0x74); | ||
117 | err += sn9c102_write_reg(cam, 0x00, 0x75); | ||
118 | err += sn9c102_write_reg(cam, 0x44, 0x76); | ||
119 | err += sn9c102_write_reg(cam, 0x00, 0x77); | ||
120 | err += sn9c102_write_reg(cam, 0xC7, 0x78); | ||
121 | err += sn9c102_write_reg(cam, 0x01, 0x79); | ||
122 | err += sn9c102_write_reg(cam, 0xC7, 0x7A); | ||
123 | err += sn9c102_write_reg(cam, 0x01, 0x7B); | ||
124 | err += sn9c102_write_reg(cam, 0xC7, 0x7C); | ||
125 | err += sn9c102_write_reg(cam, 0x01, 0x7D); | ||
126 | err += sn9c102_write_reg(cam, 0x44, 0x7E); | ||
127 | err += sn9c102_write_reg(cam, 0x00, 0x7F); | ||
128 | err += sn9c102_write_reg(cam, 0x14, 0x84); | ||
129 | err += sn9c102_write_reg(cam, 0x00, 0x85); | ||
130 | err += sn9c102_write_reg(cam, 0x27, 0x86); | ||
131 | err += sn9c102_write_reg(cam, 0x00, 0x87); | ||
132 | err += sn9c102_write_reg(cam, 0x07, 0x88); | ||
133 | err += sn9c102_write_reg(cam, 0x00, 0x89); | ||
134 | err += sn9c102_write_reg(cam, 0xEC, 0x8A); | ||
135 | err += sn9c102_write_reg(cam, 0x0f, 0x8B); | ||
136 | err += sn9c102_write_reg(cam, 0xD8, 0x8C); | ||
137 | err += sn9c102_write_reg(cam, 0x0f, 0x8D); | ||
138 | err += sn9c102_write_reg(cam, 0x3D, 0x8E); | ||
139 | err += sn9c102_write_reg(cam, 0x00, 0x8F); | ||
140 | err += sn9c102_write_reg(cam, 0x3D, 0x90); | ||
141 | err += sn9c102_write_reg(cam, 0x00, 0x91); | ||
142 | err += sn9c102_write_reg(cam, 0xCD, 0x92); | ||
143 | err += sn9c102_write_reg(cam, 0x0f, 0x93); | ||
144 | err += sn9c102_write_reg(cam, 0xf7, 0x94); | ||
145 | err += sn9c102_write_reg(cam, 0x0f, 0x95); | ||
146 | err += sn9c102_write_reg(cam, 0x0C, 0x96); | ||
147 | err += sn9c102_write_reg(cam, 0x00, 0x97); | ||
148 | err += sn9c102_write_reg(cam, 0x00, 0x98); | ||
149 | err += sn9c102_write_reg(cam, 0x66, 0x99); | ||
150 | err += sn9c102_write_reg(cam, 0x05, 0x9A); | ||
151 | err += sn9c102_write_reg(cam, 0x00, 0x9B); | ||
152 | err += sn9c102_write_reg(cam, 0x04, 0x9C); | ||
153 | err += sn9c102_write_reg(cam, 0x00, 0x9D); | ||
154 | err += sn9c102_write_reg(cam, 0x08, 0x9E); | ||
155 | err += sn9c102_write_reg(cam, 0x00, 0x9F); | ||
156 | err += sn9c102_write_reg(cam, 0x2D, 0xC0); | ||
157 | err += sn9c102_write_reg(cam, 0x2D, 0xC1); | ||
158 | err += sn9c102_write_reg(cam, 0x3A, 0xC2); | ||
159 | err += sn9c102_write_reg(cam, 0x05, 0xC3); | ||
160 | err += sn9c102_write_reg(cam, 0x04, 0xC4); | ||
161 | err += sn9c102_write_reg(cam, 0x3F, 0xC5); | ||
162 | err += sn9c102_write_reg(cam, 0x00, 0xC6); | ||
163 | err += sn9c102_write_reg(cam, 0x00, 0xC7); | ||
164 | err += sn9c102_write_reg(cam, 0x50, 0xC8); | ||
165 | err += sn9c102_write_reg(cam, 0x3C, 0xC9); | ||
166 | err += sn9c102_write_reg(cam, 0x28, 0xCA); | ||
167 | err += sn9c102_write_reg(cam, 0xD8, 0xCB); | ||
168 | err += sn9c102_write_reg(cam, 0x14, 0xCC); | ||
169 | err += sn9c102_write_reg(cam, 0xEC, 0xCD); | ||
170 | err += sn9c102_write_reg(cam, 0x32, 0xCE); | ||
171 | err += sn9c102_write_reg(cam, 0xDD, 0xCF); | ||
172 | err += sn9c102_write_reg(cam, 0x32, 0xD0); | ||
173 | err += sn9c102_write_reg(cam, 0xDD, 0xD1); | ||
174 | err += sn9c102_write_reg(cam, 0x6A, 0xD2); | ||
175 | err += sn9c102_write_reg(cam, 0x50, 0xD3); | ||
176 | err += sn9c102_write_reg(cam, 0x00, 0xD4); | ||
177 | err += sn9c102_write_reg(cam, 0x00, 0xD5); | ||
178 | err += sn9c102_write_reg(cam, 0x00, 0xD6); | ||
179 | 103 | ||
180 | err += sn9c102_i2c_write(cam, 0x12, 0x80); | 104 | err += sn9c102_i2c_write(cam, 0x12, 0x80); |
181 | err += sn9c102_i2c_write(cam, 0x11, 0x09); | 105 | err += sn9c102_i2c_write(cam, 0x11, 0x09); |
@@ -572,13 +496,11 @@ static struct sn9c102_sensor ov7660 = { | |||
572 | 496 | ||
573 | int sn9c102_probe_ov7660(struct sn9c102_device* cam) | 497 | int sn9c102_probe_ov7660(struct sn9c102_device* cam) |
574 | { | 498 | { |
575 | int pid, ver, err = 0; | 499 | int pid, ver, err; |
576 | 500 | ||
577 | err += sn9c102_write_reg(cam, 0x01, 0xf1); | 501 | err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1}, |
578 | err += sn9c102_write_reg(cam, 0x00, 0xf1); | 502 | {0x01, 0x01}, {0x00, 0x01}, |
579 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 503 | {0x28, 0x17}); |
580 | err += sn9c102_write_reg(cam, 0x00, 0x01); | ||
581 | err += sn9c102_write_reg(cam, 0x28, 0x17); | ||
582 | 504 | ||
583 | pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a); | 505 | pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a); |
584 | ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b); | 506 | ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b); |