diff options
Diffstat (limited to 'drivers/media/video/s5p-fimc/regs-fimc.h')
-rw-r--r-- | drivers/media/video/s5p-fimc/regs-fimc.h | 293 |
1 files changed, 293 insertions, 0 deletions
diff --git a/drivers/media/video/s5p-fimc/regs-fimc.h b/drivers/media/video/s5p-fimc/regs-fimc.h new file mode 100644 index 000000000000..a3cfe824db00 --- /dev/null +++ b/drivers/media/video/s5p-fimc/regs-fimc.h | |||
@@ -0,0 +1,293 @@ | |||
1 | /* | ||
2 | * Register definition file for Samsung Camera Interface (FIMC) driver | ||
3 | * | ||
4 | * Copyright (c) 2010 Samsung Electronics | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef REGS_FIMC_H_ | ||
12 | #define REGS_FIMC_H_ | ||
13 | |||
14 | #define S5P_CIOYSA(__x) (0x18 + (__x) * 4) | ||
15 | #define S5P_CIOCBSA(__x) (0x28 + (__x) * 4) | ||
16 | #define S5P_CIOCRSA(__x) (0x38 + (__x) * 4) | ||
17 | |||
18 | /* Input source format */ | ||
19 | #define S5P_CISRCFMT 0x00 | ||
20 | #define S5P_CISRCFMT_ITU601_8BIT (1 << 31) | ||
21 | #define S5P_CISRCFMT_ITU601_16BIT (1 << 29) | ||
22 | #define S5P_CISRCFMT_ORDER422_YCBYCR (0 << 14) | ||
23 | #define S5P_CISRCFMT_ORDER422_YCRYCB (1 << 14) | ||
24 | #define S5P_CISRCFMT_ORDER422_CBYCRY (2 << 14) | ||
25 | #define S5P_CISRCFMT_ORDER422_CRYCBY (3 << 14) | ||
26 | #define S5P_CISRCFMT_HSIZE(x) ((x) << 16) | ||
27 | #define S5P_CISRCFMT_VSIZE(x) ((x) << 0) | ||
28 | |||
29 | /* Window offset */ | ||
30 | #define S5P_CIWDOFST 0x04 | ||
31 | #define S5P_CIWDOFST_WINOFSEN (1 << 31) | ||
32 | #define S5P_CIWDOFST_CLROVFIY (1 << 30) | ||
33 | #define S5P_CIWDOFST_CLROVRLB (1 << 29) | ||
34 | #define S5P_CIWDOFST_WINHOROFST_MASK (0x7ff << 16) | ||
35 | #define S5P_CIWDOFST_CLROVFICB (1 << 15) | ||
36 | #define S5P_CIWDOFST_CLROVFICR (1 << 14) | ||
37 | #define S5P_CIWDOFST_WINHOROFST(x) ((x) << 16) | ||
38 | #define S5P_CIWDOFST_WINVEROFST(x) ((x) << 0) | ||
39 | #define S5P_CIWDOFST_WINVEROFST_MASK (0xfff << 0) | ||
40 | |||
41 | /* Global control */ | ||
42 | #define S5P_CIGCTRL 0x08 | ||
43 | #define S5P_CIGCTRL_SWRST (1 << 31) | ||
44 | #define S5P_CIGCTRL_CAMRST_A (1 << 30) | ||
45 | #define S5P_CIGCTRL_SELCAM_ITU_A (1 << 29) | ||
46 | #define S5P_CIGCTRL_SELCAM_ITU_MASK (1 << 29) | ||
47 | #define S5P_CIGCTRL_TESTPAT_NORMAL (0 << 27) | ||
48 | #define S5P_CIGCTRL_TESTPAT_COLOR_BAR (1 << 27) | ||
49 | #define S5P_CIGCTRL_TESTPAT_HOR_INC (2 << 27) | ||
50 | #define S5P_CIGCTRL_TESTPAT_VER_INC (3 << 27) | ||
51 | #define S5P_CIGCTRL_TESTPAT_MASK (3 << 27) | ||
52 | #define S5P_CIGCTRL_TESTPAT_SHIFT (27) | ||
53 | #define S5P_CIGCTRL_INVPOLPCLK (1 << 26) | ||
54 | #define S5P_CIGCTRL_INVPOLVSYNC (1 << 25) | ||
55 | #define S5P_CIGCTRL_INVPOLHREF (1 << 24) | ||
56 | #define S5P_CIGCTRL_IRQ_OVFEN (1 << 22) | ||
57 | #define S5P_CIGCTRL_HREF_MASK (1 << 21) | ||
58 | #define S5P_CIGCTRL_IRQ_LEVEL (1 << 20) | ||
59 | #define S5P_CIGCTRL_IRQ_CLR (1 << 19) | ||
60 | #define S5P_CIGCTRL_IRQ_ENABLE (1 << 16) | ||
61 | #define S5P_CIGCTRL_SHDW_DISABLE (1 << 12) | ||
62 | #define S5P_CIGCTRL_SELCAM_MIPI_A (1 << 7) | ||
63 | #define S5P_CIGCTRL_CAMIF_SELWB (1 << 6) | ||
64 | #define S5P_CIGCTRL_INVPOLHSYNC (1 << 4) | ||
65 | #define S5P_CIGCTRL_SELCAM_MIPI (1 << 3) | ||
66 | #define S5P_CIGCTRL_INTERLACE (1 << 0) | ||
67 | |||
68 | /* Window offset 2 */ | ||
69 | #define S5P_CIWDOFST2 0x14 | ||
70 | #define S5P_CIWDOFST2_HOROFF_MASK (0xfff << 16) | ||
71 | #define S5P_CIWDOFST2_VEROFF_MASK (0xfff << 0) | ||
72 | #define S5P_CIWDOFST2_HOROFF(x) ((x) << 16) | ||
73 | #define S5P_CIWDOFST2_VEROFF(x) ((x) << 0) | ||
74 | |||
75 | /* Output DMA Y plane start address */ | ||
76 | #define S5P_CIOYSA1 0x18 | ||
77 | #define S5P_CIOYSA2 0x1c | ||
78 | #define S5P_CIOYSA3 0x20 | ||
79 | #define S5P_CIOYSA4 0x24 | ||
80 | |||
81 | /* Output DMA Cb plane start address */ | ||
82 | #define S5P_CIOCBSA1 0x28 | ||
83 | #define S5P_CIOCBSA2 0x2c | ||
84 | #define S5P_CIOCBSA3 0x30 | ||
85 | #define S5P_CIOCBSA4 0x34 | ||
86 | |||
87 | /* Output DMA Cr plane start address */ | ||
88 | #define S5P_CIOCRSA1 0x38 | ||
89 | #define S5P_CIOCRSA2 0x3c | ||
90 | #define S5P_CIOCRSA3 0x40 | ||
91 | #define S5P_CIOCRSA4 0x44 | ||
92 | |||
93 | /* Target image format */ | ||
94 | #define S5P_CITRGFMT 0x48 | ||
95 | #define S5P_CITRGFMT_INROT90 (1 << 31) | ||
96 | #define S5P_CITRGFMT_YCBCR420 (0 << 29) | ||
97 | #define S5P_CITRGFMT_YCBCR422 (1 << 29) | ||
98 | #define S5P_CITRGFMT_YCBCR422_1P (2 << 29) | ||
99 | #define S5P_CITRGFMT_RGB (3 << 29) | ||
100 | #define S5P_CITRGFMT_FMT_MASK (3 << 29) | ||
101 | #define S5P_CITRGFMT_HSIZE_MASK (0xfff << 16) | ||
102 | #define S5P_CITRGFMT_FLIP_SHIFT (14) | ||
103 | #define S5P_CITRGFMT_FLIP_NORMAL (0 << 14) | ||
104 | #define S5P_CITRGFMT_FLIP_X_MIRROR (1 << 14) | ||
105 | #define S5P_CITRGFMT_FLIP_Y_MIRROR (2 << 14) | ||
106 | #define S5P_CITRGFMT_FLIP_180 (3 << 14) | ||
107 | #define S5P_CITRGFMT_FLIP_MASK (3 << 14) | ||
108 | #define S5P_CITRGFMT_OUTROT90 (1 << 13) | ||
109 | #define S5P_CITRGFMT_VSIZE_MASK (0xfff << 0) | ||
110 | #define S5P_CITRGFMT_HSIZE(x) ((x) << 16) | ||
111 | #define S5P_CITRGFMT_VSIZE(x) ((x) << 0) | ||
112 | |||
113 | /* Output DMA control */ | ||
114 | #define S5P_CIOCTRL 0x4c | ||
115 | #define S5P_CIOCTRL_ORDER422_MASK (3 << 0) | ||
116 | #define S5P_CIOCTRL_ORDER422_CRYCBY (0 << 0) | ||
117 | #define S5P_CIOCTRL_ORDER422_YCRYCB (1 << 0) | ||
118 | #define S5P_CIOCTRL_ORDER422_CBYCRY (2 << 0) | ||
119 | #define S5P_CIOCTRL_ORDER422_YCBYCR (3 << 0) | ||
120 | #define S5P_CIOCTRL_LASTIRQ_ENABLE (1 << 2) | ||
121 | #define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3) | ||
122 | #define S5P_CIOCTRL_YCBCR_2PLANE (1 << 3) | ||
123 | #define S5P_CIOCTRL_YCBCR_PLANE_MASK (1 << 3) | ||
124 | #define S5P_CIOCTRL_ORDER2P_SHIFT (24) | ||
125 | #define S5P_CIOCTRL_ORDER2P_MASK (3 << 24) | ||
126 | #define S5P_CIOCTRL_ORDER422_2P_LSB_CRCB (0 << 24) | ||
127 | |||
128 | /* Pre-scaler control 1 */ | ||
129 | #define S5P_CISCPRERATIO 0x50 | ||
130 | #define S5P_CISCPRERATIO_SHFACTOR(x) ((x) << 28) | ||
131 | #define S5P_CISCPRERATIO_HOR(x) ((x) << 16) | ||
132 | #define S5P_CISCPRERATIO_VER(x) ((x) << 0) | ||
133 | |||
134 | #define S5P_CISCPREDST 0x54 | ||
135 | #define S5P_CISCPREDST_WIDTH(x) ((x) << 16) | ||
136 | #define S5P_CISCPREDST_HEIGHT(x) ((x) << 0) | ||
137 | |||
138 | /* Main scaler control */ | ||
139 | #define S5P_CISCCTRL 0x58 | ||
140 | #define S5P_CISCCTRL_SCALERBYPASS (1 << 31) | ||
141 | #define S5P_CISCCTRL_SCALEUP_H (1 << 30) | ||
142 | #define S5P_CISCCTRL_SCALEUP_V (1 << 29) | ||
143 | #define S5P_CISCCTRL_CSCR2Y_WIDE (1 << 28) | ||
144 | #define S5P_CISCCTRL_CSCY2R_WIDE (1 << 27) | ||
145 | #define S5P_CISCCTRL_LCDPATHEN_FIFO (1 << 26) | ||
146 | #define S5P_CISCCTRL_INTERLACE (1 << 25) | ||
147 | #define S5P_CISCCTRL_SCALERSTART (1 << 15) | ||
148 | #define S5P_CISCCTRL_INRGB_FMT_RGB565 (0 << 13) | ||
149 | #define S5P_CISCCTRL_INRGB_FMT_RGB666 (1 << 13) | ||
150 | #define S5P_CISCCTRL_INRGB_FMT_RGB888 (2 << 13) | ||
151 | #define S5P_CISCCTRL_INRGB_FMT_MASK (3 << 13) | ||
152 | #define S5P_CISCCTRL_OUTRGB_FMT_RGB565 (0 << 11) | ||
153 | #define S5P_CISCCTRL_OUTRGB_FMT_RGB666 (1 << 11) | ||
154 | #define S5P_CISCCTRL_OUTRGB_FMT_RGB888 (2 << 11) | ||
155 | #define S5P_CISCCTRL_OUTRGB_FMT_MASK (3 << 11) | ||
156 | #define S5P_CISCCTRL_RGB_EXT (1 << 10) | ||
157 | #define S5P_CISCCTRL_ONE2ONE (1 << 9) | ||
158 | #define S5P_CISCCTRL_SC_HORRATIO(x) ((x) << 16) | ||
159 | #define S5P_CISCCTRL_SC_VERRATIO(x) ((x) << 0) | ||
160 | |||
161 | /* Target area */ | ||
162 | #define S5P_CITAREA 0x5c | ||
163 | #define S5P_CITAREA_MASK 0x0fffffff | ||
164 | |||
165 | /* General status */ | ||
166 | #define S5P_CISTATUS 0x64 | ||
167 | #define S5P_CISTATUS_OVFIY (1 << 31) | ||
168 | #define S5P_CISTATUS_OVFICB (1 << 30) | ||
169 | #define S5P_CISTATUS_OVFICR (1 << 29) | ||
170 | #define S5P_CISTATUS_VSYNC (1 << 28) | ||
171 | #define S5P_CISTATUS_WINOFF_EN (1 << 25) | ||
172 | #define S5P_CISTATUS_IMGCPT_EN (1 << 22) | ||
173 | #define S5P_CISTATUS_IMGCPT_SCEN (1 << 21) | ||
174 | #define S5P_CISTATUS_VSYNC_A (1 << 20) | ||
175 | #define S5P_CISTATUS_VSYNC_B (1 << 19) | ||
176 | #define S5P_CISTATUS_OVRLB (1 << 18) | ||
177 | #define S5P_CISTATUS_FRAME_END (1 << 17) | ||
178 | #define S5P_CISTATUS_LASTCAPT_END (1 << 16) | ||
179 | #define S5P_CISTATUS_VVALID_A (1 << 15) | ||
180 | #define S5P_CISTATUS_VVALID_B (1 << 14) | ||
181 | |||
182 | /* Image capture control */ | ||
183 | #define S5P_CIIMGCPT 0xc0 | ||
184 | #define S5P_CIIMGCPT_IMGCPTEN (1 << 31) | ||
185 | #define S5P_CIIMGCPT_IMGCPTEN_SC (1 << 30) | ||
186 | #define S5P_CIIMGCPT_CPT_FREN_ENABLE (1 << 25) | ||
187 | #define S5P_CIIMGCPT_CPT_FRMOD_CNT (1 << 18) | ||
188 | |||
189 | /* Frame capture sequence */ | ||
190 | #define S5P_CICPTSEQ 0xc4 | ||
191 | |||
192 | /* Image effect */ | ||
193 | #define S5P_CIIMGEFF 0xd0 | ||
194 | #define S5P_CIIMGEFF_IE_DISABLE (0 << 30) | ||
195 | #define S5P_CIIMGEFF_IE_ENABLE (1 << 30) | ||
196 | #define S5P_CIIMGEFF_IE_SC_BEFORE (0 << 29) | ||
197 | #define S5P_CIIMGEFF_IE_SC_AFTER (1 << 29) | ||
198 | #define S5P_CIIMGEFF_FIN_BYPASS (0 << 26) | ||
199 | #define S5P_CIIMGEFF_FIN_ARBITRARY (1 << 26) | ||
200 | #define S5P_CIIMGEFF_FIN_NEGATIVE (2 << 26) | ||
201 | #define S5P_CIIMGEFF_FIN_ARTFREEZE (3 << 26) | ||
202 | #define S5P_CIIMGEFF_FIN_EMBOSSING (4 << 26) | ||
203 | #define S5P_CIIMGEFF_FIN_SILHOUETTE (5 << 26) | ||
204 | #define S5P_CIIMGEFF_FIN_MASK (7 << 26) | ||
205 | #define S5P_CIIMGEFF_PAT_CBCR_MASK ((0xff < 13) | (0xff < 0)) | ||
206 | #define S5P_CIIMGEFF_PAT_CB(x) ((x) << 13) | ||
207 | #define S5P_CIIMGEFF_PAT_CR(x) ((x) << 0) | ||
208 | |||
209 | /* Input DMA Y/Cb/Cr plane start address 0 */ | ||
210 | #define S5P_CIIYSA0 0xd4 | ||
211 | #define S5P_CIICBSA0 0xd8 | ||
212 | #define S5P_CIICRSA0 0xdc | ||
213 | |||
214 | /* Real input DMA image size */ | ||
215 | #define S5P_CIREAL_ISIZE 0xf8 | ||
216 | #define S5P_CIREAL_ISIZE_AUTOLOAD_EN (1 << 31) | ||
217 | #define S5P_CIREAL_ISIZE_ADDR_CH_DIS (1 << 30) | ||
218 | #define S5P_CIREAL_ISIZE_HEIGHT(x) ((x) << 16) | ||
219 | #define S5P_CIREAL_ISIZE_WIDTH(x) ((x) << 0) | ||
220 | |||
221 | |||
222 | /* Input DMA control */ | ||
223 | #define S5P_MSCTRL 0xfc | ||
224 | #define S5P_MSCTRL_IN_BURST_COUNT_MASK (3 << 24) | ||
225 | #define S5P_MSCTRL_2P_IN_ORDER_MASK (3 << 16) | ||
226 | #define S5P_MSCTRL_2P_IN_ORDER_SHIFT 16 | ||
227 | #define S5P_MSCTRL_C_INT_IN_3PLANE (0 << 15) | ||
228 | #define S5P_MSCTRL_C_INT_IN_2PLANE (1 << 15) | ||
229 | #define S5P_MSCTRL_C_INT_IN_MASK (1 << 15) | ||
230 | #define S5P_MSCTRL_FLIP_SHIFT 13 | ||
231 | #define S5P_MSCTRL_FLIP_MASK (3 << 13) | ||
232 | #define S5P_MSCTRL_FLIP_NORMAL (0 << 13) | ||
233 | #define S5P_MSCTRL_FLIP_X_MIRROR (1 << 13) | ||
234 | #define S5P_MSCTRL_FLIP_Y_MIRROR (2 << 13) | ||
235 | #define S5P_MSCTRL_FLIP_180 (3 << 13) | ||
236 | #define S5P_MSCTRL_ORDER422_SHIFT 4 | ||
237 | #define S5P_MSCTRL_ORDER422_CRYCBY (0 << 4) | ||
238 | #define S5P_MSCTRL_ORDER422_YCRYCB (1 << 4) | ||
239 | #define S5P_MSCTRL_ORDER422_CBYCRY (2 << 4) | ||
240 | #define S5P_MSCTRL_ORDER422_YCBYCR (3 << 4) | ||
241 | #define S5P_MSCTRL_ORDER422_MASK (3 << 4) | ||
242 | #define S5P_MSCTRL_INPUT_EXTCAM (0 << 3) | ||
243 | #define S5P_MSCTRL_INPUT_MEMORY (1 << 3) | ||
244 | #define S5P_MSCTRL_INPUT_MASK (1 << 3) | ||
245 | #define S5P_MSCTRL_INFORMAT_YCBCR420 (0 << 1) | ||
246 | #define S5P_MSCTRL_INFORMAT_YCBCR422 (1 << 1) | ||
247 | #define S5P_MSCTRL_INFORMAT_YCBCR422_1P (2 << 1) | ||
248 | #define S5P_MSCTRL_INFORMAT_RGB (3 << 1) | ||
249 | #define S5P_MSCTRL_INFORMAT_MASK (3 << 1) | ||
250 | #define S5P_MSCTRL_ENVID (1 << 0) | ||
251 | #define S5P_MSCTRL_FRAME_COUNT(x) ((x) << 24) | ||
252 | |||
253 | /* Input DMA Y/Cb/Cr plane start address 1 */ | ||
254 | #define S5P_CIIYSA1 0x144 | ||
255 | #define S5P_CIICBSA1 0x148 | ||
256 | #define S5P_CIICRSA1 0x14c | ||
257 | |||
258 | /* Output DMA Y/Cb/Cr offset */ | ||
259 | #define S5P_CIOYOFF 0x168 | ||
260 | #define S5P_CIOCBOFF 0x16c | ||
261 | #define S5P_CIOCROFF 0x170 | ||
262 | |||
263 | /* Input DMA Y/Cb/Cr offset */ | ||
264 | #define S5P_CIIYOFF 0x174 | ||
265 | #define S5P_CIICBOFF 0x178 | ||
266 | #define S5P_CIICROFF 0x17c | ||
267 | |||
268 | #define S5P_CIO_OFFS_VER(x) ((x) << 16) | ||
269 | #define S5P_CIO_OFFS_HOR(x) ((x) << 0) | ||
270 | |||
271 | /* Input DMA original image size */ | ||
272 | #define S5P_ORGISIZE 0x180 | ||
273 | |||
274 | /* Output DMA original image size */ | ||
275 | #define S5P_ORGOSIZE 0x184 | ||
276 | |||
277 | #define S5P_ORIG_SIZE_VER(x) ((x) << 16) | ||
278 | #define S5P_ORIG_SIZE_HOR(x) ((x) << 0) | ||
279 | |||
280 | /* Real output DMA image size (extension register) */ | ||
281 | #define S5P_CIEXTEN 0x188 | ||
282 | |||
283 | #define S5P_CIDMAPARAM 0x18c | ||
284 | #define S5P_CIDMAPARAM_R_LINEAR (0 << 29) | ||
285 | #define S5P_CIDMAPARAM_R_64X32 (3 << 29) | ||
286 | #define S5P_CIDMAPARAM_W_LINEAR (0 << 13) | ||
287 | #define S5P_CIDMAPARAM_W_64X32 (3 << 13) | ||
288 | #define S5P_CIDMAPARAM_TILE_MASK ((3 << 29) | (3 << 13)) | ||
289 | |||
290 | /* MIPI CSI image format */ | ||
291 | #define S5P_CSIIMGFMT 0x194 | ||
292 | |||
293 | #endif /* REGS_FIMC_H_ */ | ||