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-rw-r--r--drivers/media/video/omap3isp/isp.c2241
1 files changed, 0 insertions, 2241 deletions
diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c
deleted file mode 100644
index e0096e07dbdc..000000000000
--- a/drivers/media/video/omap3isp/isp.c
+++ /dev/null
@@ -1,2241 +0,0 @@
1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
58#include <linux/delay.h>
59#include <linux/device.h>
60#include <linux/dma-mapping.h>
61#include <linux/i2c.h>
62#include <linux/interrupt.h>
63#include <linux/module.h>
64#include <linux/platform_device.h>
65#include <linux/regulator/consumer.h>
66#include <linux/slab.h>
67#include <linux/sched.h>
68#include <linux/vmalloc.h>
69
70#include <media/v4l2-common.h>
71#include <media/v4l2-device.h>
72
73#include "isp.h"
74#include "ispreg.h"
75#include "ispccdc.h"
76#include "isppreview.h"
77#include "ispresizer.h"
78#include "ispcsi2.h"
79#include "ispccp2.h"
80#include "isph3a.h"
81#include "isphist.h"
82
83static unsigned int autoidle;
84module_param(autoidle, int, 0444);
85MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
86
87static void isp_save_ctx(struct isp_device *isp);
88
89static void isp_restore_ctx(struct isp_device *isp);
90
91static const struct isp_res_mapping isp_res_maps[] = {
92 {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
104 },
105 {
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
121 },
122};
123
124/* Structure for saving/restoring ISP module registers */
125static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
129 {0, ISP_TOK_TERM, 0}
130};
131
132/*
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
135 *
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
138 *
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
141 */
142void omap3isp_flush(struct isp_device *isp)
143{
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
146}
147
148/*
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
151 */
152static void isp_enable_interrupts(struct isp_device *isp)
153{
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
166
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
169}
170
171/*
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
174 */
175static void isp_disable_interrupts(struct isp_device *isp)
176{
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
178}
179
180/**
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
185 *
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
188 *
189 * Divisor = cam_mclk_hz / xclk
190 *
191 * Returns the final frequency that is actually being generated
192 **/
193static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
194{
195 u32 divisor;
196 u32 currentxclk;
197 unsigned long mclk_hz;
198
199 if (!omap3isp_get(isp))
200 return 0;
201
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
203
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
212 } else {
213 divisor = xclk;
214 currentxclk = 0;
215 }
216
217 switch (xclksel) {
218 case ISP_XCLK_A:
219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
223 currentxclk);
224 break;
225 case ISP_XCLK_B:
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
230 currentxclk);
231 break;
232 case ISP_XCLK_NONE:
233 default:
234 omap3isp_put(isp);
235 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
236 "xclk. Must be 0 (A) or 1 (B).\n");
237 return -EINVAL;
238 }
239
240 /* Do we go from stable whatever to clock? */
241 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
242 omap3isp_get(isp);
243 /* Stopping the clock. */
244 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
245 omap3isp_put(isp);
246
247 isp->xclk_divisor[xclksel - 1] = divisor;
248
249 omap3isp_put(isp);
250
251 return currentxclk;
252}
253
254/*
255 * isp_core_init - ISP core settings
256 * @isp: OMAP3 ISP device
257 * @idle: Consider idle state.
258 *
259 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
260 * interrupt source.
261 *
262 * We need to configure the HS/VS interrupt source before interrupts get
263 * enabled, as the sensor might be free-running and the ISP default setting
264 * (HS edge) would put an unnecessary burden on the CPU.
265 */
266static void isp_core_init(struct isp_device *isp, int idle)
267{
268 isp_reg_writel(isp,
269 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
270 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
271 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
272 ((isp->revision == ISP_REVISION_15_0) ?
273 ISP_SYSCONFIG_AUTOIDLE : 0),
274 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
275
276 isp_reg_writel(isp,
277 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
278 ISPCTRL_SYNC_DETECT_VSRISE,
279 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
280}
281
282/*
283 * Configure the bridge and lane shifter. Valid inputs are
284 *
285 * CCDC_INPUT_PARALLEL: Parallel interface
286 * CCDC_INPUT_CSI2A: CSI2a receiver
287 * CCDC_INPUT_CCP2B: CCP2b receiver
288 * CCDC_INPUT_CSI2C: CSI2c receiver
289 *
290 * The bridge and lane shifter are configured according to the selected input
291 * and the ISP platform data.
292 */
293void omap3isp_configure_bridge(struct isp_device *isp,
294 enum ccdc_input_entity input,
295 const struct isp_parallel_platform_data *pdata,
296 unsigned int shift, unsigned int bridge)
297{
298 u32 ispctrl_val;
299
300 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
301 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
302 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
303 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
304 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
305 ispctrl_val |= bridge;
306
307 switch (input) {
308 case CCDC_INPUT_PARALLEL:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
310 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
311 shift += pdata->data_lane_shift * 2;
312 break;
313
314 case CCDC_INPUT_CSI2A:
315 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
316 break;
317
318 case CCDC_INPUT_CCP2B:
319 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
320 break;
321
322 case CCDC_INPUT_CSI2C:
323 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
324 break;
325
326 default:
327 return;
328 }
329
330 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
331
332 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
333}
334
335void omap3isp_hist_dma_done(struct isp_device *isp)
336{
337 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
338 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
339 /* Histogram cannot be enabled in this frame anymore */
340 atomic_set(&isp->isp_hist.buf_err, 1);
341 dev_dbg(isp->dev, "hist: Out of synchronization with "
342 "CCDC. Ignoring next buffer.\n");
343 }
344}
345
346static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
347{
348 static const char *name[] = {
349 "CSIA_IRQ",
350 "res1",
351 "res2",
352 "CSIB_LCM_IRQ",
353 "CSIB_IRQ",
354 "res5",
355 "res6",
356 "res7",
357 "CCDC_VD0_IRQ",
358 "CCDC_VD1_IRQ",
359 "CCDC_VD2_IRQ",
360 "CCDC_ERR_IRQ",
361 "H3A_AF_DONE_IRQ",
362 "H3A_AWB_DONE_IRQ",
363 "res14",
364 "res15",
365 "HIST_DONE_IRQ",
366 "CCDC_LSC_DONE",
367 "CCDC_LSC_PREFETCH_COMPLETED",
368 "CCDC_LSC_PREFETCH_ERROR",
369 "PRV_DONE_IRQ",
370 "CBUFF_IRQ",
371 "res22",
372 "res23",
373 "RSZ_DONE_IRQ",
374 "OVF_IRQ",
375 "res26",
376 "res27",
377 "MMU_ERR_IRQ",
378 "OCP_ERR_IRQ",
379 "SEC_ERR_IRQ",
380 "HS_VS_IRQ",
381 };
382 int i;
383
384 dev_dbg(isp->dev, "ISP IRQ: ");
385
386 for (i = 0; i < ARRAY_SIZE(name); i++) {
387 if ((1 << i) & irqstatus)
388 printk(KERN_CONT "%s ", name[i]);
389 }
390 printk(KERN_CONT "\n");
391}
392
393static void isp_isr_sbl(struct isp_device *isp)
394{
395 struct device *dev = isp->dev;
396 struct isp_pipeline *pipe;
397 u32 sbl_pcr;
398
399 /*
400 * Handle shared buffer logic overflows for video buffers.
401 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
402 */
403 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
404 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
405 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
406
407 if (sbl_pcr)
408 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
409
410 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
411 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
412 if (pipe != NULL)
413 pipe->error = true;
414 }
415
416 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
417 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
418 if (pipe != NULL)
419 pipe->error = true;
420 }
421
422 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
423 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
424 if (pipe != NULL)
425 pipe->error = true;
426 }
427
428 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
429 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
430 if (pipe != NULL)
431 pipe->error = true;
432 }
433
434 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
435 | ISPSBL_PCR_RSZ2_WBL_OVF
436 | ISPSBL_PCR_RSZ3_WBL_OVF
437 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
438 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
439 if (pipe != NULL)
440 pipe->error = true;
441 }
442
443 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
444 omap3isp_stat_sbl_overflow(&isp->isp_af);
445
446 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
447 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
448}
449
450/*
451 * isp_isr - Interrupt Service Routine for Camera ISP module.
452 * @irq: Not used currently.
453 * @_isp: Pointer to the OMAP3 ISP device
454 *
455 * Handles the corresponding callback if plugged in.
456 *
457 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
458 * IRQ wasn't handled.
459 */
460static irqreturn_t isp_isr(int irq, void *_isp)
461{
462 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
463 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
464 IRQ0STATUS_CCDC_VD0_IRQ |
465 IRQ0STATUS_CCDC_VD1_IRQ |
466 IRQ0STATUS_HS_VS_IRQ;
467 struct isp_device *isp = _isp;
468 u32 irqstatus;
469
470 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
471 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
472
473 isp_isr_sbl(isp);
474
475 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
476 omap3isp_csi2_isr(&isp->isp_csi2a);
477
478 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
479 omap3isp_ccp2_isr(&isp->isp_ccp2);
480
481 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
482 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
483 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
484 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
485 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
486 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
487 omap3isp_stat_isr_frame_sync(&isp->isp_af);
488 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
489 }
490
491 if (irqstatus & ccdc_events)
492 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
493
494 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
495 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
496 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
497 omap3isp_preview_isr(&isp->isp_prev);
498 }
499
500 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
501 omap3isp_resizer_isr(&isp->isp_res);
502
503 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
504 omap3isp_stat_isr(&isp->isp_aewb);
505
506 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
507 omap3isp_stat_isr(&isp->isp_af);
508
509 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
510 omap3isp_stat_isr(&isp->isp_hist);
511
512 omap3isp_flush(isp);
513
514#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
515 isp_isr_dbg(isp, irqstatus);
516#endif
517
518 return IRQ_HANDLED;
519}
520
521/* -----------------------------------------------------------------------------
522 * Pipeline power management
523 *
524 * Entities must be powered up when part of a pipeline that contains at least
525 * one open video device node.
526 *
527 * To achieve this use the entity use_count field to track the number of users.
528 * For entities corresponding to video device nodes the use_count field stores
529 * the users count of the node. For entities corresponding to subdevs the
530 * use_count field stores the total number of users of all video device nodes
531 * in the pipeline.
532 *
533 * The omap3isp_pipeline_pm_use() function must be called in the open() and
534 * close() handlers of video device nodes. It increments or decrements the use
535 * count of all subdev entities in the pipeline.
536 *
537 * To react to link management on powered pipelines, the link setup notification
538 * callback updates the use count of all entities in the source and sink sides
539 * of the link.
540 */
541
542/*
543 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
544 * @entity: The entity
545 *
546 * Return the total number of users of all video device nodes in the pipeline.
547 */
548static int isp_pipeline_pm_use_count(struct media_entity *entity)
549{
550 struct media_entity_graph graph;
551 int use = 0;
552
553 media_entity_graph_walk_start(&graph, entity);
554
555 while ((entity = media_entity_graph_walk_next(&graph))) {
556 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
557 use += entity->use_count;
558 }
559
560 return use;
561}
562
563/*
564 * isp_pipeline_pm_power_one - Apply power change to an entity
565 * @entity: The entity
566 * @change: Use count change
567 *
568 * Change the entity use count by @change. If the entity is a subdev update its
569 * power state by calling the core::s_power operation when the use count goes
570 * from 0 to != 0 or from != 0 to 0.
571 *
572 * Return 0 on success or a negative error code on failure.
573 */
574static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
575{
576 struct v4l2_subdev *subdev;
577 int ret;
578
579 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
580 ? media_entity_to_v4l2_subdev(entity) : NULL;
581
582 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
583 ret = v4l2_subdev_call(subdev, core, s_power, 1);
584 if (ret < 0 && ret != -ENOIOCTLCMD)
585 return ret;
586 }
587
588 entity->use_count += change;
589 WARN_ON(entity->use_count < 0);
590
591 if (entity->use_count == 0 && change < 0 && subdev != NULL)
592 v4l2_subdev_call(subdev, core, s_power, 0);
593
594 return 0;
595}
596
597/*
598 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
599 * @entity: The entity
600 * @change: Use count change
601 *
602 * Walk the pipeline to update the use count and the power state of all non-node
603 * entities.
604 *
605 * Return 0 on success or a negative error code on failure.
606 */
607static int isp_pipeline_pm_power(struct media_entity *entity, int change)
608{
609 struct media_entity_graph graph;
610 struct media_entity *first = entity;
611 int ret = 0;
612
613 if (!change)
614 return 0;
615
616 media_entity_graph_walk_start(&graph, entity);
617
618 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
619 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
620 ret = isp_pipeline_pm_power_one(entity, change);
621
622 if (!ret)
623 return 0;
624
625 media_entity_graph_walk_start(&graph, first);
626
627 while ((first = media_entity_graph_walk_next(&graph))
628 && first != entity)
629 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
630 isp_pipeline_pm_power_one(first, -change);
631
632 return ret;
633}
634
635/*
636 * omap3isp_pipeline_pm_use - Update the use count of an entity
637 * @entity: The entity
638 * @use: Use (1) or stop using (0) the entity
639 *
640 * Update the use count of all entities in the pipeline and power entities on or
641 * off accordingly.
642 *
643 * Return 0 on success or a negative error code on failure. Powering entities
644 * off is assumed to never fail. No failure can occur when the use parameter is
645 * set to 0.
646 */
647int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
648{
649 int change = use ? 1 : -1;
650 int ret;
651
652 mutex_lock(&entity->parent->graph_mutex);
653
654 /* Apply use count to node. */
655 entity->use_count += change;
656 WARN_ON(entity->use_count < 0);
657
658 /* Apply power change to connected non-nodes. */
659 ret = isp_pipeline_pm_power(entity, change);
660 if (ret < 0)
661 entity->use_count -= change;
662
663 mutex_unlock(&entity->parent->graph_mutex);
664
665 return ret;
666}
667
668/*
669 * isp_pipeline_link_notify - Link management notification callback
670 * @source: Pad at the start of the link
671 * @sink: Pad at the end of the link
672 * @flags: New link flags that will be applied
673 *
674 * React to link management on powered pipelines by updating the use count of
675 * all entities in the source and sink sides of the link. Entities are powered
676 * on or off accordingly.
677 *
678 * Return 0 on success or a negative error code on failure. Powering entities
679 * off is assumed to never fail. This function will not fail for disconnection
680 * events.
681 */
682static int isp_pipeline_link_notify(struct media_pad *source,
683 struct media_pad *sink, u32 flags)
684{
685 int source_use = isp_pipeline_pm_use_count(source->entity);
686 int sink_use = isp_pipeline_pm_use_count(sink->entity);
687 int ret;
688
689 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
690 /* Powering off entities is assumed to never fail. */
691 isp_pipeline_pm_power(source->entity, -sink_use);
692 isp_pipeline_pm_power(sink->entity, -source_use);
693 return 0;
694 }
695
696 ret = isp_pipeline_pm_power(source->entity, sink_use);
697 if (ret < 0)
698 return ret;
699
700 ret = isp_pipeline_pm_power(sink->entity, source_use);
701 if (ret < 0)
702 isp_pipeline_pm_power(source->entity, -sink_use);
703
704 return ret;
705}
706
707/* -----------------------------------------------------------------------------
708 * Pipeline stream management
709 */
710
711/*
712 * isp_pipeline_enable - Enable streaming on a pipeline
713 * @pipe: ISP pipeline
714 * @mode: Stream mode (single shot or continuous)
715 *
716 * Walk the entities chain starting at the pipeline output video node and start
717 * all modules in the chain in the given mode.
718 *
719 * Return 0 if successful, or the return value of the failed video::s_stream
720 * operation otherwise.
721 */
722static int isp_pipeline_enable(struct isp_pipeline *pipe,
723 enum isp_pipeline_stream_state mode)
724{
725 struct isp_device *isp = pipe->output->isp;
726 struct media_entity *entity;
727 struct media_pad *pad;
728 struct v4l2_subdev *subdev;
729 unsigned long flags;
730 int ret;
731
732 /* If the preview engine crashed it might not respond to read/write
733 * operations on the L4 bus. This would result in a bus fault and a
734 * kernel oops. Refuse to start streaming in that case. This check must
735 * be performed before the loop below to avoid starting entities if the
736 * pipeline won't start anyway (those entities would then likely fail to
737 * stop, making the problem worse).
738 */
739 if ((pipe->entities & isp->crashed) &
740 (1U << isp->isp_prev.subdev.entity.id))
741 return -EIO;
742
743 spin_lock_irqsave(&pipe->lock, flags);
744 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
745 spin_unlock_irqrestore(&pipe->lock, flags);
746
747 pipe->do_propagation = false;
748
749 entity = &pipe->output->video.entity;
750 while (1) {
751 pad = &entity->pads[0];
752 if (!(pad->flags & MEDIA_PAD_FL_SINK))
753 break;
754
755 pad = media_entity_remote_source(pad);
756 if (pad == NULL ||
757 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
758 break;
759
760 entity = pad->entity;
761 subdev = media_entity_to_v4l2_subdev(entity);
762
763 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
764 if (ret < 0 && ret != -ENOIOCTLCMD)
765 return ret;
766
767 if (subdev == &isp->isp_ccdc.subdev) {
768 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
769 s_stream, mode);
770 v4l2_subdev_call(&isp->isp_af.subdev, video,
771 s_stream, mode);
772 v4l2_subdev_call(&isp->isp_hist.subdev, video,
773 s_stream, mode);
774 pipe->do_propagation = true;
775 }
776 }
777
778 return 0;
779}
780
781static int isp_pipeline_wait_resizer(struct isp_device *isp)
782{
783 return omap3isp_resizer_busy(&isp->isp_res);
784}
785
786static int isp_pipeline_wait_preview(struct isp_device *isp)
787{
788 return omap3isp_preview_busy(&isp->isp_prev);
789}
790
791static int isp_pipeline_wait_ccdc(struct isp_device *isp)
792{
793 return omap3isp_stat_busy(&isp->isp_af)
794 || omap3isp_stat_busy(&isp->isp_aewb)
795 || omap3isp_stat_busy(&isp->isp_hist)
796 || omap3isp_ccdc_busy(&isp->isp_ccdc);
797}
798
799#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
800
801static int isp_pipeline_wait(struct isp_device *isp,
802 int(*busy)(struct isp_device *isp))
803{
804 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
805
806 while (!time_after(jiffies, timeout)) {
807 if (!busy(isp))
808 return 0;
809 }
810
811 return 1;
812}
813
814/*
815 * isp_pipeline_disable - Disable streaming on a pipeline
816 * @pipe: ISP pipeline
817 *
818 * Walk the entities chain starting at the pipeline output video node and stop
819 * all modules in the chain. Wait synchronously for the modules to be stopped if
820 * necessary.
821 *
822 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
823 * can't be stopped (in which case a software reset of the ISP is probably
824 * necessary).
825 */
826static int isp_pipeline_disable(struct isp_pipeline *pipe)
827{
828 struct isp_device *isp = pipe->output->isp;
829 struct media_entity *entity;
830 struct media_pad *pad;
831 struct v4l2_subdev *subdev;
832 int failure = 0;
833 int ret;
834
835 /*
836 * We need to stop all the modules after CCDC first or they'll
837 * never stop since they may not get a full frame from CCDC.
838 */
839 entity = &pipe->output->video.entity;
840 while (1) {
841 pad = &entity->pads[0];
842 if (!(pad->flags & MEDIA_PAD_FL_SINK))
843 break;
844
845 pad = media_entity_remote_source(pad);
846 if (pad == NULL ||
847 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
848 break;
849
850 entity = pad->entity;
851 subdev = media_entity_to_v4l2_subdev(entity);
852
853 if (subdev == &isp->isp_ccdc.subdev) {
854 v4l2_subdev_call(&isp->isp_aewb.subdev,
855 video, s_stream, 0);
856 v4l2_subdev_call(&isp->isp_af.subdev,
857 video, s_stream, 0);
858 v4l2_subdev_call(&isp->isp_hist.subdev,
859 video, s_stream, 0);
860 }
861
862 v4l2_subdev_call(subdev, video, s_stream, 0);
863
864 if (subdev == &isp->isp_res.subdev)
865 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
866 else if (subdev == &isp->isp_prev.subdev)
867 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
868 else if (subdev == &isp->isp_ccdc.subdev)
869 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
870 else
871 ret = 0;
872
873 if (ret) {
874 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
875 /* If the entity failed to stopped, assume it has
876 * crashed. Mark it as such, the ISP will be reset when
877 * applications will release it.
878 */
879 isp->crashed |= 1U << subdev->entity.id;
880 failure = -ETIMEDOUT;
881 }
882 }
883
884 return failure;
885}
886
887/*
888 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
889 * @pipe: ISP pipeline
890 * @state: Stream state (stopped, single shot or continuous)
891 *
892 * Set the pipeline to the given stream state. Pipelines can be started in
893 * single-shot or continuous mode.
894 *
895 * Return 0 if successful, or the return value of the failed video::s_stream
896 * operation otherwise. The pipeline state is not updated when the operation
897 * fails, except when stopping the pipeline.
898 */
899int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
900 enum isp_pipeline_stream_state state)
901{
902 int ret;
903
904 if (state == ISP_PIPELINE_STREAM_STOPPED)
905 ret = isp_pipeline_disable(pipe);
906 else
907 ret = isp_pipeline_enable(pipe, state);
908
909 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
910 pipe->stream_state = state;
911
912 return ret;
913}
914
915/*
916 * isp_pipeline_resume - Resume streaming on a pipeline
917 * @pipe: ISP pipeline
918 *
919 * Resume video output and input and re-enable pipeline.
920 */
921static void isp_pipeline_resume(struct isp_pipeline *pipe)
922{
923 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
924
925 omap3isp_video_resume(pipe->output, !singleshot);
926 if (singleshot)
927 omap3isp_video_resume(pipe->input, 0);
928 isp_pipeline_enable(pipe, pipe->stream_state);
929}
930
931/*
932 * isp_pipeline_suspend - Suspend streaming on a pipeline
933 * @pipe: ISP pipeline
934 *
935 * Suspend pipeline.
936 */
937static void isp_pipeline_suspend(struct isp_pipeline *pipe)
938{
939 isp_pipeline_disable(pipe);
940}
941
942/*
943 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
944 * video node
945 * @me: ISP module's media entity
946 *
947 * Returns 1 if the entity has an enabled link to the output video node or 0
948 * otherwise. It's true only while pipeline can have no more than one output
949 * node.
950 */
951static int isp_pipeline_is_last(struct media_entity *me)
952{
953 struct isp_pipeline *pipe;
954 struct media_pad *pad;
955
956 if (!me->pipe)
957 return 0;
958 pipe = to_isp_pipeline(me);
959 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
960 return 0;
961 pad = media_entity_remote_source(&pipe->output->pad);
962 return pad->entity == me;
963}
964
965/*
966 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
967 * @me: ISP module's media entity
968 *
969 * Suspend the whole pipeline if module's entity has an enabled link to the
970 * output video node. It works only while pipeline can have no more than one
971 * output node.
972 */
973static void isp_suspend_module_pipeline(struct media_entity *me)
974{
975 if (isp_pipeline_is_last(me))
976 isp_pipeline_suspend(to_isp_pipeline(me));
977}
978
979/*
980 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
981 * @me: ISP module's media entity
982 *
983 * Resume the whole pipeline if module's entity has an enabled link to the
984 * output video node. It works only while pipeline can have no more than one
985 * output node.
986 */
987static void isp_resume_module_pipeline(struct media_entity *me)
988{
989 if (isp_pipeline_is_last(me))
990 isp_pipeline_resume(to_isp_pipeline(me));
991}
992
993/*
994 * isp_suspend_modules - Suspend ISP submodules.
995 * @isp: OMAP3 ISP device
996 *
997 * Returns 0 if suspend left in idle state all the submodules properly,
998 * or returns 1 if a general Reset is required to suspend the submodules.
999 */
1000static int isp_suspend_modules(struct isp_device *isp)
1001{
1002 unsigned long timeout;
1003
1004 omap3isp_stat_suspend(&isp->isp_aewb);
1005 omap3isp_stat_suspend(&isp->isp_af);
1006 omap3isp_stat_suspend(&isp->isp_hist);
1007 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1008 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1009 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1010 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1011 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1012
1013 timeout = jiffies + ISP_STOP_TIMEOUT;
1014 while (omap3isp_stat_busy(&isp->isp_af)
1015 || omap3isp_stat_busy(&isp->isp_aewb)
1016 || omap3isp_stat_busy(&isp->isp_hist)
1017 || omap3isp_preview_busy(&isp->isp_prev)
1018 || omap3isp_resizer_busy(&isp->isp_res)
1019 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1020 if (time_after(jiffies, timeout)) {
1021 dev_info(isp->dev, "can't stop modules.\n");
1022 return 1;
1023 }
1024 msleep(1);
1025 }
1026
1027 return 0;
1028}
1029
1030/*
1031 * isp_resume_modules - Resume ISP submodules.
1032 * @isp: OMAP3 ISP device
1033 */
1034static void isp_resume_modules(struct isp_device *isp)
1035{
1036 omap3isp_stat_resume(&isp->isp_aewb);
1037 omap3isp_stat_resume(&isp->isp_af);
1038 omap3isp_stat_resume(&isp->isp_hist);
1039 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1040 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1041 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1042 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1043 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1044}
1045
1046/*
1047 * isp_reset - Reset ISP with a timeout wait for idle.
1048 * @isp: OMAP3 ISP device
1049 */
1050static int isp_reset(struct isp_device *isp)
1051{
1052 unsigned long timeout = 0;
1053
1054 isp_reg_writel(isp,
1055 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1056 | ISP_SYSCONFIG_SOFTRESET,
1057 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1058 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1059 ISP_SYSSTATUS) & 0x1)) {
1060 if (timeout++ > 10000) {
1061 dev_alert(isp->dev, "cannot reset ISP\n");
1062 return -ETIMEDOUT;
1063 }
1064 udelay(1);
1065 }
1066
1067 isp->crashed = 0;
1068 return 0;
1069}
1070
1071/*
1072 * isp_save_context - Saves the values of the ISP module registers.
1073 * @isp: OMAP3 ISP device
1074 * @reg_list: Structure containing pairs of register address and value to
1075 * modify on OMAP.
1076 */
1077static void
1078isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1079{
1080 struct isp_reg *next = reg_list;
1081
1082 for (; next->reg != ISP_TOK_TERM; next++)
1083 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1084}
1085
1086/*
1087 * isp_restore_context - Restores the values of the ISP module registers.
1088 * @isp: OMAP3 ISP device
1089 * @reg_list: Structure containing pairs of register address and value to
1090 * modify on OMAP.
1091 */
1092static void
1093isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1094{
1095 struct isp_reg *next = reg_list;
1096
1097 for (; next->reg != ISP_TOK_TERM; next++)
1098 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1099}
1100
1101/*
1102 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1103 * @isp: OMAP3 ISP device
1104 *
1105 * Routine for saving the context of each module in the ISP.
1106 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1107 */
1108static void isp_save_ctx(struct isp_device *isp)
1109{
1110 isp_save_context(isp, isp_reg_list);
1111 omap_iommu_save_ctx(isp->dev);
1112}
1113
1114/*
1115 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1116 * @isp: OMAP3 ISP device
1117 *
1118 * Routine for restoring the context of each module in the ISP.
1119 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1120 */
1121static void isp_restore_ctx(struct isp_device *isp)
1122{
1123 isp_restore_context(isp, isp_reg_list);
1124 omap_iommu_restore_ctx(isp->dev);
1125 omap3isp_ccdc_restore_context(isp);
1126 omap3isp_preview_restore_context(isp);
1127}
1128
1129/* -----------------------------------------------------------------------------
1130 * SBL resources management
1131 */
1132#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1133 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1134 OMAP3_ISP_SBL_PREVIEW_READ | \
1135 OMAP3_ISP_SBL_RESIZER_READ)
1136#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1137 OMAP3_ISP_SBL_CSI2A_WRITE | \
1138 OMAP3_ISP_SBL_CSI2C_WRITE | \
1139 OMAP3_ISP_SBL_CCDC_WRITE | \
1140 OMAP3_ISP_SBL_PREVIEW_WRITE)
1141
1142void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1143{
1144 u32 sbl = 0;
1145
1146 isp->sbl_resources |= res;
1147
1148 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1149 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1150
1151 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1152 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1153
1154 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1155 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1156
1157 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1158 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1159
1160 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1161 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1162
1163 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1164 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1165
1166 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1167}
1168
1169void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1170{
1171 u32 sbl = 0;
1172
1173 isp->sbl_resources &= ~res;
1174
1175 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1176 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1177
1178 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1179 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1180
1181 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1182 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1183
1184 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1185 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1186
1187 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1188 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1189
1190 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1191 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1192
1193 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1194}
1195
1196/*
1197 * isp_module_sync_idle - Helper to sync module with its idle state
1198 * @me: ISP submodule's media entity
1199 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1200 * @stopping: flag which tells module wants to stop
1201 *
1202 * This function checks if ISP submodule needs to wait for next interrupt. If
1203 * yes, makes the caller to sleep while waiting for such event.
1204 */
1205int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1206 atomic_t *stopping)
1207{
1208 struct isp_pipeline *pipe = to_isp_pipeline(me);
1209
1210 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1211 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1212 !isp_pipeline_ready(pipe)))
1213 return 0;
1214
1215 /*
1216 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1217 * scenario. We'll call it here to avoid race conditions.
1218 */
1219 atomic_set(stopping, 1);
1220 smp_mb();
1221
1222 /*
1223 * If module is the last one, it's writing to memory. In this case,
1224 * it's necessary to check if the module is already paused due to
1225 * DMA queue underrun or if it has to wait for next interrupt to be
1226 * idle.
1227 * If it isn't the last one, the function won't sleep but *stopping
1228 * will still be set to warn next submodule caller's interrupt the
1229 * module wants to be idle.
1230 */
1231 if (isp_pipeline_is_last(me)) {
1232 struct isp_video *video = pipe->output;
1233 unsigned long flags;
1234 spin_lock_irqsave(&video->queue->irqlock, flags);
1235 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1236 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1237 atomic_set(stopping, 0);
1238 smp_mb();
1239 return 0;
1240 }
1241 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1242 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1243 msecs_to_jiffies(1000))) {
1244 atomic_set(stopping, 0);
1245 smp_mb();
1246 return -ETIMEDOUT;
1247 }
1248 }
1249
1250 return 0;
1251}
1252
1253/*
1254 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1255 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1256 * @stopping: flag which tells module wants to stop
1257 *
1258 * This function checks if ISP submodule was stopping. In case of yes, it
1259 * notices the caller by setting stopping to 0 and waking up the wait queue.
1260 * Returns 1 if it was stopping or 0 otherwise.
1261 */
1262int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1263 atomic_t *stopping)
1264{
1265 if (atomic_cmpxchg(stopping, 1, 0)) {
1266 wake_up(wait);
1267 return 1;
1268 }
1269
1270 return 0;
1271}
1272
1273/* --------------------------------------------------------------------------
1274 * Clock management
1275 */
1276
1277#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1278 ISPCTRL_HIST_CLK_EN | \
1279 ISPCTRL_RSZ_CLK_EN | \
1280 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1281 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1282
1283static void __isp_subclk_update(struct isp_device *isp)
1284{
1285 u32 clk = 0;
1286
1287 /* AEWB and AF share the same clock. */
1288 if (isp->subclk_resources &
1289 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1290 clk |= ISPCTRL_H3A_CLK_EN;
1291
1292 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1293 clk |= ISPCTRL_HIST_CLK_EN;
1294
1295 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1296 clk |= ISPCTRL_RSZ_CLK_EN;
1297
1298 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1299 * RAM as well.
1300 */
1301 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1302 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1303
1304 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1305 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1306
1307 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1308 ISPCTRL_CLKS_MASK, clk);
1309}
1310
1311void omap3isp_subclk_enable(struct isp_device *isp,
1312 enum isp_subclk_resource res)
1313{
1314 isp->subclk_resources |= res;
1315
1316 __isp_subclk_update(isp);
1317}
1318
1319void omap3isp_subclk_disable(struct isp_device *isp,
1320 enum isp_subclk_resource res)
1321{
1322 isp->subclk_resources &= ~res;
1323
1324 __isp_subclk_update(isp);
1325}
1326
1327/*
1328 * isp_enable_clocks - Enable ISP clocks
1329 * @isp: OMAP3 ISP device
1330 *
1331 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1332 */
1333static int isp_enable_clocks(struct isp_device *isp)
1334{
1335 int r;
1336 unsigned long rate;
1337 int divisor;
1338
1339 /*
1340 * cam_mclk clock chain:
1341 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1342 *
1343 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1344 * set to the same value. Hence the rate set for dpll4_m5
1345 * has to be twice of what is set on OMAP3430 to get
1346 * the required value for cam_mclk
1347 */
1348 if (cpu_is_omap3630())
1349 divisor = 1;
1350 else
1351 divisor = 2;
1352
1353 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1354 if (r) {
1355 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1356 goto out_clk_enable_ick;
1357 }
1358 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1359 CM_CAM_MCLK_HZ/divisor);
1360 if (r) {
1361 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1362 goto out_clk_enable_mclk;
1363 }
1364 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1365 if (r) {
1366 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1367 goto out_clk_enable_mclk;
1368 }
1369 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1370 if (rate != CM_CAM_MCLK_HZ)
1371 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1372 " expected : %d\n"
1373 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1374 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1375 if (r) {
1376 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1377 goto out_clk_enable_csi2_fclk;
1378 }
1379 return 0;
1380
1381out_clk_enable_csi2_fclk:
1382 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1383out_clk_enable_mclk:
1384 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1385out_clk_enable_ick:
1386 return r;
1387}
1388
1389/*
1390 * isp_disable_clocks - Disable ISP clocks
1391 * @isp: OMAP3 ISP device
1392 */
1393static void isp_disable_clocks(struct isp_device *isp)
1394{
1395 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1396 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1397 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1398}
1399
1400static const char *isp_clocks[] = {
1401 "cam_ick",
1402 "cam_mclk",
1403 "dpll4_m5_ck",
1404 "csi2_96m_fck",
1405 "l3_ick",
1406};
1407
1408static void isp_put_clocks(struct isp_device *isp)
1409{
1410 unsigned int i;
1411
1412 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1413 if (isp->clock[i]) {
1414 clk_put(isp->clock[i]);
1415 isp->clock[i] = NULL;
1416 }
1417 }
1418}
1419
1420static int isp_get_clocks(struct isp_device *isp)
1421{
1422 struct clk *clk;
1423 unsigned int i;
1424
1425 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1426 clk = clk_get(isp->dev, isp_clocks[i]);
1427 if (IS_ERR(clk)) {
1428 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1429 isp_put_clocks(isp);
1430 return PTR_ERR(clk);
1431 }
1432
1433 isp->clock[i] = clk;
1434 }
1435
1436 return 0;
1437}
1438
1439/*
1440 * omap3isp_get - Acquire the ISP resource.
1441 *
1442 * Initializes the clocks for the first acquire.
1443 *
1444 * Increment the reference count on the ISP. If the first reference is taken,
1445 * enable clocks and power-up all submodules.
1446 *
1447 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1448 */
1449static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1450{
1451 struct isp_device *__isp = isp;
1452
1453 if (isp == NULL)
1454 return NULL;
1455
1456 mutex_lock(&isp->isp_mutex);
1457 if (isp->ref_count > 0)
1458 goto out;
1459
1460 if (isp_enable_clocks(isp) < 0) {
1461 __isp = NULL;
1462 goto out;
1463 }
1464
1465 /* We don't want to restore context before saving it! */
1466 if (isp->has_context)
1467 isp_restore_ctx(isp);
1468
1469 if (irq)
1470 isp_enable_interrupts(isp);
1471
1472out:
1473 if (__isp != NULL)
1474 isp->ref_count++;
1475 mutex_unlock(&isp->isp_mutex);
1476
1477 return __isp;
1478}
1479
1480struct isp_device *omap3isp_get(struct isp_device *isp)
1481{
1482 return __omap3isp_get(isp, true);
1483}
1484
1485/*
1486 * omap3isp_put - Release the ISP
1487 *
1488 * Decrement the reference count on the ISP. If the last reference is released,
1489 * power-down all submodules, disable clocks and free temporary buffers.
1490 */
1491void omap3isp_put(struct isp_device *isp)
1492{
1493 if (isp == NULL)
1494 return;
1495
1496 mutex_lock(&isp->isp_mutex);
1497 BUG_ON(isp->ref_count == 0);
1498 if (--isp->ref_count == 0) {
1499 isp_disable_interrupts(isp);
1500 if (isp->domain) {
1501 isp_save_ctx(isp);
1502 isp->has_context = 1;
1503 }
1504 /* Reset the ISP if an entity has failed to stop. This is the
1505 * only way to recover from such conditions.
1506 */
1507 if (isp->crashed)
1508 isp_reset(isp);
1509 isp_disable_clocks(isp);
1510 }
1511 mutex_unlock(&isp->isp_mutex);
1512}
1513
1514/* --------------------------------------------------------------------------
1515 * Platform device driver
1516 */
1517
1518/*
1519 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1520 * @isp: OMAP3 ISP device
1521 */
1522#define ISP_PRINT_REGISTER(isp, name)\
1523 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1524 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1525#define SBL_PRINT_REGISTER(isp, name)\
1526 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1527 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1528
1529void omap3isp_print_status(struct isp_device *isp)
1530{
1531 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1532
1533 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1534 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1535 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1536 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1537 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1538 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1539 ISP_PRINT_REGISTER(isp, CTRL);
1540 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1541 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1542 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1543 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1544 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1545 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1546 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1547 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1548
1549 SBL_PRINT_REGISTER(isp, PCR);
1550 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1551
1552 dev_dbg(isp->dev, "--------------------------------------------\n");
1553}
1554
1555#ifdef CONFIG_PM
1556
1557/*
1558 * Power management support.
1559 *
1560 * As the ISP can't properly handle an input video stream interruption on a non
1561 * frame boundary, the ISP pipelines need to be stopped before sensors get
1562 * suspended. However, as suspending the sensors can require a running clock,
1563 * which can be provided by the ISP, the ISP can't be completely suspended
1564 * before the sensor.
1565 *
1566 * To solve this problem power management support is split into prepare/complete
1567 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1568 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1569 * resume(), and the the pipelines are restarted in complete().
1570 *
1571 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1572 * yet.
1573 */
1574static int isp_pm_prepare(struct device *dev)
1575{
1576 struct isp_device *isp = dev_get_drvdata(dev);
1577 int reset;
1578
1579 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1580
1581 if (isp->ref_count == 0)
1582 return 0;
1583
1584 reset = isp_suspend_modules(isp);
1585 isp_disable_interrupts(isp);
1586 isp_save_ctx(isp);
1587 if (reset)
1588 isp_reset(isp);
1589
1590 return 0;
1591}
1592
1593static int isp_pm_suspend(struct device *dev)
1594{
1595 struct isp_device *isp = dev_get_drvdata(dev);
1596
1597 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1598
1599 if (isp->ref_count)
1600 isp_disable_clocks(isp);
1601
1602 return 0;
1603}
1604
1605static int isp_pm_resume(struct device *dev)
1606{
1607 struct isp_device *isp = dev_get_drvdata(dev);
1608
1609 if (isp->ref_count == 0)
1610 return 0;
1611
1612 return isp_enable_clocks(isp);
1613}
1614
1615static void isp_pm_complete(struct device *dev)
1616{
1617 struct isp_device *isp = dev_get_drvdata(dev);
1618
1619 if (isp->ref_count == 0)
1620 return;
1621
1622 isp_restore_ctx(isp);
1623 isp_enable_interrupts(isp);
1624 isp_resume_modules(isp);
1625}
1626
1627#else
1628
1629#define isp_pm_prepare NULL
1630#define isp_pm_suspend NULL
1631#define isp_pm_resume NULL
1632#define isp_pm_complete NULL
1633
1634#endif /* CONFIG_PM */
1635
1636static void isp_unregister_entities(struct isp_device *isp)
1637{
1638 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1639 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1640 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1641 omap3isp_preview_unregister_entities(&isp->isp_prev);
1642 omap3isp_resizer_unregister_entities(&isp->isp_res);
1643 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1644 omap3isp_stat_unregister_entities(&isp->isp_af);
1645 omap3isp_stat_unregister_entities(&isp->isp_hist);
1646
1647 v4l2_device_unregister(&isp->v4l2_dev);
1648 media_device_unregister(&isp->media_dev);
1649}
1650
1651/*
1652 * isp_register_subdev_group - Register a group of subdevices
1653 * @isp: OMAP3 ISP device
1654 * @board_info: I2C subdevs board information array
1655 *
1656 * Register all I2C subdevices in the board_info array. The array must be
1657 * terminated by a NULL entry, and the first entry must be the sensor.
1658 *
1659 * Return a pointer to the sensor media entity if it has been successfully
1660 * registered, or NULL otherwise.
1661 */
1662static struct v4l2_subdev *
1663isp_register_subdev_group(struct isp_device *isp,
1664 struct isp_subdev_i2c_board_info *board_info)
1665{
1666 struct v4l2_subdev *sensor = NULL;
1667 unsigned int first;
1668
1669 if (board_info->board_info == NULL)
1670 return NULL;
1671
1672 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1673 struct v4l2_subdev *subdev;
1674 struct i2c_adapter *adapter;
1675
1676 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1677 if (adapter == NULL) {
1678 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1679 "device %s\n", __func__,
1680 board_info->i2c_adapter_id,
1681 board_info->board_info->type);
1682 continue;
1683 }
1684
1685 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1686 board_info->board_info, NULL);
1687 if (subdev == NULL) {
1688 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1689 __func__, board_info->board_info->type);
1690 continue;
1691 }
1692
1693 if (first)
1694 sensor = subdev;
1695 }
1696
1697 return sensor;
1698}
1699
1700static int isp_register_entities(struct isp_device *isp)
1701{
1702 struct isp_platform_data *pdata = isp->pdata;
1703 struct isp_v4l2_subdevs_group *subdevs;
1704 int ret;
1705
1706 isp->media_dev.dev = isp->dev;
1707 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1708 sizeof(isp->media_dev.model));
1709 isp->media_dev.hw_revision = isp->revision;
1710 isp->media_dev.link_notify = isp_pipeline_link_notify;
1711 ret = media_device_register(&isp->media_dev);
1712 if (ret < 0) {
1713 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1714 __func__, ret);
1715 return ret;
1716 }
1717
1718 isp->v4l2_dev.mdev = &isp->media_dev;
1719 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1720 if (ret < 0) {
1721 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1722 __func__, ret);
1723 goto done;
1724 }
1725
1726 /* Register internal entities */
1727 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1728 if (ret < 0)
1729 goto done;
1730
1731 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1732 if (ret < 0)
1733 goto done;
1734
1735 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1736 if (ret < 0)
1737 goto done;
1738
1739 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1740 &isp->v4l2_dev);
1741 if (ret < 0)
1742 goto done;
1743
1744 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1745 if (ret < 0)
1746 goto done;
1747
1748 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1749 if (ret < 0)
1750 goto done;
1751
1752 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1753 if (ret < 0)
1754 goto done;
1755
1756 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1757 if (ret < 0)
1758 goto done;
1759
1760 /* Register external entities */
1761 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1762 struct v4l2_subdev *sensor;
1763 struct media_entity *input;
1764 unsigned int flags;
1765 unsigned int pad;
1766
1767 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1768 if (sensor == NULL)
1769 continue;
1770
1771 sensor->host_priv = subdevs;
1772
1773 /* Connect the sensor to the correct interface module. Parallel
1774 * sensors are connected directly to the CCDC, while serial
1775 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1776 * through CSIPHY1 or CSIPHY2.
1777 */
1778 switch (subdevs->interface) {
1779 case ISP_INTERFACE_PARALLEL:
1780 input = &isp->isp_ccdc.subdev.entity;
1781 pad = CCDC_PAD_SINK;
1782 flags = 0;
1783 break;
1784
1785 case ISP_INTERFACE_CSI2A_PHY2:
1786 input = &isp->isp_csi2a.subdev.entity;
1787 pad = CSI2_PAD_SINK;
1788 flags = MEDIA_LNK_FL_IMMUTABLE
1789 | MEDIA_LNK_FL_ENABLED;
1790 break;
1791
1792 case ISP_INTERFACE_CCP2B_PHY1:
1793 case ISP_INTERFACE_CCP2B_PHY2:
1794 input = &isp->isp_ccp2.subdev.entity;
1795 pad = CCP2_PAD_SINK;
1796 flags = 0;
1797 break;
1798
1799 case ISP_INTERFACE_CSI2C_PHY1:
1800 input = &isp->isp_csi2c.subdev.entity;
1801 pad = CSI2_PAD_SINK;
1802 flags = MEDIA_LNK_FL_IMMUTABLE
1803 | MEDIA_LNK_FL_ENABLED;
1804 break;
1805
1806 default:
1807 printk(KERN_ERR "%s: invalid interface type %u\n",
1808 __func__, subdevs->interface);
1809 ret = -EINVAL;
1810 goto done;
1811 }
1812
1813 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1814 flags);
1815 if (ret < 0)
1816 goto done;
1817 }
1818
1819 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1820
1821done:
1822 if (ret < 0)
1823 isp_unregister_entities(isp);
1824
1825 return ret;
1826}
1827
1828static void isp_cleanup_modules(struct isp_device *isp)
1829{
1830 omap3isp_h3a_aewb_cleanup(isp);
1831 omap3isp_h3a_af_cleanup(isp);
1832 omap3isp_hist_cleanup(isp);
1833 omap3isp_resizer_cleanup(isp);
1834 omap3isp_preview_cleanup(isp);
1835 omap3isp_ccdc_cleanup(isp);
1836 omap3isp_ccp2_cleanup(isp);
1837 omap3isp_csi2_cleanup(isp);
1838}
1839
1840static int isp_initialize_modules(struct isp_device *isp)
1841{
1842 int ret;
1843
1844 ret = omap3isp_csiphy_init(isp);
1845 if (ret < 0) {
1846 dev_err(isp->dev, "CSI PHY initialization failed\n");
1847 goto error_csiphy;
1848 }
1849
1850 ret = omap3isp_csi2_init(isp);
1851 if (ret < 0) {
1852 dev_err(isp->dev, "CSI2 initialization failed\n");
1853 goto error_csi2;
1854 }
1855
1856 ret = omap3isp_ccp2_init(isp);
1857 if (ret < 0) {
1858 dev_err(isp->dev, "CCP2 initialization failed\n");
1859 goto error_ccp2;
1860 }
1861
1862 ret = omap3isp_ccdc_init(isp);
1863 if (ret < 0) {
1864 dev_err(isp->dev, "CCDC initialization failed\n");
1865 goto error_ccdc;
1866 }
1867
1868 ret = omap3isp_preview_init(isp);
1869 if (ret < 0) {
1870 dev_err(isp->dev, "Preview initialization failed\n");
1871 goto error_preview;
1872 }
1873
1874 ret = omap3isp_resizer_init(isp);
1875 if (ret < 0) {
1876 dev_err(isp->dev, "Resizer initialization failed\n");
1877 goto error_resizer;
1878 }
1879
1880 ret = omap3isp_hist_init(isp);
1881 if (ret < 0) {
1882 dev_err(isp->dev, "Histogram initialization failed\n");
1883 goto error_hist;
1884 }
1885
1886 ret = omap3isp_h3a_aewb_init(isp);
1887 if (ret < 0) {
1888 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1889 goto error_h3a_aewb;
1890 }
1891
1892 ret = omap3isp_h3a_af_init(isp);
1893 if (ret < 0) {
1894 dev_err(isp->dev, "H3A AF initialization failed\n");
1895 goto error_h3a_af;
1896 }
1897
1898 /* Connect the submodules. */
1899 ret = media_entity_create_link(
1900 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1901 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1902 if (ret < 0)
1903 goto error_link;
1904
1905 ret = media_entity_create_link(
1906 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1907 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1908 if (ret < 0)
1909 goto error_link;
1910
1911 ret = media_entity_create_link(
1912 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1913 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1914 if (ret < 0)
1915 goto error_link;
1916
1917 ret = media_entity_create_link(
1918 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1919 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1920 if (ret < 0)
1921 goto error_link;
1922
1923 ret = media_entity_create_link(
1924 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1925 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1926 if (ret < 0)
1927 goto error_link;
1928
1929 ret = media_entity_create_link(
1930 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1931 &isp->isp_aewb.subdev.entity, 0,
1932 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1933 if (ret < 0)
1934 goto error_link;
1935
1936 ret = media_entity_create_link(
1937 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1938 &isp->isp_af.subdev.entity, 0,
1939 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1940 if (ret < 0)
1941 goto error_link;
1942
1943 ret = media_entity_create_link(
1944 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1945 &isp->isp_hist.subdev.entity, 0,
1946 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1947 if (ret < 0)
1948 goto error_link;
1949
1950 return 0;
1951
1952error_link:
1953 omap3isp_h3a_af_cleanup(isp);
1954error_h3a_af:
1955 omap3isp_h3a_aewb_cleanup(isp);
1956error_h3a_aewb:
1957 omap3isp_hist_cleanup(isp);
1958error_hist:
1959 omap3isp_resizer_cleanup(isp);
1960error_resizer:
1961 omap3isp_preview_cleanup(isp);
1962error_preview:
1963 omap3isp_ccdc_cleanup(isp);
1964error_ccdc:
1965 omap3isp_ccp2_cleanup(isp);
1966error_ccp2:
1967 omap3isp_csi2_cleanup(isp);
1968error_csi2:
1969error_csiphy:
1970 return ret;
1971}
1972
1973/*
1974 * isp_remove - Remove ISP platform device
1975 * @pdev: Pointer to ISP platform device
1976 *
1977 * Always returns 0.
1978 */
1979static int __devexit isp_remove(struct platform_device *pdev)
1980{
1981 struct isp_device *isp = platform_get_drvdata(pdev);
1982 int i;
1983
1984 isp_unregister_entities(isp);
1985 isp_cleanup_modules(isp);
1986
1987 __omap3isp_get(isp, false);
1988 iommu_detach_device(isp->domain, &pdev->dev);
1989 iommu_domain_free(isp->domain);
1990 isp->domain = NULL;
1991 omap3isp_put(isp);
1992
1993 free_irq(isp->irq_num, isp);
1994 isp_put_clocks(isp);
1995
1996 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1997 if (isp->mmio_base[i]) {
1998 iounmap(isp->mmio_base[i]);
1999 isp->mmio_base[i] = NULL;
2000 }
2001
2002 if (isp->mmio_base_phys[i]) {
2003 release_mem_region(isp->mmio_base_phys[i],
2004 isp->mmio_size[i]);
2005 isp->mmio_base_phys[i] = 0;
2006 }
2007 }
2008
2009 regulator_put(isp->isp_csiphy1.vdd);
2010 regulator_put(isp->isp_csiphy2.vdd);
2011 kfree(isp);
2012
2013 return 0;
2014}
2015
2016static int isp_map_mem_resource(struct platform_device *pdev,
2017 struct isp_device *isp,
2018 enum isp_mem_resources res)
2019{
2020 struct resource *mem;
2021
2022 /* request the mem region for the camera registers */
2023
2024 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2025 if (!mem) {
2026 dev_err(isp->dev, "no mem resource?\n");
2027 return -ENODEV;
2028 }
2029
2030 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2031 dev_err(isp->dev,
2032 "cannot reserve camera register I/O region\n");
2033 return -ENODEV;
2034 }
2035 isp->mmio_base_phys[res] = mem->start;
2036 isp->mmio_size[res] = resource_size(mem);
2037
2038 /* map the region */
2039 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2040 isp->mmio_size[res]);
2041 if (!isp->mmio_base[res]) {
2042 dev_err(isp->dev, "cannot map camera register I/O region\n");
2043 return -ENODEV;
2044 }
2045
2046 return 0;
2047}
2048
2049/*
2050 * isp_probe - Probe ISP platform device
2051 * @pdev: Pointer to ISP platform device
2052 *
2053 * Returns 0 if successful,
2054 * -ENOMEM if no memory available,
2055 * -ENODEV if no platform device resources found
2056 * or no space for remapping registers,
2057 * -EINVAL if couldn't install ISR,
2058 * or clk_get return error value.
2059 */
2060static int __devinit isp_probe(struct platform_device *pdev)
2061{
2062 struct isp_platform_data *pdata = pdev->dev.platform_data;
2063 struct isp_device *isp;
2064 int ret;
2065 int i, m;
2066
2067 if (pdata == NULL)
2068 return -EINVAL;
2069
2070 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2071 if (!isp) {
2072 dev_err(&pdev->dev, "could not allocate memory\n");
2073 return -ENOMEM;
2074 }
2075
2076 isp->autoidle = autoidle;
2077 isp->platform_cb.set_xclk = isp_set_xclk;
2078
2079 mutex_init(&isp->isp_mutex);
2080 spin_lock_init(&isp->stat_lock);
2081
2082 isp->dev = &pdev->dev;
2083 isp->pdata = pdata;
2084 isp->ref_count = 0;
2085
2086 isp->raw_dmamask = DMA_BIT_MASK(32);
2087 isp->dev->dma_mask = &isp->raw_dmamask;
2088 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2089
2090 platform_set_drvdata(pdev, isp);
2091
2092 /* Regulators */
2093 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2094 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2095
2096 /* Clocks */
2097 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2098 if (ret < 0)
2099 goto error;
2100
2101 ret = isp_get_clocks(isp);
2102 if (ret < 0)
2103 goto error;
2104
2105 if (__omap3isp_get(isp, false) == NULL)
2106 goto error;
2107
2108 ret = isp_reset(isp);
2109 if (ret < 0)
2110 goto error_isp;
2111
2112 /* Memory resources */
2113 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2114 dev_info(isp->dev, "Revision %d.%d found\n",
2115 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2116
2117 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2118 if (isp->revision == isp_res_maps[m].isp_rev)
2119 break;
2120
2121 if (m == ARRAY_SIZE(isp_res_maps)) {
2122 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2123 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2124 ret = -ENODEV;
2125 goto error_isp;
2126 }
2127
2128 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2129 if (isp_res_maps[m].map & 1 << i) {
2130 ret = isp_map_mem_resource(pdev, isp, i);
2131 if (ret)
2132 goto error_isp;
2133 }
2134 }
2135
2136 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2137 if (!isp->domain) {
2138 dev_err(isp->dev, "can't alloc iommu domain\n");
2139 ret = -ENOMEM;
2140 goto error_isp;
2141 }
2142
2143 ret = iommu_attach_device(isp->domain, &pdev->dev);
2144 if (ret) {
2145 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2146 goto free_domain;
2147 }
2148
2149 /* Interrupt */
2150 isp->irq_num = platform_get_irq(pdev, 0);
2151 if (isp->irq_num <= 0) {
2152 dev_err(isp->dev, "No IRQ resource\n");
2153 ret = -ENODEV;
2154 goto detach_dev;
2155 }
2156
2157 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2158 dev_err(isp->dev, "Unable to request IRQ\n");
2159 ret = -EINVAL;
2160 goto detach_dev;
2161 }
2162
2163 /* Entities */
2164 ret = isp_initialize_modules(isp);
2165 if (ret < 0)
2166 goto error_irq;
2167
2168 ret = isp_register_entities(isp);
2169 if (ret < 0)
2170 goto error_modules;
2171
2172 isp_core_init(isp, 1);
2173 omap3isp_put(isp);
2174
2175 return 0;
2176
2177error_modules:
2178 isp_cleanup_modules(isp);
2179error_irq:
2180 free_irq(isp->irq_num, isp);
2181detach_dev:
2182 iommu_detach_device(isp->domain, &pdev->dev);
2183free_domain:
2184 iommu_domain_free(isp->domain);
2185error_isp:
2186 omap3isp_put(isp);
2187error:
2188 isp_put_clocks(isp);
2189
2190 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2191 if (isp->mmio_base[i]) {
2192 iounmap(isp->mmio_base[i]);
2193 isp->mmio_base[i] = NULL;
2194 }
2195
2196 if (isp->mmio_base_phys[i]) {
2197 release_mem_region(isp->mmio_base_phys[i],
2198 isp->mmio_size[i]);
2199 isp->mmio_base_phys[i] = 0;
2200 }
2201 }
2202 regulator_put(isp->isp_csiphy2.vdd);
2203 regulator_put(isp->isp_csiphy1.vdd);
2204 platform_set_drvdata(pdev, NULL);
2205
2206 mutex_destroy(&isp->isp_mutex);
2207 kfree(isp);
2208
2209 return ret;
2210}
2211
2212static const struct dev_pm_ops omap3isp_pm_ops = {
2213 .prepare = isp_pm_prepare,
2214 .suspend = isp_pm_suspend,
2215 .resume = isp_pm_resume,
2216 .complete = isp_pm_complete,
2217};
2218
2219static struct platform_device_id omap3isp_id_table[] = {
2220 { "omap3isp", 0 },
2221 { },
2222};
2223MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2224
2225static struct platform_driver omap3isp_driver = {
2226 .probe = isp_probe,
2227 .remove = __devexit_p(isp_remove),
2228 .id_table = omap3isp_id_table,
2229 .driver = {
2230 .owner = THIS_MODULE,
2231 .name = "omap3isp",
2232 .pm = &omap3isp_pm_ops,
2233 },
2234};
2235
2236module_platform_driver(omap3isp_driver);
2237
2238MODULE_AUTHOR("Nokia Corporation");
2239MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2240MODULE_LICENSE("GPL");
2241MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 08:51:14 -0500