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-rw-r--r--drivers/media/video/omap3isp/isp.c2220
1 files changed, 2220 insertions, 0 deletions
diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c
new file mode 100644
index 000000000000..1a9963bd6d40
--- /dev/null
+++ b/drivers/media/video/omap3isp/isp.c
@@ -0,0 +1,2220 @@
1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
58#include <linux/delay.h>
59#include <linux/device.h>
60#include <linux/dma-mapping.h>
61#include <linux/i2c.h>
62#include <linux/interrupt.h>
63#include <linux/module.h>
64#include <linux/platform_device.h>
65#include <linux/regulator/consumer.h>
66#include <linux/slab.h>
67#include <linux/sched.h>
68#include <linux/vmalloc.h>
69
70#include <media/v4l2-common.h>
71#include <media/v4l2-device.h>
72
73#include "isp.h"
74#include "ispreg.h"
75#include "ispccdc.h"
76#include "isppreview.h"
77#include "ispresizer.h"
78#include "ispcsi2.h"
79#include "ispccp2.h"
80#include "isph3a.h"
81#include "isphist.h"
82
83static unsigned int autoidle;
84module_param(autoidle, int, 0444);
85MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
86
87static void isp_save_ctx(struct isp_device *isp);
88
89static void isp_restore_ctx(struct isp_device *isp);
90
91static const struct isp_res_mapping isp_res_maps[] = {
92 {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
104 },
105 {
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
121 },
122};
123
124/* Structure for saving/restoring ISP module registers */
125static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
129 {0, ISP_TOK_TERM, 0}
130};
131
132/*
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
135 *
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
138 *
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
141 */
142void omap3isp_flush(struct isp_device *isp)
143{
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
146}
147
148/*
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
151 */
152static void isp_enable_interrupts(struct isp_device *isp)
153{
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
166
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
169}
170
171/*
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
174 */
175static void isp_disable_interrupts(struct isp_device *isp)
176{
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
178}
179
180/**
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
185 *
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
188 *
189 * Divisor = cam_mclk_hz / xclk
190 *
191 * Returns the final frequency that is actually being generated
192 **/
193static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
194{
195 u32 divisor;
196 u32 currentxclk;
197 unsigned long mclk_hz;
198
199 if (!omap3isp_get(isp))
200 return 0;
201
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
203
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
212 } else {
213 divisor = xclk;
214 currentxclk = 0;
215 }
216
217 switch (xclksel) {
218 case 0:
219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
223 currentxclk);
224 break;
225 case 1:
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
230 currentxclk);
231 break;
232 default:
233 omap3isp_put(isp);
234 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
235 "xclk. Must be 0 (A) or 1 (B).\n");
236 return -EINVAL;
237 }
238
239 /* Do we go from stable whatever to clock? */
240 if (divisor >= 2 && isp->xclk_divisor[xclksel] < 2)
241 omap3isp_get(isp);
242 /* Stopping the clock. */
243 else if (divisor < 2 && isp->xclk_divisor[xclksel] >= 2)
244 omap3isp_put(isp);
245
246 isp->xclk_divisor[xclksel] = divisor;
247
248 omap3isp_put(isp);
249
250 return currentxclk;
251}
252
253/*
254 * isp_power_settings - Sysconfig settings, for Power Management.
255 * @isp: OMAP3 ISP device
256 * @idle: Consider idle state.
257 *
258 * Sets the power settings for the ISP, and SBL bus.
259 */
260static void isp_power_settings(struct isp_device *isp, int idle)
261{
262 isp_reg_writel(isp,
263 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
264 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
265 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
266 ((isp->revision == ISP_REVISION_15_0) ?
267 ISP_SYSCONFIG_AUTOIDLE : 0),
268 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
269
270 if (isp->autoidle)
271 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
272 ISP_CTRL);
273}
274
275/*
276 * Configure the bridge and lane shifter. Valid inputs are
277 *
278 * CCDC_INPUT_PARALLEL: Parallel interface
279 * CCDC_INPUT_CSI2A: CSI2a receiver
280 * CCDC_INPUT_CCP2B: CCP2b receiver
281 * CCDC_INPUT_CSI2C: CSI2c receiver
282 *
283 * The bridge and lane shifter are configured according to the selected input
284 * and the ISP platform data.
285 */
286void omap3isp_configure_bridge(struct isp_device *isp,
287 enum ccdc_input_entity input,
288 const struct isp_parallel_platform_data *pdata)
289{
290 u32 ispctrl_val;
291
292 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
293 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
294 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
295 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
296 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
297
298 switch (input) {
299 case CCDC_INPUT_PARALLEL:
300 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
301 ispctrl_val |= pdata->data_lane_shift << ISPCTRL_SHIFT_SHIFT;
302 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
303 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
304 break;
305
306 case CCDC_INPUT_CSI2A:
307 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
308 break;
309
310 case CCDC_INPUT_CCP2B:
311 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
312 break;
313
314 case CCDC_INPUT_CSI2C:
315 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
316 break;
317
318 default:
319 return;
320 }
321
322 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
323 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
324
325 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
326}
327
328/**
329 * isp_set_pixel_clock - Configures the ISP pixel clock
330 * @isp: OMAP3 ISP device
331 * @pixelclk: Average pixel clock in Hz
332 *
333 * Set the average pixel clock required by the sensor. The ISP will use the
334 * lowest possible memory bandwidth settings compatible with the clock.
335 **/
336static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
337{
338 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
339}
340
341void omap3isp_hist_dma_done(struct isp_device *isp)
342{
343 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
344 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
345 /* Histogram cannot be enabled in this frame anymore */
346 atomic_set(&isp->isp_hist.buf_err, 1);
347 dev_dbg(isp->dev, "hist: Out of synchronization with "
348 "CCDC. Ignoring next buffer.\n");
349 }
350}
351
352static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
353{
354 static const char *name[] = {
355 "CSIA_IRQ",
356 "res1",
357 "res2",
358 "CSIB_LCM_IRQ",
359 "CSIB_IRQ",
360 "res5",
361 "res6",
362 "res7",
363 "CCDC_VD0_IRQ",
364 "CCDC_VD1_IRQ",
365 "CCDC_VD2_IRQ",
366 "CCDC_ERR_IRQ",
367 "H3A_AF_DONE_IRQ",
368 "H3A_AWB_DONE_IRQ",
369 "res14",
370 "res15",
371 "HIST_DONE_IRQ",
372 "CCDC_LSC_DONE",
373 "CCDC_LSC_PREFETCH_COMPLETED",
374 "CCDC_LSC_PREFETCH_ERROR",
375 "PRV_DONE_IRQ",
376 "CBUFF_IRQ",
377 "res22",
378 "res23",
379 "RSZ_DONE_IRQ",
380 "OVF_IRQ",
381 "res26",
382 "res27",
383 "MMU_ERR_IRQ",
384 "OCP_ERR_IRQ",
385 "SEC_ERR_IRQ",
386 "HS_VS_IRQ",
387 };
388 int i;
389
390 dev_dbg(isp->dev, "");
391
392 for (i = 0; i < ARRAY_SIZE(name); i++) {
393 if ((1 << i) & irqstatus)
394 printk(KERN_CONT "%s ", name[i]);
395 }
396 printk(KERN_CONT "\n");
397}
398
399static void isp_isr_sbl(struct isp_device *isp)
400{
401 struct device *dev = isp->dev;
402 u32 sbl_pcr;
403
404 /*
405 * Handle shared buffer logic overflows for video buffers.
406 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
407 */
408 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
409 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
410 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
411
412 if (sbl_pcr)
413 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
414
415 if (sbl_pcr & (ISPSBL_PCR_CCDC_WBL_OVF | ISPSBL_PCR_CSIA_WBL_OVF
416 | ISPSBL_PCR_CSIB_WBL_OVF)) {
417 isp->isp_ccdc.error = 1;
418 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
419 isp->isp_prev.error = 1;
420 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
421 isp->isp_res.error = 1;
422 }
423
424 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
425 isp->isp_prev.error = 1;
426 if (isp->isp_res.input == RESIZER_INPUT_VP &&
427 !(isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER))
428 isp->isp_res.error = 1;
429 }
430
431 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
432 | ISPSBL_PCR_RSZ2_WBL_OVF
433 | ISPSBL_PCR_RSZ3_WBL_OVF
434 | ISPSBL_PCR_RSZ4_WBL_OVF))
435 isp->isp_res.error = 1;
436
437 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
438 omap3isp_stat_sbl_overflow(&isp->isp_af);
439
440 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
441 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
442}
443
444/*
445 * isp_isr - Interrupt Service Routine for Camera ISP module.
446 * @irq: Not used currently.
447 * @_isp: Pointer to the OMAP3 ISP device
448 *
449 * Handles the corresponding callback if plugged in.
450 *
451 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
452 * IRQ wasn't handled.
453 */
454static irqreturn_t isp_isr(int irq, void *_isp)
455{
456 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
457 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
458 IRQ0STATUS_CCDC_VD0_IRQ |
459 IRQ0STATUS_CCDC_VD1_IRQ |
460 IRQ0STATUS_HS_VS_IRQ;
461 struct isp_device *isp = _isp;
462 u32 irqstatus;
463 int ret;
464
465 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
466 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
467
468 isp_isr_sbl(isp);
469
470 if (irqstatus & IRQ0STATUS_CSIA_IRQ) {
471 ret = omap3isp_csi2_isr(&isp->isp_csi2a);
472 if (ret)
473 isp->isp_ccdc.error = 1;
474 }
475
476 if (irqstatus & IRQ0STATUS_CSIB_IRQ) {
477 ret = omap3isp_ccp2_isr(&isp->isp_ccp2);
478 if (ret)
479 isp->isp_ccdc.error = 1;
480 }
481
482 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
483 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
484 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
485 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
486 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
487 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
488 omap3isp_stat_isr_frame_sync(&isp->isp_af);
489 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
490 }
491
492 if (irqstatus & ccdc_events)
493 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
494
495 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
496 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
497 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
498 omap3isp_preview_isr(&isp->isp_prev);
499 }
500
501 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
502 omap3isp_resizer_isr(&isp->isp_res);
503
504 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
505 omap3isp_stat_isr(&isp->isp_aewb);
506
507 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
508 omap3isp_stat_isr(&isp->isp_af);
509
510 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
511 omap3isp_stat_isr(&isp->isp_hist);
512
513 omap3isp_flush(isp);
514
515#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
516 isp_isr_dbg(isp, irqstatus);
517#endif
518
519 return IRQ_HANDLED;
520}
521
522/* -----------------------------------------------------------------------------
523 * Pipeline power management
524 *
525 * Entities must be powered up when part of a pipeline that contains at least
526 * one open video device node.
527 *
528 * To achieve this use the entity use_count field to track the number of users.
529 * For entities corresponding to video device nodes the use_count field stores
530 * the users count of the node. For entities corresponding to subdevs the
531 * use_count field stores the total number of users of all video device nodes
532 * in the pipeline.
533 *
534 * The omap3isp_pipeline_pm_use() function must be called in the open() and
535 * close() handlers of video device nodes. It increments or decrements the use
536 * count of all subdev entities in the pipeline.
537 *
538 * To react to link management on powered pipelines, the link setup notification
539 * callback updates the use count of all entities in the source and sink sides
540 * of the link.
541 */
542
543/*
544 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
545 * @entity: The entity
546 *
547 * Return the total number of users of all video device nodes in the pipeline.
548 */
549static int isp_pipeline_pm_use_count(struct media_entity *entity)
550{
551 struct media_entity_graph graph;
552 int use = 0;
553
554 media_entity_graph_walk_start(&graph, entity);
555
556 while ((entity = media_entity_graph_walk_next(&graph))) {
557 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
558 use += entity->use_count;
559 }
560
561 return use;
562}
563
564/*
565 * isp_pipeline_pm_power_one - Apply power change to an entity
566 * @entity: The entity
567 * @change: Use count change
568 *
569 * Change the entity use count by @change. If the entity is a subdev update its
570 * power state by calling the core::s_power operation when the use count goes
571 * from 0 to != 0 or from != 0 to 0.
572 *
573 * Return 0 on success or a negative error code on failure.
574 */
575static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
576{
577 struct v4l2_subdev *subdev;
578 int ret;
579
580 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
581 ? media_entity_to_v4l2_subdev(entity) : NULL;
582
583 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
584 ret = v4l2_subdev_call(subdev, core, s_power, 1);
585 if (ret < 0 && ret != -ENOIOCTLCMD)
586 return ret;
587 }
588
589 entity->use_count += change;
590 WARN_ON(entity->use_count < 0);
591
592 if (entity->use_count == 0 && change < 0 && subdev != NULL)
593 v4l2_subdev_call(subdev, core, s_power, 0);
594
595 return 0;
596}
597
598/*
599 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
600 * @entity: The entity
601 * @change: Use count change
602 *
603 * Walk the pipeline to update the use count and the power state of all non-node
604 * entities.
605 *
606 * Return 0 on success or a negative error code on failure.
607 */
608static int isp_pipeline_pm_power(struct media_entity *entity, int change)
609{
610 struct media_entity_graph graph;
611 struct media_entity *first = entity;
612 int ret = 0;
613
614 if (!change)
615 return 0;
616
617 media_entity_graph_walk_start(&graph, entity);
618
619 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
620 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
621 ret = isp_pipeline_pm_power_one(entity, change);
622
623 if (!ret)
624 return 0;
625
626 media_entity_graph_walk_start(&graph, first);
627
628 while ((first = media_entity_graph_walk_next(&graph))
629 && first != entity)
630 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
631 isp_pipeline_pm_power_one(first, -change);
632
633 return ret;
634}
635
636/*
637 * omap3isp_pipeline_pm_use - Update the use count of an entity
638 * @entity: The entity
639 * @use: Use (1) or stop using (0) the entity
640 *
641 * Update the use count of all entities in the pipeline and power entities on or
642 * off accordingly.
643 *
644 * Return 0 on success or a negative error code on failure. Powering entities
645 * off is assumed to never fail. No failure can occur when the use parameter is
646 * set to 0.
647 */
648int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
649{
650 int change = use ? 1 : -1;
651 int ret;
652
653 mutex_lock(&entity->parent->graph_mutex);
654
655 /* Apply use count to node. */
656 entity->use_count += change;
657 WARN_ON(entity->use_count < 0);
658
659 /* Apply power change to connected non-nodes. */
660 ret = isp_pipeline_pm_power(entity, change);
661
662 mutex_unlock(&entity->parent->graph_mutex);
663
664 return ret;
665}
666
667/*
668 * isp_pipeline_link_notify - Link management notification callback
669 * @source: Pad at the start of the link
670 * @sink: Pad at the end of the link
671 * @flags: New link flags that will be applied
672 *
673 * React to link management on powered pipelines by updating the use count of
674 * all entities in the source and sink sides of the link. Entities are powered
675 * on or off accordingly.
676 *
677 * Return 0 on success or a negative error code on failure. Powering entities
678 * off is assumed to never fail. This function will not fail for disconnection
679 * events.
680 */
681static int isp_pipeline_link_notify(struct media_pad *source,
682 struct media_pad *sink, u32 flags)
683{
684 int source_use = isp_pipeline_pm_use_count(source->entity);
685 int sink_use = isp_pipeline_pm_use_count(sink->entity);
686 int ret;
687
688 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
689 /* Powering off entities is assumed to never fail. */
690 isp_pipeline_pm_power(source->entity, -sink_use);
691 isp_pipeline_pm_power(sink->entity, -source_use);
692 return 0;
693 }
694
695 ret = isp_pipeline_pm_power(source->entity, sink_use);
696 if (ret < 0)
697 return ret;
698
699 ret = isp_pipeline_pm_power(sink->entity, source_use);
700 if (ret < 0)
701 isp_pipeline_pm_power(source->entity, -sink_use);
702
703 return ret;
704}
705
706/* -----------------------------------------------------------------------------
707 * Pipeline stream management
708 */
709
710/*
711 * isp_pipeline_enable - Enable streaming on a pipeline
712 * @pipe: ISP pipeline
713 * @mode: Stream mode (single shot or continuous)
714 *
715 * Walk the entities chain starting at the pipeline output video node and start
716 * all modules in the chain in the given mode.
717 *
718 * Return 0 if successfull, or the return value of the failed video::s_stream
719 * operation otherwise.
720 */
721static int isp_pipeline_enable(struct isp_pipeline *pipe,
722 enum isp_pipeline_stream_state mode)
723{
724 struct isp_device *isp = pipe->output->isp;
725 struct media_entity *entity;
726 struct media_pad *pad;
727 struct v4l2_subdev *subdev;
728 unsigned long flags;
729 int ret = 0;
730
731 spin_lock_irqsave(&pipe->lock, flags);
732 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
733 spin_unlock_irqrestore(&pipe->lock, flags);
734
735 pipe->do_propagation = false;
736
737 entity = &pipe->output->video.entity;
738 while (1) {
739 pad = &entity->pads[0];
740 if (!(pad->flags & MEDIA_PAD_FL_SINK))
741 break;
742
743 pad = media_entity_remote_source(pad);
744 if (pad == NULL ||
745 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
746 break;
747
748 entity = pad->entity;
749 subdev = media_entity_to_v4l2_subdev(entity);
750
751 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
752 if (ret < 0 && ret != -ENOIOCTLCMD)
753 break;
754
755 if (subdev == &isp->isp_ccdc.subdev) {
756 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
757 s_stream, mode);
758 v4l2_subdev_call(&isp->isp_af.subdev, video,
759 s_stream, mode);
760 v4l2_subdev_call(&isp->isp_hist.subdev, video,
761 s_stream, mode);
762 pipe->do_propagation = true;
763 }
764 }
765
766 /* Frame number propagation. In continuous streaming mode the number
767 * is incremented in the frame start ISR. In mem-to-mem mode
768 * singleshot is used and frame start IRQs are not available.
769 * Thus we have to increment the number here.
770 */
771 if (pipe->do_propagation && mode == ISP_PIPELINE_STREAM_SINGLESHOT)
772 atomic_inc(&pipe->frame_number);
773
774 return ret;
775}
776
777static int isp_pipeline_wait_resizer(struct isp_device *isp)
778{
779 return omap3isp_resizer_busy(&isp->isp_res);
780}
781
782static int isp_pipeline_wait_preview(struct isp_device *isp)
783{
784 return omap3isp_preview_busy(&isp->isp_prev);
785}
786
787static int isp_pipeline_wait_ccdc(struct isp_device *isp)
788{
789 return omap3isp_stat_busy(&isp->isp_af)
790 || omap3isp_stat_busy(&isp->isp_aewb)
791 || omap3isp_stat_busy(&isp->isp_hist)
792 || omap3isp_ccdc_busy(&isp->isp_ccdc);
793}
794
795#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
796
797static int isp_pipeline_wait(struct isp_device *isp,
798 int(*busy)(struct isp_device *isp))
799{
800 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
801
802 while (!time_after(jiffies, timeout)) {
803 if (!busy(isp))
804 return 0;
805 }
806
807 return 1;
808}
809
810/*
811 * isp_pipeline_disable - Disable streaming on a pipeline
812 * @pipe: ISP pipeline
813 *
814 * Walk the entities chain starting at the pipeline output video node and stop
815 * all modules in the chain. Wait synchronously for the modules to be stopped if
816 * necessary.
817 *
818 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
819 * can't be stopped (in which case a software reset of the ISP is probably
820 * necessary).
821 */
822static int isp_pipeline_disable(struct isp_pipeline *pipe)
823{
824 struct isp_device *isp = pipe->output->isp;
825 struct media_entity *entity;
826 struct media_pad *pad;
827 struct v4l2_subdev *subdev;
828 int failure = 0;
829 int ret;
830
831 /*
832 * We need to stop all the modules after CCDC first or they'll
833 * never stop since they may not get a full frame from CCDC.
834 */
835 entity = &pipe->output->video.entity;
836 while (1) {
837 pad = &entity->pads[0];
838 if (!(pad->flags & MEDIA_PAD_FL_SINK))
839 break;
840
841 pad = media_entity_remote_source(pad);
842 if (pad == NULL ||
843 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
844 break;
845
846 entity = pad->entity;
847 subdev = media_entity_to_v4l2_subdev(entity);
848
849 if (subdev == &isp->isp_ccdc.subdev) {
850 v4l2_subdev_call(&isp->isp_aewb.subdev,
851 video, s_stream, 0);
852 v4l2_subdev_call(&isp->isp_af.subdev,
853 video, s_stream, 0);
854 v4l2_subdev_call(&isp->isp_hist.subdev,
855 video, s_stream, 0);
856 }
857
858 v4l2_subdev_call(subdev, video, s_stream, 0);
859
860 if (subdev == &isp->isp_res.subdev)
861 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
862 else if (subdev == &isp->isp_prev.subdev)
863 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
864 else if (subdev == &isp->isp_ccdc.subdev)
865 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
866 else
867 ret = 0;
868
869 if (ret) {
870 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
871 failure = -ETIMEDOUT;
872 }
873 }
874
875 return failure;
876}
877
878/*
879 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
880 * @pipe: ISP pipeline
881 * @state: Stream state (stopped, single shot or continuous)
882 *
883 * Set the pipeline to the given stream state. Pipelines can be started in
884 * single-shot or continuous mode.
885 *
886 * Return 0 if successfull, or the return value of the failed video::s_stream
887 * operation otherwise.
888 */
889int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
890 enum isp_pipeline_stream_state state)
891{
892 int ret;
893
894 if (state == ISP_PIPELINE_STREAM_STOPPED)
895 ret = isp_pipeline_disable(pipe);
896 else
897 ret = isp_pipeline_enable(pipe, state);
898 pipe->stream_state = state;
899
900 return ret;
901}
902
903/*
904 * isp_pipeline_resume - Resume streaming on a pipeline
905 * @pipe: ISP pipeline
906 *
907 * Resume video output and input and re-enable pipeline.
908 */
909static void isp_pipeline_resume(struct isp_pipeline *pipe)
910{
911 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
912
913 omap3isp_video_resume(pipe->output, !singleshot);
914 if (singleshot)
915 omap3isp_video_resume(pipe->input, 0);
916 isp_pipeline_enable(pipe, pipe->stream_state);
917}
918
919/*
920 * isp_pipeline_suspend - Suspend streaming on a pipeline
921 * @pipe: ISP pipeline
922 *
923 * Suspend pipeline.
924 */
925static void isp_pipeline_suspend(struct isp_pipeline *pipe)
926{
927 isp_pipeline_disable(pipe);
928}
929
930/*
931 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
932 * video node
933 * @me: ISP module's media entity
934 *
935 * Returns 1 if the entity has an enabled link to the output video node or 0
936 * otherwise. It's true only while pipeline can have no more than one output
937 * node.
938 */
939static int isp_pipeline_is_last(struct media_entity *me)
940{
941 struct isp_pipeline *pipe;
942 struct media_pad *pad;
943
944 if (!me->pipe)
945 return 0;
946 pipe = to_isp_pipeline(me);
947 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
948 return 0;
949 pad = media_entity_remote_source(&pipe->output->pad);
950 return pad->entity == me;
951}
952
953/*
954 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
955 * @me: ISP module's media entity
956 *
957 * Suspend the whole pipeline if module's entity has an enabled link to the
958 * output video node. It works only while pipeline can have no more than one
959 * output node.
960 */
961static void isp_suspend_module_pipeline(struct media_entity *me)
962{
963 if (isp_pipeline_is_last(me))
964 isp_pipeline_suspend(to_isp_pipeline(me));
965}
966
967/*
968 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
969 * @me: ISP module's media entity
970 *
971 * Resume the whole pipeline if module's entity has an enabled link to the
972 * output video node. It works only while pipeline can have no more than one
973 * output node.
974 */
975static void isp_resume_module_pipeline(struct media_entity *me)
976{
977 if (isp_pipeline_is_last(me))
978 isp_pipeline_resume(to_isp_pipeline(me));
979}
980
981/*
982 * isp_suspend_modules - Suspend ISP submodules.
983 * @isp: OMAP3 ISP device
984 *
985 * Returns 0 if suspend left in idle state all the submodules properly,
986 * or returns 1 if a general Reset is required to suspend the submodules.
987 */
988static int isp_suspend_modules(struct isp_device *isp)
989{
990 unsigned long timeout;
991
992 omap3isp_stat_suspend(&isp->isp_aewb);
993 omap3isp_stat_suspend(&isp->isp_af);
994 omap3isp_stat_suspend(&isp->isp_hist);
995 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
996 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
997 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
998 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
999 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1000
1001 timeout = jiffies + ISP_STOP_TIMEOUT;
1002 while (omap3isp_stat_busy(&isp->isp_af)
1003 || omap3isp_stat_busy(&isp->isp_aewb)
1004 || omap3isp_stat_busy(&isp->isp_hist)
1005 || omap3isp_preview_busy(&isp->isp_prev)
1006 || omap3isp_resizer_busy(&isp->isp_res)
1007 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1008 if (time_after(jiffies, timeout)) {
1009 dev_info(isp->dev, "can't stop modules.\n");
1010 return 1;
1011 }
1012 msleep(1);
1013 }
1014
1015 return 0;
1016}
1017
1018/*
1019 * isp_resume_modules - Resume ISP submodules.
1020 * @isp: OMAP3 ISP device
1021 */
1022static void isp_resume_modules(struct isp_device *isp)
1023{
1024 omap3isp_stat_resume(&isp->isp_aewb);
1025 omap3isp_stat_resume(&isp->isp_af);
1026 omap3isp_stat_resume(&isp->isp_hist);
1027 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1028 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1029 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1030 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1031 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1032}
1033
1034/*
1035 * isp_reset - Reset ISP with a timeout wait for idle.
1036 * @isp: OMAP3 ISP device
1037 */
1038static int isp_reset(struct isp_device *isp)
1039{
1040 unsigned long timeout = 0;
1041
1042 isp_reg_writel(isp,
1043 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1044 | ISP_SYSCONFIG_SOFTRESET,
1045 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1046 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1047 ISP_SYSSTATUS) & 0x1)) {
1048 if (timeout++ > 10000) {
1049 dev_alert(isp->dev, "cannot reset ISP\n");
1050 return -ETIMEDOUT;
1051 }
1052 udelay(1);
1053 }
1054
1055 return 0;
1056}
1057
1058/*
1059 * isp_save_context - Saves the values of the ISP module registers.
1060 * @isp: OMAP3 ISP device
1061 * @reg_list: Structure containing pairs of register address and value to
1062 * modify on OMAP.
1063 */
1064static void
1065isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1066{
1067 struct isp_reg *next = reg_list;
1068
1069 for (; next->reg != ISP_TOK_TERM; next++)
1070 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1071}
1072
1073/*
1074 * isp_restore_context - Restores the values of the ISP module registers.
1075 * @isp: OMAP3 ISP device
1076 * @reg_list: Structure containing pairs of register address and value to
1077 * modify on OMAP.
1078 */
1079static void
1080isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1081{
1082 struct isp_reg *next = reg_list;
1083
1084 for (; next->reg != ISP_TOK_TERM; next++)
1085 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1086}
1087
1088/*
1089 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1090 * @isp: OMAP3 ISP device
1091 *
1092 * Routine for saving the context of each module in the ISP.
1093 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1094 */
1095static void isp_save_ctx(struct isp_device *isp)
1096{
1097 isp_save_context(isp, isp_reg_list);
1098 if (isp->iommu)
1099 iommu_save_ctx(isp->iommu);
1100}
1101
1102/*
1103 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1104 * @isp: OMAP3 ISP device
1105 *
1106 * Routine for restoring the context of each module in the ISP.
1107 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1108 */
1109static void isp_restore_ctx(struct isp_device *isp)
1110{
1111 isp_restore_context(isp, isp_reg_list);
1112 if (isp->iommu)
1113 iommu_restore_ctx(isp->iommu);
1114 omap3isp_ccdc_restore_context(isp);
1115 omap3isp_preview_restore_context(isp);
1116}
1117
1118/* -----------------------------------------------------------------------------
1119 * SBL resources management
1120 */
1121#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1122 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1123 OMAP3_ISP_SBL_PREVIEW_READ | \
1124 OMAP3_ISP_SBL_RESIZER_READ)
1125#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1126 OMAP3_ISP_SBL_CSI2A_WRITE | \
1127 OMAP3_ISP_SBL_CSI2C_WRITE | \
1128 OMAP3_ISP_SBL_CCDC_WRITE | \
1129 OMAP3_ISP_SBL_PREVIEW_WRITE)
1130
1131void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1132{
1133 u32 sbl = 0;
1134
1135 isp->sbl_resources |= res;
1136
1137 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1138 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1139
1140 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1141 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1142
1143 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1144 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1145
1146 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1147 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1148
1149 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1150 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1151
1152 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1153 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1154
1155 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1156}
1157
1158void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1159{
1160 u32 sbl = 0;
1161
1162 isp->sbl_resources &= ~res;
1163
1164 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1165 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1166
1167 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1168 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1169
1170 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1171 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1172
1173 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1174 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1175
1176 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1177 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1178
1179 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1180 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1181
1182 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1183}
1184
1185/*
1186 * isp_module_sync_idle - Helper to sync module with its idle state
1187 * @me: ISP submodule's media entity
1188 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1189 * @stopping: flag which tells module wants to stop
1190 *
1191 * This function checks if ISP submodule needs to wait for next interrupt. If
1192 * yes, makes the caller to sleep while waiting for such event.
1193 */
1194int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1195 atomic_t *stopping)
1196{
1197 struct isp_pipeline *pipe = to_isp_pipeline(me);
1198
1199 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1200 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1201 !isp_pipeline_ready(pipe)))
1202 return 0;
1203
1204 /*
1205 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1206 * scenario. We'll call it here to avoid race conditions.
1207 */
1208 atomic_set(stopping, 1);
1209 smp_mb();
1210
1211 /*
1212 * If module is the last one, it's writing to memory. In this case,
1213 * it's necessary to check if the module is already paused due to
1214 * DMA queue underrun or if it has to wait for next interrupt to be
1215 * idle.
1216 * If it isn't the last one, the function won't sleep but *stopping
1217 * will still be set to warn next submodule caller's interrupt the
1218 * module wants to be idle.
1219 */
1220 if (isp_pipeline_is_last(me)) {
1221 struct isp_video *video = pipe->output;
1222 unsigned long flags;
1223 spin_lock_irqsave(&video->queue->irqlock, flags);
1224 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1225 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1226 atomic_set(stopping, 0);
1227 smp_mb();
1228 return 0;
1229 }
1230 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1231 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1232 msecs_to_jiffies(1000))) {
1233 atomic_set(stopping, 0);
1234 smp_mb();
1235 return -ETIMEDOUT;
1236 }
1237 }
1238
1239 return 0;
1240}
1241
1242/*
1243 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1244 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1245 * @stopping: flag which tells module wants to stop
1246 *
1247 * This function checks if ISP submodule was stopping. In case of yes, it
1248 * notices the caller by setting stopping to 0 and waking up the wait queue.
1249 * Returns 1 if it was stopping or 0 otherwise.
1250 */
1251int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1252 atomic_t *stopping)
1253{
1254 if (atomic_cmpxchg(stopping, 1, 0)) {
1255 wake_up(wait);
1256 return 1;
1257 }
1258
1259 return 0;
1260}
1261
1262/* --------------------------------------------------------------------------
1263 * Clock management
1264 */
1265
1266#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1267 ISPCTRL_HIST_CLK_EN | \
1268 ISPCTRL_RSZ_CLK_EN | \
1269 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1270 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1271
1272static void __isp_subclk_update(struct isp_device *isp)
1273{
1274 u32 clk = 0;
1275
1276 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1277 clk |= ISPCTRL_H3A_CLK_EN;
1278
1279 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1280 clk |= ISPCTRL_HIST_CLK_EN;
1281
1282 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1283 clk |= ISPCTRL_RSZ_CLK_EN;
1284
1285 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1286 * RAM aswell.
1287 */
1288 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1289 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1290
1291 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1292 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1293
1294 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1295 ISPCTRL_CLKS_MASK, clk);
1296}
1297
1298void omap3isp_subclk_enable(struct isp_device *isp,
1299 enum isp_subclk_resource res)
1300{
1301 isp->subclk_resources |= res;
1302
1303 __isp_subclk_update(isp);
1304}
1305
1306void omap3isp_subclk_disable(struct isp_device *isp,
1307 enum isp_subclk_resource res)
1308{
1309 isp->subclk_resources &= ~res;
1310
1311 __isp_subclk_update(isp);
1312}
1313
1314/*
1315 * isp_enable_clocks - Enable ISP clocks
1316 * @isp: OMAP3 ISP device
1317 *
1318 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1319 */
1320static int isp_enable_clocks(struct isp_device *isp)
1321{
1322 int r;
1323 unsigned long rate;
1324 int divisor;
1325
1326 /*
1327 * cam_mclk clock chain:
1328 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1329 *
1330 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1331 * set to the same value. Hence the rate set for dpll4_m5
1332 * has to be twice of what is set on OMAP3430 to get
1333 * the required value for cam_mclk
1334 */
1335 if (cpu_is_omap3630())
1336 divisor = 1;
1337 else
1338 divisor = 2;
1339
1340 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1341 if (r) {
1342 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1343 goto out_clk_enable_ick;
1344 }
1345 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1346 CM_CAM_MCLK_HZ/divisor);
1347 if (r) {
1348 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1349 goto out_clk_enable_mclk;
1350 }
1351 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1352 if (r) {
1353 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1354 goto out_clk_enable_mclk;
1355 }
1356 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1357 if (rate != CM_CAM_MCLK_HZ)
1358 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1359 " expected : %d\n"
1360 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1361 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1362 if (r) {
1363 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1364 goto out_clk_enable_csi2_fclk;
1365 }
1366 return 0;
1367
1368out_clk_enable_csi2_fclk:
1369 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1370out_clk_enable_mclk:
1371 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1372out_clk_enable_ick:
1373 return r;
1374}
1375
1376/*
1377 * isp_disable_clocks - Disable ISP clocks
1378 * @isp: OMAP3 ISP device
1379 */
1380static void isp_disable_clocks(struct isp_device *isp)
1381{
1382 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1383 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1384 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1385}
1386
1387static const char *isp_clocks[] = {
1388 "cam_ick",
1389 "cam_mclk",
1390 "dpll4_m5_ck",
1391 "csi2_96m_fck",
1392 "l3_ick",
1393};
1394
1395static void isp_put_clocks(struct isp_device *isp)
1396{
1397 unsigned int i;
1398
1399 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1400 if (isp->clock[i]) {
1401 clk_put(isp->clock[i]);
1402 isp->clock[i] = NULL;
1403 }
1404 }
1405}
1406
1407static int isp_get_clocks(struct isp_device *isp)
1408{
1409 struct clk *clk;
1410 unsigned int i;
1411
1412 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1413 clk = clk_get(isp->dev, isp_clocks[i]);
1414 if (IS_ERR(clk)) {
1415 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1416 isp_put_clocks(isp);
1417 return PTR_ERR(clk);
1418 }
1419
1420 isp->clock[i] = clk;
1421 }
1422
1423 return 0;
1424}
1425
1426/*
1427 * omap3isp_get - Acquire the ISP resource.
1428 *
1429 * Initializes the clocks for the first acquire.
1430 *
1431 * Increment the reference count on the ISP. If the first reference is taken,
1432 * enable clocks and power-up all submodules.
1433 *
1434 * Return a pointer to the ISP device structure, or NULL if an error occured.
1435 */
1436struct isp_device *omap3isp_get(struct isp_device *isp)
1437{
1438 struct isp_device *__isp = isp;
1439
1440 if (isp == NULL)
1441 return NULL;
1442
1443 mutex_lock(&isp->isp_mutex);
1444 if (isp->ref_count > 0)
1445 goto out;
1446
1447 if (isp_enable_clocks(isp) < 0) {
1448 __isp = NULL;
1449 goto out;
1450 }
1451
1452 /* We don't want to restore context before saving it! */
1453 if (isp->has_context)
1454 isp_restore_ctx(isp);
1455 else
1456 isp->has_context = 1;
1457
1458 isp_enable_interrupts(isp);
1459
1460out:
1461 if (__isp != NULL)
1462 isp->ref_count++;
1463 mutex_unlock(&isp->isp_mutex);
1464
1465 return __isp;
1466}
1467
1468/*
1469 * omap3isp_put - Release the ISP
1470 *
1471 * Decrement the reference count on the ISP. If the last reference is released,
1472 * power-down all submodules, disable clocks and free temporary buffers.
1473 */
1474void omap3isp_put(struct isp_device *isp)
1475{
1476 if (isp == NULL)
1477 return;
1478
1479 mutex_lock(&isp->isp_mutex);
1480 BUG_ON(isp->ref_count == 0);
1481 if (--isp->ref_count == 0) {
1482 isp_disable_interrupts(isp);
1483 isp_save_ctx(isp);
1484 isp_disable_clocks(isp);
1485 }
1486 mutex_unlock(&isp->isp_mutex);
1487}
1488
1489/* --------------------------------------------------------------------------
1490 * Platform device driver
1491 */
1492
1493/*
1494 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1495 * @isp: OMAP3 ISP device
1496 */
1497#define ISP_PRINT_REGISTER(isp, name)\
1498 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1499 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1500#define SBL_PRINT_REGISTER(isp, name)\
1501 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1502 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1503
1504void omap3isp_print_status(struct isp_device *isp)
1505{
1506 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1507
1508 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1509 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1510 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1511 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1512 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1513 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1514 ISP_PRINT_REGISTER(isp, CTRL);
1515 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1516 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1517 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1518 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1519 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1520 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1521 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1522 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1523
1524 SBL_PRINT_REGISTER(isp, PCR);
1525 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1526
1527 dev_dbg(isp->dev, "--------------------------------------------\n");
1528}
1529
1530#ifdef CONFIG_PM
1531
1532/*
1533 * Power management support.
1534 *
1535 * As the ISP can't properly handle an input video stream interruption on a non
1536 * frame boundary, the ISP pipelines need to be stopped before sensors get
1537 * suspended. However, as suspending the sensors can require a running clock,
1538 * which can be provided by the ISP, the ISP can't be completely suspended
1539 * before the sensor.
1540 *
1541 * To solve this problem power management support is split into prepare/complete
1542 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1543 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1544 * resume(), and the the pipelines are restarted in complete().
1545 *
1546 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1547 * yet.
1548 */
1549static int isp_pm_prepare(struct device *dev)
1550{
1551 struct isp_device *isp = dev_get_drvdata(dev);
1552 int reset;
1553
1554 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1555
1556 if (isp->ref_count == 0)
1557 return 0;
1558
1559 reset = isp_suspend_modules(isp);
1560 isp_disable_interrupts(isp);
1561 isp_save_ctx(isp);
1562 if (reset)
1563 isp_reset(isp);
1564
1565 return 0;
1566}
1567
1568static int isp_pm_suspend(struct device *dev)
1569{
1570 struct isp_device *isp = dev_get_drvdata(dev);
1571
1572 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1573
1574 if (isp->ref_count)
1575 isp_disable_clocks(isp);
1576
1577 return 0;
1578}
1579
1580static int isp_pm_resume(struct device *dev)
1581{
1582 struct isp_device *isp = dev_get_drvdata(dev);
1583
1584 if (isp->ref_count == 0)
1585 return 0;
1586
1587 return isp_enable_clocks(isp);
1588}
1589
1590static void isp_pm_complete(struct device *dev)
1591{
1592 struct isp_device *isp = dev_get_drvdata(dev);
1593
1594 if (isp->ref_count == 0)
1595 return;
1596
1597 isp_restore_ctx(isp);
1598 isp_enable_interrupts(isp);
1599 isp_resume_modules(isp);
1600}
1601
1602#else
1603
1604#define isp_pm_prepare NULL
1605#define isp_pm_suspend NULL
1606#define isp_pm_resume NULL
1607#define isp_pm_complete NULL
1608
1609#endif /* CONFIG_PM */
1610
1611static void isp_unregister_entities(struct isp_device *isp)
1612{
1613 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1614 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1615 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1616 omap3isp_preview_unregister_entities(&isp->isp_prev);
1617 omap3isp_resizer_unregister_entities(&isp->isp_res);
1618 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1619 omap3isp_stat_unregister_entities(&isp->isp_af);
1620 omap3isp_stat_unregister_entities(&isp->isp_hist);
1621
1622 v4l2_device_unregister(&isp->v4l2_dev);
1623 media_device_unregister(&isp->media_dev);
1624}
1625
1626/*
1627 * isp_register_subdev_group - Register a group of subdevices
1628 * @isp: OMAP3 ISP device
1629 * @board_info: I2C subdevs board information array
1630 *
1631 * Register all I2C subdevices in the board_info array. The array must be
1632 * terminated by a NULL entry, and the first entry must be the sensor.
1633 *
1634 * Return a pointer to the sensor media entity if it has been successfully
1635 * registered, or NULL otherwise.
1636 */
1637static struct v4l2_subdev *
1638isp_register_subdev_group(struct isp_device *isp,
1639 struct isp_subdev_i2c_board_info *board_info)
1640{
1641 struct v4l2_subdev *sensor = NULL;
1642 unsigned int first;
1643
1644 if (board_info->board_info == NULL)
1645 return NULL;
1646
1647 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1648 struct v4l2_subdev *subdev;
1649 struct i2c_adapter *adapter;
1650
1651 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1652 if (adapter == NULL) {
1653 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1654 "device %s\n", __func__,
1655 board_info->i2c_adapter_id,
1656 board_info->board_info->type);
1657 continue;
1658 }
1659
1660 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1661 board_info->board_info, NULL);
1662 if (subdev == NULL) {
1663 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1664 __func__, board_info->board_info->type);
1665 continue;
1666 }
1667
1668 if (first)
1669 sensor = subdev;
1670 }
1671
1672 return sensor;
1673}
1674
1675static int isp_register_entities(struct isp_device *isp)
1676{
1677 struct isp_platform_data *pdata = isp->pdata;
1678 struct isp_v4l2_subdevs_group *subdevs;
1679 int ret;
1680
1681 isp->media_dev.dev = isp->dev;
1682 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1683 sizeof(isp->media_dev.model));
1684 isp->media_dev.link_notify = isp_pipeline_link_notify;
1685 ret = media_device_register(&isp->media_dev);
1686 if (ret < 0) {
1687 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1688 __func__, ret);
1689 return ret;
1690 }
1691
1692 isp->v4l2_dev.mdev = &isp->media_dev;
1693 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1694 if (ret < 0) {
1695 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1696 __func__, ret);
1697 goto done;
1698 }
1699
1700 /* Register internal entities */
1701 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1702 if (ret < 0)
1703 goto done;
1704
1705 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1706 if (ret < 0)
1707 goto done;
1708
1709 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1710 if (ret < 0)
1711 goto done;
1712
1713 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1714 &isp->v4l2_dev);
1715 if (ret < 0)
1716 goto done;
1717
1718 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1719 if (ret < 0)
1720 goto done;
1721
1722 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1723 if (ret < 0)
1724 goto done;
1725
1726 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1727 if (ret < 0)
1728 goto done;
1729
1730 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1731 if (ret < 0)
1732 goto done;
1733
1734 /* Register external entities */
1735 for (subdevs = pdata->subdevs; subdevs->subdevs; ++subdevs) {
1736 struct v4l2_subdev *sensor;
1737 struct media_entity *input;
1738 unsigned int flags;
1739 unsigned int pad;
1740
1741 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1742 if (sensor == NULL)
1743 continue;
1744
1745 sensor->host_priv = subdevs;
1746
1747 /* Connect the sensor to the correct interface module. Parallel
1748 * sensors are connected directly to the CCDC, while serial
1749 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1750 * through CSIPHY1 or CSIPHY2.
1751 */
1752 switch (subdevs->interface) {
1753 case ISP_INTERFACE_PARALLEL:
1754 input = &isp->isp_ccdc.subdev.entity;
1755 pad = CCDC_PAD_SINK;
1756 flags = 0;
1757 break;
1758
1759 case ISP_INTERFACE_CSI2A_PHY2:
1760 input = &isp->isp_csi2a.subdev.entity;
1761 pad = CSI2_PAD_SINK;
1762 flags = MEDIA_LNK_FL_IMMUTABLE
1763 | MEDIA_LNK_FL_ENABLED;
1764 break;
1765
1766 case ISP_INTERFACE_CCP2B_PHY1:
1767 case ISP_INTERFACE_CCP2B_PHY2:
1768 input = &isp->isp_ccp2.subdev.entity;
1769 pad = CCP2_PAD_SINK;
1770 flags = 0;
1771 break;
1772
1773 case ISP_INTERFACE_CSI2C_PHY1:
1774 input = &isp->isp_csi2c.subdev.entity;
1775 pad = CSI2_PAD_SINK;
1776 flags = MEDIA_LNK_FL_IMMUTABLE
1777 | MEDIA_LNK_FL_ENABLED;
1778 break;
1779
1780 default:
1781 printk(KERN_ERR "%s: invalid interface type %u\n",
1782 __func__, subdevs->interface);
1783 ret = -EINVAL;
1784 goto done;
1785 }
1786
1787 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1788 flags);
1789 if (ret < 0)
1790 goto done;
1791 }
1792
1793 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1794
1795done:
1796 if (ret < 0)
1797 isp_unregister_entities(isp);
1798
1799 return ret;
1800}
1801
1802static void isp_cleanup_modules(struct isp_device *isp)
1803{
1804 omap3isp_h3a_aewb_cleanup(isp);
1805 omap3isp_h3a_af_cleanup(isp);
1806 omap3isp_hist_cleanup(isp);
1807 omap3isp_resizer_cleanup(isp);
1808 omap3isp_preview_cleanup(isp);
1809 omap3isp_ccdc_cleanup(isp);
1810 omap3isp_ccp2_cleanup(isp);
1811 omap3isp_csi2_cleanup(isp);
1812}
1813
1814static int isp_initialize_modules(struct isp_device *isp)
1815{
1816 int ret;
1817
1818 ret = omap3isp_csiphy_init(isp);
1819 if (ret < 0) {
1820 dev_err(isp->dev, "CSI PHY initialization failed\n");
1821 goto error_csiphy;
1822 }
1823
1824 ret = omap3isp_csi2_init(isp);
1825 if (ret < 0) {
1826 dev_err(isp->dev, "CSI2 initialization failed\n");
1827 goto error_csi2;
1828 }
1829
1830 ret = omap3isp_ccp2_init(isp);
1831 if (ret < 0) {
1832 dev_err(isp->dev, "CCP2 initialization failed\n");
1833 goto error_ccp2;
1834 }
1835
1836 ret = omap3isp_ccdc_init(isp);
1837 if (ret < 0) {
1838 dev_err(isp->dev, "CCDC initialization failed\n");
1839 goto error_ccdc;
1840 }
1841
1842 ret = omap3isp_preview_init(isp);
1843 if (ret < 0) {
1844 dev_err(isp->dev, "Preview initialization failed\n");
1845 goto error_preview;
1846 }
1847
1848 ret = omap3isp_resizer_init(isp);
1849 if (ret < 0) {
1850 dev_err(isp->dev, "Resizer initialization failed\n");
1851 goto error_resizer;
1852 }
1853
1854 ret = omap3isp_hist_init(isp);
1855 if (ret < 0) {
1856 dev_err(isp->dev, "Histogram initialization failed\n");
1857 goto error_hist;
1858 }
1859
1860 ret = omap3isp_h3a_aewb_init(isp);
1861 if (ret < 0) {
1862 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1863 goto error_h3a_aewb;
1864 }
1865
1866 ret = omap3isp_h3a_af_init(isp);
1867 if (ret < 0) {
1868 dev_err(isp->dev, "H3A AF initialization failed\n");
1869 goto error_h3a_af;
1870 }
1871
1872 /* Connect the submodules. */
1873 ret = media_entity_create_link(
1874 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1875 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1876 if (ret < 0)
1877 goto error_link;
1878
1879 ret = media_entity_create_link(
1880 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1881 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1882 if (ret < 0)
1883 goto error_link;
1884
1885 ret = media_entity_create_link(
1886 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1887 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1888 if (ret < 0)
1889 goto error_link;
1890
1891 ret = media_entity_create_link(
1892 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1893 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1894 if (ret < 0)
1895 goto error_link;
1896
1897 ret = media_entity_create_link(
1898 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1899 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1900 if (ret < 0)
1901 goto error_link;
1902
1903 ret = media_entity_create_link(
1904 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1905 &isp->isp_aewb.subdev.entity, 0,
1906 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1907 if (ret < 0)
1908 goto error_link;
1909
1910 ret = media_entity_create_link(
1911 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1912 &isp->isp_af.subdev.entity, 0,
1913 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1914 if (ret < 0)
1915 goto error_link;
1916
1917 ret = media_entity_create_link(
1918 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1919 &isp->isp_hist.subdev.entity, 0,
1920 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1921 if (ret < 0)
1922 goto error_link;
1923
1924 return 0;
1925
1926error_link:
1927 omap3isp_h3a_af_cleanup(isp);
1928error_h3a_af:
1929 omap3isp_h3a_aewb_cleanup(isp);
1930error_h3a_aewb:
1931 omap3isp_hist_cleanup(isp);
1932error_hist:
1933 omap3isp_resizer_cleanup(isp);
1934error_resizer:
1935 omap3isp_preview_cleanup(isp);
1936error_preview:
1937 omap3isp_ccdc_cleanup(isp);
1938error_ccdc:
1939 omap3isp_ccp2_cleanup(isp);
1940error_ccp2:
1941 omap3isp_csi2_cleanup(isp);
1942error_csi2:
1943error_csiphy:
1944 return ret;
1945}
1946
1947/*
1948 * isp_remove - Remove ISP platform device
1949 * @pdev: Pointer to ISP platform device
1950 *
1951 * Always returns 0.
1952 */
1953static int isp_remove(struct platform_device *pdev)
1954{
1955 struct isp_device *isp = platform_get_drvdata(pdev);
1956 int i;
1957
1958 isp_unregister_entities(isp);
1959 isp_cleanup_modules(isp);
1960
1961 omap3isp_get(isp);
1962 iommu_put(isp->iommu);
1963 omap3isp_put(isp);
1964
1965 free_irq(isp->irq_num, isp);
1966 isp_put_clocks(isp);
1967
1968 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1969 if (isp->mmio_base[i]) {
1970 iounmap(isp->mmio_base[i]);
1971 isp->mmio_base[i] = NULL;
1972 }
1973
1974 if (isp->mmio_base_phys[i]) {
1975 release_mem_region(isp->mmio_base_phys[i],
1976 isp->mmio_size[i]);
1977 isp->mmio_base_phys[i] = 0;
1978 }
1979 }
1980
1981 regulator_put(isp->isp_csiphy1.vdd);
1982 regulator_put(isp->isp_csiphy2.vdd);
1983 kfree(isp);
1984
1985 return 0;
1986}
1987
1988static int isp_map_mem_resource(struct platform_device *pdev,
1989 struct isp_device *isp,
1990 enum isp_mem_resources res)
1991{
1992 struct resource *mem;
1993
1994 /* request the mem region for the camera registers */
1995
1996 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
1997 if (!mem) {
1998 dev_err(isp->dev, "no mem resource?\n");
1999 return -ENODEV;
2000 }
2001
2002 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2003 dev_err(isp->dev,
2004 "cannot reserve camera register I/O region\n");
2005 return -ENODEV;
2006 }
2007 isp->mmio_base_phys[res] = mem->start;
2008 isp->mmio_size[res] = resource_size(mem);
2009
2010 /* map the region */
2011 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2012 isp->mmio_size[res]);
2013 if (!isp->mmio_base[res]) {
2014 dev_err(isp->dev, "cannot map camera register I/O region\n");
2015 return -ENODEV;
2016 }
2017
2018 return 0;
2019}
2020
2021/*
2022 * isp_probe - Probe ISP platform device
2023 * @pdev: Pointer to ISP platform device
2024 *
2025 * Returns 0 if successful,
2026 * -ENOMEM if no memory available,
2027 * -ENODEV if no platform device resources found
2028 * or no space for remapping registers,
2029 * -EINVAL if couldn't install ISR,
2030 * or clk_get return error value.
2031 */
2032static int isp_probe(struct platform_device *pdev)
2033{
2034 struct isp_platform_data *pdata = pdev->dev.platform_data;
2035 struct isp_device *isp;
2036 int ret;
2037 int i, m;
2038
2039 if (pdata == NULL)
2040 return -EINVAL;
2041
2042 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2043 if (!isp) {
2044 dev_err(&pdev->dev, "could not allocate memory\n");
2045 return -ENOMEM;
2046 }
2047
2048 isp->autoidle = autoidle;
2049 isp->platform_cb.set_xclk = isp_set_xclk;
2050 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2051
2052 mutex_init(&isp->isp_mutex);
2053 spin_lock_init(&isp->stat_lock);
2054
2055 isp->dev = &pdev->dev;
2056 isp->pdata = pdata;
2057 isp->ref_count = 0;
2058
2059 isp->raw_dmamask = DMA_BIT_MASK(32);
2060 isp->dev->dma_mask = &isp->raw_dmamask;
2061 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2062
2063 platform_set_drvdata(pdev, isp);
2064
2065 /* Regulators */
2066 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2067 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2068
2069 /* Clocks */
2070 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2071 if (ret < 0)
2072 goto error;
2073
2074 ret = isp_get_clocks(isp);
2075 if (ret < 0)
2076 goto error;
2077
2078 if (omap3isp_get(isp) == NULL)
2079 goto error;
2080
2081 ret = isp_reset(isp);
2082 if (ret < 0)
2083 goto error_isp;
2084
2085 /* Memory resources */
2086 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2087 dev_info(isp->dev, "Revision %d.%d found\n",
2088 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2089
2090 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2091 if (isp->revision == isp_res_maps[m].isp_rev)
2092 break;
2093
2094 if (m == ARRAY_SIZE(isp_res_maps)) {
2095 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2096 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2097 ret = -ENODEV;
2098 goto error_isp;
2099 }
2100
2101 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2102 if (isp_res_maps[m].map & 1 << i) {
2103 ret = isp_map_mem_resource(pdev, isp, i);
2104 if (ret)
2105 goto error_isp;
2106 }
2107 }
2108
2109 /* IOMMU */
2110 isp->iommu = iommu_get("isp");
2111 if (IS_ERR_OR_NULL(isp->iommu)) {
2112 isp->iommu = NULL;
2113 ret = -ENODEV;
2114 goto error_isp;
2115 }
2116
2117 /* Interrupt */
2118 isp->irq_num = platform_get_irq(pdev, 0);
2119 if (isp->irq_num <= 0) {
2120 dev_err(isp->dev, "No IRQ resource\n");
2121 ret = -ENODEV;
2122 goto error_isp;
2123 }
2124
2125 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2126 dev_err(isp->dev, "Unable to request IRQ\n");
2127 ret = -EINVAL;
2128 goto error_isp;
2129 }
2130
2131 /* Entities */
2132 ret = isp_initialize_modules(isp);
2133 if (ret < 0)
2134 goto error_irq;
2135
2136 ret = isp_register_entities(isp);
2137 if (ret < 0)
2138 goto error_modules;
2139
2140 isp_power_settings(isp, 1);
2141 omap3isp_put(isp);
2142
2143 return 0;
2144
2145error_modules:
2146 isp_cleanup_modules(isp);
2147error_irq:
2148 free_irq(isp->irq_num, isp);
2149error_isp:
2150 iommu_put(isp->iommu);
2151 omap3isp_put(isp);
2152error:
2153 isp_put_clocks(isp);
2154
2155 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2156 if (isp->mmio_base[i]) {
2157 iounmap(isp->mmio_base[i]);
2158 isp->mmio_base[i] = NULL;
2159 }
2160
2161 if (isp->mmio_base_phys[i]) {
2162 release_mem_region(isp->mmio_base_phys[i],
2163 isp->mmio_size[i]);
2164 isp->mmio_base_phys[i] = 0;
2165 }
2166 }
2167 regulator_put(isp->isp_csiphy2.vdd);
2168 regulator_put(isp->isp_csiphy1.vdd);
2169 platform_set_drvdata(pdev, NULL);
2170 kfree(isp);
2171
2172 return ret;
2173}
2174
2175static const struct dev_pm_ops omap3isp_pm_ops = {
2176 .prepare = isp_pm_prepare,
2177 .suspend = isp_pm_suspend,
2178 .resume = isp_pm_resume,
2179 .complete = isp_pm_complete,
2180};
2181
2182static struct platform_device_id omap3isp_id_table[] = {
2183 { "omap3isp", 0 },
2184 { },
2185};
2186MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2187
2188static struct platform_driver omap3isp_driver = {
2189 .probe = isp_probe,
2190 .remove = isp_remove,
2191 .id_table = omap3isp_id_table,
2192 .driver = {
2193 .owner = THIS_MODULE,
2194 .name = "omap3isp",
2195 .pm = &omap3isp_pm_ops,
2196 },
2197};
2198
2199/*
2200 * isp_init - ISP module initialization.
2201 */
2202static int __init isp_init(void)
2203{
2204 return platform_driver_register(&omap3isp_driver);
2205}
2206
2207/*
2208 * isp_cleanup - ISP module cleanup.
2209 */
2210static void __exit isp_cleanup(void)
2211{
2212 platform_driver_unregister(&omap3isp_driver);
2213}
2214
2215module_init(isp_init);
2216module_exit(isp_cleanup);
2217
2218MODULE_AUTHOR("Nokia Corporation");
2219MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2220MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-29 02:54:39 -0400