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path: root/drivers/media/video/gspca/etoms.c
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Diffstat (limited to 'drivers/media/video/gspca/etoms.c')
-rw-r--r--drivers/media/video/gspca/etoms.c42
1 files changed, 29 insertions, 13 deletions
diff --git a/drivers/media/video/gspca/etoms.c b/drivers/media/video/gspca/etoms.c
index bbbe65923cfc..4db33618af6b 100644
--- a/drivers/media/video/gspca/etoms.c
+++ b/drivers/media/video/gspca/etoms.c
@@ -22,8 +22,8 @@
22 22
23#include "gspca.h" 23#include "gspca.h"
24 24
25#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 1, 4) 25#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 1, 5)
26static const char version[] = "2.1.4"; 26static const char version[] = "2.1.5";
27 27
28MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>"); 28MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
29MODULE_DESCRIPTION("Etoms USB Camera Driver"); 29MODULE_DESCRIPTION("Etoms USB Camera Driver");
@@ -114,14 +114,30 @@ static struct ctrl sd_ctrls[] = {
114 }, 114 },
115}; 115};
116 116
117static struct cam_mode vga_mode[] = { 117static struct v4l2_pix_format vga_mode[] = {
118 {V4L2_PIX_FMT_SBGGR8, 320, 240, 1}, 118 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
119/* {V4L2_PIX_FMT_SBGGR8, 640, 480, 0}, */ 119 .bytesperline = 320,
120 .sizeimage = 320 * 240,
121 .colorspace = V4L2_COLORSPACE_SRGB,
122 .priv = 1},
123/* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
124 .bytesperline = 640,
125 .sizeimage = 640 * 480,
126 .colorspace = V4L2_COLORSPACE_SRGB,
127 .priv = 0}, */
120}; 128};
121 129
122static struct cam_mode sif_mode[] = { 130static struct v4l2_pix_format sif_mode[] = {
123 {V4L2_PIX_FMT_SBGGR8, 176, 144, 1}, 131 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
124 {V4L2_PIX_FMT_SBGGR8, 352, 288, 0}, 132 .bytesperline = 176,
133 .sizeimage = 176 * 144,
134 .colorspace = V4L2_COLORSPACE_SRGB,
135 .priv = 1},
136 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
137 .bytesperline = 352,
138 .sizeimage = 352 * 288,
139 .colorspace = V4L2_COLORSPACE_SRGB,
140 .priv = 0},
125}; 141};
126 142
127#define ETOMS_ALT_SIZE_1000 12 143#define ETOMS_ALT_SIZE_1000 12
@@ -334,7 +350,7 @@ static void Et_init2(struct gspca_dev *gspca_dev)
334 reg_w_val(dev, ET_CTRL, 0x1b); 350 reg_w_val(dev, ET_CTRL, 0x1b);
335 351
336 /* compression et subsampling */ 352 /* compression et subsampling */
337 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) 353 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
338 value = ET_COMP_VAL1; /* 320 */ 354 value = ET_COMP_VAL1; /* 320 */
339 else 355 else
340 value = ET_COMP_VAL0; /* 640 */ 356 value = ET_COMP_VAL0; /* 640 */
@@ -410,7 +426,7 @@ static void Et_init2(struct gspca_dev *gspca_dev)
410/* reg_r(dev, ET_I2C_BASE, &received, 1); 426/* reg_r(dev, ET_I2C_BASE, &received, 1);
411 always 0x40 as the pas106 ??? */ 427 always 0x40 as the pas106 ??? */
412 /* set the sensor */ 428 /* set the sensor */
413 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) 429 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
414 value = 0x04; /* 320 */ 430 value = 0x04; /* 320 */
415 else /* 640 */ 431 else /* 640 */
416 value = 0x1e; /* 0x17 * setting PixelClock 432 value = 0x1e; /* 0x17 * setting PixelClock
@@ -487,12 +503,12 @@ static void Et_init1(struct gspca_dev *gspca_dev)
487 reg_w_val(dev, ET_ClCK, 0x10); 503 reg_w_val(dev, ET_ClCK, 0x10);
488 reg_w_val(dev, ET_CTRL, 0x19); 504 reg_w_val(dev, ET_CTRL, 0x19);
489 /* compression et subsampling */ 505 /* compression et subsampling */
490 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) 506 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
491 value = ET_COMP_VAL1; 507 value = ET_COMP_VAL1;
492 else 508 else
493 value = ET_COMP_VAL0; 509 value = ET_COMP_VAL0;
494 PDEBUG(D_STREAM, "Open mode %d Compression %d", 510 PDEBUG(D_STREAM, "Open mode %d Compression %d",
495 gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode, 511 gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv,
496 value); 512 value);
497 reg_w_val(dev, ET_COMP, value); 513 reg_w_val(dev, ET_COMP, value);
498 reg_w_val(dev, ET_MAXQt, 0x1d); 514 reg_w_val(dev, ET_MAXQt, 0x1d);
@@ -533,7 +549,7 @@ static void Et_init1(struct gspca_dev *gspca_dev)
533 reg_w_val(dev, ET_I2C_CLK, 0x04); 549 reg_w_val(dev, ET_I2C_CLK, 0x04);
534 reg_w_val(dev, ET_PXL_CLK, 0x01); 550 reg_w_val(dev, ET_PXL_CLK, 0x01);
535 /* set the sensor */ 551 /* set the sensor */
536 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) { 552 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
537 I2c0[0] = 0x06; 553 I2c0[0] = 0x06;
538 Et_i2cwrite(dev, PAS106_REG2, I2c0, sizeof I2c0, 1); 554 Et_i2cwrite(dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
539 Et_i2cwrite(dev, PAS106_REG9, I2c2, sizeof I2c2, 1); 555 Et_i2cwrite(dev, PAS106_REG9, I2c2, sizeof I2c2, 1);