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Diffstat (limited to 'drivers/media/video/em28xx/em28xx-cards.c')
-rw-r--r--drivers/media/video/em28xx/em28xx-cards.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 4ab30476807d..32c2c7fdad2c 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -227,6 +227,22 @@ struct em2820_board em2820_boards[] = {
227 .amux = 1, 227 .amux = 1,
228 }}, 228 }},
229 }, 229 },
230 [EM2820_BOARD_PINNACLE_DVC_90] = {
231 .name = "Pinnacle Dazzle DVC 90",
232 .vchannels = 3,
233 .norm = VIDEO_MODE_PAL,
234 .has_tuner = 0,
235 .decoder = EM2820_SAA7113,
236 .input = {{
237 .type = EM2820_VMUX_COMPOSITE1,
238 .vmux = 0,
239 .amux = 1,
240 },{
241 .type = EM2820_VMUX_SVIDEO,
242 .vmux = 9,
243 .amux = 1,
244 }},
245 },
230}; 246};
231const unsigned int em2820_bcount = ARRAY_SIZE(em2820_boards); 247const unsigned int em2820_bcount = ARRAY_SIZE(em2820_boards);
232 248
@@ -237,6 +253,7 @@ struct usb_device_id em2820_id_table [] = {
237 { USB_DEVICE(0x0ccd, 0x0036), .driver_info = EM2820_BOARD_TERRATEC_CINERGY_250 }, 253 { USB_DEVICE(0x0ccd, 0x0036), .driver_info = EM2820_BOARD_TERRATEC_CINERGY_250 },
238 { USB_DEVICE(0x2304, 0x0208), .driver_info = EM2820_BOARD_PINNACLE_USB_2 }, 254 { USB_DEVICE(0x2304, 0x0208), .driver_info = EM2820_BOARD_PINNACLE_USB_2 },
239 { USB_DEVICE(0x2040, 0x4200), .driver_info = EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 }, 255 { USB_DEVICE(0x2040, 0x4200), .driver_info = EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 },
256 { USB_DEVICE(0x2304, 0x0207), .driver_info = EM2820_BOARD_PINNACLE_DVC_90 },
240 { }, 257 { },
241}; 258};
242 259
@@ -258,6 +275,9 @@ void em2820_card_setup(struct em2820 *dev)
258 if (tv.audio_processor == AUDIO_CHIP_MSP34XX) { 275 if (tv.audio_processor == AUDIO_CHIP_MSP34XX) {
259 dev->has_msp34xx=1; 276 dev->has_msp34xx=1;
260 } else dev->has_msp34xx=0; 277 } else dev->has_msp34xx=0;
278 em2820_write_regs_req(dev,0x06,0x00,"\x40",1);// Serial Bus Frequency Select Register
279 em2820_write_regs_req(dev,0x0f,0x00,"\x87",1);// XCLK Frequency Select Register
280 em2820_write_regs_req(dev,0x88,0x0d,"\xd0",1);
261 } 281 }
262} 282}
263 283