aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/video/cx88
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/media/video/cx88')
-rw-r--r--drivers/media/video/cx88/Kconfig91
-rw-r--r--drivers/media/video/cx88/Makefile6
-rw-r--r--drivers/media/video/cx88/cx88-blackbird.c677
-rw-r--r--drivers/media/video/cx88/cx88-cards.c474
-rw-r--r--drivers/media/video/cx88/cx88-core.c55
-rw-r--r--drivers/media/video/cx88/cx88-dvb.c59
-rw-r--r--drivers/media/video/cx88/cx88-i2c.c22
-rw-r--r--drivers/media/video/cx88/cx88-input.c2
-rw-r--r--drivers/media/video/cx88/cx88-mpeg.c25
-rw-r--r--drivers/media/video/cx88/cx88-reg.h12
-rw-r--r--drivers/media/video/cx88/cx88-tvaudio.c1184
-rw-r--r--drivers/media/video/cx88/cx88-video.c38
-rw-r--r--drivers/media/video/cx88/cx88.h55
13 files changed, 1757 insertions, 943 deletions
diff --git a/drivers/media/video/cx88/Kconfig b/drivers/media/video/cx88/Kconfig
new file mode 100644
index 000000000000..41818b6205b3
--- /dev/null
+++ b/drivers/media/video/cx88/Kconfig
@@ -0,0 +1,91 @@
1config VIDEO_CX88
2 tristate "Conexant 2388x (bt878 successor) support"
3 depends on VIDEO_DEV && PCI && I2C
4 select I2C_ALGOBIT
5 select FW_LOADER
6 select VIDEO_BTCX
7 select VIDEO_BUF
8 select VIDEO_TUNER
9 select VIDEO_TVEEPROM
10 select VIDEO_IR
11 ---help---
12 This is a video4linux driver for Conexant 2388x based
13 TV cards.
14
15 To compile this driver as a module, choose M here: the
16 module will be called cx8800
17
18config VIDEO_CX88_DVB
19 tristate "DVB/ATSC Support for cx2388x based TV cards"
20 depends on VIDEO_CX88 && DVB_CORE
21 select VIDEO_BUF_DVB
22 ---help---
23 This adds support for DVB/ATSC cards based on the
24 Connexant 2388x chip.
25
26 To compile this driver as a module, choose M here: the
27 module will be called cx88-dvb.
28
29 You must also select one or more DVB/ATSC demodulators.
30 If you are unsure which you need, choose all of them.
31
32config VIDEO_CX88_DVB_ALL_FRONTENDS
33 bool "Build all supported frontends for cx2388x based TV cards"
34 default y
35 depends on VIDEO_CX88_DVB
36 select DVB_MT352
37 select DVB_OR51132
38 select DVB_CX22702
39 select DVB_LGDT330X
40 select DVB_NXT200X
41 ---help---
42 This builds cx88-dvb with all currently supported frontend
43 demodulators. If you wish to tweak your configuration, and
44 only include support for the hardware that you need, choose N here.
45
46 If you are unsure, choose Y.
47
48config VIDEO_CX88_DVB_MT352
49 tristate "Zarlink MT352 DVB-T Support"
50 default m
51 depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
52 select DVB_MT352
53 ---help---
54 This adds DVB-T support for cards based on the
55 Connexant 2388x chip and the MT352 demodulator.
56
57config VIDEO_CX88_DVB_OR51132
58 tristate "OR51132 ATSC Support"
59 default m
60 depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
61 select DVB_OR51132
62 ---help---
63 This adds ATSC 8VSB and QAM64/256 support for cards based on the
64 Connexant 2388x chip and the OR51132 demodulator.
65
66config VIDEO_CX88_DVB_CX22702
67 tristate "Conexant CX22702 DVB-T Support"
68 default m
69 depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
70 select DVB_CX22702
71 ---help---
72 This adds DVB-T support for cards based on the
73 Connexant 2388x chip and the CX22702 demodulator.
74
75config VIDEO_CX88_DVB_LGDT330X
76 tristate "LG Electronics DT3302/DT3303 ATSC Support"
77 default m
78 depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
79 select DVB_LGDT330X
80 ---help---
81 This adds ATSC 8VSB and QAM64/256 support for cards based on the
82 Connexant 2388x chip and the LGDT3302/LGDT3303 demodulator.
83
84config VIDEO_CX88_DVB_NXT200X
85 tristate "NXT2002/NXT2004 ATSC Support"
86 default m
87 depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
88 select DVB_NXT200X
89 ---help---
90 This adds ATSC 8VSB and QAM64/256 support for cards based on the
91 Connexant 2388x chip and the NXT2002/NXT2004 demodulator.
diff --git a/drivers/media/video/cx88/Makefile b/drivers/media/video/cx88/Makefile
index 107e48645e3a..0df40b773454 100644
--- a/drivers/media/video/cx88/Makefile
+++ b/drivers/media/video/cx88/Makefile
@@ -9,6 +9,9 @@ obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o
9EXTRA_CFLAGS += -I$(src)/.. 9EXTRA_CFLAGS += -I$(src)/..
10EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core 10EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core
11EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/frontends 11EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/frontends
12ifneq ($(CONFIG_VIDEO_BUF_DVB),n)
13 EXTRA_CFLAGS += -DHAVE_VIDEO_BUF_DVB=1
14endif
12ifneq ($(CONFIG_DVB_CX22702),n) 15ifneq ($(CONFIG_DVB_CX22702),n)
13 EXTRA_CFLAGS += -DHAVE_CX22702=1 16 EXTRA_CFLAGS += -DHAVE_CX22702=1
14endif 17endif
@@ -21,3 +24,6 @@ endif
21ifneq ($(CONFIG_DVB_MT352),n) 24ifneq ($(CONFIG_DVB_MT352),n)
22 EXTRA_CFLAGS += -DHAVE_MT352=1 25 EXTRA_CFLAGS += -DHAVE_MT352=1
23endif 26endif
27ifneq ($(CONFIG_DVB_NXT200X),n)
28 EXTRA_CFLAGS += -DHAVE_NXT200X=1
29endif
diff --git a/drivers/media/video/cx88/cx88-blackbird.c b/drivers/media/video/cx88/cx88-blackbird.c
index 0c0c59e94774..4ae3f78cccf2 100644
--- a/drivers/media/video/cx88/cx88-blackbird.c
+++ b/drivers/media/video/cx88/cx88-blackbird.c
@@ -38,7 +38,7 @@ MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>");
38MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); 38MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
39MODULE_LICENSE("GPL"); 39MODULE_LICENSE("GPL");
40 40
41static unsigned int mpegbufs = 8; 41static unsigned int mpegbufs = 32;
42module_param(mpegbufs,int,0644); 42module_param(mpegbufs,int,0644);
43MODULE_PARM_DESC(mpegbufs,"number of mpeg buffers, range 2-32"); 43MODULE_PARM_DESC(mpegbufs,"number of mpeg buffers, range 2-32");
44 44
@@ -436,7 +436,7 @@ static int memory_write(struct cx88_core *core, u32 address, u32 value)
436 436
437static int memory_read(struct cx88_core *core, u32 address, u32 *value) 437static int memory_read(struct cx88_core *core, u32 address, u32 *value)
438{ 438{
439 int retval; 439 int retval;
440 u32 val; 440 u32 val;
441 441
442 /* Warning: address is dword address (4 bytes) */ 442 /* Warning: address is dword address (4 bytes) */
@@ -605,11 +605,11 @@ static int blackbird_load_firmware(struct cx8802_dev *dev)
605 u32 *dataptr; 605 u32 *dataptr;
606 606
607 retval = register_write(dev->core, IVTV_REG_VPU, 0xFFFFFFED); 607 retval = register_write(dev->core, IVTV_REG_VPU, 0xFFFFFFED);
608 retval |= register_write(dev->core, IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST); 608 retval |= register_write(dev->core, IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST);
609 retval |= register_write(dev->core, IVTV_REG_ENC_SDRAM_REFRESH, 0x80000640); 609 retval |= register_write(dev->core, IVTV_REG_ENC_SDRAM_REFRESH, 0x80000640);
610 retval |= register_write(dev->core, IVTV_REG_ENC_SDRAM_PRECHARGE, 0x1A); 610 retval |= register_write(dev->core, IVTV_REG_ENC_SDRAM_PRECHARGE, 0x1A);
611 msleep(1); 611 msleep(1);
612 retval |= register_write(dev->core, IVTV_REG_APU, 0); 612 retval |= register_write(dev->core, IVTV_REG_APU, 0);
613 613
614 if (retval < 0) 614 if (retval < 0)
615 dprintk(0, "Error with register_write\n"); 615 dprintk(0, "Error with register_write\n");
@@ -657,13 +657,13 @@ static int blackbird_load_firmware(struct cx8802_dev *dev)
657 release_firmware(firmware); 657 release_firmware(firmware);
658 dprintk(0, "Firmware upload successful.\n"); 658 dprintk(0, "Firmware upload successful.\n");
659 659
660 retval |= register_write(dev->core, IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST); 660 retval |= register_write(dev->core, IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST);
661 retval |= register_read(dev->core, IVTV_REG_SPU, &value); 661 retval |= register_read(dev->core, IVTV_REG_SPU, &value);
662 retval |= register_write(dev->core, IVTV_REG_SPU, value & 0xFFFFFFFE); 662 retval |= register_write(dev->core, IVTV_REG_SPU, value & 0xFFFFFFFE);
663 msleep(1); 663 msleep(1);
664 664
665 retval |= register_read(dev->core, IVTV_REG_VPU, &value); 665 retval |= register_read(dev->core, IVTV_REG_VPU, &value);
666 retval |= register_write(dev->core, IVTV_REG_VPU, value & 0xFFFFFFE8); 666 retval |= register_write(dev->core, IVTV_REG_VPU, value & 0xFFFFFFE8);
667 667
668 if (retval < 0) 668 if (retval < 0)
669 dprintk(0, "Error with register_write\n"); 669 dprintk(0, "Error with register_write\n");
@@ -683,84 +683,560 @@ DB* DVD | MPEG2 | 720x576PAL | CBR | 600 :Good | 6000 Kbps | 25fps | M
683================================================================================================================= 683=================================================================================================================
684*DB: "DirectBurn" 684*DB: "DirectBurn"
685*/ 685*/
686static void blackbird_codec_settings(struct cx8802_dev *dev) 686
687static struct blackbird_dnr default_dnr_params = {
688 .mode = BLACKBIRD_DNR_BITS_MANUAL,
689 .type = BLACKBIRD_MEDIAN_FILTER_DISABLED,
690 .spatial = 0,
691 .temporal = 0
692};
693static struct v4l2_mpeg_compression default_mpeg_params = {
694 .st_type = V4L2_MPEG_PS_2,
695 .st_bitrate = {
696 .mode = V4L2_BITRATE_CBR,
697 .min = 0,
698 .target = 0,
699 .max = 0
700 },
701 .ts_pid_pmt = 16,
702 .ts_pid_audio = 260,
703 .ts_pid_video = 256,
704 .ts_pid_pcr = 259,
705 .ps_size = 0,
706 .au_type = V4L2_MPEG_AU_2_II,
707 .au_bitrate = {
708 .mode = V4L2_BITRATE_CBR,
709 .min = 224,
710 .target = 224,
711 .max = 224
712 },
713 .au_sample_rate = 44100,
714 .au_pesid = 0,
715 .vi_type = V4L2_MPEG_VI_2,
716 .vi_aspect_ratio = V4L2_MPEG_ASPECT_4_3,
717 .vi_bitrate = {
718 .mode = V4L2_BITRATE_CBR,
719 .min = 4000,
720 .target = 4500,
721 .max = 6000
722 },
723 .vi_frame_rate = 25,
724 .vi_frames_per_gop = 15,
725 .vi_bframes_count = 2,
726 .vi_pesid = 0,
727 .closed_gops = 0,
728 .pulldown = 0
729};
730
731static enum blackbird_stream_type mpeg_stream_types[] = {
732 [V4L2_MPEG_SS_1] = BLACKBIRD_STREAM_MPEG1,
733 [V4L2_MPEG_PS_2] = BLACKBIRD_STREAM_PROGRAM,
734 [V4L2_MPEG_TS_2] = BLACKBIRD_STREAM_TRANSPORT,
735 [V4L2_MPEG_PS_DVD] = BLACKBIRD_STREAM_DVD,
736};
737static enum blackbird_aspect_ratio mpeg_stream_ratios[] = {
738 [V4L2_MPEG_ASPECT_SQUARE] = BLACKBIRD_ASPECT_RATIO_1_1_SQUARE,
739 [V4L2_MPEG_ASPECT_4_3] = BLACKBIRD_ASPECT_RATIO_4_3,
740 [V4L2_MPEG_ASPECT_16_9] = BLACKBIRD_ASPECT_RATIO_16_9,
741 [V4L2_MPEG_ASPECT_1_221] = BLACKBIRD_ASPECT_RATIO_221_100,
742};
743static enum blackbird_video_bitrate_type mpeg_video_bitrates[] = {
744 [V4L2_BITRATE_NONE] = BLACKBIRD_VIDEO_CBR,
745 [V4L2_BITRATE_CBR] = BLACKBIRD_VIDEO_CBR,
746 [V4L2_BITRATE_VBR] = BLACKBIRD_VIDEO_VBR,
747};
748/* find the best layer I/II bitrate to fit a given numeric value */
749struct bitrate_bits {
750 u32 bits; /* layer bits for the best fit */
751 u32 rate; /* actual numeric value for the layer best fit */
752};
753struct bitrate_approximation {
754 u32 target; /* numeric value of the rate we want */
755 struct bitrate_bits layer[2];
756};
757static struct bitrate_approximation mpeg_audio_bitrates[] = {
758 /* target layer[0].bits layer[0].rate layer[1].bits layer[1].rate */
759 { 0, { { 0, 0, }, { 0, 0, }, }, },
760 { 32, { { BLACKBIRD_AUDIO_BITS_LAYER_1_32 , 32, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_32 , 32, }, }, },
761 { 48, { { BLACKBIRD_AUDIO_BITS_LAYER_1_64 , 64, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_48 , 48, }, }, },
762 { 56, { { BLACKBIRD_AUDIO_BITS_LAYER_1_64 , 64, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_56 , 56, }, }, },
763 { 64, { { BLACKBIRD_AUDIO_BITS_LAYER_1_64 , 64, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_64 , 64, }, }, },
764 { 80, { { BLACKBIRD_AUDIO_BITS_LAYER_1_96 , 96, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_80 , 80, }, }, },
765 { 96, { { BLACKBIRD_AUDIO_BITS_LAYER_1_96 , 96, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_96 , 96, }, }, },
766 { 112, { { BLACKBIRD_AUDIO_BITS_LAYER_1_128, 128, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_112, 112, }, }, },
767 { 128, { { BLACKBIRD_AUDIO_BITS_LAYER_1_128, 128, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_128, 128, }, }, },
768 { 160, { { BLACKBIRD_AUDIO_BITS_LAYER_1_160, 160, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_160, 160, }, }, },
769 { 192, { { BLACKBIRD_AUDIO_BITS_LAYER_1_192, 192, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_192, 192, }, }, },
770 { 224, { { BLACKBIRD_AUDIO_BITS_LAYER_1_224, 224, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_224, 224, }, }, },
771 { 256, { { BLACKBIRD_AUDIO_BITS_LAYER_1_256, 256, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_256, 256, }, }, },
772 { 288, { { BLACKBIRD_AUDIO_BITS_LAYER_1_288, 288, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_320, 320, }, }, },
773 { 320, { { BLACKBIRD_AUDIO_BITS_LAYER_1_320, 320, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_320, 320, }, }, },
774 { 352, { { BLACKBIRD_AUDIO_BITS_LAYER_1_352, 352, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_384, 384, }, }, },
775 { 384, { { BLACKBIRD_AUDIO_BITS_LAYER_1_384, 384, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_384, 384, }, }, },
776 { 416, { { BLACKBIRD_AUDIO_BITS_LAYER_1_416, 416, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_384, 384, }, }, },
777 { 448, { { BLACKBIRD_AUDIO_BITS_LAYER_1_448, 448, }, { BLACKBIRD_AUDIO_BITS_LAYER_2_384, 384, }, }, },
778};
779static const int BITRATES_SIZE = ARRAY_SIZE(mpeg_audio_bitrates);
780
781static void blackbird_set_default_params(struct cx8802_dev *dev)
687{ 782{
688 int bitrate_mode = 1; 783 struct v4l2_mpeg_compression *params = &dev->params;
689 int bitrate = 7500000; 784 u32 au_params;
690 int bitrate_peak = 7500000;
691 bitrate_mode = BLACKBIRD_VIDEO_CBR;
692 bitrate = 4000*1024;
693 bitrate_peak = 4000*1024;
694 785
695 /* assign stream type */ 786 /* assign stream type */
696 blackbird_api_cmd(dev, BLACKBIRD_API_SET_STREAM_TYPE, 1, 0, BLACKBIRD_STREAM_PROGRAM); 787 if( params->st_type >= ARRAY_SIZE(mpeg_stream_types) )
697 788 params->st_type = V4L2_MPEG_PS_2;
698 /* assign output port */ 789 if( params->st_type == V4L2_MPEG_SS_1 )
699 blackbird_api_cmd(dev, BLACKBIRD_API_SET_OUTPUT_PORT, 1, 0, BLACKBIRD_OUTPUT_PORT_STREAMING); /* Host */ 790 params->vi_type = V4L2_MPEG_VI_1;
791 else
792 params->vi_type = V4L2_MPEG_VI_2;
793 blackbird_api_cmd(dev, BLACKBIRD_API_SET_STREAM_TYPE, 1, 0, mpeg_stream_types[params->st_type]);
700 794
701 /* assign framerate */ 795 /* assign framerate */
702 blackbird_api_cmd(dev, BLACKBIRD_API_SET_FRAMERATE, 1, 0, BLACKBIRD_FRAMERATE_PAL_25); 796 if( params->vi_frame_rate <= 25 )
703 797 {
704 /* assign frame size */ 798 params->vi_frame_rate = 25;
705 blackbird_api_cmd(dev, BLACKBIRD_API_SET_RESOLUTION, 2, 0, 799 blackbird_api_cmd(dev, BLACKBIRD_API_SET_FRAMERATE, 1, 0, BLACKBIRD_FRAMERATE_PAL_25);
706 dev->height, dev->width); 800 }
801 else
802 {
803 params->vi_frame_rate = 30;
804 blackbird_api_cmd(dev, BLACKBIRD_API_SET_FRAMERATE, 1, 0, BLACKBIRD_FRAMERATE_NTSC_30);
805 }
707 806
708 /* assign aspect ratio */ 807 /* assign aspect ratio */
709 blackbird_api_cmd(dev, BLACKBIRD_API_SET_ASPECT_RATIO, 1, 0, BLACKBIRD_ASPECT_RATIO_4_3); 808 if( params->vi_aspect_ratio >= ARRAY_SIZE(mpeg_stream_ratios) )
710 809 params->vi_aspect_ratio = V4L2_MPEG_ASPECT_4_3;
711 /* assign bitrates */ 810 blackbird_api_cmd(dev, BLACKBIRD_API_SET_ASPECT_RATIO, 1, 0, mpeg_stream_ratios[params->vi_aspect_ratio]);
712 blackbird_api_cmd(dev, BLACKBIRD_API_SET_VIDEO_BITRATE, 5, 0,
713 bitrate_mode, /* mode */
714 bitrate, /* bps */
715 bitrate_peak / BLACKBIRD_PEAK_RATE_DIVISOR, /* peak/400 */
716 BLACKBIRD_MUX_RATE_DEFAULT /*, 0x70*/); /* encoding buffer, ckennedy */
717 811
718 /* assign gop properties */ 812 /* assign gop properties */
719 blackbird_api_cmd(dev, BLACKBIRD_API_SET_GOP_STRUCTURE, 2, 0, 15, 3); 813 blackbird_api_cmd(dev, BLACKBIRD_API_SET_GOP_STRUCTURE, 2, 0, params->vi_frames_per_gop, params->vi_bframes_count+1);
814
815 /* assign gop closure */
816 blackbird_api_cmd(dev, BLACKBIRD_API_SET_GOP_CLOSURE, 1, 0, params->closed_gops);
720 817
721 /* assign 3 2 pulldown */ 818 /* assign 3 2 pulldown */
722 blackbird_api_cmd(dev, BLACKBIRD_API_SET_3_2_PULLDOWN, 1, 0, BLACKBIRD_3_2_PULLDOWN_DISABLED); 819 blackbird_api_cmd(dev, BLACKBIRD_API_SET_3_2_PULLDOWN, 1, 0, params->pulldown);
820
821 /* make sure the params are within bounds */
822 if( params->st_bitrate.mode >= ARRAY_SIZE(mpeg_video_bitrates) )
823 params->vi_bitrate.mode = V4L2_BITRATE_NONE;
824 if( params->vi_bitrate.mode >= ARRAY_SIZE(mpeg_video_bitrates) )
825 params->vi_bitrate.mode = V4L2_BITRATE_NONE;
826 if( params->au_bitrate.mode >= ARRAY_SIZE(mpeg_video_bitrates) )
827 params->au_bitrate.mode = V4L2_BITRATE_NONE;
723 828
724 /* assign audio properties */ 829 /* assign audio properties */
725 /* note: it's not necessary to set the samplerate, the mpeg encoder seems to autodetect/adjust */ 830 /* note: it's not necessary to set the samplerate, the mpeg encoder seems to autodetect/adjust */
726 /* blackbird_api_cmd(dev, IVTV_API_ASSIGN_AUDIO_PROPERTIES, 1, 0, (2<<2) | (8<<4)); 831 au_params = BLACKBIRD_AUDIO_BITS_STEREO |
727 blackbird_api_cmd(dev, IVTV_API_ASSIGN_AUDIO_PROPERTIES, 1, 0, 0 | (2 << 2) | (14 << 4)); */
728 blackbird_api_cmd(dev, BLACKBIRD_API_SET_AUDIO_PARAMS, 1, 0,
729 BLACKBIRD_AUDIO_BITS_44100HZ |
730 BLACKBIRD_AUDIO_BITS_LAYER_2 |
731 BLACKBIRD_AUDIO_BITS_LAYER_2_224 |
732 BLACKBIRD_AUDIO_BITS_STEREO |
733 /* BLACKBIRD_AUDIO_BITS_BOUND_4 | */ 832 /* BLACKBIRD_AUDIO_BITS_BOUND_4 | */
734 BLACKBIRD_AUDIO_BITS_EMPHASIS_NONE | 833 BLACKBIRD_AUDIO_BITS_EMPHASIS_NONE |
735 BLACKBIRD_AUDIO_BITS_CRC_OFF | 834 BLACKBIRD_AUDIO_BITS_CRC_OFF |
736 BLACKBIRD_AUDIO_BITS_COPYRIGHT_OFF | 835 BLACKBIRD_AUDIO_BITS_COPYRIGHT_OFF |
737 BLACKBIRD_AUDIO_BITS_COPY 836 BLACKBIRD_AUDIO_BITS_COPY |
738 ); 837 0;
838 if( params->au_sample_rate <= 32000 )
839 {
840 params->au_sample_rate = 32000;
841 au_params |= BLACKBIRD_AUDIO_BITS_32000HZ;
842 }
843 else if( params->au_sample_rate <= 44100 )
844 {
845 params->au_sample_rate = 44100;
846 au_params |= BLACKBIRD_AUDIO_BITS_44100HZ;
847 }
848 else
849 {
850 params->au_sample_rate = 48000;
851 au_params |= BLACKBIRD_AUDIO_BITS_48000HZ;
852 }
853 if( params->au_type == V4L2_MPEG_AU_2_I )
854 {
855 au_params |= BLACKBIRD_AUDIO_BITS_LAYER_1;
856 }
857 else
858 {
859 /* TODO: try to handle the other formats more gracefully */
860 params->au_type = V4L2_MPEG_AU_2_II;
861 au_params |= BLACKBIRD_AUDIO_BITS_LAYER_2;
862 }
863 if( params->au_bitrate.mode )
864 {
865 int layer;
866
867 if( params->au_bitrate.mode == V4L2_BITRATE_CBR )
868 params->au_bitrate.max = params->vi_bitrate.target;
869 else
870 params->au_bitrate.target = params->vi_bitrate.max;
871
872 layer = params->au_type;
873 if( params->au_bitrate.target == 0 )
874 {
875 /* TODO: use the minimum possible bitrate instead of 0 ? */
876 au_params |= 0;
877 }
878 else if( params->au_bitrate.target >=
879 mpeg_audio_bitrates[BITRATES_SIZE-1].layer[layer].rate )
880 {
881 /* clamp the bitrate to the max supported by the standard */
882 params->au_bitrate.target = mpeg_audio_bitrates[BITRATES_SIZE-1].layer[layer].rate;
883 params->au_bitrate.max = params->au_bitrate.target;
884 au_params |= mpeg_audio_bitrates[BITRATES_SIZE-1].layer[layer].bits;
885 }
886 else
887 {
888 /* round up to the nearest supported bitrate */
889 int i;
890 for(i = 1; i < BITRATES_SIZE; i++)
891 {
892 if( params->au_bitrate.target > mpeg_audio_bitrates[i-1].layer[layer].rate &&
893 params->au_bitrate.target <= mpeg_audio_bitrates[i].layer[layer].rate )
894 {
895 params->au_bitrate.target = mpeg_audio_bitrates[i].layer[layer].rate;
896 params->au_bitrate.max = params->au_bitrate.target;
897 au_params |= mpeg_audio_bitrates[i].layer[layer].bits;
898 break;
899 }
900 }
901 }
902 }
903 else
904 {
905 /* TODO: ??? */
906 params->au_bitrate.target = params->au_bitrate.max = 0;
907 au_params |= 0;
908 }
909 blackbird_api_cmd(dev, BLACKBIRD_API_SET_AUDIO_PARAMS, 1, 0, au_params );
910
911 /* assign bitrates */
912 if( params->vi_bitrate.mode )
913 {
914 /* bitrate is set, let's figure out the cbr/vbr mess */
915 if( params->vi_bitrate.max < params->vi_bitrate.target )
916 {
917 if( params->vi_bitrate.mode == V4L2_BITRATE_CBR )
918 params->vi_bitrate.max = params->vi_bitrate.target;
919 else
920 params->vi_bitrate.target = params->vi_bitrate.max;
921 }
922 }
923 else
924 {
925 if( params->st_bitrate.max < params->st_bitrate.target )
926 {
927 if( params->st_bitrate.mode == V4L2_BITRATE_VBR )
928 params->st_bitrate.target = params->st_bitrate.max;
929 else
930 params->st_bitrate.max = params->st_bitrate.target;
931 }
932 /* calculate vi_bitrate = st_bitrate - au_bitrate */
933 params->vi_bitrate.max = params->st_bitrate.max - params->au_bitrate.max;
934 params->vi_bitrate.target = params->st_bitrate.target - params->au_bitrate.target;
935 }
936 blackbird_api_cmd(dev, BLACKBIRD_API_SET_VIDEO_BITRATE, 4, 0,
937 mpeg_video_bitrates[params->vi_bitrate.mode],
938 params->vi_bitrate.target * 1000, /* kbps -> bps */
939 params->vi_bitrate.max * 1000 / BLACKBIRD_PEAK_RATE_DIVISOR, /* peak/400 */
940 BLACKBIRD_MUX_RATE_DEFAULT /*, 0x70*/); /* encoding buffer, ckennedy */
941
942 /* TODO: implement the stream ID stuff:
943 ts_pid_pmt, ts_pid_audio, ts_pid_video, ts_pid_pcr,
944 ps_size, au_pesid, vi_pesid
945 */
946}
947#define CHECK_PARAM( name ) ( dev->params.name != params->name )
948#define IF_PARAM( name ) if( CHECK_PARAM( name ) )
949#define UPDATE_PARAM( name ) dev->params.name = params->name
950void blackbird_set_params(struct cx8802_dev *dev, struct v4l2_mpeg_compression *params)
951{
952 u32 au_params;
953
954 /* assign stream type */
955 if( params->st_type >= ARRAY_SIZE(mpeg_stream_types) )
956 params->st_type = V4L2_MPEG_PS_2;
957 if( params->st_type == V4L2_MPEG_SS_1 )
958 params->vi_type = V4L2_MPEG_VI_1;
959 else
960 params->vi_type = V4L2_MPEG_VI_2;
961 if( CHECK_PARAM( st_type ) || CHECK_PARAM( vi_type ) )
962 {
963 UPDATE_PARAM( st_type );
964 UPDATE_PARAM( vi_type );
965 blackbird_api_cmd(dev, BLACKBIRD_API_SET_STREAM_TYPE, 1, 0, mpeg_stream_types[params->st_type]);
966 }
967
968 /* assign framerate */
969 if( params->vi_frame_rate <= 25 )
970 params->vi_frame_rate = 25;
971 else
972 params->vi_frame_rate = 30;
973 IF_PARAM( vi_frame_rate )
974 {
975 UPDATE_PARAM( vi_frame_rate );
976 if( params->vi_frame_rate == 25 )
977 blackbird_api_cmd(dev, BLACKBIRD_API_SET_FRAMERATE, 1, 0, BLACKBIRD_FRAMERATE_PAL_25);
978 else
979 blackbird_api_cmd(dev, BLACKBIRD_API_SET_FRAMERATE, 1, 0, BLACKBIRD_FRAMERATE_NTSC_30);
980 }
981
982 /* assign aspect ratio */
983 if( params->vi_aspect_ratio >= ARRAY_SIZE(mpeg_stream_ratios) )
984 params->vi_aspect_ratio = V4L2_MPEG_ASPECT_4_3;
985 IF_PARAM( vi_aspect_ratio )
986 {
987 UPDATE_PARAM( vi_aspect_ratio );
988 blackbird_api_cmd(dev, BLACKBIRD_API_SET_ASPECT_RATIO, 1, 0, mpeg_stream_ratios[params->vi_aspect_ratio]);
989 }
990
991 /* assign gop properties */
992 if( CHECK_PARAM( vi_frames_per_gop ) || CHECK_PARAM( vi_bframes_count ) )
993 {
994 UPDATE_PARAM( vi_frames_per_gop );
995 UPDATE_PARAM( vi_bframes_count );
996 blackbird_api_cmd(dev, BLACKBIRD_API_SET_GOP_STRUCTURE, 2, 0, params->vi_frames_per_gop, params->vi_bframes_count+1);
997 }
739 998
740 /* assign gop closure */ 999 /* assign gop closure */
741 blackbird_api_cmd(dev, BLACKBIRD_API_SET_GOP_CLOSURE, 1, 0, BLACKBIRD_GOP_CLOSURE_OFF); 1000 IF_PARAM( closed_gops )
1001 {
1002 UPDATE_PARAM( closed_gops );
1003 blackbird_api_cmd(dev, BLACKBIRD_API_SET_GOP_CLOSURE, 1, 0, params->closed_gops);
1004 }
1005
1006 /* assign 3 2 pulldown */
1007 IF_PARAM( pulldown )
1008 {
1009 UPDATE_PARAM( pulldown );
1010 blackbird_api_cmd(dev, BLACKBIRD_API_SET_3_2_PULLDOWN, 1, 0, params->pulldown);
1011 }
1012
1013 /* make sure the params are within bounds */
1014 if( params->st_bitrate.mode >= ARRAY_SIZE(mpeg_video_bitrates) )
1015 params->vi_bitrate.mode = V4L2_BITRATE_NONE;
1016 if( params->vi_bitrate.mode >= ARRAY_SIZE(mpeg_video_bitrates) )
1017 params->vi_bitrate.mode = V4L2_BITRATE_NONE;
1018 if( params->au_bitrate.mode >= ARRAY_SIZE(mpeg_video_bitrates) )
1019 params->au_bitrate.mode = V4L2_BITRATE_NONE;
1020
1021 /* assign audio properties */
1022 /* note: it's not necessary to set the samplerate, the mpeg encoder seems to autodetect/adjust */
1023 au_params = BLACKBIRD_AUDIO_BITS_STEREO |
1024 /* BLACKBIRD_AUDIO_BITS_BOUND_4 | */
1025 BLACKBIRD_AUDIO_BITS_EMPHASIS_NONE |
1026 BLACKBIRD_AUDIO_BITS_CRC_OFF |
1027 BLACKBIRD_AUDIO_BITS_COPYRIGHT_OFF |
1028 BLACKBIRD_AUDIO_BITS_COPY |
1029 0;
1030 if( params->au_sample_rate < 32000 )
1031 {
1032 params->au_sample_rate = 32000;
1033 au_params |= BLACKBIRD_AUDIO_BITS_32000HZ;
1034 }
1035 else if( params->au_sample_rate < 44100 )
1036 {
1037 params->au_sample_rate = 44100;
1038 au_params |= BLACKBIRD_AUDIO_BITS_44100HZ;
1039 }
1040 else
1041 {
1042 params->au_sample_rate = 48000;
1043 au_params |= BLACKBIRD_AUDIO_BITS_48000HZ;
1044 }
1045 if( params->au_type == V4L2_MPEG_AU_2_I )
1046 {
1047 au_params |= BLACKBIRD_AUDIO_BITS_LAYER_1;
1048 }
1049 else
1050 {
1051 /* TODO: try to handle the other formats more gracefully */
1052 params->au_type = V4L2_MPEG_AU_2_II;
1053 au_params |= BLACKBIRD_AUDIO_BITS_LAYER_2;
1054 }
1055 if( params->au_bitrate.mode )
1056 {
1057 int layer;
1058
1059 if( params->au_bitrate.mode == V4L2_BITRATE_CBR )
1060 params->au_bitrate.max = params->vi_bitrate.target;
1061 else
1062 params->au_bitrate.target = params->vi_bitrate.max;
1063
1064 layer = params->au_type;
1065 if( params->au_bitrate.target == 0 )
1066 {
1067 /* TODO: use the minimum possible bitrate instead of 0 ? */
1068 au_params |= 0;
1069 }
1070 else if( params->au_bitrate.target >=
1071 mpeg_audio_bitrates[BITRATES_SIZE-1].layer[layer].rate )
1072 {
1073 /* clamp the bitrate to the max supported by the standard */
1074 params->au_bitrate.target = mpeg_audio_bitrates[BITRATES_SIZE-1].layer[layer].rate;
1075 params->au_bitrate.max = params->au_bitrate.target;
1076 au_params |= mpeg_audio_bitrates[BITRATES_SIZE-1].layer[layer].bits;
1077 }
1078 else
1079 {
1080 /* round up to the nearest supported bitrate */
1081 int i;
1082 for(i = 1; i < BITRATES_SIZE; i++)
1083 {
1084 if( params->au_bitrate.target > mpeg_audio_bitrates[i-1].layer[layer].rate &&
1085 params->au_bitrate.target <= mpeg_audio_bitrates[i].layer[layer].rate )
1086 {
1087 params->au_bitrate.target = mpeg_audio_bitrates[i].layer[layer].rate;
1088 params->au_bitrate.max = params->au_bitrate.target;
1089 au_params |= mpeg_audio_bitrates[i].layer[layer].bits;
1090 break;
1091 }
1092 }
1093 }
1094 }
1095 else
1096 {
1097 /* TODO: ??? */
1098 params->au_bitrate.target = params->au_bitrate.max = 0;
1099 au_params |= 0;
1100 }
1101 if( CHECK_PARAM( au_type ) || CHECK_PARAM( au_sample_rate )
1102 || CHECK_PARAM( au_bitrate.mode ) || CHECK_PARAM( au_bitrate.max )
1103 || CHECK_PARAM( au_bitrate.target )
1104 )
1105 {
1106 UPDATE_PARAM( au_type );
1107 UPDATE_PARAM( au_sample_rate );
1108 UPDATE_PARAM( au_bitrate );
1109 blackbird_api_cmd(dev, BLACKBIRD_API_SET_AUDIO_PARAMS, 1, 0, au_params );
1110 }
1111
1112 /* assign bitrates */
1113 if( params->vi_bitrate.mode )
1114 {
1115 /* bitrate is set, let's figure out the cbr/vbr mess */
1116 if( params->vi_bitrate.max < params->vi_bitrate.target )
1117 {
1118 if( params->vi_bitrate.mode == V4L2_BITRATE_CBR )
1119 params->vi_bitrate.max = params->vi_bitrate.target;
1120 else
1121 params->vi_bitrate.target = params->vi_bitrate.max;
1122 }
1123 }
1124 else
1125 {
1126 if( params->st_bitrate.max < params->st_bitrate.target )
1127 {
1128 if( params->st_bitrate.mode == V4L2_BITRATE_VBR )
1129 params->st_bitrate.target = params->st_bitrate.max;
1130 else
1131 params->st_bitrate.max = params->st_bitrate.target;
1132 }
1133 /* calculate vi_bitrate = st_bitrate - au_bitrate */
1134 params->vi_bitrate.max = params->st_bitrate.max - params->au_bitrate.max;
1135 params->vi_bitrate.target = params->st_bitrate.target - params->au_bitrate.target;
1136 }
1137 UPDATE_PARAM( st_bitrate );
1138 if( CHECK_PARAM( vi_bitrate.mode ) || CHECK_PARAM( vi_bitrate.max )
1139 || CHECK_PARAM( vi_bitrate.target )
1140 )
1141 {
1142 UPDATE_PARAM( vi_bitrate );
1143 blackbird_api_cmd(dev, BLACKBIRD_API_SET_VIDEO_BITRATE, 4, 0,
1144 mpeg_video_bitrates[params->vi_bitrate.mode],
1145 params->vi_bitrate.target * 1000, /* kbps -> bps */
1146 params->vi_bitrate.max * 1000 / BLACKBIRD_PEAK_RATE_DIVISOR, /* peak/400 */
1147 BLACKBIRD_MUX_RATE_DEFAULT /*, 0x70*/); /* encoding buffer, ckennedy */
1148 }
742 1149
1150 /* TODO: implement the stream ID stuff:
1151 ts_pid_pmt, ts_pid_audio, ts_pid_video, ts_pid_pcr,
1152 ps_size, au_pesid, vi_pesid
1153 */
1154 UPDATE_PARAM( ts_pid_pmt );
1155 UPDATE_PARAM( ts_pid_audio );
1156 UPDATE_PARAM( ts_pid_video );
1157 UPDATE_PARAM( ts_pid_pcr );
1158 UPDATE_PARAM( ps_size );
1159 UPDATE_PARAM( au_pesid );
1160 UPDATE_PARAM( vi_pesid );
1161}
743 1162
1163static void blackbird_set_default_dnr_params(struct cx8802_dev *dev)
1164{
744 /* assign dnr filter mode */ 1165 /* assign dnr filter mode */
1166 if( dev->dnr_params.mode > BLACKBIRD_DNR_BITS_AUTO )
1167 dev->dnr_params.mode = BLACKBIRD_DNR_BITS_MANUAL;
1168 if( dev->dnr_params.type > BLACKBIRD_MEDIAN_FILTER_DIAGONAL )
1169 dev->dnr_params.type = BLACKBIRD_MEDIAN_FILTER_DISABLED;
745 blackbird_api_cmd(dev, BLACKBIRD_API_SET_DNR_MODE, 2, 0, 1170 blackbird_api_cmd(dev, BLACKBIRD_API_SET_DNR_MODE, 2, 0,
746 BLACKBIRD_DNR_BITS_MANUAL, 1171 dev->dnr_params.mode,
747 BLACKBIRD_MEDIAN_FILTER_DISABLED 1172 dev->dnr_params.type
748 ); 1173 );
749 1174
750 /* assign dnr filter props*/ 1175 /* assign dnr filter props*/
751 blackbird_api_cmd(dev, BLACKBIRD_API_SET_MANUAL_DNR, 2, 0, 0, 0); 1176 if( dev->dnr_params.spatial > 15 )
1177 dev->dnr_params.spatial = 15;
1178 if( dev->dnr_params.temporal > 31 )
1179 dev->dnr_params.temporal = 31;
1180 blackbird_api_cmd(dev, BLACKBIRD_API_SET_MANUAL_DNR, 2, 0,
1181 dev->dnr_params.spatial,
1182 dev->dnr_params.temporal
1183 );
1184}
1185#define CHECK_DNR_PARAM( name ) ( dev->dnr_params.name != dnr_params->name )
1186#define UPDATE_DNR_PARAM( name ) dev->dnr_params.name = dnr_params->name
1187void blackbird_set_dnr_params(struct cx8802_dev *dev, struct blackbird_dnr* dnr_params)
1188{
1189 /* assign dnr filter mode */
1190 /* clamp values */
1191 if( dnr_params->mode > BLACKBIRD_DNR_BITS_AUTO )
1192 dnr_params->mode = BLACKBIRD_DNR_BITS_MANUAL;
1193 if( dnr_params->type > BLACKBIRD_MEDIAN_FILTER_DIAGONAL )
1194 dnr_params->type = BLACKBIRD_MEDIAN_FILTER_DISABLED;
1195 /* check if the params actually changed */
1196 if( CHECK_DNR_PARAM( mode ) || CHECK_DNR_PARAM( type ) )
1197 {
1198 UPDATE_DNR_PARAM( mode );
1199 UPDATE_DNR_PARAM( type );
1200 blackbird_api_cmd(dev, BLACKBIRD_API_SET_DNR_MODE, 2, 0, dnr_params->mode, dnr_params->type);
1201 }
1202
1203 /* assign dnr filter props*/
1204 if( dnr_params->spatial > 15 )
1205 dnr_params->spatial = 15;
1206 if( dnr_params->temporal > 31 )
1207 dnr_params->temporal = 31;
1208 if( CHECK_DNR_PARAM( spatial ) || CHECK_DNR_PARAM( temporal ) )
1209 {
1210 UPDATE_DNR_PARAM( spatial );
1211 UPDATE_DNR_PARAM( temporal );
1212 blackbird_api_cmd(dev, BLACKBIRD_API_SET_MANUAL_DNR, 2, 0, dnr_params->spatial, dnr_params->temporal);
1213 }
1214}
1215
1216static void blackbird_codec_settings(struct cx8802_dev *dev)
1217{
1218
1219 /* assign output port */
1220 blackbird_api_cmd(dev, BLACKBIRD_API_SET_OUTPUT_PORT, 1, 0, BLACKBIRD_OUTPUT_PORT_STREAMING); /* Host */
1221
1222 /* assign frame size */
1223 blackbird_api_cmd(dev, BLACKBIRD_API_SET_RESOLUTION, 2, 0,
1224 dev->height, dev->width);
752 1225
753 /* assign coring levels (luma_h, luma_l, chroma_h, chroma_l) */ 1226 /* assign coring levels (luma_h, luma_l, chroma_h, chroma_l) */
754 blackbird_api_cmd(dev, BLACKBIRD_API_SET_DNR_MEDIAN, 4, 0, 0, 255, 0, 255); 1227 blackbird_api_cmd(dev, BLACKBIRD_API_SET_DNR_MEDIAN, 4, 0, 0, 255, 0, 255);
755 1228
756 /* assign spatial filter type: luma_t: horiz_only, chroma_t: horiz_only */ 1229 /* assign spatial filter type: luma_t: horiz_only, chroma_t: horiz_only */
757 blackbird_api_cmd(dev, BLACKBIRD_API_SET_SPATIAL_FILTER, 2, 0, 1230 blackbird_api_cmd(dev, BLACKBIRD_API_SET_SPATIAL_FILTER, 2, 0,
758 BLACKBIRD_SPATIAL_FILTER_LUMA_1D_HORIZ, 1231 BLACKBIRD_SPATIAL_FILTER_LUMA_1D_HORIZ,
759 BLACKBIRD_SPATIAL_FILTER_CHROMA_1D_HORIZ 1232 BLACKBIRD_SPATIAL_FILTER_CHROMA_1D_HORIZ
760 ); 1233 );
761 1234
762 /* assign frame drop rate */ 1235 /* assign frame drop rate */
763 /* blackbird_api_cmd(dev, IVTV_API_ASSIGN_FRAME_DROP_RATE, 1, 0, 0); */ 1236 /* blackbird_api_cmd(dev, IVTV_API_ASSIGN_FRAME_DROP_RATE, 1, 0, 0); */
1237
1238 blackbird_set_default_params(dev);
1239 blackbird_set_default_dnr_params(dev);
764} 1240}
765 1241
766static int blackbird_initialize_codec(struct cx8802_dev *dev) 1242static int blackbird_initialize_codec(struct cx8802_dev *dev)
@@ -851,15 +1327,10 @@ static int bb_buf_setup(struct videobuf_queue *q,
851 struct cx8802_fh *fh = q->priv_data; 1327 struct cx8802_fh *fh = q->priv_data;
852 1328
853 fh->dev->ts_packet_size = 188 * 4; /* was: 512 */ 1329 fh->dev->ts_packet_size = 188 * 4; /* was: 512 */
854 fh->dev->ts_packet_count = 32; /* was: 100 */ 1330 fh->dev->ts_packet_count = mpegbufs; /* was: 100 */
855 1331
856 *size = fh->dev->ts_packet_size * fh->dev->ts_packet_count; 1332 *size = fh->dev->ts_packet_size * fh->dev->ts_packet_count;
857 if (0 == *count) 1333 *count = fh->dev->ts_packet_count;
858 *count = mpegbufs;
859 if (*count < 2)
860 *count = 2;
861 if (*count > 32)
862 *count = 32;
863 return 0; 1334 return 0;
864} 1335}
865 1336
@@ -868,7 +1339,7 @@ bb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
868 enum v4l2_field field) 1339 enum v4l2_field field)
869{ 1340{
870 struct cx8802_fh *fh = q->priv_data; 1341 struct cx8802_fh *fh = q->priv_data;
871 return cx8802_buf_prepare(fh->dev, (struct cx88_buffer*)vb); 1342 return cx8802_buf_prepare(fh->dev, (struct cx88_buffer*)vb, field);
872} 1343}
873 1344
874static void 1345static void
@@ -920,8 +1391,6 @@ static int mpeg_do_ioctl(struct inode *inode, struct file *file,
920 V4L2_CAP_VIDEO_CAPTURE | 1391 V4L2_CAP_VIDEO_CAPTURE |
921 V4L2_CAP_READWRITE | 1392 V4L2_CAP_READWRITE |
922 V4L2_CAP_STREAMING | 1393 V4L2_CAP_STREAMING |
923 V4L2_CAP_VBI_CAPTURE |
924 V4L2_CAP_VIDEO_OVERLAY |
925 0; 1394 0;
926 if (UNSET != core->tuner_type) 1395 if (UNSET != core->tuner_type)
927 cap->capabilities |= V4L2_CAP_TUNER; 1396 cap->capabilities |= V4L2_CAP_TUNER;
@@ -941,27 +1410,52 @@ static int mpeg_do_ioctl(struct inode *inode, struct file *file,
941 1410
942 memset(f,0,sizeof(*f)); 1411 memset(f,0,sizeof(*f));
943 f->index = index; 1412 f->index = index;
944 strlcpy(f->description, "MPEG TS", sizeof(f->description)); 1413 strlcpy(f->description, "MPEG", sizeof(f->description));
945 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1414 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
946 f->pixelformat = V4L2_PIX_FMT_MPEG; 1415 f->pixelformat = V4L2_PIX_FMT_MPEG;
947 return 0; 1416 return 0;
948 } 1417 }
949 case VIDIOC_G_FMT: 1418 case VIDIOC_G_FMT:
950 case VIDIOC_S_FMT:
951 case VIDIOC_TRY_FMT:
952 { 1419 {
953 /* FIXME -- quick'n'dirty for exactly one size ... */
954 struct v4l2_format *f = arg; 1420 struct v4l2_format *f = arg;
955 1421
956 memset(f,0,sizeof(*f)); 1422 memset(f,0,sizeof(*f));
957 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1423 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1424 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
1425 f->fmt.pix.bytesperline = 0;
1426 f->fmt.pix.sizeimage = dev->ts_packet_size * dev->ts_packet_count; /* 188 * 4 * 1024; */
1427 f->fmt.pix.colorspace = 0;
958 f->fmt.pix.width = dev->width; 1428 f->fmt.pix.width = dev->width;
959 f->fmt.pix.height = dev->height; 1429 f->fmt.pix.height = dev->height;
1430 f->fmt.pix.field = fh->mpegq.field;
1431 dprintk(0,"VIDIOC_G_FMT: w: %d, h: %d, f: %d\n",
1432 dev->width, dev->height, fh->mpegq.field );
1433 return 0;
1434 }
1435 case VIDIOC_TRY_FMT:
1436 {
1437 struct v4l2_format *f = arg;
1438
1439 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1440 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
1441 f->fmt.pix.bytesperline = 0;
1442 f->fmt.pix.sizeimage = dev->ts_packet_size * dev->ts_packet_count; /* 188 * 4 * 1024; */;
1443 f->fmt.pix.colorspace = 0;
1444 dprintk(0,"VIDIOC_TRY_FMT: w: %d, h: %d, f: %d\n",
1445 dev->width, dev->height, fh->mpegq.field );
1446 return 0;
1447 }
1448 case VIDIOC_S_FMT:
1449 {
1450 struct v4l2_format *f = arg;
1451
1452 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
960 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; 1453 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
961 f->fmt.pix.field = V4L2_FIELD_NONE;
962 f->fmt.pix.bytesperline = 0; 1454 f->fmt.pix.bytesperline = 0;
963 f->fmt.pix.sizeimage = 188 * 4 * 1024; /* 1024 * 512 */ /* FIXME: BUFFER_SIZE */; 1455 f->fmt.pix.sizeimage = dev->ts_packet_size * dev->ts_packet_count; /* 188 * 4 * 1024; */;
964 f->fmt.pix.colorspace = 0; 1456 f->fmt.pix.colorspace = 0;
1457 dprintk(0,"VIDIOC_S_FMT: w: %d, h: %d, f: %d\n",
1458 f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.field );
965 return 0; 1459 return 0;
966 } 1460 }
967 1461
@@ -985,6 +1479,22 @@ static int mpeg_do_ioctl(struct inode *inode, struct file *file,
985 case VIDIOC_STREAMOFF: 1479 case VIDIOC_STREAMOFF:
986 return videobuf_streamoff(&fh->mpegq); 1480 return videobuf_streamoff(&fh->mpegq);
987 1481
1482 /* --- mpeg compression -------------------------------------- */
1483 case VIDIOC_G_MPEGCOMP:
1484 {
1485 struct v4l2_mpeg_compression *f = arg;
1486
1487 memcpy(f,&dev->params,sizeof(*f));
1488 return 0;
1489 }
1490 case VIDIOC_S_MPEGCOMP:
1491 {
1492 struct v4l2_mpeg_compression *f = arg;
1493
1494 blackbird_set_params(dev, f);
1495 return 0;
1496 }
1497
988 default: 1498 default:
989 return cx88_do_ioctl( inode, file, 0, dev->core, cmd, arg, cx88_ioctl_hook ); 1499 return cx88_do_ioctl( inode, file, 0, dev->core, cmd, arg, cx88_ioctl_hook );
990 } 1500 }
@@ -1034,16 +1544,17 @@ static int mpeg_open(struct inode *inode, struct file *file)
1034 file->private_data = fh; 1544 file->private_data = fh;
1035 fh->dev = dev; 1545 fh->dev = dev;
1036 1546
1037 /* FIXME: locking against other video device */
1038 cx88_set_scale(dev->core, dev->width, dev->height,
1039 V4L2_FIELD_INTERLACED);
1040
1041 videobuf_queue_init(&fh->mpegq, &blackbird_qops, 1547 videobuf_queue_init(&fh->mpegq, &blackbird_qops,
1042 dev->pci, &dev->slock, 1548 dev->pci, &dev->slock,
1043 V4L2_BUF_TYPE_VIDEO_CAPTURE, 1549 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1044 V4L2_FIELD_TOP, 1550 V4L2_FIELD_INTERLACED,
1045 sizeof(struct cx88_buffer), 1551 sizeof(struct cx88_buffer),
1046 fh); 1552 fh);
1553
1554 /* FIXME: locking against other video device */
1555 cx88_set_scale(dev->core, dev->width, dev->height,
1556 fh->mpegq.field);
1557
1047 return 0; 1558 return 0;
1048} 1559}
1049 1560
@@ -1173,6 +1684,8 @@ static int __devinit blackbird_probe(struct pci_dev *pci_dev,
1173 dev->core = core; 1684 dev->core = core;
1174 dev->width = 720; 1685 dev->width = 720;
1175 dev->height = 576; 1686 dev->height = 576;
1687 memcpy(&dev->params,&default_mpeg_params,sizeof(default_mpeg_params));
1688 memcpy(&dev->dnr_params,&default_dnr_params,sizeof(default_dnr_params));
1176 1689
1177 err = cx8802_init_common(dev); 1690 err = cx8802_init_common(dev);
1178 if (0 != err) 1691 if (0 != err)
@@ -1199,7 +1712,7 @@ static int __devinit blackbird_probe(struct pci_dev *pci_dev,
1199 1712
1200static void __devexit blackbird_remove(struct pci_dev *pci_dev) 1713static void __devexit blackbird_remove(struct pci_dev *pci_dev)
1201{ 1714{
1202 struct cx8802_dev *dev = pci_get_drvdata(pci_dev); 1715 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
1203 1716
1204 /* blackbird */ 1717 /* blackbird */
1205 blackbird_unregister_video(dev); 1718 blackbird_unregister_video(dev);
@@ -1215,8 +1728,8 @@ static struct pci_device_id cx8802_pci_tbl[] = {
1215 { 1728 {
1216 .vendor = 0x14f1, 1729 .vendor = 0x14f1,
1217 .device = 0x8802, 1730 .device = 0x8802,
1218 .subvendor = PCI_ANY_ID, 1731 .subvendor = PCI_ANY_ID,
1219 .subdevice = PCI_ANY_ID, 1732 .subdevice = PCI_ANY_ID,
1220 },{ 1733 },{
1221 /* --- end of list --- */ 1734 /* --- end of list --- */
1222 } 1735 }
@@ -1224,10 +1737,10 @@ static struct pci_device_id cx8802_pci_tbl[] = {
1224MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl); 1737MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
1225 1738
1226static struct pci_driver blackbird_pci_driver = { 1739static struct pci_driver blackbird_pci_driver = {
1227 .name = "cx88-blackbird", 1740 .name = "cx88-blackbird",
1228 .id_table = cx8802_pci_tbl, 1741 .id_table = cx8802_pci_tbl,
1229 .probe = blackbird_probe, 1742 .probe = blackbird_probe,
1230 .remove = __devexit_p(blackbird_remove), 1743 .remove = __devexit_p(blackbird_remove),
1231 .suspend = cx8802_suspend_common, 1744 .suspend = cx8802_suspend_common,
1232 .resume = cx8802_resume_common, 1745 .resume = cx8802_resume_common,
1233}; 1746};
@@ -1257,6 +1770,8 @@ module_exit(blackbird_fini);
1257 1770
1258EXPORT_SYMBOL(cx88_ioctl_hook); 1771EXPORT_SYMBOL(cx88_ioctl_hook);
1259EXPORT_SYMBOL(cx88_ioctl_translator); 1772EXPORT_SYMBOL(cx88_ioctl_translator);
1773EXPORT_SYMBOL(blackbird_set_params);
1774EXPORT_SYMBOL(blackbird_set_dnr_params);
1260 1775
1261/* ----------------------------------------------------------- */ 1776/* ----------------------------------------------------------- */
1262/* 1777/*
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index 4da91d535a5b..f2268631b7c0 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -126,27 +126,27 @@ struct cx88_board cx88_boards[] = {
126 .input = {{ 126 .input = {{
127 .type = CX88_VMUX_TELEVISION, 127 .type = CX88_VMUX_TELEVISION,
128 .vmux = 0, 128 .vmux = 0,
129 .gpio0 = 0x03ff, 129 .gpio0 = 0x03ff,
130 },{ 130 },{
131 .type = CX88_VMUX_COMPOSITE1, 131 .type = CX88_VMUX_COMPOSITE1,
132 .vmux = 1, 132 .vmux = 1,
133 .gpio0 = 0x03fe, 133 .gpio0 = 0x03fe,
134 },{ 134 },{
135 .type = CX88_VMUX_SVIDEO, 135 .type = CX88_VMUX_SVIDEO,
136 .vmux = 2, 136 .vmux = 2,
137 .gpio0 = 0x03fe, 137 .gpio0 = 0x03fe,
138 }}, 138 }},
139 }, 139 },
140 [CX88_BOARD_WINFAST2000XP_EXPERT] = { 140 [CX88_BOARD_WINFAST2000XP_EXPERT] = {
141 .name = "Leadtek Winfast 2000XP Expert", 141 .name = "Leadtek Winfast 2000XP Expert",
142 .tuner_type = TUNER_PHILIPS_4IN1, 142 .tuner_type = TUNER_PHILIPS_4IN1,
143 .radio_type = UNSET, 143 .radio_type = UNSET,
144 .tuner_addr = ADDR_UNSET, 144 .tuner_addr = ADDR_UNSET,
145 .radio_addr = ADDR_UNSET, 145 .radio_addr = ADDR_UNSET,
146 .tda9887_conf = TDA9887_PRESENT, 146 .tda9887_conf = TDA9887_PRESENT,
147 .input = {{ 147 .input = {{
148 .type = CX88_VMUX_TELEVISION, 148 .type = CX88_VMUX_TELEVISION,
149 .vmux = 0, 149 .vmux = 0,
150 .gpio0 = 0x00F5e700, 150 .gpio0 = 0x00F5e700,
151 .gpio1 = 0x00003004, 151 .gpio1 = 0x00003004,
152 .gpio2 = 0x00F5e700, 152 .gpio2 = 0x00F5e700,
@@ -165,16 +165,16 @@ struct cx88_board cx88_boards[] = {
165 .gpio1 = 0x00003004, 165 .gpio1 = 0x00003004,
166 .gpio2 = 0x00F5c700, 166 .gpio2 = 0x00F5c700,
167 .gpio3 = 0x02000000, 167 .gpio3 = 0x02000000,
168 }}, 168 }},
169 .radio = { 169 .radio = {
170 .type = CX88_RADIO, 170 .type = CX88_RADIO,
171 .gpio0 = 0x00F5d700, 171 .gpio0 = 0x00F5d700,
172 .gpio1 = 0x00003004, 172 .gpio1 = 0x00003004,
173 .gpio2 = 0x00F5d700, 173 .gpio2 = 0x00F5d700,
174 .gpio3 = 0x02000000, 174 .gpio3 = 0x02000000,
175 }, 175 },
176 }, 176 },
177 [CX88_BOARD_AVERTV_303] = { 177 [CX88_BOARD_AVERTV_STUDIO_303] = {
178 .name = "AverTV Studio 303 (M126)", 178 .name = "AverTV Studio 303 (M126)",
179 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3, 179 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3,
180 .radio_type = UNSET, 180 .radio_type = UNSET,
@@ -206,7 +206,7 @@ struct cx88_board cx88_boards[] = {
206 .radio_type = UNSET, 206 .radio_type = UNSET,
207 .tuner_addr = ADDR_UNSET, 207 .tuner_addr = ADDR_UNSET,
208 .radio_addr = ADDR_UNSET, 208 .radio_addr = ADDR_UNSET,
209 .tda9887_conf = TDA9887_PRESENT, 209 .tda9887_conf = TDA9887_PRESENT | TDA9887_INTERCARRIER_NTSC,
210 .input = {{ 210 .input = {{
211 .type = CX88_VMUX_TELEVISION, 211 .type = CX88_VMUX_TELEVISION,
212 .vmux = 0, 212 .vmux = 0,
@@ -214,32 +214,32 @@ struct cx88_board cx88_boards[] = {
214 .gpio1 = 0x000080c0, 214 .gpio1 = 0x000080c0,
215 .gpio2 = 0x0000ff40, 215 .gpio2 = 0x0000ff40,
216 },{ 216 },{
217 .type = CX88_VMUX_COMPOSITE1, 217 .type = CX88_VMUX_COMPOSITE1,
218 .vmux = 1, 218 .vmux = 1,
219 .gpio0 = 0x000040bf, 219 .gpio0 = 0x000040bf,
220 .gpio1 = 0x000080c0, 220 .gpio1 = 0x000080c0,
221 .gpio2 = 0x0000ff40, 221 .gpio2 = 0x0000ff40,
222 },{ 222 },{
223 .type = CX88_VMUX_SVIDEO, 223 .type = CX88_VMUX_SVIDEO,
224 .vmux = 2, 224 .vmux = 2,
225 .gpio0 = 0x000040bf, 225 .gpio0 = 0x000040bf,
226 .gpio1 = 0x000080c0, 226 .gpio1 = 0x000080c0,
227 .gpio2 = 0x0000ff40, 227 .gpio2 = 0x0000ff40,
228 }}, 228 }},
229 .radio = { 229 .radio = {
230 .type = CX88_RADIO, 230 .type = CX88_RADIO,
231 }, 231 },
232 }, 232 },
233 [CX88_BOARD_WINFAST_DV2000] = { 233 [CX88_BOARD_WINFAST_DV2000] = {
234 .name = "Leadtek Winfast DV2000", 234 .name = "Leadtek Winfast DV2000",
235 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3, 235 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3,
236 .radio_type = UNSET, 236 .radio_type = UNSET,
237 .tuner_addr = ADDR_UNSET, 237 .tuner_addr = ADDR_UNSET,
238 .radio_addr = ADDR_UNSET, 238 .radio_addr = ADDR_UNSET,
239 .tda9887_conf = TDA9887_PRESENT, 239 .tda9887_conf = TDA9887_PRESENT,
240 .input = {{ 240 .input = {{
241 .type = CX88_VMUX_TELEVISION, 241 .type = CX88_VMUX_TELEVISION,
242 .vmux = 0, 242 .vmux = 0,
243 .gpio0 = 0x0035e700, 243 .gpio0 = 0x0035e700,
244 .gpio1 = 0x00003004, 244 .gpio1 = 0x00003004,
245 .gpio2 = 0x0035e700, 245 .gpio2 = 0x0035e700,
@@ -260,14 +260,14 @@ struct cx88_board cx88_boards[] = {
260 .gpio2 = 0x02000000, 260 .gpio2 = 0x02000000,
261 .gpio3 = 0x02000000, 261 .gpio3 = 0x02000000,
262 }}, 262 }},
263 .radio = { 263 .radio = {
264 .type = CX88_RADIO, 264 .type = CX88_RADIO,
265 .gpio0 = 0x0035d700, 265 .gpio0 = 0x0035d700,
266 .gpio1 = 0x00007004, 266 .gpio1 = 0x00007004,
267 .gpio2 = 0x0035d700, 267 .gpio2 = 0x0035d700,
268 .gpio3 = 0x02000000, 268 .gpio3 = 0x02000000,
269 }, 269 },
270 }, 270 },
271 [CX88_BOARD_LEADTEK_PVR2000] = { 271 [CX88_BOARD_LEADTEK_PVR2000] = {
272 // gpio values for PAL version from regspy by DScaler 272 // gpio values for PAL version from regspy by DScaler
273 .name = "Leadtek PVR 2000", 273 .name = "Leadtek PVR 2000",
@@ -296,25 +296,25 @@ struct cx88_board cx88_boards[] = {
296 .blackbird = 1, 296 .blackbird = 1,
297 }, 297 },
298 [CX88_BOARD_IODATA_GVVCP3PCI] = { 298 [CX88_BOARD_IODATA_GVVCP3PCI] = {
299 .name = "IODATA GV-VCP3/PCI", 299 .name = "IODATA GV-VCP3/PCI",
300 .tuner_type = TUNER_ABSENT, 300 .tuner_type = TUNER_ABSENT,
301 .radio_type = UNSET, 301 .radio_type = UNSET,
302 .tuner_addr = ADDR_UNSET, 302 .tuner_addr = ADDR_UNSET,
303 .radio_addr = ADDR_UNSET, 303 .radio_addr = ADDR_UNSET,
304 .input = {{ 304 .input = {{
305 .type = CX88_VMUX_COMPOSITE1, 305 .type = CX88_VMUX_COMPOSITE1,
306 .vmux = 0, 306 .vmux = 0,
307 },{ 307 },{
308 .type = CX88_VMUX_COMPOSITE2, 308 .type = CX88_VMUX_COMPOSITE2,
309 .vmux = 1, 309 .vmux = 1,
310 },{ 310 },{
311 .type = CX88_VMUX_SVIDEO, 311 .type = CX88_VMUX_SVIDEO,
312 .vmux = 2, 312 .vmux = 2,
313 }}, 313 }},
314 }, 314 },
315 [CX88_BOARD_PROLINK_PLAYTVPVR] = { 315 [CX88_BOARD_PROLINK_PLAYTVPVR] = {
316 .name = "Prolink PlayTV PVR", 316 .name = "Prolink PlayTV PVR",
317 .tuner_type = TUNER_PHILIPS_FM1236_MK3, 317 .tuner_type = TUNER_PHILIPS_FM1236_MK3,
318 .radio_type = UNSET, 318 .radio_type = UNSET,
319 .tuner_addr = ADDR_UNSET, 319 .tuner_addr = ADDR_UNSET,
320 .radio_addr = ADDR_UNSET, 320 .radio_addr = ADDR_UNSET,
@@ -348,15 +348,15 @@ struct cx88_board cx88_boards[] = {
348 .type = CX88_VMUX_TELEVISION, 348 .type = CX88_VMUX_TELEVISION,
349 .vmux = 0, 349 .vmux = 0,
350 .gpio0 = 0x0000fde6, 350 .gpio0 = 0x0000fde6,
351 },{ 351 },{
352 .type = CX88_VMUX_SVIDEO, 352 .type = CX88_VMUX_SVIDEO,
353 .vmux = 2, 353 .vmux = 2,
354 .gpio0 = 0x0000fde6, // 0x0000fda6 L,R RCA audio in? 354 .gpio0 = 0x0000fde6, // 0x0000fda6 L,R RCA audio in?
355 }}, 355 }},
356 .radio = { 356 .radio = {
357 .type = CX88_RADIO, 357 .type = CX88_RADIO,
358 .gpio0 = 0x0000fde2, 358 .gpio0 = 0x0000fde2,
359 }, 359 },
360 .blackbird = 1, 360 .blackbird = 1,
361 }, 361 },
362 [CX88_BOARD_MSI_TVANYWHERE] = { 362 [CX88_BOARD_MSI_TVANYWHERE] = {
@@ -372,34 +372,34 @@ struct cx88_board cx88_boards[] = {
372 .gpio0 = 0x00000fbf, 372 .gpio0 = 0x00000fbf,
373 .gpio2 = 0x0000fc08, 373 .gpio2 = 0x0000fc08,
374 },{ 374 },{
375 .type = CX88_VMUX_COMPOSITE1, 375 .type = CX88_VMUX_COMPOSITE1,
376 .vmux = 1, 376 .vmux = 1,
377 .gpio0 = 0x00000fbf, 377 .gpio0 = 0x00000fbf,
378 .gpio2 = 0x0000fc68, 378 .gpio2 = 0x0000fc68,
379 },{ 379 },{
380 .type = CX88_VMUX_SVIDEO, 380 .type = CX88_VMUX_SVIDEO,
381 .vmux = 2, 381 .vmux = 2,
382 .gpio0 = 0x00000fbf, 382 .gpio0 = 0x00000fbf,
383 .gpio2 = 0x0000fc68, 383 .gpio2 = 0x0000fc68,
384 }}, 384 }},
385 }, 385 },
386 [CX88_BOARD_KWORLD_DVB_T] = { 386 [CX88_BOARD_KWORLD_DVB_T] = {
387 .name = "KWorld/VStream XPert DVB-T", 387 .name = "KWorld/VStream XPert DVB-T",
388 .tuner_type = TUNER_ABSENT, 388 .tuner_type = TUNER_ABSENT,
389 .radio_type = UNSET, 389 .radio_type = UNSET,
390 .tuner_addr = ADDR_UNSET, 390 .tuner_addr = ADDR_UNSET,
391 .radio_addr = ADDR_UNSET, 391 .radio_addr = ADDR_UNSET,
392 .input = {{ 392 .input = {{
393 .type = CX88_VMUX_COMPOSITE1, 393 .type = CX88_VMUX_COMPOSITE1,
394 .vmux = 1, 394 .vmux = 1,
395 .gpio0 = 0x0700, 395 .gpio0 = 0x0700,
396 .gpio2 = 0x0101, 396 .gpio2 = 0x0101,
397 },{ 397 },{
398 .type = CX88_VMUX_SVIDEO, 398 .type = CX88_VMUX_SVIDEO,
399 .vmux = 2, 399 .vmux = 2,
400 .gpio0 = 0x0700, 400 .gpio0 = 0x0700,
401 .gpio2 = 0x0101, 401 .gpio2 = 0x0101,
402 }}, 402 }},
403 .dvb = 1, 403 .dvb = 1,
404 }, 404 },
405 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1] = { 405 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1] = {
@@ -425,27 +425,27 @@ struct cx88_board cx88_boards[] = {
425 .radio_type = UNSET, 425 .radio_type = UNSET,
426 .tuner_addr = ADDR_UNSET, 426 .tuner_addr = ADDR_UNSET,
427 .radio_addr = ADDR_UNSET, 427 .radio_addr = ADDR_UNSET,
428 .input = {{ 428 .input = {{
429 .type = CX88_VMUX_TELEVISION, 429 .type = CX88_VMUX_TELEVISION,
430 .vmux = 0, 430 .vmux = 0,
431 .gpio0 = 0x07f8, 431 .gpio0 = 0x07f8,
432 },{ 432 },{
433 .type = CX88_VMUX_DEBUG, 433 .type = CX88_VMUX_DEBUG,
434 .vmux = 0, 434 .vmux = 0,
435 .gpio0 = 0x07f9, // mono from tuner chip 435 .gpio0 = 0x07f9, // mono from tuner chip
436 },{ 436 },{
437 .type = CX88_VMUX_COMPOSITE1, 437 .type = CX88_VMUX_COMPOSITE1,
438 .vmux = 1, 438 .vmux = 1,
439 .gpio0 = 0x000007fa, 439 .gpio0 = 0x000007fa,
440 },{ 440 },{
441 .type = CX88_VMUX_SVIDEO, 441 .type = CX88_VMUX_SVIDEO,
442 .vmux = 2, 442 .vmux = 2,
443 .gpio0 = 0x000007fa, 443 .gpio0 = 0x000007fa,
444 }}, 444 }},
445 .radio = { 445 .radio = {
446 .type = CX88_RADIO, 446 .type = CX88_RADIO,
447 .gpio0 = 0x000007f8, 447 .gpio0 = 0x000007f8,
448 }, 448 },
449 }, 449 },
450 [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q] = { 450 [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q] = {
451 .name = "DViCO FusionHDTV 3 Gold-Q", 451 .name = "DViCO FusionHDTV 3 Gold-Q",
@@ -489,28 +489,28 @@ struct cx88_board cx88_boards[] = {
489 }}, 489 }},
490 .dvb = 1, 490 .dvb = 1,
491 }, 491 },
492 [CX88_BOARD_HAUPPAUGE_DVB_T1] = { 492 [CX88_BOARD_HAUPPAUGE_DVB_T1] = {
493 .name = "Hauppauge Nova-T DVB-T", 493 .name = "Hauppauge Nova-T DVB-T",
494 .tuner_type = TUNER_ABSENT, 494 .tuner_type = TUNER_ABSENT,
495 .radio_type = UNSET, 495 .radio_type = UNSET,
496 .tuner_addr = ADDR_UNSET, 496 .tuner_addr = ADDR_UNSET,
497 .radio_addr = ADDR_UNSET, 497 .radio_addr = ADDR_UNSET,
498 .input = {{ 498 .input = {{
499 .type = CX88_VMUX_DVB, 499 .type = CX88_VMUX_DVB,
500 .vmux = 0, 500 .vmux = 0,
501 }}, 501 }},
502 .dvb = 1, 502 .dvb = 1,
503 }, 503 },
504 [CX88_BOARD_CONEXANT_DVB_T1] = { 504 [CX88_BOARD_CONEXANT_DVB_T1] = {
505 .name = "Conexant DVB-T reference design", 505 .name = "Conexant DVB-T reference design",
506 .tuner_type = TUNER_ABSENT, 506 .tuner_type = TUNER_ABSENT,
507 .radio_type = UNSET, 507 .radio_type = UNSET,
508 .tuner_addr = ADDR_UNSET, 508 .tuner_addr = ADDR_UNSET,
509 .radio_addr = ADDR_UNSET, 509 .radio_addr = ADDR_UNSET,
510 .input = {{ 510 .input = {{
511 .type = CX88_VMUX_DVB, 511 .type = CX88_VMUX_DVB,
512 .vmux = 0, 512 .vmux = 0,
513 }}, 513 }},
514 .dvb = 1, 514 .dvb = 1,
515 }, 515 },
516 [CX88_BOARD_PROVIDEO_PV259] = { 516 [CX88_BOARD_PROVIDEO_PV259] = {
@@ -543,12 +543,12 @@ struct cx88_board cx88_boards[] = {
543 .dvb = 1, 543 .dvb = 1,
544 }, 544 },
545 [CX88_BOARD_DNTV_LIVE_DVB_T] = { 545 [CX88_BOARD_DNTV_LIVE_DVB_T] = {
546 .name = "digitalnow DNTV Live! DVB-T", 546 .name = "digitalnow DNTV Live! DVB-T",
547 .tuner_type = TUNER_ABSENT, 547 .tuner_type = TUNER_ABSENT,
548 .radio_type = UNSET, 548 .radio_type = UNSET,
549 .tuner_addr = ADDR_UNSET, 549 .tuner_addr = ADDR_UNSET,
550 .radio_addr = ADDR_UNSET, 550 .radio_addr = ADDR_UNSET,
551 .input = {{ 551 .input = {{
552 .type = CX88_VMUX_COMPOSITE1, 552 .type = CX88_VMUX_COMPOSITE1,
553 .vmux = 1, 553 .vmux = 1,
554 .gpio0 = 0x00000700, 554 .gpio0 = 0x00000700,
@@ -705,44 +705,44 @@ struct cx88_board cx88_boards[] = {
705 .gpio0 = 0xbf60, 705 .gpio0 = 0xbf60,
706 }, 706 },
707 }, 707 },
708 [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T] = { 708 [CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T] = {
709 .name = "DViCO FusionHDTV 3 Gold-T", 709 .name = "DViCO FusionHDTV 3 Gold-T",
710 .tuner_type = TUNER_THOMSON_DTT7611, 710 .tuner_type = TUNER_THOMSON_DTT7611,
711 .radio_type = UNSET, 711 .radio_type = UNSET,
712 .tuner_addr = ADDR_UNSET, 712 .tuner_addr = ADDR_UNSET,
713 .radio_addr = ADDR_UNSET, 713 .radio_addr = ADDR_UNSET,
714 .input = {{ 714 .input = {{
715 .type = CX88_VMUX_TELEVISION, 715 .type = CX88_VMUX_TELEVISION,
716 .vmux = 0, 716 .vmux = 0,
717 .gpio0 = 0x97ed, 717 .gpio0 = 0x97ed,
718 },{ 718 },{
719 .type = CX88_VMUX_COMPOSITE1, 719 .type = CX88_VMUX_COMPOSITE1,
720 .vmux = 1, 720 .vmux = 1,
721 .gpio0 = 0x97e9, 721 .gpio0 = 0x97e9,
722 },{ 722 },{
723 .type = CX88_VMUX_SVIDEO, 723 .type = CX88_VMUX_SVIDEO,
724 .vmux = 2, 724 .vmux = 2,
725 .gpio0 = 0x97e9, 725 .gpio0 = 0x97e9,
726 }}, 726 }},
727 .dvb = 1, 727 .dvb = 1,
728 }, 728 },
729 [CX88_BOARD_ADSTECH_DVB_T_PCI] = { 729 [CX88_BOARD_ADSTECH_DVB_T_PCI] = {
730 .name = "ADS Tech Instant TV DVB-T PCI", 730 .name = "ADS Tech Instant TV DVB-T PCI",
731 .tuner_type = TUNER_ABSENT, 731 .tuner_type = TUNER_ABSENT,
732 .radio_type = UNSET, 732 .radio_type = UNSET,
733 .tuner_addr = ADDR_UNSET, 733 .tuner_addr = ADDR_UNSET,
734 .radio_addr = ADDR_UNSET, 734 .radio_addr = ADDR_UNSET,
735 .input = {{ 735 .input = {{
736 .type = CX88_VMUX_COMPOSITE1, 736 .type = CX88_VMUX_COMPOSITE1,
737 .vmux = 1, 737 .vmux = 1,
738 .gpio0 = 0x0700, 738 .gpio0 = 0x0700,
739 .gpio2 = 0x0101, 739 .gpio2 = 0x0101,
740 },{ 740 },{
741 .type = CX88_VMUX_SVIDEO, 741 .type = CX88_VMUX_SVIDEO,
742 .vmux = 2, 742 .vmux = 2,
743 .gpio0 = 0x0700, 743 .gpio0 = 0x0700,
744 .gpio2 = 0x0101, 744 .gpio2 = 0x0101,
745 }}, 745 }},
746 .dvb = 1, 746 .dvb = 1,
747 }, 747 },
748 [CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1] = { 748 [CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1] = {
@@ -762,20 +762,139 @@ struct cx88_board cx88_boards[] = {
762 .radio_addr = ADDR_UNSET, 762 .radio_addr = ADDR_UNSET,
763 .tda9887_conf = TDA9887_PRESENT, 763 .tda9887_conf = TDA9887_PRESENT,
764 .input = {{ 764 .input = {{
765 .type = CX88_VMUX_TELEVISION, 765 .type = CX88_VMUX_TELEVISION,
766 .vmux = 0, 766 .vmux = 0,
767 .gpio0 = 0x87fd, 767 .gpio0 = 0x87fd,
768 },{ 768 },{
769 .type = CX88_VMUX_COMPOSITE1, 769 .type = CX88_VMUX_COMPOSITE1,
770 .vmux = 1, 770 .vmux = 1,
771 .gpio0 = 0x87f9, 771 .gpio0 = 0x87f9,
772 },{ 772 },{
773 .type = CX88_VMUX_SVIDEO, 773 .type = CX88_VMUX_SVIDEO,
774 .vmux = 2, 774 .vmux = 2,
775 .gpio0 = 0x87f9, 775 .gpio0 = 0x87f9,
776 }}, 776 }},
777 .dvb = 1,
778 },
779 [CX88_BOARD_AVERMEDIA_ULTRATV_MC_550] = {
780 .name = "AverMedia UltraTV Media Center PCI 550",
781 .tuner_type = TUNER_PHILIPS_FM1236_MK3,
782 .radio_type = UNSET,
783 .tuner_addr = ADDR_UNSET,
784 .radio_addr = ADDR_UNSET,
785 .tda9887_conf = TDA9887_PRESENT,
786 .blackbird = 1,
787 .input = {{
788 .type = CX88_VMUX_COMPOSITE1,
789 .vmux = 0,
790 .gpio0 = 0x0000cd73,
791 },{
792 .type = CX88_VMUX_SVIDEO,
793 .vmux = 1,
794 .gpio0 = 0x0000cd73,
795 },{
796 .type = CX88_VMUX_TELEVISION,
797 .vmux = 3,
798 .gpio0 = 0x0000cdb3,
799 }},
800 .radio = {
801 .type = CX88_RADIO,
802 .vmux = 2,
803 .gpio0 = 0x0000cdf3,
804 },
805 },
806 [CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD] = {
807 /* Alexander Wold <awold@bigfoot.com> */
808 .name = "Kworld V-Stream Xpert DVD",
809 .tuner_type = UNSET,
810 .input = {{
811 .type = CX88_VMUX_COMPOSITE1,
812 .vmux = 1,
813 .gpio0 = 0x03000000,
814 .gpio1 = 0x01000000,
815 .gpio2 = 0x02000000,
816 .gpio3 = 0x00100000,
817 },{
818 .type = CX88_VMUX_SVIDEO,
819 .vmux = 2,
820 .gpio0 = 0x03000000,
821 .gpio1 = 0x01000000,
822 .gpio2 = 0x02000000,
823 .gpio3 = 0x00100000,
824 }},
825 },
826 [CX88_BOARD_ATI_HDTVWONDER] = {
827 .name = "ATI HDTV Wonder",
828 .tuner_type = TUNER_PHILIPS_TUV1236D,
829 .radio_type = UNSET,
830 .tuner_addr = ADDR_UNSET,
831 .radio_addr = ADDR_UNSET,
832 .input = {{
833 .type = CX88_VMUX_TELEVISION,
834 .vmux = 0,
835 .gpio0 = 0x00000ff7,
836 .gpio1 = 0x000000ff,
837 .gpio2 = 0x00000001,
838 .gpio3 = 0x00000000,
839 },{
840 .type = CX88_VMUX_COMPOSITE1,
841 .vmux = 1,
842 .gpio0 = 0x00000ffe,
843 .gpio1 = 0x000000ff,
844 .gpio2 = 0x00000001,
845 .gpio3 = 0x00000000,
846 },{
847 .type = CX88_VMUX_SVIDEO,
848 .vmux = 2,
849 .gpio0 = 0x00000ffe,
850 .gpio1 = 0x000000ff,
851 .gpio2 = 0x00000001,
852 .gpio3 = 0x00000000,
853 }},
777 .dvb = 1, 854 .dvb = 1,
778 }, 855 },
856 [CX88_BOARD_WINFAST_DTV1000] = {
857 .name = "WinFast DTV1000-T",
858 .tuner_type = TUNER_ABSENT,
859 .radio_type = UNSET,
860 .tuner_addr = ADDR_UNSET,
861 .radio_addr = ADDR_UNSET,
862 .input = {{
863 .type = CX88_VMUX_DVB,
864 .vmux = 0,
865 }},
866 .dvb = 1,
867 },
868 [CX88_BOARD_AVERTV_303] = {
869 .name = "AVerTV 303 (M126)",
870 .tuner_type = TUNER_PHILIPS_FM1216ME_MK3,
871 .radio_type = UNSET,
872 .tuner_addr = ADDR_UNSET,
873 .radio_addr = ADDR_UNSET,
874 .tda9887_conf = TDA9887_PRESENT,
875 .input = {{
876 .type = CX88_VMUX_TELEVISION,
877 .vmux = 0,
878 .gpio0 = 0x00ff,
879 .gpio1 = 0xe09f,
880 .gpio2 = 0x0010,
881 .gpio3 = 0x0000,
882 },{
883 .type = CX88_VMUX_COMPOSITE1,
884 .vmux = 1,
885 .gpio0 = 0x00ff,
886 .gpio1 = 0xe05f,
887 .gpio2 = 0x0010,
888 .gpio3 = 0x0000,
889 },{
890 .type = CX88_VMUX_SVIDEO,
891 .vmux = 2,
892 .gpio0 = 0x00ff,
893 .gpio1 = 0xe05f,
894 .gpio2 = 0x0010,
895 .gpio3 = 0x0000,
896 }},
897 },
779}; 898};
780const unsigned int cx88_bcount = ARRAY_SIZE(cx88_boards); 899const unsigned int cx88_bcount = ARRAY_SIZE(cx88_boards);
781 900
@@ -804,41 +923,41 @@ struct cx88_subid cx88_subids[] = {
804 .subdevice = 0x00f8, 923 .subdevice = 0x00f8,
805 .card = CX88_BOARD_ATI_WONDER_PRO, 924 .card = CX88_BOARD_ATI_WONDER_PRO,
806 },{ 925 },{
807 .subvendor = 0x107d, 926 .subvendor = 0x107d,
808 .subdevice = 0x6611, 927 .subdevice = 0x6611,
809 .card = CX88_BOARD_WINFAST2000XP_EXPERT, 928 .card = CX88_BOARD_WINFAST2000XP_EXPERT,
929 },{
930 .subvendor = 0x107d,
931 .subdevice = 0x6613, /* NTSC */
932 .card = CX88_BOARD_WINFAST2000XP_EXPERT,
810 },{ 933 },{
811 .subvendor = 0x107d, 934 .subvendor = 0x107d,
812 .subdevice = 0x6613, /* NTSC */ 935 .subdevice = 0x6620,
813 .card = CX88_BOARD_WINFAST2000XP_EXPERT, 936 .card = CX88_BOARD_WINFAST_DV2000,
937 },{
938 .subvendor = 0x107d,
939 .subdevice = 0x663b,
940 .card = CX88_BOARD_LEADTEK_PVR2000,
814 },{ 941 },{
815 .subvendor = 0x107d, 942 .subvendor = 0x107d,
816 .subdevice = 0x6620, 943 .subdevice = 0x663C,
817 .card = CX88_BOARD_WINFAST_DV2000, 944 .card = CX88_BOARD_LEADTEK_PVR2000,
818 },{ 945 },{
819 .subvendor = 0x107d,
820 .subdevice = 0x663b,
821 .card = CX88_BOARD_LEADTEK_PVR2000,
822 },{
823 .subvendor = 0x107d,
824 .subdevice = 0x663C,
825 .card = CX88_BOARD_LEADTEK_PVR2000,
826 },{
827 .subvendor = 0x1461, 946 .subvendor = 0x1461,
828 .subdevice = 0x000b, 947 .subdevice = 0x000b,
829 .card = CX88_BOARD_AVERTV_303, 948 .card = CX88_BOARD_AVERTV_STUDIO_303,
830 },{ 949 },{
831 .subvendor = 0x1462, 950 .subvendor = 0x1462,
832 .subdevice = 0x8606, 951 .subdevice = 0x8606,
833 .card = CX88_BOARD_MSI_TVANYWHERE_MASTER, 952 .card = CX88_BOARD_MSI_TVANYWHERE_MASTER,
834 },{ 953 },{
835 .subvendor = 0x10fc, 954 .subvendor = 0x10fc,
836 .subdevice = 0xd003, 955 .subdevice = 0xd003,
837 .card = CX88_BOARD_IODATA_GVVCP3PCI, 956 .card = CX88_BOARD_IODATA_GVVCP3PCI,
838 },{ 957 },{
839 .subvendor = 0x1043, 958 .subvendor = 0x1043,
840 .subdevice = 0x4823, /* with mpeg encoder */ 959 .subdevice = 0x4823, /* with mpeg encoder */
841 .card = CX88_BOARD_ASUS_PVR_416, 960 .card = CX88_BOARD_ASUS_PVR_416,
842 },{ 961 },{
843 .subvendor = 0x17de, 962 .subvendor = 0x17de,
844 .subdevice = 0x08a6, 963 .subdevice = 0x08a6,
@@ -852,43 +971,43 @@ struct cx88_subid cx88_subids[] = {
852 .subdevice = 0xd820, 971 .subdevice = 0xd820,
853 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T, 972 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T,
854 },{ 973 },{
855 .subvendor = 0x18AC, 974 .subvendor = 0x18ac,
856 .subdevice = 0xDB00, 975 .subdevice = 0xdb00,
857 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1, 976 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1,
858 },{ 977 },{
859 .subvendor = 0x0070, 978 .subvendor = 0x0070,
860 .subdevice = 0x9002, 979 .subdevice = 0x9002,
861 .card = CX88_BOARD_HAUPPAUGE_DVB_T1, 980 .card = CX88_BOARD_HAUPPAUGE_DVB_T1,
862 },{ 981 },{
863 .subvendor = 0x14f1, 982 .subvendor = 0x14f1,
864 .subdevice = 0x0187, 983 .subdevice = 0x0187,
865 .card = CX88_BOARD_CONEXANT_DVB_T1, 984 .card = CX88_BOARD_CONEXANT_DVB_T1,
866 },{ 985 },{
867 .subvendor = 0x1540, 986 .subvendor = 0x1540,
868 .subdevice = 0x2580, 987 .subdevice = 0x2580,
869 .card = CX88_BOARD_PROVIDEO_PV259, 988 .card = CX88_BOARD_PROVIDEO_PV259,
870 },{ 989 },{
871 .subvendor = 0x18AC, 990 .subvendor = 0x18ac,
872 .subdevice = 0xDB10, 991 .subdevice = 0xdb10,
873 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS, 992 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS,
874 },{ 993 },{
875 .subvendor = 0x1554, 994 .subvendor = 0x1554,
876 .subdevice = 0x4811, 995 .subdevice = 0x4811,
877 .card = CX88_BOARD_PIXELVIEW, 996 .card = CX88_BOARD_PIXELVIEW,
878 },{ 997 },{
879 .subvendor = 0x7063, 998 .subvendor = 0x7063,
880 .subdevice = 0x3000, /* HD-3000 card */ 999 .subdevice = 0x3000, /* HD-3000 card */
881 .card = CX88_BOARD_PCHDTV_HD3000, 1000 .card = CX88_BOARD_PCHDTV_HD3000,
882 },{ 1001 },{
883 .subvendor = 0x17DE, 1002 .subvendor = 0x17de,
884 .subdevice = 0xA8A6, 1003 .subdevice = 0xa8a6,
885 .card = CX88_BOARD_DNTV_LIVE_DVB_T, 1004 .card = CX88_BOARD_DNTV_LIVE_DVB_T,
886 },{ 1005 },{
887 .subvendor = 0x0070, 1006 .subvendor = 0x0070,
888 .subdevice = 0x2801, 1007 .subdevice = 0x2801,
889 .card = CX88_BOARD_HAUPPAUGE_ROSLYN, 1008 .card = CX88_BOARD_HAUPPAUGE_ROSLYN,
890 },{ 1009 },{
891 .subvendor = 0x14F1, 1010 .subvendor = 0x14f1,
892 .subdevice = 0x0342, 1011 .subdevice = 0x0342,
893 .card = CX88_BOARD_DIGITALLOGIC_MEC, 1012 .card = CX88_BOARD_DIGITALLOGIC_MEC,
894 },{ 1013 },{
@@ -899,14 +1018,30 @@ struct cx88_subid cx88_subids[] = {
899 .subvendor = 0x1421, 1018 .subvendor = 0x1421,
900 .subdevice = 0x0334, 1019 .subdevice = 0x0334,
901 .card = CX88_BOARD_ADSTECH_DVB_T_PCI, 1020 .card = CX88_BOARD_ADSTECH_DVB_T_PCI,
902 },{ 1021 },{
903 .subvendor = 0x153b, 1022 .subvendor = 0x153b,
904 .subdevice = 0x1166, 1023 .subdevice = 0x1166,
905 .card = CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1, 1024 .card = CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1,
906 },{ 1025 },{
907 .subvendor = 0x18ac, 1026 .subvendor = 0x18ac,
908 .subdevice = 0xd500, 1027 .subdevice = 0xd500,
909 .card = CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD, 1028 .card = CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD,
1029 },{
1030 .subvendor = 0x1461,
1031 .subdevice = 0x8011,
1032 .card = CX88_BOARD_AVERMEDIA_ULTRATV_MC_550,
1033 },{
1034 .subvendor = PCI_VENDOR_ID_ATI,
1035 .subdevice = 0xa101,
1036 .card = CX88_BOARD_ATI_HDTVWONDER,
1037 },{
1038 .subvendor = 0x107d,
1039 .subdevice = 0x665f,
1040 .card = CX88_BOARD_WINFAST_DTV1000,
1041 },{
1042 .subvendor = 0x1461,
1043 .subdevice = 0x000a,
1044 .card = CX88_BOARD_AVERTV_303,
910 }, 1045 },
911}; 1046};
912const unsigned int cx88_idcount = ARRAY_SIZE(cx88_subids); 1047const unsigned int cx88_idcount = ARRAY_SIZE(cx88_subids);
@@ -1108,6 +1243,19 @@ void cx88_card_setup(struct cx88_core *core)
1108 cx_clear(MO_GP0_IO, 0x00000007); 1243 cx_clear(MO_GP0_IO, 0x00000007);
1109 cx_set(MO_GP2_IO, 0x00000101); 1244 cx_set(MO_GP2_IO, 0x00000101);
1110 break; 1245 break;
1246 case CX88_BOARD_ATI_HDTVWONDER:
1247 if (0 == core->i2c_rc) {
1248 /* enable tuner */
1249 int i;
1250 u8 buffer [] = { 0x10,0x12,0x13,0x04,0x16,0x00,0x14,0x04,0x017,0x00 };
1251 core->i2c_client.addr = 0x0a;
1252
1253 for (i = 0; i < 5; i++)
1254 if (2 != i2c_master_send(&core->i2c_client,&buffer[i*2],2))
1255 printk(KERN_WARNING "%s: Unable to enable tuner(%i).\n",
1256 core->name, i);
1257 }
1258 break;
1111 } 1259 }
1112 if (cx88_boards[core->board].radio.type == CX88_RADIO) 1260 if (cx88_boards[core->board].radio.type == CX88_RADIO)
1113 core->has_radio = 1; 1261 core->has_radio = 1;
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c
index dc5c5c1f3461..eb806af17182 100644
--- a/drivers/media/video/cx88/cx88-core.c
+++ b/drivers/media/video/cx88/cx88-core.c
@@ -31,7 +31,7 @@
31#include <linux/interrupt.h> 31#include <linux/interrupt.h>
32#include <linux/pci.h> 32#include <linux/pci.h>
33#include <linux/delay.h> 33#include <linux/delay.h>
34#include <linux/videodev.h> 34#include <linux/videodev2.h>
35 35
36#include "cx88.h" 36#include "cx88.h"
37 37
@@ -153,26 +153,26 @@ static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
153 } 153 }
154 if (bpl <= sg_dma_len(sg)-offset) { 154 if (bpl <= sg_dma_len(sg)-offset) {
155 /* fits into current chunk */ 155 /* fits into current chunk */
156 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl); 156 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl);
157 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset); 157 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
158 offset+=bpl; 158 offset+=bpl;
159 } else { 159 } else {
160 /* scanline needs to be splitted */ 160 /* scanline needs to be splitted */
161 todo = bpl; 161 todo = bpl;
162 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL| 162 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|
163 (sg_dma_len(sg)-offset)); 163 (sg_dma_len(sg)-offset));
164 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset); 164 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
165 todo -= (sg_dma_len(sg)-offset); 165 todo -= (sg_dma_len(sg)-offset);
166 offset = 0; 166 offset = 0;
167 sg++; 167 sg++;
168 while (todo > sg_dma_len(sg)) { 168 while (todo > sg_dma_len(sg)) {
169 *(rp++)=cpu_to_le32(RISC_WRITE| 169 *(rp++)=cpu_to_le32(RISC_WRITE|
170 sg_dma_len(sg)); 170 sg_dma_len(sg));
171 *(rp++)=cpu_to_le32(sg_dma_address(sg)); 171 *(rp++)=cpu_to_le32(sg_dma_address(sg));
172 todo -= sg_dma_len(sg); 172 todo -= sg_dma_len(sg);
173 sg++; 173 sg++;
174 } 174 }
175 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_EOL|todo); 175 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_EOL|todo);
176 *(rp++)=cpu_to_le32(sg_dma_address(sg)); 176 *(rp++)=cpu_to_le32(sg_dma_address(sg));
177 offset += todo; 177 offset += todo;
178 } 178 }
@@ -309,7 +309,7 @@ struct sram_channel cx88_sram_channels[] = {
309 .name = "video y / packed", 309 .name = "video y / packed",
310 .cmds_start = 0x180040, 310 .cmds_start = 0x180040,
311 .ctrl_start = 0x180400, 311 .ctrl_start = 0x180400,
312 .cdt = 0x180400 + 64, 312 .cdt = 0x180400 + 64,
313 .fifo_start = 0x180c00, 313 .fifo_start = 0x180c00,
314 .fifo_size = 0x002800, 314 .fifo_size = 0x002800,
315 .ptr1_reg = MO_DMA21_PTR1, 315 .ptr1_reg = MO_DMA21_PTR1,
@@ -321,7 +321,7 @@ struct sram_channel cx88_sram_channels[] = {
321 .name = "video u", 321 .name = "video u",
322 .cmds_start = 0x180080, 322 .cmds_start = 0x180080,
323 .ctrl_start = 0x1804a0, 323 .ctrl_start = 0x1804a0,
324 .cdt = 0x1804a0 + 64, 324 .cdt = 0x1804a0 + 64,
325 .fifo_start = 0x183400, 325 .fifo_start = 0x183400,
326 .fifo_size = 0x000800, 326 .fifo_size = 0x000800,
327 .ptr1_reg = MO_DMA22_PTR1, 327 .ptr1_reg = MO_DMA22_PTR1,
@@ -333,7 +333,7 @@ struct sram_channel cx88_sram_channels[] = {
333 .name = "video v", 333 .name = "video v",
334 .cmds_start = 0x1800c0, 334 .cmds_start = 0x1800c0,
335 .ctrl_start = 0x180540, 335 .ctrl_start = 0x180540,
336 .cdt = 0x180540 + 64, 336 .cdt = 0x180540 + 64,
337 .fifo_start = 0x183c00, 337 .fifo_start = 0x183c00,
338 .fifo_size = 0x000800, 338 .fifo_size = 0x000800,
339 .ptr1_reg = MO_DMA23_PTR1, 339 .ptr1_reg = MO_DMA23_PTR1,
@@ -345,7 +345,7 @@ struct sram_channel cx88_sram_channels[] = {
345 .name = "vbi", 345 .name = "vbi",
346 .cmds_start = 0x180100, 346 .cmds_start = 0x180100,
347 .ctrl_start = 0x1805e0, 347 .ctrl_start = 0x1805e0,
348 .cdt = 0x1805e0 + 64, 348 .cdt = 0x1805e0 + 64,
349 .fifo_start = 0x184400, 349 .fifo_start = 0x184400,
350 .fifo_size = 0x001000, 350 .fifo_size = 0x001000,
351 .ptr1_reg = MO_DMA24_PTR1, 351 .ptr1_reg = MO_DMA24_PTR1,
@@ -357,7 +357,7 @@ struct sram_channel cx88_sram_channels[] = {
357 .name = "audio from", 357 .name = "audio from",
358 .cmds_start = 0x180140, 358 .cmds_start = 0x180140,
359 .ctrl_start = 0x180680, 359 .ctrl_start = 0x180680,
360 .cdt = 0x180680 + 64, 360 .cdt = 0x180680 + 64,
361 .fifo_start = 0x185400, 361 .fifo_start = 0x185400,
362 .fifo_size = 0x000200, 362 .fifo_size = 0x000200,
363 .ptr1_reg = MO_DMA25_PTR1, 363 .ptr1_reg = MO_DMA25_PTR1,
@@ -369,7 +369,7 @@ struct sram_channel cx88_sram_channels[] = {
369 .name = "audio to", 369 .name = "audio to",
370 .cmds_start = 0x180180, 370 .cmds_start = 0x180180,
371 .ctrl_start = 0x180720, 371 .ctrl_start = 0x180720,
372 .cdt = 0x180680 + 64, /* same as audio IN */ 372 .cdt = 0x180680 + 64, /* same as audio IN */
373 .fifo_start = 0x185400, /* same as audio IN */ 373 .fifo_start = 0x185400, /* same as audio IN */
374 .fifo_size = 0x000200, /* same as audio IN */ 374 .fifo_size = 0x000200, /* same as audio IN */
375 .ptr1_reg = MO_DMA26_PTR1, 375 .ptr1_reg = MO_DMA26_PTR1,
@@ -431,7 +431,7 @@ int cx88_sram_channel_setup(struct cx88_core *core,
431/* ------------------------------------------------------------------ */ 431/* ------------------------------------------------------------------ */
432/* debug helper code */ 432/* debug helper code */
433 433
434int cx88_risc_decode(u32 risc) 434static int cx88_risc_decode(u32 risc)
435{ 435{
436 static char *instr[16] = { 436 static char *instr[16] = {
437 [ RISC_SYNC >> 28 ] = "sync", 437 [ RISC_SYNC >> 28 ] = "sync",
@@ -845,19 +845,19 @@ static int set_tvaudio(struct cx88_core *core)
845 return 0; 845 return 0;
846 846
847 if (V4L2_STD_PAL_BG & norm->id) { 847 if (V4L2_STD_PAL_BG & norm->id) {
848 core->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_BG; 848 core->tvaudio = WW_BG;
849 849
850 } else if (V4L2_STD_PAL_DK & norm->id) { 850 } else if (V4L2_STD_PAL_DK & norm->id) {
851 core->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_DK; 851 core->tvaudio = WW_DK;
852 852
853 } else if (V4L2_STD_PAL_I & norm->id) { 853 } else if (V4L2_STD_PAL_I & norm->id) {
854 core->tvaudio = WW_NICAM_I; 854 core->tvaudio = WW_I;
855 855
856 } else if (V4L2_STD_SECAM_L & norm->id) { 856 } else if (V4L2_STD_SECAM_L & norm->id) {
857 core->tvaudio = WW_SYSTEM_L_AM; 857 core->tvaudio = WW_L;
858 858
859 } else if (V4L2_STD_SECAM_DK & norm->id) { 859 } else if (V4L2_STD_SECAM_DK & norm->id) {
860 core->tvaudio = WW_A2_DK; 860 core->tvaudio = WW_DK;
861 861
862 } else if ((V4L2_STD_NTSC_M & norm->id) || 862 } else if ((V4L2_STD_NTSC_M & norm->id) ||
863 (V4L2_STD_PAL_M & norm->id)) { 863 (V4L2_STD_PAL_M & norm->id)) {
@@ -1137,7 +1137,7 @@ struct cx88_core* cx88_core_get(struct pci_dev *pci)
1137 if (!core->radio_addr) 1137 if (!core->radio_addr)
1138 core->radio_addr = cx88_boards[core->board].radio_addr; 1138 core->radio_addr = cx88_boards[core->board].radio_addr;
1139 1139
1140 printk(KERN_INFO "TV tuner %d at 0x%02x, Radio tuner %d at 0x%02x\n", 1140 printk(KERN_INFO "TV tuner %d at 0x%02x, Radio tuner %d at 0x%02x\n",
1141 core->tuner_type, core->tuner_addr<<1, 1141 core->tuner_type, core->tuner_addr<<1,
1142 core->radio_type, core->radio_addr<<1); 1142 core->radio_type, core->radio_addr<<1);
1143 1143
@@ -1146,6 +1146,7 @@ struct cx88_core* cx88_core_get(struct pci_dev *pci)
1146 /* init hardware */ 1146 /* init hardware */
1147 cx88_reset(core); 1147 cx88_reset(core);
1148 cx88_i2c_init(core,pci); 1148 cx88_i2c_init(core,pci);
1149 cx88_call_i2c_clients (core, TUNER_SET_STANDBY, NULL);
1149 cx88_card_setup(core); 1150 cx88_card_setup(core);
1150 cx88_ir_init(core,pci); 1151 cx88_ir_init(core,pci);
1151 1152
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index 4334744652de..9cce91ec334b 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -29,7 +29,6 @@
29#include <linux/file.h> 29#include <linux/file.h>
30#include <linux/suspend.h> 30#include <linux/suspend.h>
31 31
32
33#include "cx88.h" 32#include "cx88.h"
34#include "dvb-pll.h" 33#include "dvb-pll.h"
35 34
@@ -46,6 +45,9 @@
46#ifdef HAVE_LGDT330X 45#ifdef HAVE_LGDT330X
47# include "lgdt330x.h" 46# include "lgdt330x.h"
48#endif 47#endif
48#ifdef HAVE_NXT200X
49# include "nxt200x.h"
50#endif
49 51
50MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); 52MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
51MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); 53MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
@@ -78,7 +80,7 @@ static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
78 enum v4l2_field field) 80 enum v4l2_field field)
79{ 81{
80 struct cx8802_dev *dev = q->priv_data; 82 struct cx8802_dev *dev = q->priv_data;
81 return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb); 83 return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb,field);
82} 84}
83 85
84static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) 86static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
@@ -129,7 +131,7 @@ static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
129 static u8 reset [] = { 0x50, 0x80 }; 131 static u8 reset [] = { 0x50, 0x80 };
130 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 }; 132 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
131 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, 133 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
132 0x00, 0xFF, 0x00, 0x40, 0x40 }; 134 0x00, 0xFF, 0x00, 0x40, 0x40 };
133 static u8 dntv_extra[] = { 0xB5, 0x7A }; 135 static u8 dntv_extra[] = { 0xB5, 0x7A };
134 static u8 capt_range_cfg[] = { 0x75, 0x32 }; 136 static u8 capt_range_cfg[] = { 0x75, 0x32 };
135 137
@@ -285,6 +287,33 @@ static struct lgdt330x_config fusionhdtv_5_gold = {
285}; 287};
286#endif 288#endif
287 289
290#ifdef HAVE_NXT200X
291static int nxt200x_set_ts_param(struct dvb_frontend* fe,
292 int is_punctured)
293{
294 struct cx8802_dev *dev= fe->dvb->priv;
295 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
296 return 0;
297}
298
299static int nxt200x_set_pll_input(u8* buf, int input)
300{
301 if (input)
302 buf[3] |= 0x08;
303 else
304 buf[3] &= ~0x08;
305 return 0;
306}
307
308static struct nxt200x_config ati_hdtvwonder = {
309 .demod_address = 0x0a,
310 .pll_address = 0x61,
311 .pll_desc = &dvb_pll_tuv1236d,
312 .set_pll_input = nxt200x_set_pll_input,
313 .set_ts_params = nxt200x_set_ts_param,
314};
315#endif
316
288static int dvb_register(struct cx8802_dev *dev) 317static int dvb_register(struct cx8802_dev *dev)
289{ 318{
290 /* init struct videobuf_dvb */ 319 /* init struct videobuf_dvb */
@@ -300,6 +329,7 @@ static int dvb_register(struct cx8802_dev *dev)
300 break; 329 break;
301 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: 330 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
302 case CX88_BOARD_CONEXANT_DVB_T1: 331 case CX88_BOARD_CONEXANT_DVB_T1:
332 case CX88_BOARD_WINFAST_DTV1000:
303 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config, 333 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
304 &dev->core->i2c_adap); 334 &dev->core->i2c_adap);
305 break; 335 break;
@@ -385,6 +415,12 @@ static int dvb_register(struct cx8802_dev *dev)
385 } 415 }
386 break; 416 break;
387#endif 417#endif
418#ifdef HAVE_NXT200X
419 case CX88_BOARD_ATI_HDTVWONDER:
420 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
421 &dev->core->i2c_adap);
422 break;
423#endif
388 default: 424 default:
389 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n", 425 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
390 dev->core->name); 426 dev->core->name);
@@ -403,6 +439,9 @@ static int dvb_register(struct cx8802_dev *dev)
403 /* Put the analog decoder in standby to keep it quiet */ 439 /* Put the analog decoder in standby to keep it quiet */
404 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL); 440 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
405 441
442 /* Put the analog decoder in standby to keep it quiet */
443 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
444
406 /* register everything */ 445 /* register everything */
407 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev); 446 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
408} 447}
@@ -461,7 +500,7 @@ static int __devinit dvb_probe(struct pci_dev *pci_dev,
461 500
462static void __devexit dvb_remove(struct pci_dev *pci_dev) 501static void __devexit dvb_remove(struct pci_dev *pci_dev)
463{ 502{
464 struct cx8802_dev *dev = pci_get_drvdata(pci_dev); 503 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
465 504
466 /* dvb */ 505 /* dvb */
467 videobuf_dvb_unregister(&dev->dvb); 506 videobuf_dvb_unregister(&dev->dvb);
@@ -476,8 +515,8 @@ static struct pci_device_id cx8802_pci_tbl[] = {
476 { 515 {
477 .vendor = 0x14f1, 516 .vendor = 0x14f1,
478 .device = 0x8802, 517 .device = 0x8802,
479 .subvendor = PCI_ANY_ID, 518 .subvendor = PCI_ANY_ID,
480 .subdevice = PCI_ANY_ID, 519 .subdevice = PCI_ANY_ID,
481 },{ 520 },{
482 /* --- end of list --- */ 521 /* --- end of list --- */
483 } 522 }
@@ -485,10 +524,10 @@ static struct pci_device_id cx8802_pci_tbl[] = {
485MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl); 524MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
486 525
487static struct pci_driver dvb_pci_driver = { 526static struct pci_driver dvb_pci_driver = {
488 .name = "cx88-dvb", 527 .name = "cx88-dvb",
489 .id_table = cx8802_pci_tbl, 528 .id_table = cx8802_pci_tbl,
490 .probe = dvb_probe, 529 .probe = dvb_probe,
491 .remove = __devexit_p(dvb_remove), 530 .remove = __devexit_p(dvb_remove),
492 .suspend = cx8802_suspend_common, 531 .suspend = cx8802_suspend_common,
493 .resume = cx8802_resume_common, 532 .resume = cx8802_resume_common,
494}; 533};
diff --git a/drivers/media/video/cx88/cx88-i2c.c b/drivers/media/video/cx88/cx88-i2c.c
index 761cebd40dbd..9790d412f192 100644
--- a/drivers/media/video/cx88/cx88-i2c.c
+++ b/drivers/media/video/cx88/cx88-i2c.c
@@ -3,7 +3,7 @@
3 cx88-i2c.c -- all the i2c code is here 3 cx88-i2c.c -- all the i2c code is here
4 4
5 Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de) 5 Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
6 & Marcus Metzler (mocm@thp.uni-koeln.de) 6 & Marcus Metzler (mocm@thp.uni-koeln.de)
7 (c) 2002 Yurij Sysoev <yurij@naturesoft.net> 7 (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
8 (c) 1999-2003 Gerd Knorr <kraxel@bytesex.org> 8 (c) 1999-2003 Gerd Knorr <kraxel@bytesex.org>
9 9
@@ -90,7 +90,7 @@ static int cx8800_bit_getsda(void *data)
90 90
91static int attach_inform(struct i2c_client *client) 91static int attach_inform(struct i2c_client *client)
92{ 92{
93 struct tuner_setup tun_setup; 93 struct tuner_setup tun_setup;
94 struct cx88_core *core = i2c_get_adapdata(client->adapter); 94 struct cx88_core *core = i2c_get_adapdata(client->adapter);
95 95
96 dprintk(1, "%s i2c attach [addr=0x%x,client=%s]\n", 96 dprintk(1, "%s i2c attach [addr=0x%x,client=%s]\n",
@@ -98,7 +98,7 @@ static int attach_inform(struct i2c_client *client)
98 if (!client->driver->command) 98 if (!client->driver->command)
99 return 0; 99 return 0;
100 100
101 if (core->radio_type != UNSET) { 101 if (core->radio_type != UNSET) {
102 if ((core->radio_addr==ADDR_UNSET)||(core->radio_addr==client->addr)) { 102 if ((core->radio_addr==ADDR_UNSET)||(core->radio_addr==client->addr)) {
103 tun_setup.mode_mask = T_RADIO; 103 tun_setup.mode_mask = T_RADIO;
104 tun_setup.type = core->radio_type; 104 tun_setup.type = core->radio_type;
@@ -106,8 +106,8 @@ static int attach_inform(struct i2c_client *client)
106 106
107 client->driver->command (client, TUNER_SET_TYPE_ADDR, &tun_setup); 107 client->driver->command (client, TUNER_SET_TYPE_ADDR, &tun_setup);
108 } 108 }
109 } 109 }
110 if (core->tuner_type != UNSET) { 110 if (core->tuner_type != UNSET) {
111 if ((core->tuner_addr==ADDR_UNSET)||(core->tuner_addr==client->addr)) { 111 if ((core->tuner_addr==ADDR_UNSET)||(core->tuner_addr==client->addr)) {
112 112
113 tun_setup.mode_mask = T_ANALOG_TV; 113 tun_setup.mode_mask = T_ANALOG_TV;
@@ -116,7 +116,7 @@ static int attach_inform(struct i2c_client *client)
116 116
117 client->driver->command (client,TUNER_SET_TYPE_ADDR, &tun_setup); 117 client->driver->command (client,TUNER_SET_TYPE_ADDR, &tun_setup);
118 } 118 }
119 } 119 }
120 120
121 if (core->tda9887_conf) 121 if (core->tda9887_conf)
122 client->driver->command(client, TDA9887_SET_CONFIG, &core->tda9887_conf); 122 client->driver->command(client, TDA9887_SET_CONFIG, &core->tda9887_conf);
@@ -159,7 +159,7 @@ static struct i2c_adapter cx8800_i2c_adap_template = {
159}; 159};
160 160
161static struct i2c_client cx8800_i2c_client_template = { 161static struct i2c_client cx8800_i2c_client_template = {
162 .name = "cx88xx internal", 162 .name = "cx88xx internal",
163}; 163};
164 164
165static char *i2c_devs[128] = { 165static char *i2c_devs[128] = {
@@ -202,10 +202,10 @@ int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci)
202 202
203 core->i2c_adap.dev.parent = &pci->dev; 203 core->i2c_adap.dev.parent = &pci->dev;
204 strlcpy(core->i2c_adap.name,core->name,sizeof(core->i2c_adap.name)); 204 strlcpy(core->i2c_adap.name,core->name,sizeof(core->i2c_adap.name));
205 core->i2c_algo.data = core; 205 core->i2c_algo.data = core;
206 i2c_set_adapdata(&core->i2c_adap,core); 206 i2c_set_adapdata(&core->i2c_adap,core);
207 core->i2c_adap.algo_data = &core->i2c_algo; 207 core->i2c_adap.algo_data = &core->i2c_algo;
208 core->i2c_client.adapter = &core->i2c_adap; 208 core->i2c_client.adapter = &core->i2c_adap;
209 209
210 cx8800_bit_setscl(core,1); 210 cx8800_bit_setscl(core,1);
211 cx8800_bit_setsda(core,1); 211 cx8800_bit_setsda(core,1);
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c
index c27fe4c36f69..38b12ebaa49e 100644
--- a/drivers/media/video/cx88/cx88-input.c
+++ b/drivers/media/video/cx88/cx88-input.c
@@ -553,7 +553,7 @@ void cx88_ir_irq(struct cx88_core *core)
553 553
554 if ((ircode & 0xffff) != 0xeb04) { /* wrong address */ 554 if ((ircode & 0xffff) != 0xeb04) { /* wrong address */
555 ir_dprintk("pulse distance decoded wrong address\n"); 555 ir_dprintk("pulse distance decoded wrong address\n");
556 break; 556 break;
557 } 557 }
558 558
559 if (((~ircode >> 24) & 0xff) != ((ircode >> 16) & 0xff)) { /* wrong checksum */ 559 if (((~ircode >> 24) & 0xff) != ((ircode >> 16) & 0xff)) { /* wrong checksum */
diff --git a/drivers/media/video/cx88/cx88-mpeg.c b/drivers/media/video/cx88/cx88-mpeg.c
index ee2300e1ae0b..35e6d0c2b872 100644
--- a/drivers/media/video/cx88/cx88-mpeg.c
+++ b/drivers/media/video/cx88/cx88-mpeg.c
@@ -54,7 +54,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
54{ 54{
55 struct cx88_core *core = dev->core; 55 struct cx88_core *core = dev->core;
56 56
57 dprintk(0, "cx8802_start_dma %d\n", buf->vb.width); 57 dprintk(0, "cx8802_start_dma w: %d, h: %d, f: %d\n", dev->width, dev->height, buf->vb.field);
58 58
59 /* setup fifo + format */ 59 /* setup fifo + format */
60 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28], 60 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],
@@ -158,7 +158,8 @@ static int cx8802_restart_queue(struct cx8802_dev *dev,
158 158
159/* ------------------------------------------------------------------ */ 159/* ------------------------------------------------------------------ */
160 160
161int cx8802_buf_prepare(struct cx8802_dev *dev, struct cx88_buffer *buf) 161int cx8802_buf_prepare(struct cx8802_dev *dev, struct cx88_buffer *buf,
162 enum v4l2_field field)
162{ 163{
163 int size = dev->ts_packet_size * dev->ts_packet_count; 164 int size = dev->ts_packet_size * dev->ts_packet_count;
164 int rc; 165 int rc;
@@ -171,7 +172,7 @@ int cx8802_buf_prepare(struct cx8802_dev *dev, struct cx88_buffer *buf)
171 buf->vb.width = dev->ts_packet_size; 172 buf->vb.width = dev->ts_packet_size;
172 buf->vb.height = dev->ts_packet_count; 173 buf->vb.height = dev->ts_packet_count;
173 buf->vb.size = size; 174 buf->vb.size = size;
174 buf->vb.field = V4L2_FIELD_TOP; 175 buf->vb.field = field /*V4L2_FIELD_TOP*/;
175 176
176 if (0 != (rc = videobuf_iolock(dev->pci,&buf->vb,NULL))) 177 if (0 != (rc = videobuf_iolock(dev->pci,&buf->vb,NULL)))
177 goto fail; 178 goto fail;
@@ -315,14 +316,14 @@ static void cx8802_mpeg_irq(struct cx8802_dev *dev)
315 spin_unlock(&dev->slock); 316 spin_unlock(&dev->slock);
316 } 317 }
317 318
318 /* other general errors */ 319 /* other general errors */
319 if (status & 0x1f0100) { 320 if (status & 0x1f0100) {
320 dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 ); 321 dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 );
321 spin_lock(&dev->slock); 322 spin_lock(&dev->slock);
322 cx8802_stop_dma(dev); 323 cx8802_stop_dma(dev);
323 cx8802_restart_queue(dev,&dev->mpegq); 324 cx8802_restart_queue(dev,&dev->mpegq);
324 spin_unlock(&dev->slock); 325 spin_unlock(&dev->slock);
325 } 326 }
326} 327}
327 328
328#define MAX_IRQ_LOOP 10 329#define MAX_IRQ_LOOP 10
@@ -378,8 +379,8 @@ int cx8802_init_common(struct cx8802_dev *dev)
378 } 379 }
379 380
380 pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev); 381 pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev);
381 pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER, &dev->pci_lat); 382 pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER, &dev->pci_lat);
382 printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, " 383 printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, "
383 "latency: %d, mmio: 0x%lx\n", dev->core->name, 384 "latency: %d, mmio: 0x%lx\n", dev->core->name,
384 pci_name(dev->pci), dev->pci_rev, dev->pci->irq, 385 pci_name(dev->pci), dev->pci_rev, dev->pci->irq,
385 dev->pci_lat,pci_resource_start(dev->pci,0)); 386 dev->pci_lat,pci_resource_start(dev->pci,0));
@@ -429,7 +430,7 @@ void cx8802_fini_common(struct cx8802_dev *dev)
429 430
430int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state) 431int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state)
431{ 432{
432 struct cx8802_dev *dev = pci_get_drvdata(pci_dev); 433 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
433 struct cx88_core *core = dev->core; 434 struct cx88_core *core = dev->core;
434 435
435 /* stop mpeg dma */ 436 /* stop mpeg dma */
diff --git a/drivers/media/video/cx88/cx88-reg.h b/drivers/media/video/cx88/cx88-reg.h
index 0a3a62fc9bbb..d3bf5b17b1d4 100644
--- a/drivers/media/video/cx88/cx88-reg.h
+++ b/drivers/media/video/cx88/cx88-reg.h
@@ -3,9 +3,9 @@
3 cx88x-hw.h - CX2388x register offsets 3 cx88x-hw.h - CX2388x register offsets
4 4
5 Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de) 5 Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
6 2001 Michael Eskin 6 2001 Michael Eskin
7 2002 Yurij Sysoev <yurij@naturesoft.net> 7 2002 Yurij Sysoev <yurij@naturesoft.net>
8 2003 Gerd Knorr <kraxel@bytesex.org> 8 2003 Gerd Knorr <kraxel@bytesex.org>
9 9
10 This program is free software; you can redistribute it and/or modify 10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by 11 it under the terms of the GNU General Public License as published by
@@ -728,13 +728,13 @@
728#define ColorFormatGamma 0x1000 728#define ColorFormatGamma 0x1000
729 729
730#define Interlaced 0x1 730#define Interlaced 0x1
731#define NonInterlaced 0x0 731#define NonInterlaced 0x0
732 732
733#define FieldEven 0x1 733#define FieldEven 0x1
734#define FieldOdd 0x0 734#define FieldOdd 0x0
735 735
736#define TGReadWriteMode 0x0 736#define TGReadWriteMode 0x0
737#define TGEnableMode 0x1 737#define TGEnableMode 0x1
738 738
739#define DV_CbAlign 0x0 739#define DV_CbAlign 0x0
740#define DV_Y0Align 0x1 740#define DV_Y0Align 0x1
diff --git a/drivers/media/video/cx88/cx88-tvaudio.c b/drivers/media/video/cx88/cx88-tvaudio.c
index 2765acee0285..6d9bec1c583b 100644
--- a/drivers/media/video/cx88/cx88-tvaudio.c
+++ b/drivers/media/video/cx88/cx88-tvaudio.c
@@ -57,39 +57,38 @@
57#include "cx88.h" 57#include "cx88.h"
58 58
59static unsigned int audio_debug = 0; 59static unsigned int audio_debug = 0;
60module_param(audio_debug,int,0644); 60module_param(audio_debug, int, 0644);
61MODULE_PARM_DESC(audio_debug,"enable debug messages [audio]"); 61MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
62 62
63#define dprintk(fmt, arg...) if (audio_debug) \ 63#define dprintk(fmt, arg...) if (audio_debug) \
64 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) 64 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
65 65
66/* ----------------------------------------------------------- */ 66/* ----------------------------------------------------------- */
67 67
68static char *aud_ctl_names[64] = 68static char *aud_ctl_names[64] = {
69{ 69 [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
70 [ EN_BTSC_FORCE_MONO ] = "BTSC_FORCE_MONO", 70 [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
71 [ EN_BTSC_FORCE_STEREO ] = "BTSC_FORCE_STEREO", 71 [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
72 [ EN_BTSC_FORCE_SAP ] = "BTSC_FORCE_SAP", 72 [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
73 [ EN_BTSC_AUTO_STEREO ] = "BTSC_AUTO_STEREO", 73 [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
74 [ EN_BTSC_AUTO_SAP ] = "BTSC_AUTO_SAP", 74 [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
75 [ EN_A2_FORCE_MONO1 ] = "A2_FORCE_MONO1", 75 [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
76 [ EN_A2_FORCE_MONO2 ] = "A2_FORCE_MONO2", 76 [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
77 [ EN_A2_FORCE_STEREO ] = "A2_FORCE_STEREO", 77 [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
78 [ EN_A2_AUTO_MONO2 ] = "A2_AUTO_MONO2", 78 [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
79 [ EN_A2_AUTO_STEREO ] = "A2_AUTO_STEREO", 79 [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
80 [ EN_EIAJ_FORCE_MONO1 ] = "EIAJ_FORCE_MONO1", 80 [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
81 [ EN_EIAJ_FORCE_MONO2 ] = "EIAJ_FORCE_MONO2", 81 [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
82 [ EN_EIAJ_FORCE_STEREO ] = "EIAJ_FORCE_STEREO", 82 [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
83 [ EN_EIAJ_AUTO_MONO2 ] = "EIAJ_AUTO_MONO2", 83 [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
84 [ EN_EIAJ_AUTO_STEREO ] = "EIAJ_AUTO_STEREO", 84 [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
85 [ EN_NICAM_FORCE_MONO1 ] = "NICAM_FORCE_MONO1", 85 [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
86 [ EN_NICAM_FORCE_MONO2 ] = "NICAM_FORCE_MONO2", 86 [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
87 [ EN_NICAM_FORCE_STEREO ] = "NICAM_FORCE_STEREO", 87 [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
88 [ EN_NICAM_AUTO_MONO2 ] = "NICAM_AUTO_MONO2", 88 [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
89 [ EN_NICAM_AUTO_STEREO ] = "NICAM_AUTO_STEREO", 89 [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
90 [ EN_FMRADIO_FORCE_MONO ] = "FMRADIO_FORCE_MONO", 90 [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
91 [ EN_FMRADIO_FORCE_STEREO ] = "FMRADIO_FORCE_STEREO", 91 [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
92 [ EN_FMRADIO_AUTO_STEREO ] = "FMRADIO_AUTO_STEREO",
93}; 92};
94 93
95struct rlist { 94struct rlist {
@@ -97,8 +96,7 @@ struct rlist {
97 u32 val; 96 u32 val;
98}; 97};
99 98
100static void set_audio_registers(struct cx88_core *core, 99static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
101 const struct rlist *l)
102{ 100{
103 int i; 101 int i;
104 102
@@ -119,17 +117,18 @@ static void set_audio_registers(struct cx88_core *core,
119 } 117 }
120} 118}
121 119
122static void set_audio_start(struct cx88_core *core, 120static void set_audio_start(struct cx88_core *core, u32 mode)
123 u32 mode)
124{ 121{
125 // mute 122 // mute
126 cx_write(AUD_VOL_CTL, (1 << 6)); 123 cx_write(AUD_VOL_CTL, (1 << 6));
127 124
128 // start programming 125 // start programming
129 cx_write(AUD_CTL, 0x0000); 126 cx_write(MO_AUD_DMACNTRL, 0x0000);
130 cx_write(AUD_INIT, mode); 127 msleep(100);
131 cx_write(AUD_INIT_LD, 0x0001); 128 //cx_write(AUD_CTL, 0x0000);
132 cx_write(AUD_SOFT_RESET, 0x0001); 129 cx_write(AUD_INIT, mode);
130 cx_write(AUD_INIT_LD, 0x0001);
131 cx_write(AUD_SOFT_RESET, 0x0001);
133} 132}
134 133
135static void set_audio_finish(struct cx88_core *core, u32 ctl) 134static void set_audio_finish(struct cx88_core *core, u32 ctl)
@@ -148,12 +147,13 @@ static void set_audio_finish(struct cx88_core *core, u32 ctl)
148 cx_write(AUD_I2SCNTL, 0); 147 cx_write(AUD_I2SCNTL, 0);
149 //cx_write(AUD_APB_IN_RATE_ADJ, 0); 148 //cx_write(AUD_APB_IN_RATE_ADJ, 0);
150 } else { 149 } else {
151 ctl |= EN_DAC_ENABLE; 150 ctl |= EN_DAC_ENABLE;
152 cx_write(AUD_CTL, ctl); 151 cx_write(AUD_CTL, ctl);
153 } 152 }
154 153
155 /* finish programming */ 154 /* finish programming */
156 cx_write(AUD_SOFT_RESET, 0x0000); 155 cx_write(AUD_SOFT_RESET, 0x0000);
156 cx_write(MO_AUD_DMACNTRL, 0x0003);
157 157
158 /* unmute */ 158 /* unmute */
159 volume = cx_sread(SHADOW_AUD_VOL_CTL); 159 volume = cx_sread(SHADOW_AUD_VOL_CTL);
@@ -162,486 +162,463 @@ static void set_audio_finish(struct cx88_core *core, u32 ctl)
162 162
163/* ----------------------------------------------------------- */ 163/* ----------------------------------------------------------- */
164 164
165static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap, u32 mode) 165static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
166 u32 mode)
166{ 167{
167 static const struct rlist btsc[] = { 168 static const struct rlist btsc[] = {
168 { AUD_AFE_12DB_EN, 0x00000001 }, 169 {AUD_AFE_12DB_EN, 0x00000001},
169 { AUD_OUT1_SEL, 0x00000013 }, 170 {AUD_OUT1_SEL, 0x00000013},
170 { AUD_OUT1_SHIFT, 0x00000000 }, 171 {AUD_OUT1_SHIFT, 0x00000000},
171 { AUD_POLY0_DDS_CONSTANT, 0x0012010c }, 172 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
172 { AUD_DMD_RA_DDS, 0x00c3e7aa }, 173 {AUD_DMD_RA_DDS, 0x00c3e7aa},
173 { AUD_DBX_IN_GAIN, 0x00004734 }, 174 {AUD_DBX_IN_GAIN, 0x00004734},
174 { AUD_DBX_WBE_GAIN, 0x00004640 }, 175 {AUD_DBX_WBE_GAIN, 0x00004640},
175 { AUD_DBX_SE_GAIN, 0x00008d31 }, 176 {AUD_DBX_SE_GAIN, 0x00008d31},
176 { AUD_DCOC_0_SRC, 0x0000001a }, 177 {AUD_DCOC_0_SRC, 0x0000001a},
177 { AUD_IIR1_4_SEL, 0x00000021 }, 178 {AUD_IIR1_4_SEL, 0x00000021},
178 { AUD_DCOC_PASS_IN, 0x00000003 }, 179 {AUD_DCOC_PASS_IN, 0x00000003},
179 { AUD_DCOC_0_SHIFT_IN0, 0x0000000a }, 180 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
180 { AUD_DCOC_0_SHIFT_IN1, 0x00000008 }, 181 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
181 { AUD_DCOC_1_SHIFT_IN0, 0x0000000a }, 182 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
182 { AUD_DCOC_1_SHIFT_IN1, 0x00000008 }, 183 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
183 { AUD_DN0_FREQ, 0x0000283b }, 184 {AUD_DN0_FREQ, 0x0000283b},
184 { AUD_DN2_SRC_SEL, 0x00000008 }, 185 {AUD_DN2_SRC_SEL, 0x00000008},
185 { AUD_DN2_FREQ, 0x00003000 }, 186 {AUD_DN2_FREQ, 0x00003000},
186 { AUD_DN2_AFC, 0x00000002 }, 187 {AUD_DN2_AFC, 0x00000002},
187 { AUD_DN2_SHFT, 0x00000000 }, 188 {AUD_DN2_SHFT, 0x00000000},
188 { AUD_IIR2_2_SEL, 0x00000020 }, 189 {AUD_IIR2_2_SEL, 0x00000020},
189 { AUD_IIR2_2_SHIFT, 0x00000000 }, 190 {AUD_IIR2_2_SHIFT, 0x00000000},
190 { AUD_IIR2_3_SEL, 0x0000001f }, 191 {AUD_IIR2_3_SEL, 0x0000001f},
191 { AUD_IIR2_3_SHIFT, 0x00000000 }, 192 {AUD_IIR2_3_SHIFT, 0x00000000},
192 { AUD_CRDC1_SRC_SEL, 0x000003ce }, 193 {AUD_CRDC1_SRC_SEL, 0x000003ce},
193 { AUD_CRDC1_SHIFT, 0x00000000 }, 194 {AUD_CRDC1_SHIFT, 0x00000000},
194 { AUD_CORDIC_SHIFT_1, 0x00000007 }, 195 {AUD_CORDIC_SHIFT_1, 0x00000007},
195 { AUD_DCOC_1_SRC, 0x0000001b }, 196 {AUD_DCOC_1_SRC, 0x0000001b},
196 { AUD_DCOC1_SHIFT, 0x00000000 }, 197 {AUD_DCOC1_SHIFT, 0x00000000},
197 { AUD_RDSI_SEL, 0x00000008 }, 198 {AUD_RDSI_SEL, 0x00000008},
198 { AUD_RDSQ_SEL, 0x00000008 }, 199 {AUD_RDSQ_SEL, 0x00000008},
199 { AUD_RDSI_SHIFT, 0x00000000 }, 200 {AUD_RDSI_SHIFT, 0x00000000},
200 { AUD_RDSQ_SHIFT, 0x00000000 }, 201 {AUD_RDSQ_SHIFT, 0x00000000},
201 { AUD_POLYPH80SCALEFAC, 0x00000003 }, 202 {AUD_POLYPH80SCALEFAC, 0x00000003},
202 { /* end of list */ }, 203 { /* end of list */ },
203 }; 204 };
204 static const struct rlist btsc_sap[] = { 205 static const struct rlist btsc_sap[] = {
205 { AUD_AFE_12DB_EN, 0x00000001 }, 206 {AUD_AFE_12DB_EN, 0x00000001},
206 { AUD_DBX_IN_GAIN, 0x00007200 }, 207 {AUD_DBX_IN_GAIN, 0x00007200},
207 { AUD_DBX_WBE_GAIN, 0x00006200 }, 208 {AUD_DBX_WBE_GAIN, 0x00006200},
208 { AUD_DBX_SE_GAIN, 0x00006200 }, 209 {AUD_DBX_SE_GAIN, 0x00006200},
209 { AUD_IIR1_1_SEL, 0x00000000 }, 210 {AUD_IIR1_1_SEL, 0x00000000},
210 { AUD_IIR1_3_SEL, 0x00000001 }, 211 {AUD_IIR1_3_SEL, 0x00000001},
211 { AUD_DN1_SRC_SEL, 0x00000007 }, 212 {AUD_DN1_SRC_SEL, 0x00000007},
212 { AUD_IIR1_4_SHIFT, 0x00000006 }, 213 {AUD_IIR1_4_SHIFT, 0x00000006},
213 { AUD_IIR2_1_SHIFT, 0x00000000 }, 214 {AUD_IIR2_1_SHIFT, 0x00000000},
214 { AUD_IIR2_2_SHIFT, 0x00000000 }, 215 {AUD_IIR2_2_SHIFT, 0x00000000},
215 { AUD_IIR3_0_SHIFT, 0x00000000 }, 216 {AUD_IIR3_0_SHIFT, 0x00000000},
216 { AUD_IIR3_1_SHIFT, 0x00000000 }, 217 {AUD_IIR3_1_SHIFT, 0x00000000},
217 { AUD_IIR3_0_SEL, 0x0000000d }, 218 {AUD_IIR3_0_SEL, 0x0000000d},
218 { AUD_IIR3_1_SEL, 0x0000000e }, 219 {AUD_IIR3_1_SEL, 0x0000000e},
219 { AUD_DEEMPH1_SRC_SEL, 0x00000014 }, 220 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
220 { AUD_DEEMPH1_SHIFT, 0x00000000 }, 221 {AUD_DEEMPH1_SHIFT, 0x00000000},
221 { AUD_DEEMPH1_G0, 0x00004000 }, 222 {AUD_DEEMPH1_G0, 0x00004000},
222 { AUD_DEEMPH1_A0, 0x00000000 }, 223 {AUD_DEEMPH1_A0, 0x00000000},
223 { AUD_DEEMPH1_B0, 0x00000000 }, 224 {AUD_DEEMPH1_B0, 0x00000000},
224 { AUD_DEEMPH1_A1, 0x00000000 }, 225 {AUD_DEEMPH1_A1, 0x00000000},
225 { AUD_DEEMPH1_B1, 0x00000000 }, 226 {AUD_DEEMPH1_B1, 0x00000000},
226 { AUD_OUT0_SEL, 0x0000003f }, 227 {AUD_OUT0_SEL, 0x0000003f},
227 { AUD_OUT1_SEL, 0x0000003f }, 228 {AUD_OUT1_SEL, 0x0000003f},
228 { AUD_DN1_AFC, 0x00000002 }, 229 {AUD_DN1_AFC, 0x00000002},
229 { AUD_DCOC_0_SHIFT_IN0, 0x0000000a }, 230 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
230 { AUD_DCOC_0_SHIFT_IN1, 0x00000008 }, 231 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
231 { AUD_DCOC_1_SHIFT_IN0, 0x0000000a }, 232 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
232 { AUD_DCOC_1_SHIFT_IN1, 0x00000008 }, 233 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
233 { AUD_IIR1_0_SEL, 0x0000001d }, 234 {AUD_IIR1_0_SEL, 0x0000001d},
234 { AUD_IIR1_2_SEL, 0x0000001e }, 235 {AUD_IIR1_2_SEL, 0x0000001e},
235 { AUD_IIR2_1_SEL, 0x00000002 }, 236 {AUD_IIR2_1_SEL, 0x00000002},
236 { AUD_IIR2_2_SEL, 0x00000004 }, 237 {AUD_IIR2_2_SEL, 0x00000004},
237 { AUD_IIR3_2_SEL, 0x0000000f }, 238 {AUD_IIR3_2_SEL, 0x0000000f},
238 { AUD_DCOC2_SHIFT, 0x00000001 }, 239 {AUD_DCOC2_SHIFT, 0x00000001},
239 { AUD_IIR3_2_SHIFT, 0x00000001 }, 240 {AUD_IIR3_2_SHIFT, 0x00000001},
240 { AUD_DEEMPH0_SRC_SEL, 0x00000014 }, 241 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
241 { AUD_CORDIC_SHIFT_1, 0x00000006 }, 242 {AUD_CORDIC_SHIFT_1, 0x00000006},
242 { AUD_POLY0_DDS_CONSTANT, 0x000e4db2 }, 243 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
243 { AUD_DMD_RA_DDS, 0x00f696e6 }, 244 {AUD_DMD_RA_DDS, 0x00f696e6},
244 { AUD_IIR2_3_SEL, 0x00000025 }, 245 {AUD_IIR2_3_SEL, 0x00000025},
245 { AUD_IIR1_4_SEL, 0x00000021 }, 246 {AUD_IIR1_4_SEL, 0x00000021},
246 { AUD_DN1_FREQ, 0x0000c965 }, 247 {AUD_DN1_FREQ, 0x0000c965},
247 { AUD_DCOC_PASS_IN, 0x00000003 }, 248 {AUD_DCOC_PASS_IN, 0x00000003},
248 { AUD_DCOC_0_SRC, 0x0000001a }, 249 {AUD_DCOC_0_SRC, 0x0000001a},
249 { AUD_DCOC_1_SRC, 0x0000001b }, 250 {AUD_DCOC_1_SRC, 0x0000001b},
250 { AUD_DCOC1_SHIFT, 0x00000000 }, 251 {AUD_DCOC1_SHIFT, 0x00000000},
251 { AUD_RDSI_SEL, 0x00000009 }, 252 {AUD_RDSI_SEL, 0x00000009},
252 { AUD_RDSQ_SEL, 0x00000009 }, 253 {AUD_RDSQ_SEL, 0x00000009},
253 { AUD_RDSI_SHIFT, 0x00000000 }, 254 {AUD_RDSI_SHIFT, 0x00000000},
254 { AUD_RDSQ_SHIFT, 0x00000000 }, 255 {AUD_RDSQ_SHIFT, 0x00000000},
255 { AUD_POLYPH80SCALEFAC, 0x00000003 }, 256 {AUD_POLYPH80SCALEFAC, 0x00000003},
256 { /* end of list */ }, 257 { /* end of list */ },
257 }; 258 };
258 259
259 mode |= EN_FMRADIO_EN_RDS; 260 mode |= EN_FMRADIO_EN_RDS;
260 261
261 if (sap) { 262 if (sap) {
262 dprintk("%s SAP (status: unknown)\n",__FUNCTION__); 263 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
263 set_audio_start(core, SEL_SAP); 264 set_audio_start(core, SEL_SAP);
264 set_audio_registers(core, btsc_sap); 265 set_audio_registers(core, btsc_sap);
265 set_audio_finish(core, mode); 266 set_audio_finish(core, mode);
266 } else { 267 } else {
267 dprintk("%s (status: known-good)\n",__FUNCTION__); 268 dprintk("%s (status: known-good)\n", __FUNCTION__);
268 set_audio_start(core, SEL_BTSC); 269 set_audio_start(core, SEL_BTSC);
269 set_audio_registers(core, btsc); 270 set_audio_registers(core, btsc);
270 set_audio_finish(core, mode); 271 set_audio_finish(core, mode);
271 } 272 }
272} 273}
273 274
274 275static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
275static void set_audio_standard_NICAM_L(struct cx88_core *core, int stereo)
276{ 276{
277 /* This is probably weird.. 277 static const struct rlist nicam_l[] = {
278 * Let's operate and find out. */ 278 {AUD_AFE_12DB_EN, 0x00000001},
279 279 {AUD_RATE_ADJ1, 0x00000060},
280 static const struct rlist nicam_l_mono[] = { 280 {AUD_RATE_ADJ2, 0x000000F9},
281 { AUD_ERRLOGPERIOD_R, 0x00000064 }, 281 {AUD_RATE_ADJ3, 0x000001CC},
282 { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF }, 282 {AUD_RATE_ADJ4, 0x000002B3},
283 { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F }, 283 {AUD_RATE_ADJ5, 0x00000726},
284 { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F }, 284 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
285 285 {AUD_DEEMPHDENOM2_R, 0x00000000},
286 { AUD_PDF_DDS_CNST_BYTE2, 0x48 }, 286 {AUD_ERRLOGPERIOD_R, 0x00000064},
287 { AUD_PDF_DDS_CNST_BYTE1, 0x3D }, 287 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
288 { AUD_QAM_MODE, 0x00 }, 288 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
289 { AUD_PDF_DDS_CNST_BYTE0, 0xf5 }, 289 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
290 { AUD_PHACC_FREQ_8MSB, 0x3a }, 290 {AUD_POLYPH80SCALEFAC, 0x00000003},
291 { AUD_PHACC_FREQ_8LSB, 0x4a }, 291 {AUD_DMD_RA_DDS, 0x00C00000},
292 292 {AUD_PLL_INT, 0x0000001E},
293 { AUD_DEEMPHGAIN_R, 0x6680 }, 293 {AUD_PLL_DDS, 0x00000000},
294 { AUD_DEEMPHNUMER1_R, 0x353DE }, 294 {AUD_PLL_FRAC, 0x0000E542},
295 { AUD_DEEMPHNUMER2_R, 0x1B1 }, 295 {AUD_START_TIMER, 0x00000000},
296 { AUD_DEEMPHDENOM1_R, 0x0F3D0 }, 296 {AUD_DEEMPHNUMER1_R, 0x000353DE},
297 { AUD_DEEMPHDENOM2_R, 0x0 }, 297 {AUD_DEEMPHNUMER2_R, 0x000001B1},
298 { AUD_FM_MODE_ENABLE, 0x7 }, 298 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
299 { AUD_POLYPH80SCALEFAC, 0x3 }, 299 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
300 { AUD_AFE_12DB_EN, 0x1 }, 300 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
301 { AAGC_GAIN, 0x0 }, 301 {AUD_QAM_MODE, 0x05},
302 { AAGC_HYST, 0x18 }, 302 {AUD_PHACC_FREQ_8MSB, 0x34},
303 { AAGC_DEF, 0x20 }, 303 {AUD_PHACC_FREQ_8LSB, 0x4C},
304 { AUD_DN0_FREQ, 0x0 }, 304 {AUD_DEEMPHGAIN_R, 0x00006680},
305 { AUD_POLY0_DDS_CONSTANT, 0x0E4DB2 }, 305 {AUD_RATE_THRES_DMD, 0x000000C0},
306 { AUD_DCOC_0_SRC, 0x21 },
307 { AUD_IIR1_0_SEL, 0x0 },
308 { AUD_IIR1_0_SHIFT, 0x7 },
309 { AUD_IIR1_1_SEL, 0x2 },
310 { AUD_IIR1_1_SHIFT, 0x0 },
311 { AUD_DCOC_1_SRC, 0x3 },
312 { AUD_DCOC1_SHIFT, 0x0 },
313 { AUD_DCOC_PASS_IN, 0x0 },
314 { AUD_IIR1_2_SEL, 0x23 },
315 { AUD_IIR1_2_SHIFT, 0x0 },
316 { AUD_IIR1_3_SEL, 0x4 },
317 { AUD_IIR1_3_SHIFT, 0x7 },
318 { AUD_IIR1_4_SEL, 0x5 },
319 { AUD_IIR1_4_SHIFT, 0x7 },
320 { AUD_IIR3_0_SEL, 0x7 },
321 { AUD_IIR3_0_SHIFT, 0x0 },
322 { AUD_DEEMPH0_SRC_SEL, 0x11 },
323 { AUD_DEEMPH0_SHIFT, 0x0 },
324 { AUD_DEEMPH0_G0, 0x7000 },
325 { AUD_DEEMPH0_A0, 0x0 },
326 { AUD_DEEMPH0_B0, 0x0 },
327 { AUD_DEEMPH0_A1, 0x0 },
328 { AUD_DEEMPH0_B1, 0x0 },
329 { AUD_DEEMPH1_SRC_SEL, 0x11 },
330 { AUD_DEEMPH1_SHIFT, 0x0 },
331 { AUD_DEEMPH1_G0, 0x7000 },
332 { AUD_DEEMPH1_A0, 0x0 },
333 { AUD_DEEMPH1_B0, 0x0 },
334 { AUD_DEEMPH1_A1, 0x0 },
335 { AUD_DEEMPH1_B1, 0x0 },
336 { AUD_OUT0_SEL, 0x3F },
337 { AUD_OUT1_SEL, 0x3F },
338 { AUD_DMD_RA_DDS, 0x0F5C285 },
339 { AUD_PLL_INT, 0x1E },
340 { AUD_PLL_DDS, 0x0 },
341 { AUD_PLL_FRAC, 0x0E542 },
342
343 // setup QAM registers
344 { AUD_RATE_ADJ1, 0x00000100 },
345 { AUD_RATE_ADJ2, 0x00000200 },
346 { AUD_RATE_ADJ3, 0x00000300 },
347 { AUD_RATE_ADJ4, 0x00000400 },
348 { AUD_RATE_ADJ5, 0x00000500 },
349 { AUD_RATE_THRES_DMD, 0x000000C0 },
350 { /* end of list */ }, 306 { /* end of list */ },
351 }; 307 };
352 308
353 static const struct rlist nicam_l[] = { 309 static const struct rlist nicam_bgdki_common[] = {
354 // setup QAM registers 310 {AUD_AFE_12DB_EN, 0x00000001},
355 { AUD_RATE_ADJ1, 0x00000060 }, 311 {AUD_RATE_ADJ1, 0x00000010},
356 { AUD_RATE_ADJ2, 0x000000F9 }, 312 {AUD_RATE_ADJ2, 0x00000040},
357 { AUD_RATE_ADJ3, 0x000001CC }, 313 {AUD_RATE_ADJ3, 0x00000100},
358 { AUD_RATE_ADJ4, 0x000002B3 }, 314 {AUD_RATE_ADJ4, 0x00000400},
359 { AUD_RATE_ADJ5, 0x00000726 }, 315 {AUD_RATE_ADJ5, 0x00001000},
360 { AUD_DEEMPHDENOM1_R, 0x0000F3D0 }, 316 //{ AUD_DMD_RA_DDS, 0x00c0d5ce },
361 { AUD_DEEMPHDENOM2_R, 0x00000000 }, 317 {AUD_ERRLOGPERIOD_R, 0x00000fff},
362 { AUD_ERRLOGPERIOD_R, 0x00000064 }, 318 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
363 { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF }, 319 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
364 { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F }, 320 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
365 { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F }, 321 {AUD_POLYPH80SCALEFAC, 0x00000003},
366 { AUD_POLYPH80SCALEFAC, 0x00000003 }, 322 {AUD_DEEMPHGAIN_R, 0x000023c2},
367 { AUD_DMD_RA_DDS, 0x00C00000 }, 323 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
368 { AUD_PLL_INT, 0x0000001E }, 324 {AUD_DEEMPHNUMER2_R, 0x0003023e},
369 { AUD_PLL_DDS, 0x00000000 }, 325 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
370 { AUD_PLL_FRAC, 0x0000E542 }, 326 {AUD_DEEMPHDENOM2_R, 0x00000000},
371 { AUD_START_TIMER, 0x00000000 }, 327 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
372 { AUD_DEEMPHNUMER1_R, 0x000353DE }, 328 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
373 { AUD_DEEMPHNUMER2_R, 0x000001B1 }, 329 {AUD_QAM_MODE, 0x05},
374 { AUD_PDF_DDS_CNST_BYTE2, 0x06 },
375 { AUD_PDF_DDS_CNST_BYTE1, 0x82 },
376 { AUD_QAM_MODE, 0x05 },
377 { AUD_PDF_DDS_CNST_BYTE0, 0x12 },
378 { AUD_PHACC_FREQ_8MSB, 0x34 },
379 { AUD_PHACC_FREQ_8LSB, 0x4C },
380 { AUD_DEEMPHGAIN_R, 0x00006680 },
381 { AUD_RATE_THRES_DMD, 0x000000C0 },
382 { /* end of list */ }, 330 { /* end of list */ },
383 } ; 331 };
384 dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo);
385
386 if (!stereo) {
387 /* AM Mono */
388 set_audio_start(core, SEL_A2);
389 set_audio_registers(core, nicam_l_mono);
390 set_audio_finish(core, EN_A2_FORCE_MONO1);
391 } else {
392 /* Nicam Stereo */
393 set_audio_start(core, SEL_NICAM);
394 set_audio_registers(core, nicam_l);
395 set_audio_finish(core, 0x1924); /* FIXME */
396 }
397}
398 332
399static void set_audio_standard_PAL_I(struct cx88_core *core, int stereo) 333 static const struct rlist nicam_i[] = {
400{ 334 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
401 static const struct rlist pal_i_fm_mono[] = { 335 {AUD_PHACC_FREQ_8MSB, 0x3a},
402 {AUD_ERRLOGPERIOD_R, 0x00000064}, 336 {AUD_PHACC_FREQ_8LSB, 0x93},
403 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, 337 { /* end of list */ },
404 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
405 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
406 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
407 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
408 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
409 {AUD_QAM_MODE, 0x05},
410 {AUD_PHACC_FREQ_8MSB, 0x3a},
411 {AUD_PHACC_FREQ_8LSB, 0x93},
412 {AUD_DMD_RA_DDS, 0x002a4f2f},
413 {AUD_PLL_INT, 0x0000001e},
414 {AUD_PLL_DDS, 0x00000004},
415 {AUD_PLL_FRAC, 0x0000e542},
416 {AUD_RATE_ADJ1, 0x00000100},
417 {AUD_RATE_ADJ2, 0x00000200},
418 {AUD_RATE_ADJ3, 0x00000300},
419 {AUD_RATE_ADJ4, 0x00000400},
420 {AUD_RATE_ADJ5, 0x00000500},
421 {AUD_THR_FR, 0x00000000},
422 {AUD_PILOT_BQD_1_K0, 0x0000755b},
423 {AUD_PILOT_BQD_1_K1, 0x00551340},
424 {AUD_PILOT_BQD_1_K2, 0x006d30be},
425 {AUD_PILOT_BQD_1_K3, 0xffd394af},
426 {AUD_PILOT_BQD_1_K4, 0x00400000},
427 {AUD_PILOT_BQD_2_K0, 0x00040000},
428 {AUD_PILOT_BQD_2_K1, 0x002a4841},
429 {AUD_PILOT_BQD_2_K2, 0x00400000},
430 {AUD_PILOT_BQD_2_K3, 0x00000000},
431 {AUD_PILOT_BQD_2_K4, 0x00000000},
432 {AUD_MODE_CHG_TIMER, 0x00000060},
433 {AUD_AFE_12DB_EN, 0x00000001},
434 {AAGC_HYST, 0x0000000a},
435 {AUD_CORDIC_SHIFT_0, 0x00000007},
436 {AUD_CORDIC_SHIFT_1, 0x00000007},
437 {AUD_C1_UP_THR, 0x00007000},
438 {AUD_C1_LO_THR, 0x00005400},
439 {AUD_C2_UP_THR, 0x00005400},
440 {AUD_C2_LO_THR, 0x00003000},
441 {AUD_DCOC_0_SRC, 0x0000001a},
442 {AUD_DCOC0_SHIFT, 0x00000000},
443 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
444 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
445 {AUD_DCOC_PASS_IN, 0x00000003},
446 {AUD_IIR3_0_SEL, 0x00000021},
447 {AUD_DN2_AFC, 0x00000002},
448 {AUD_DCOC_1_SRC, 0x0000001b},
449 {AUD_DCOC1_SHIFT, 0x00000000},
450 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
451 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
452 {AUD_IIR3_1_SEL, 0x00000023},
453 {AUD_DN0_FREQ, 0x000035a3},
454 {AUD_DN2_FREQ, 0x000029c7},
455 {AUD_CRDC0_SRC_SEL, 0x00000511},
456 {AUD_IIR1_0_SEL, 0x00000001},
457 {AUD_IIR1_1_SEL, 0x00000000},
458 {AUD_IIR3_2_SEL, 0x00000003},
459 {AUD_IIR3_2_SHIFT, 0x00000000},
460 {AUD_IIR3_0_SEL, 0x00000002},
461 {AUD_IIR2_0_SEL, 0x00000021},
462 {AUD_IIR2_0_SHIFT, 0x00000002},
463 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
464 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
465 {AUD_POLYPH80SCALEFAC, 0x00000001},
466 {AUD_START_TIMER, 0x00000000},
467 { /* end of list */ },
468 };
469
470 static const struct rlist pal_i_nicam[] = {
471 { AUD_RATE_ADJ1, 0x00000010 },
472 { AUD_RATE_ADJ2, 0x00000040 },
473 { AUD_RATE_ADJ3, 0x00000100 },
474 { AUD_RATE_ADJ4, 0x00000400 },
475 { AUD_RATE_ADJ5, 0x00001000 },
476 // { AUD_DMD_RA_DDS, 0x00c0d5ce },
477 { AUD_DEEMPHGAIN_R, 0x000023c2 },
478 { AUD_DEEMPHNUMER1_R, 0x0002a7bc },
479 { AUD_DEEMPHNUMER2_R, 0x0003023e },
480 { AUD_DEEMPHDENOM1_R, 0x0000f3d0 },
481 { AUD_DEEMPHDENOM2_R, 0x00000000 },
482 { AUD_DEEMPHDENOM2_R, 0x00000000 },
483 { AUD_ERRLOGPERIOD_R, 0x00000fff },
484 { AUD_ERRINTRPTTHSHLD1_R, 0x000003ff },
485 { AUD_ERRINTRPTTHSHLD2_R, 0x000000ff },
486 { AUD_ERRINTRPTTHSHLD3_R, 0x0000003f },
487 { AUD_POLYPH80SCALEFAC, 0x00000003 },
488 { AUD_PDF_DDS_CNST_BYTE2, 0x06 },
489 { AUD_PDF_DDS_CNST_BYTE1, 0x82 },
490 { AUD_PDF_DDS_CNST_BYTE0, 0x16 },
491 { AUD_QAM_MODE, 0x05 },
492 { AUD_PDF_DDS_CNST_BYTE0, 0x12 },
493 { AUD_PHACC_FREQ_8MSB, 0x3a },
494 { AUD_PHACC_FREQ_8LSB, 0x93 },
495 { /* end of list */ },
496 }; 338 };
497 339
498 dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo); 340 static const struct rlist nicam_default[] = {
341 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
342 {AUD_PHACC_FREQ_8MSB, 0x34},
343 {AUD_PHACC_FREQ_8LSB, 0x4c},
344 { /* end of list */ },
345 };
499 346
500 if (!stereo) { 347 set_audio_start(core,SEL_NICAM);
501 /* FM Mono */ 348 switch (core->tvaudio) {
502 set_audio_start(core, SEL_A2); 349 case WW_L:
503 set_audio_registers(core, pal_i_fm_mono); 350 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
504 set_audio_finish(core, EN_DMTRX_SUMDIFF | EN_A2_FORCE_MONO1); 351 set_audio_registers(core, nicam_l);
505 } else { 352 break;
506 /* Nicam Stereo */ 353 case WW_I:
507 set_audio_start(core, SEL_NICAM); 354 dprintk("%s PAL-I NICAM (status: devel)\n", __FUNCTION__);
508 set_audio_registers(core, pal_i_nicam); 355 set_audio_registers(core, nicam_bgdki_common);
509 set_audio_finish(core, EN_DMTRX_LR | EN_DMTRX_BYPASS | EN_NICAM_AUTO_STEREO); 356 set_audio_registers(core, nicam_i);
510 } 357 break;
358 default:
359 dprintk("%s PAL-BGDK NICAM (status: unknown)\n", __FUNCTION__);
360 set_audio_registers(core, nicam_bgdki_common);
361 set_audio_registers(core, nicam_default);
362 break;
363 };
364
365 mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
366 set_audio_finish(core, mode);
511} 367}
512 368
513static void set_audio_standard_A2(struct cx88_core *core, u32 mode) 369static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
514{ 370{
515 static const struct rlist a2_common[] = { 371 static const struct rlist a2_bgdk_common[] = {
516 {AUD_ERRLOGPERIOD_R, 0x00000064}, 372 {AUD_ERRLOGPERIOD_R, 0x00000064},
517 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, 373 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
518 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, 374 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
519 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, 375 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
520 {AUD_PDF_DDS_CNST_BYTE2, 0x06}, 376 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
521 {AUD_PDF_DDS_CNST_BYTE1, 0x82}, 377 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
522 {AUD_PDF_DDS_CNST_BYTE0, 0x12}, 378 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
523 {AUD_QAM_MODE, 0x05}, 379 {AUD_QAM_MODE, 0x05},
524 {AUD_PHACC_FREQ_8MSB, 0x34}, 380 {AUD_PHACC_FREQ_8MSB, 0x34},
525 {AUD_PHACC_FREQ_8LSB, 0x4c}, 381 {AUD_PHACC_FREQ_8LSB, 0x4c},
526 {AUD_RATE_ADJ1, 0x00000100}, 382 {AUD_RATE_ADJ1, 0x00000100},
527 {AUD_RATE_ADJ2, 0x00000200}, 383 {AUD_RATE_ADJ2, 0x00000200},
528 {AUD_RATE_ADJ3, 0x00000300}, 384 {AUD_RATE_ADJ3, 0x00000300},
529 {AUD_RATE_ADJ4, 0x00000400}, 385 {AUD_RATE_ADJ4, 0x00000400},
530 {AUD_RATE_ADJ5, 0x00000500}, 386 {AUD_RATE_ADJ5, 0x00000500},
531 {AUD_THR_FR, 0x00000000}, 387 {AUD_THR_FR, 0x00000000},
532 {AAGC_HYST, 0x0000001a}, 388 {AAGC_HYST, 0x0000001a},
533 {AUD_PILOT_BQD_1_K0, 0x0000755b}, 389 {AUD_PILOT_BQD_1_K0, 0x0000755b},
534 {AUD_PILOT_BQD_1_K1, 0x00551340}, 390 {AUD_PILOT_BQD_1_K1, 0x00551340},
535 {AUD_PILOT_BQD_1_K2, 0x006d30be}, 391 {AUD_PILOT_BQD_1_K2, 0x006d30be},
536 {AUD_PILOT_BQD_1_K3, 0xffd394af}, 392 {AUD_PILOT_BQD_1_K3, 0xffd394af},
537 {AUD_PILOT_BQD_1_K4, 0x00400000}, 393 {AUD_PILOT_BQD_1_K4, 0x00400000},
538 {AUD_PILOT_BQD_2_K0, 0x00040000}, 394 {AUD_PILOT_BQD_2_K0, 0x00040000},
539 {AUD_PILOT_BQD_2_K1, 0x002a4841}, 395 {AUD_PILOT_BQD_2_K1, 0x002a4841},
540 {AUD_PILOT_BQD_2_K2, 0x00400000}, 396 {AUD_PILOT_BQD_2_K2, 0x00400000},
541 {AUD_PILOT_BQD_2_K3, 0x00000000}, 397 {AUD_PILOT_BQD_2_K3, 0x00000000},
542 {AUD_PILOT_BQD_2_K4, 0x00000000}, 398 {AUD_PILOT_BQD_2_K4, 0x00000000},
543 {AUD_MODE_CHG_TIMER, 0x00000040}, 399 {AUD_MODE_CHG_TIMER, 0x00000040},
544 {AUD_AFE_12DB_EN, 0x00000001}, 400 {AUD_AFE_12DB_EN, 0x00000001},
545 {AUD_CORDIC_SHIFT_0, 0x00000007}, 401 {AUD_CORDIC_SHIFT_0, 0x00000007},
546 {AUD_CORDIC_SHIFT_1, 0x00000007}, 402 {AUD_CORDIC_SHIFT_1, 0x00000007},
547 {AUD_DEEMPH0_G0, 0x00000380}, 403 {AUD_DEEMPH0_G0, 0x00000380},
548 {AUD_DEEMPH1_G0, 0x00000380}, 404 {AUD_DEEMPH1_G0, 0x00000380},
549 {AUD_DCOC_0_SRC, 0x0000001a}, 405 {AUD_DCOC_0_SRC, 0x0000001a},
550 {AUD_DCOC0_SHIFT, 0x00000000}, 406 {AUD_DCOC0_SHIFT, 0x00000000},
551 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, 407 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
552 {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, 408 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
553 {AUD_DCOC_PASS_IN, 0x00000003}, 409 {AUD_DCOC_PASS_IN, 0x00000003},
554 {AUD_IIR3_0_SEL, 0x00000021}, 410 {AUD_IIR3_0_SEL, 0x00000021},
555 {AUD_DN2_AFC, 0x00000002}, 411 {AUD_DN2_AFC, 0x00000002},
556 {AUD_DCOC_1_SRC, 0x0000001b}, 412 {AUD_DCOC_1_SRC, 0x0000001b},
557 {AUD_DCOC1_SHIFT, 0x00000000}, 413 {AUD_DCOC1_SHIFT, 0x00000000},
558 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, 414 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
559 {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, 415 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
560 {AUD_IIR3_1_SEL, 0x00000023}, 416 {AUD_IIR3_1_SEL, 0x00000023},
561 {AUD_RDSI_SEL, 0x00000017}, 417 {AUD_RDSI_SEL, 0x00000017},
562 {AUD_RDSI_SHIFT, 0x00000000}, 418 {AUD_RDSI_SHIFT, 0x00000000},
563 {AUD_RDSQ_SEL, 0x00000017}, 419 {AUD_RDSQ_SEL, 0x00000017},
564 {AUD_RDSQ_SHIFT, 0x00000000}, 420 {AUD_RDSQ_SHIFT, 0x00000000},
565 {AUD_PLL_INT, 0x0000001e}, 421 {AUD_PLL_INT, 0x0000001e},
566 {AUD_PLL_DDS, 0x00000000}, 422 {AUD_PLL_DDS, 0x00000000},
567 {AUD_PLL_FRAC, 0x0000e542}, 423 {AUD_PLL_FRAC, 0x0000e542},
568 {AUD_POLYPH80SCALEFAC, 0x00000001}, 424 {AUD_POLYPH80SCALEFAC, 0x00000001},
569 {AUD_START_TIMER, 0x00000000}, 425 {AUD_START_TIMER, 0x00000000},
570 { /* end of list */ }, 426 { /* end of list */ },
571 }; 427 };
572 428
573 static const struct rlist a2_bg[] = { 429 static const struct rlist a2_bg[] = {
574 {AUD_DMD_RA_DDS, 0x002a4f2f}, 430 {AUD_DMD_RA_DDS, 0x002a4f2f},
575 {AUD_C1_UP_THR, 0x00007000}, 431 {AUD_C1_UP_THR, 0x00007000},
576 {AUD_C1_LO_THR, 0x00005400}, 432 {AUD_C1_LO_THR, 0x00005400},
577 {AUD_C2_UP_THR, 0x00005400}, 433 {AUD_C2_UP_THR, 0x00005400},
578 {AUD_C2_LO_THR, 0x00003000}, 434 {AUD_C2_LO_THR, 0x00003000},
579 { /* end of list */ }, 435 { /* end of list */ },
580 }; 436 };
581 437
582 static const struct rlist a2_dk[] = { 438 static const struct rlist a2_dk[] = {
583 {AUD_DMD_RA_DDS, 0x002a4f2f}, 439 {AUD_DMD_RA_DDS, 0x002a4f2f},
584 {AUD_C1_UP_THR, 0x00007000}, 440 {AUD_C1_UP_THR, 0x00007000},
585 {AUD_C1_LO_THR, 0x00005400}, 441 {AUD_C1_LO_THR, 0x00005400},
586 {AUD_C2_UP_THR, 0x00005400}, 442 {AUD_C2_UP_THR, 0x00005400},
587 {AUD_C2_LO_THR, 0x00003000}, 443 {AUD_C2_LO_THR, 0x00003000},
588 {AUD_DN0_FREQ, 0x00003a1c}, 444 {AUD_DN0_FREQ, 0x00003a1c},
589 {AUD_DN2_FREQ, 0x0000d2e0}, 445 {AUD_DN2_FREQ, 0x0000d2e0},
590 { /* end of list */ }, 446 { /* end of list */ },
591 }; 447 };
592/* unknown, probably NTSC-M */ 448
593 static const struct rlist a2_m[] = { 449 static const struct rlist a1_i[] = {
594 {AUD_DMD_RA_DDS, 0x002a0425}, 450 {AUD_ERRLOGPERIOD_R, 0x00000064},
595 {AUD_C1_UP_THR, 0x00003c00}, 451 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
596 {AUD_C1_LO_THR, 0x00003000}, 452 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
597 {AUD_C2_UP_THR, 0x00006000}, 453 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
598 {AUD_C2_LO_THR, 0x00003c00}, 454 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
599 {AUD_DEEMPH0_A0, 0x00007a80}, 455 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
600 {AUD_DEEMPH1_A0, 0x00007a80}, 456 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
601 {AUD_DEEMPH0_G0, 0x00001200}, 457 {AUD_QAM_MODE, 0x05},
602 {AUD_DEEMPH1_G0, 0x00001200}, 458 {AUD_PHACC_FREQ_8MSB, 0x3a},
603 {AUD_DN0_FREQ, 0x0000283b}, 459 {AUD_PHACC_FREQ_8LSB, 0x93},
604 {AUD_DN1_FREQ, 0x00003418}, 460 {AUD_DMD_RA_DDS, 0x002a4f2f},
605 {AUD_DN2_FREQ, 0x000029c7}, 461 {AUD_PLL_INT, 0x0000001e},
606 {AUD_POLY0_DDS_CONSTANT, 0x000a7540}, 462 {AUD_PLL_DDS, 0x00000004},
463 {AUD_PLL_FRAC, 0x0000e542},
464 {AUD_RATE_ADJ1, 0x00000100},
465 {AUD_RATE_ADJ2, 0x00000200},
466 {AUD_RATE_ADJ3, 0x00000300},
467 {AUD_RATE_ADJ4, 0x00000400},
468 {AUD_RATE_ADJ5, 0x00000500},
469 {AUD_THR_FR, 0x00000000},
470 {AUD_PILOT_BQD_1_K0, 0x0000755b},
471 {AUD_PILOT_BQD_1_K1, 0x00551340},
472 {AUD_PILOT_BQD_1_K2, 0x006d30be},
473 {AUD_PILOT_BQD_1_K3, 0xffd394af},
474 {AUD_PILOT_BQD_1_K4, 0x00400000},
475 {AUD_PILOT_BQD_2_K0, 0x00040000},
476 {AUD_PILOT_BQD_2_K1, 0x002a4841},
477 {AUD_PILOT_BQD_2_K2, 0x00400000},
478 {AUD_PILOT_BQD_2_K3, 0x00000000},
479 {AUD_PILOT_BQD_2_K4, 0x00000000},
480 {AUD_MODE_CHG_TIMER, 0x00000060},
481 {AUD_AFE_12DB_EN, 0x00000001},
482 {AAGC_HYST, 0x0000000a},
483 {AUD_CORDIC_SHIFT_0, 0x00000007},
484 {AUD_CORDIC_SHIFT_1, 0x00000007},
485 {AUD_C1_UP_THR, 0x00007000},
486 {AUD_C1_LO_THR, 0x00005400},
487 {AUD_C2_UP_THR, 0x00005400},
488 {AUD_C2_LO_THR, 0x00003000},
489 {AUD_DCOC_0_SRC, 0x0000001a},
490 {AUD_DCOC0_SHIFT, 0x00000000},
491 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
492 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
493 {AUD_DCOC_PASS_IN, 0x00000003},
494 {AUD_IIR3_0_SEL, 0x00000021},
495 {AUD_DN2_AFC, 0x00000002},
496 {AUD_DCOC_1_SRC, 0x0000001b},
497 {AUD_DCOC1_SHIFT, 0x00000000},
498 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
499 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
500 {AUD_IIR3_1_SEL, 0x00000023},
501 {AUD_DN0_FREQ, 0x000035a3},
502 {AUD_DN2_FREQ, 0x000029c7},
503 {AUD_CRDC0_SRC_SEL, 0x00000511},
504 {AUD_IIR1_0_SEL, 0x00000001},
505 {AUD_IIR1_1_SEL, 0x00000000},
506 {AUD_IIR3_2_SEL, 0x00000003},
507 {AUD_IIR3_2_SHIFT, 0x00000000},
508 {AUD_IIR3_0_SEL, 0x00000002},
509 {AUD_IIR2_0_SEL, 0x00000021},
510 {AUD_IIR2_0_SHIFT, 0x00000002},
511 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
512 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
513 {AUD_POLYPH80SCALEFAC, 0x00000001},
514 {AUD_START_TIMER, 0x00000000},
607 { /* end of list */ }, 515 { /* end of list */ },
608 }; 516 };
609 517
610 static const struct rlist a2_deemph50[] = { 518 static const struct rlist am_l[] = {
611 {AUD_DEEMPH0_G0, 0x00000380}, 519 {AUD_ERRLOGPERIOD_R, 0x00000064},
612 {AUD_DEEMPH1_G0, 0x00000380}, 520 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
613 {AUD_DEEMPHGAIN_R, 0x000011e1}, 521 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
614 {AUD_DEEMPHNUMER1_R, 0x0002a7bc}, 522 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
615 {AUD_DEEMPHNUMER2_R, 0x0003023c}, 523 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
616 { /* end of list */ }, 524 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
525 {AUD_QAM_MODE, 0x00},
526 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
527 {AUD_PHACC_FREQ_8MSB, 0x3a},
528 {AUD_PHACC_FREQ_8LSB, 0x4a},
529 {AUD_DEEMPHGAIN_R, 0x00006680},
530 {AUD_DEEMPHNUMER1_R, 0x000353DE},
531 {AUD_DEEMPHNUMER2_R, 0x000001B1},
532 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
533 {AUD_DEEMPHDENOM2_R, 0x00000000},
534 {AUD_FM_MODE_ENABLE, 0x00000007},
535 {AUD_POLYPH80SCALEFAC, 0x00000003},
536 {AUD_AFE_12DB_EN, 0x00000001},
537 {AAGC_GAIN, 0x00000000},
538 {AAGC_HYST, 0x00000018},
539 {AAGC_DEF, 0x00000020},
540 {AUD_DN0_FREQ, 0x00000000},
541 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
542 {AUD_DCOC_0_SRC, 0x00000021},
543 {AUD_IIR1_0_SEL, 0x00000000},
544 {AUD_IIR1_0_SHIFT, 0x00000007},
545 {AUD_IIR1_1_SEL, 0x00000002},
546 {AUD_IIR1_1_SHIFT, 0x00000000},
547 {AUD_DCOC_1_SRC, 0x00000003},
548 {AUD_DCOC1_SHIFT, 0x00000000},
549 {AUD_DCOC_PASS_IN, 0x00000000},
550 {AUD_IIR1_2_SEL, 0x00000023},
551 {AUD_IIR1_2_SHIFT, 0x00000000},
552 {AUD_IIR1_3_SEL, 0x00000004},
553 {AUD_IIR1_3_SHIFT, 0x00000007},
554 {AUD_IIR1_4_SEL, 0x00000005},
555 {AUD_IIR1_4_SHIFT, 0x00000007},
556 {AUD_IIR3_0_SEL, 0x00000007},
557 {AUD_IIR3_0_SHIFT, 0x00000000},
558 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
559 {AUD_DEEMPH0_SHIFT, 0x00000000},
560 {AUD_DEEMPH0_G0, 0x00007000},
561 {AUD_DEEMPH0_A0, 0x00000000},
562 {AUD_DEEMPH0_B0, 0x00000000},
563 {AUD_DEEMPH0_A1, 0x00000000},
564 {AUD_DEEMPH0_B1, 0x00000000},
565 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
566 {AUD_DEEMPH1_SHIFT, 0x00000000},
567 {AUD_DEEMPH1_G0, 0x00007000},
568 {AUD_DEEMPH1_A0, 0x00000000},
569 {AUD_DEEMPH1_B0, 0x00000000},
570 {AUD_DEEMPH1_A1, 0x00000000},
571 {AUD_DEEMPH1_B1, 0x00000000},
572 {AUD_OUT0_SEL, 0x0000003F},
573 {AUD_OUT1_SEL, 0x0000003F},
574 {AUD_DMD_RA_DDS, 0x00F5C285},
575 {AUD_PLL_INT, 0x0000001E},
576 {AUD_PLL_DDS, 0x00000000},
577 {AUD_PLL_FRAC, 0x0000E542},
578 {AUD_RATE_ADJ1, 0x00000100},
579 {AUD_RATE_ADJ2, 0x00000200},
580 {AUD_RATE_ADJ3, 0x00000300},
581 {AUD_RATE_ADJ4, 0x00000400},
582 {AUD_RATE_ADJ5, 0x00000500},
583 {AUD_RATE_THRES_DMD, 0x000000C0},
584 { /* end of list */ },
617 }; 585 };
618 586
619 static const struct rlist a2_deemph75[] = { 587 static const struct rlist a2_deemph50[] = {
620 {AUD_DEEMPH0_G0, 0x00000480}, 588 {AUD_DEEMPH0_G0, 0x00000380},
621 {AUD_DEEMPH1_G0, 0x00000480}, 589 {AUD_DEEMPH1_G0, 0x00000380},
622 {AUD_DEEMPHGAIN_R, 0x00009000}, 590 {AUD_DEEMPHGAIN_R, 0x000011e1},
623 {AUD_DEEMPHNUMER1_R, 0x000353de}, 591 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
624 {AUD_DEEMPHNUMER2_R, 0x000001b1}, 592 {AUD_DEEMPHNUMER2_R, 0x0003023c},
625 { /* end of list */ }, 593 { /* end of list */ },
626 }; 594 };
627 595
628 set_audio_start(core, SEL_A2); 596 set_audio_start(core, SEL_A2);
629 set_audio_registers(core, a2_common);
630 switch (core->tvaudio) { 597 switch (core->tvaudio) {
631 case WW_A2_BG: 598 case WW_BG:
632 dprintk("%s PAL-BG A2 (status: known-good)\n",__FUNCTION__); 599 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
633 set_audio_registers(core, a2_bg); 600 set_audio_registers(core, a2_bgdk_common);
634 set_audio_registers(core, a2_deemph50); 601 set_audio_registers(core, a2_bg);
602 set_audio_registers(core, a2_deemph50);
635 break; 603 break;
636 case WW_A2_DK: 604 case WW_DK:
637 dprintk("%s PAL-DK A2 (status: known-good)\n",__FUNCTION__); 605 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
638 set_audio_registers(core, a2_dk); 606 set_audio_registers(core, a2_bgdk_common);
639 set_audio_registers(core, a2_deemph50); 607 set_audio_registers(core, a2_dk);
608 set_audio_registers(core, a2_deemph50);
640 break; 609 break;
641 case WW_A2_M: 610 case WW_I:
642 dprintk("%s NTSC-M A2 (status: unknown)\n",__FUNCTION__); 611 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
643 set_audio_registers(core, a2_m); 612 set_audio_registers(core, a1_i);
644 set_audio_registers(core, a2_deemph75); 613 set_audio_registers(core, a2_deemph50);
614 break;
615 case WW_L:
616 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
617 set_audio_registers(core, am_l);
618 break;
619 default:
620 dprintk("%s Warning: wrong value\n", __FUNCTION__);
621 return;
645 break; 622 break;
646 }; 623 };
647 624
@@ -656,71 +633,71 @@ static void set_audio_standard_EIAJ(struct cx88_core *core)
656 633
657 { /* end of list */ }, 634 { /* end of list */ },
658 }; 635 };
659 dprintk("%s (status: unknown)\n",__FUNCTION__); 636 dprintk("%s (status: unknown)\n", __FUNCTION__);
660 637
661 set_audio_start(core, SEL_EIAJ); 638 set_audio_start(core, SEL_EIAJ);
662 set_audio_registers(core, eiaj); 639 set_audio_registers(core, eiaj);
663 set_audio_finish(core, EN_EIAJ_AUTO_STEREO); 640 set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
664} 641}
665 642
666static void set_audio_standard_FM(struct cx88_core *core, enum cx88_deemph_type deemph) 643static void set_audio_standard_FM(struct cx88_core *core,
644 enum cx88_deemph_type deemph)
667{ 645{
668 static const struct rlist fm_deemph_50[] = { 646 static const struct rlist fm_deemph_50[] = {
669 { AUD_DEEMPH0_G0, 0x0C45 }, 647 {AUD_DEEMPH0_G0, 0x0C45},
670 { AUD_DEEMPH0_A0, 0x6262 }, 648 {AUD_DEEMPH0_A0, 0x6262},
671 { AUD_DEEMPH0_B0, 0x1C29 }, 649 {AUD_DEEMPH0_B0, 0x1C29},
672 { AUD_DEEMPH0_A1, 0x3FC66}, 650 {AUD_DEEMPH0_A1, 0x3FC66},
673 { AUD_DEEMPH0_B1, 0x399A }, 651 {AUD_DEEMPH0_B1, 0x399A},
674 652
675 { AUD_DEEMPH1_G0, 0x0D80 }, 653 {AUD_DEEMPH1_G0, 0x0D80},
676 { AUD_DEEMPH1_A0, 0x6262 }, 654 {AUD_DEEMPH1_A0, 0x6262},
677 { AUD_DEEMPH1_B0, 0x1C29 }, 655 {AUD_DEEMPH1_B0, 0x1C29},
678 { AUD_DEEMPH1_A1, 0x3FC66}, 656 {AUD_DEEMPH1_A1, 0x3FC66},
679 { AUD_DEEMPH1_B1, 0x399A}, 657 {AUD_DEEMPH1_B1, 0x399A},
680 658
681 { AUD_POLYPH80SCALEFAC, 0x0003}, 659 {AUD_POLYPH80SCALEFAC, 0x0003},
682 { /* end of list */ }, 660 { /* end of list */ },
683 }; 661 };
684 static const struct rlist fm_deemph_75[] = { 662 static const struct rlist fm_deemph_75[] = {
685 { AUD_DEEMPH0_G0, 0x091B }, 663 {AUD_DEEMPH0_G0, 0x091B},
686 { AUD_DEEMPH0_A0, 0x6B68 }, 664 {AUD_DEEMPH0_A0, 0x6B68},
687 { AUD_DEEMPH0_B0, 0x11EC }, 665 {AUD_DEEMPH0_B0, 0x11EC},
688 { AUD_DEEMPH0_A1, 0x3FC66}, 666 {AUD_DEEMPH0_A1, 0x3FC66},
689 { AUD_DEEMPH0_B1, 0x399A }, 667 {AUD_DEEMPH0_B1, 0x399A},
690 668
691 { AUD_DEEMPH1_G0, 0x0AA0 }, 669 {AUD_DEEMPH1_G0, 0x0AA0},
692 { AUD_DEEMPH1_A0, 0x6B68 }, 670 {AUD_DEEMPH1_A0, 0x6B68},
693 { AUD_DEEMPH1_B0, 0x11EC }, 671 {AUD_DEEMPH1_B0, 0x11EC},
694 { AUD_DEEMPH1_A1, 0x3FC66}, 672 {AUD_DEEMPH1_A1, 0x3FC66},
695 { AUD_DEEMPH1_B1, 0x399A}, 673 {AUD_DEEMPH1_B1, 0x399A},
696 674
697 { AUD_POLYPH80SCALEFAC, 0x0003}, 675 {AUD_POLYPH80SCALEFAC, 0x0003},
698 { /* end of list */ }, 676 { /* end of list */ },
699 }; 677 };
700 678
701 /* It is enough to leave default values? */ 679 /* It is enough to leave default values? */
702 static const struct rlist fm_no_deemph[] = { 680 static const struct rlist fm_no_deemph[] = {
703 681
704 { AUD_POLYPH80SCALEFAC, 0x0003}, 682 {AUD_POLYPH80SCALEFAC, 0x0003},
705 { /* end of list */ }, 683 { /* end of list */ },
706 }; 684 };
707 685
708 dprintk("%s (status: unknown)\n",__FUNCTION__); 686 dprintk("%s (status: unknown)\n", __FUNCTION__);
709 set_audio_start(core, SEL_FMRADIO); 687 set_audio_start(core, SEL_FMRADIO);
710 688
711 switch (deemph) 689 switch (deemph) {
712 { 690 case FM_NO_DEEMPH:
713 case FM_NO_DEEMPH: 691 set_audio_registers(core, fm_no_deemph);
714 set_audio_registers(core, fm_no_deemph); 692 break;
715 break;
716 693
717 case FM_DEEMPH_50: 694 case FM_DEEMPH_50:
718 set_audio_registers(core, fm_deemph_50); 695 set_audio_registers(core, fm_deemph_50);
719 break; 696 break;
720 697
721 case FM_DEEMPH_75: 698 case FM_DEEMPH_75:
722 set_audio_registers(core, fm_deemph_75); 699 set_audio_registers(core, fm_deemph_75);
723 break; 700 break;
724 } 701 }
725 702
726 set_audio_finish(core, EN_FMRADIO_AUTO_STEREO); 703 set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
@@ -728,36 +705,64 @@ static void set_audio_standard_FM(struct cx88_core *core, enum cx88_deemph_type
728 705
729/* ----------------------------------------------------------- */ 706/* ----------------------------------------------------------- */
730 707
708int cx88_detect_nicam(struct cx88_core *core)
709{
710 int i, j = 0;
711
712 dprintk("start nicam autodetect.\n");
713
714 for (i = 0; i < 6; i++) {
715 /* if bit1=1 then nicam is detected */
716 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
717
718 /* 3x detected: absolutly sure now */
719 if (j == 3) {
720 dprintk("nicam is detected.\n");
721 return 1;
722 }
723
724 /* wait a little bit for next reading status */
725 msleep(10);
726 }
727
728 dprintk("nicam is not detected.\n");
729 return 0;
730}
731
731void cx88_set_tvaudio(struct cx88_core *core) 732void cx88_set_tvaudio(struct cx88_core *core)
732{ 733{
733 switch (core->tvaudio) { 734 switch (core->tvaudio) {
734 case WW_BTSC: 735 case WW_BTSC:
735 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); 736 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
736 break; 737 break;
737 case WW_NICAM_BGDKL: 738 case WW_BG:
738 set_audio_standard_NICAM_L(core,0); 739 case WW_DK:
739 break; 740 case WW_I:
740 case WW_NICAM_I: 741 case WW_L:
741 set_audio_standard_PAL_I(core,0); 742 /* prepare all dsp registers */
742 break; 743 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
743 case WW_A2_BG: 744
744 case WW_A2_DK: 745 /* set nicam mode - otherwise
745 case WW_A2_M: 746 AUD_NICAM_STATUS2 contains wrong values */
746 set_audio_standard_A2(core, EN_A2_FORCE_MONO1); 747 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
748 if (0 == cx88_detect_nicam(core)) {
749 /* fall back to fm / am mono */
750 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
751 core->use_nicam = 0;
752 } else {
753 core->use_nicam = 1;
754 }
747 break; 755 break;
748 case WW_EIAJ: 756 case WW_EIAJ:
749 set_audio_standard_EIAJ(core); 757 set_audio_standard_EIAJ(core);
750 break; 758 break;
751 case WW_FM: 759 case WW_FM:
752 set_audio_standard_FM(core,FM_NO_DEEMPH); 760 set_audio_standard_FM(core, FM_NO_DEEMPH);
753 break;
754 case WW_SYSTEM_L_AM:
755 set_audio_standard_NICAM_L(core, 1);
756 break; 761 break;
757 case WW_NONE: 762 case WW_NONE:
758 default: 763 default:
759 printk("%s/0: unknown tv audio mode [%d]\n", 764 printk("%s/0: unknown tv audio mode [%d]\n",
760 core->name, core->tvaudio); 765 core->name, core->tvaudio);
761 break; 766 break;
762 } 767 }
763 return; 768 return;
@@ -766,24 +771,16 @@ void cx88_set_tvaudio(struct cx88_core *core)
766void cx88_newstation(struct cx88_core *core) 771void cx88_newstation(struct cx88_core *core)
767{ 772{
768 core->audiomode_manual = UNSET; 773 core->audiomode_manual = UNSET;
769
770 switch (core->tvaudio) {
771 case WW_SYSTEM_L_AM:
772 /* try nicam ... */
773 core->audiomode_current = V4L2_TUNER_MODE_STEREO;
774 set_audio_standard_NICAM_L(core, 1);
775 break;
776 }
777} 774}
778 775
779void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t) 776void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
780{ 777{
781 static char *m[] = {"stereo", "dual mono", "mono", "sap"}; 778 static char *m[] = { "stereo", "dual mono", "mono", "sap" };
782 static char *p[] = {"no pilot", "pilot c1", "pilot c2", "?"}; 779 static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
783 u32 reg,mode,pilot; 780 u32 reg, mode, pilot;
784 781
785 reg = cx_read(AUD_STATUS); 782 reg = cx_read(AUD_STATUS);
786 mode = reg & 0x03; 783 mode = reg & 0x03;
787 pilot = (reg >> 2) & 0x03; 784 pilot = (reg >> 2) & 0x03;
788 785
789 if (core->astat != reg) 786 if (core->astat != reg)
@@ -800,14 +797,13 @@ void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
800 797
801# if 0 798# if 0
802 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP | 799 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
803 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2; 800 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
804 t->rxsubchans = V4L2_TUNER_SUB_MONO; 801 t->rxsubchans = V4L2_TUNER_SUB_MONO;
805 t->audmode = V4L2_TUNER_MODE_MONO; 802 t->audmode = V4L2_TUNER_MODE_MONO;
806 803
807 switch (core->tvaudio) { 804 switch (core->tvaudio) {
808 case WW_BTSC: 805 case WW_BTSC:
809 t->capability = V4L2_TUNER_CAP_STEREO | 806 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
810 V4L2_TUNER_CAP_SAP;
811 t->rxsubchans = V4L2_TUNER_SUB_STEREO; 807 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
812 if (1 == pilot) { 808 if (1 == pilot) {
813 /* SAP */ 809 /* SAP */
@@ -819,13 +815,15 @@ void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
819 case WW_A2_M: 815 case WW_A2_M:
820 if (1 == pilot) { 816 if (1 == pilot) {
821 /* stereo */ 817 /* stereo */
822 t->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; 818 t->rxsubchans =
819 V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
823 if (0 == mode) 820 if (0 == mode)
824 t->audmode = V4L2_TUNER_MODE_STEREO; 821 t->audmode = V4L2_TUNER_MODE_STEREO;
825 } 822 }
826 if (2 == pilot) { 823 if (2 == pilot) {
827 /* dual language -- FIXME */ 824 /* dual language -- FIXME */
828 t->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; 825 t->rxsubchans =
826 V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
829 t->audmode = V4L2_TUNER_MODE_LANG1; 827 t->audmode = V4L2_TUNER_MODE_LANG1;
830 } 828 }
831 break; 829 break;
@@ -840,7 +838,7 @@ void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
840 t->audmode = V4L2_TUNER_MODE_STEREO; 838 t->audmode = V4L2_TUNER_MODE_STEREO;
841 t->rxsubchans |= V4L2_TUNER_SUB_STEREO; 839 t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
842 } 840 }
843 break ; 841 break;
844 default: 842 default:
845 /* nothing */ 843 /* nothing */
846 break; 844 break;
@@ -851,7 +849,7 @@ void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
851 849
852void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual) 850void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
853{ 851{
854 u32 ctl = UNSET; 852 u32 ctl = UNSET;
855 u32 mask = UNSET; 853 u32 mask = UNSET;
856 854
857 if (manual) { 855 if (manual) {
@@ -879,68 +877,58 @@ void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
879 break; 877 break;
880 } 878 }
881 break; 879 break;
882 case WW_A2_BG: 880 case WW_BG:
883 case WW_A2_DK: 881 case WW_DK:
884 case WW_A2_M: 882 case WW_I:
885 switch (mode) { 883 case WW_L:
886 case V4L2_TUNER_MODE_MONO: 884 if (1 == core->use_nicam) {
887 case V4L2_TUNER_MODE_LANG1: 885 switch (mode) {
888 set_audio_standard_A2(core, EN_A2_FORCE_MONO1); 886 case V4L2_TUNER_MODE_MONO:
889 break; 887 case V4L2_TUNER_MODE_LANG1:
890 case V4L2_TUNER_MODE_LANG2: 888 set_audio_standard_NICAM(core,
891 set_audio_standard_A2(core, EN_A2_FORCE_MONO2); 889 EN_NICAM_FORCE_MONO1);
892 break; 890 break;
893 case V4L2_TUNER_MODE_STEREO: 891 case V4L2_TUNER_MODE_LANG2:
894 set_audio_standard_A2(core, EN_A2_FORCE_STEREO); 892 set_audio_standard_NICAM(core,
895 break; 893 EN_NICAM_FORCE_MONO2);
896 } 894 break;
897 break; 895 case V4L2_TUNER_MODE_STEREO:
898 case WW_NICAM_BGDKL: 896 set_audio_standard_NICAM(core,
899 switch (mode) { 897 EN_NICAM_FORCE_STEREO);
900 case V4L2_TUNER_MODE_MONO: 898 break;
901 ctl = EN_NICAM_FORCE_MONO1; 899 }
902 mask = 0x3f; 900 } else {
903 break; 901 if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
904 case V4L2_TUNER_MODE_LANG1: 902 /* fall back to fm / am mono */
905 ctl = EN_NICAM_AUTO_MONO2; 903 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
906 mask = 0x3f; 904 } else {
907 break; 905 /* TODO: Add A2 autodection */
908 case V4L2_TUNER_MODE_STEREO: 906 switch (mode) {
909 ctl = EN_NICAM_FORCE_STEREO | EN_DMTRX_LR; 907 case V4L2_TUNER_MODE_MONO:
910 mask = 0x93f; 908 case V4L2_TUNER_MODE_LANG1:
911 break; 909 set_audio_standard_A2(core,
912 } 910 EN_A2_FORCE_MONO1);
913 break; 911 break;
914 case WW_SYSTEM_L_AM: 912 case V4L2_TUNER_MODE_LANG2:
915 switch (mode) { 913 set_audio_standard_A2(core,
916 case V4L2_TUNER_MODE_MONO: 914 EN_A2_FORCE_MONO2);
917 case V4L2_TUNER_MODE_LANG1: /* FIXME */ 915 break;
918 set_audio_standard_NICAM_L(core, 0); 916 case V4L2_TUNER_MODE_STEREO:
919 break; 917 set_audio_standard_A2(core,
920 case V4L2_TUNER_MODE_STEREO: 918 EN_A2_FORCE_STEREO);
921 set_audio_standard_NICAM_L(core, 1); 919 break;
922 break; 920 }
923 } 921 }
924 break;
925 case WW_NICAM_I:
926 switch (mode) {
927 case V4L2_TUNER_MODE_MONO:
928 case V4L2_TUNER_MODE_LANG1:
929 set_audio_standard_PAL_I(core, 0);
930 break;
931 case V4L2_TUNER_MODE_STEREO:
932 set_audio_standard_PAL_I(core, 1);
933 break;
934 } 922 }
935 break; 923 break;
936 case WW_FM: 924 case WW_FM:
937 switch (mode) { 925 switch (mode) {
938 case V4L2_TUNER_MODE_MONO: 926 case V4L2_TUNER_MODE_MONO:
939 ctl = EN_FMRADIO_FORCE_MONO; 927 ctl = EN_FMRADIO_FORCE_MONO;
940 mask = 0x3f; 928 mask = 0x3f;
941 break; 929 break;
942 case V4L2_TUNER_MODE_STEREO: 930 case V4L2_TUNER_MODE_STEREO:
943 ctl = EN_FMRADIO_AUTO_STEREO; 931 ctl = EN_FMRADIO_AUTO_STEREO;
944 mask = 0x3f; 932 mask = 0x3f;
945 break; 933 break;
946 } 934 }
@@ -970,8 +958,8 @@ int cx88_audio_thread(void *data)
970 break; 958 break;
971 959
972 /* just monitor the audio status for now ... */ 960 /* just monitor the audio status for now ... */
973 memset(&t,0,sizeof(t)); 961 memset(&t, 0, sizeof(t));
974 cx88_get_stereo(core,&t); 962 cx88_get_stereo(core, &t);
975 963
976 if (UNSET != core->audiomode_manual) 964 if (UNSET != core->audiomode_manual)
977 /* manually set, don't do anything. */ 965 /* manually set, don't do anything. */
diff --git a/drivers/media/video/cx88/cx88-video.c b/drivers/media/video/cx88/cx88-video.c
index 3dbc074fb515..24a48f8a48c1 100644
--- a/drivers/media/video/cx88/cx88-video.c
+++ b/drivers/media/video/cx88/cx88-video.c
@@ -34,6 +34,9 @@
34 34
35#include "cx88.h" 35#include "cx88.h"
36 36
37/* Include V4L1 specific functions. Should be removed soon */
38#include <linux/videodev.h>
39
37MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); 40MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
38MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); 41MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
39MODULE_LICENSE("GPL"); 42MODULE_LICENSE("GPL");
@@ -100,7 +103,7 @@ static struct cx88_tvnorm tvnorms[] = {
100 .id = V4L2_STD_PAL_I, 103 .id = V4L2_STD_PAL_I,
101 .cxiformat = VideoFormatPAL, 104 .cxiformat = VideoFormatPAL,
102 .cxoformat = 0x181f0008, 105 .cxoformat = 0x181f0008,
103 },{ 106 },{
104 .name = "PAL-M", 107 .name = "PAL-M",
105 .id = V4L2_STD_PAL_M, 108 .id = V4L2_STD_PAL_M,
106 .cxiformat = VideoFormatPALM, 109 .cxiformat = VideoFormatPALM,
@@ -470,7 +473,7 @@ static int restart_video_queue(struct cx8800_dev *dev,
470 struct list_head *item; 473 struct list_head *item;
471 474
472 if (!list_empty(&q->active)) { 475 if (!list_empty(&q->active)) {
473 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); 476 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
474 dprintk(2,"restart_queue [%p/%d]: restart dma\n", 477 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
475 buf, buf->vb.i); 478 buf, buf->vb.i);
476 start_video_dma(dev, q, buf); 479 start_video_dma(dev, q, buf);
@@ -486,7 +489,7 @@ static int restart_video_queue(struct cx8800_dev *dev,
486 for (;;) { 489 for (;;) {
487 if (list_empty(&q->queued)) 490 if (list_empty(&q->queued))
488 return 0; 491 return 0;
489 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); 492 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
490 if (NULL == prev) { 493 if (NULL == prev) {
491 list_del(&buf->vb.queue); 494 list_del(&buf->vb.queue);
492 list_add_tail(&buf->vb.queue,&q->active); 495 list_add_tail(&buf->vb.queue,&q->active);
@@ -783,11 +786,11 @@ static int video_open(struct inode *inode, struct file *file)
783 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL); 786 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
784 } 787 }
785 788
786 return 0; 789 return 0;
787} 790}
788 791
789static ssize_t 792static ssize_t
790video_read(struct file *file, char *data, size_t count, loff_t *ppos) 793video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
791{ 794{
792 struct cx8800_fh *fh = file->private_data; 795 struct cx8800_fh *fh = file->private_data;
793 796
@@ -922,7 +925,7 @@ static int set_control(struct cx88_core *core, struct v4l2_control *ctl)
922{ 925{
923 /* struct cx88_core *core = dev->core; */ 926 /* struct cx88_core *core = dev->core; */
924 struct cx88_ctrl *c = NULL; 927 struct cx88_ctrl *c = NULL;
925 u32 v_sat_value; 928 u32 v_sat_value;
926 u32 value; 929 u32 value;
927 int i; 930 int i;
928 931
@@ -1187,7 +1190,7 @@ static int video_do_ioctl(struct inode *inode, struct file *file,
1187 struct v4l2_format *f = arg; 1190 struct v4l2_format *f = arg;
1188 return cx8800_try_fmt(dev,fh,f); 1191 return cx8800_try_fmt(dev,fh,f);
1189 } 1192 }
1190 1193#ifdef HAVE_V4L1
1191 /* --- streaming capture ------------------------------------- */ 1194 /* --- streaming capture ------------------------------------- */
1192 case VIDIOCGMBUF: 1195 case VIDIOCGMBUF:
1193 { 1196 {
@@ -1213,6 +1216,7 @@ static int video_do_ioctl(struct inode *inode, struct file *file,
1213 } 1216 }
1214 return 0; 1217 return 0;
1215 } 1218 }
1219#endif
1216 case VIDIOC_REQBUFS: 1220 case VIDIOC_REQBUFS:
1217 return videobuf_reqbufs(get_queue(fh), arg); 1221 return videobuf_reqbufs(get_queue(fh), arg);
1218 1222
@@ -1244,7 +1248,6 @@ static int video_do_ioctl(struct inode *inode, struct file *file,
1244 res_free(dev,fh,res); 1248 res_free(dev,fh,res);
1245 return 0; 1249 return 0;
1246 } 1250 }
1247
1248 default: 1251 default:
1249 return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl ); 1252 return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl );
1250 } 1253 }
@@ -1252,15 +1255,13 @@ static int video_do_ioctl(struct inode *inode, struct file *file,
1252} 1255}
1253 1256
1254int cx88_do_ioctl(struct inode *inode, struct file *file, int radio, 1257int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
1255 struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl) 1258 struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl)
1256{ 1259{
1257 int err; 1260 int err;
1258 1261
1262 dprintk( 1, "CORE IOCTL: 0x%x\n", cmd );
1259 if (video_debug > 1) 1263 if (video_debug > 1)
1260 cx88_print_ioctl(core->name,cmd); 1264 cx88_print_ioctl(core->name,cmd);
1261 printk( KERN_INFO "CORE IOCTL: 0x%x\n", cmd );
1262 cx88_print_ioctl(core->name,cmd);
1263 dprintk( 1, "CORE IOCTL: 0x%x\n", cmd );
1264 1265
1265 switch (cmd) { 1266 switch (cmd) {
1266 /* ---------- tv norms ---------- */ 1267 /* ---------- tv norms ---------- */
@@ -1401,7 +1402,7 @@ int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
1401 1402
1402 cx88_get_stereo(core ,t); 1403 cx88_get_stereo(core ,t);
1403 reg = cx_read(MO_DEVICE_STATUS); 1404 reg = cx_read(MO_DEVICE_STATUS);
1404 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; 1405 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1405 return 0; 1406 return 0;
1406 } 1407 }
1407 case VIDIOC_S_TUNER: 1408 case VIDIOC_S_TUNER:
@@ -1488,7 +1489,7 @@ static int radio_do_ioctl(struct inode *inode, struct file *file,
1488 struct v4l2_capability *cap = arg; 1489 struct v4l2_capability *cap = arg;
1489 1490
1490 memset(cap,0,sizeof(*cap)); 1491 memset(cap,0,sizeof(*cap));
1491 strcpy(cap->driver, "cx8800"); 1492 strcpy(cap->driver, "cx8800");
1492 strlcpy(cap->card, cx88_boards[core->board].name, 1493 strlcpy(cap->card, cx88_boards[core->board].name,
1493 sizeof(cap->card)); 1494 sizeof(cap->card));
1494 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); 1495 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
@@ -1505,6 +1506,7 @@ static int radio_do_ioctl(struct inode *inode, struct file *file,
1505 1506
1506 memset(t,0,sizeof(*t)); 1507 memset(t,0,sizeof(*t));
1507 strcpy(t->name, "Radio"); 1508 strcpy(t->name, "Radio");
1509 t->type = V4L2_TUNER_RADIO;
1508 1510
1509 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t); 1511 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1510 return 0; 1512 return 0;
@@ -1539,6 +1541,7 @@ static int radio_do_ioctl(struct inode *inode, struct file *file,
1539 *id = 0; 1541 *id = 0;
1540 return 0; 1542 return 0;
1541 } 1543 }
1544#ifdef HAVE_V4L1
1542 case VIDIOCSTUNER: 1545 case VIDIOCSTUNER:
1543 { 1546 {
1544 struct video_tuner *v = arg; 1547 struct video_tuner *v = arg;
@@ -1549,6 +1552,7 @@ static int radio_do_ioctl(struct inode *inode, struct file *file,
1549 cx88_call_i2c_clients(core,VIDIOCSTUNER,v); 1552 cx88_call_i2c_clients(core,VIDIOCSTUNER,v);
1550 return 0; 1553 return 0;
1551 } 1554 }
1555#endif
1552 case VIDIOC_S_TUNER: 1556 case VIDIOC_S_TUNER:
1553 { 1557 {
1554 struct v4l2_tuner *t = arg; 1558 struct v4l2_tuner *t = arg;
@@ -1829,8 +1833,8 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1829 1833
1830 /* print pci info */ 1834 /* print pci info */
1831 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev); 1835 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
1832 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); 1836 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1833 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " 1837 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1834 "latency: %d, mmio: 0x%lx\n", core->name, 1838 "latency: %d, mmio: 0x%lx\n", core->name,
1835 pci_name(pci_dev), dev->pci_rev, pci_dev->irq, 1839 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1836 dev->pci_lat,pci_resource_start(pci_dev,0)); 1840 dev->pci_lat,pci_resource_start(pci_dev,0));
@@ -1946,7 +1950,7 @@ fail_free:
1946 1950
1947static void __devexit cx8800_finidev(struct pci_dev *pci_dev) 1951static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1948{ 1952{
1949 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1953 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1950 struct cx88_core *core = dev->core; 1954 struct cx88_core *core = dev->core;
1951 1955
1952 /* stop thread */ 1956 /* stop thread */
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index f48dd4353568..b19d3a9e2298 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -22,7 +22,7 @@
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h> 24#include <linux/i2c-algo-bit.h>
25#include <linux/videodev.h> 25#include <linux/videodev2.h>
26#include <linux/kdev_t.h> 26#include <linux/kdev_t.h>
27 27
28#include <media/tuner.h> 28#include <media/tuner.h>
@@ -148,7 +148,7 @@ extern struct sram_channel cx88_sram_channels[];
148#define CX88_BOARD_PIXELVIEW 3 148#define CX88_BOARD_PIXELVIEW 3
149#define CX88_BOARD_ATI_WONDER_PRO 4 149#define CX88_BOARD_ATI_WONDER_PRO 4
150#define CX88_BOARD_WINFAST2000XP_EXPERT 5 150#define CX88_BOARD_WINFAST2000XP_EXPERT 5
151#define CX88_BOARD_AVERTV_303 6 151#define CX88_BOARD_AVERTV_STUDIO_303 6
152#define CX88_BOARD_MSI_TVANYWHERE_MASTER 7 152#define CX88_BOARD_MSI_TVANYWHERE_MASTER 7
153#define CX88_BOARD_WINFAST_DV2000 8 153#define CX88_BOARD_WINFAST_DV2000 8
154#define CX88_BOARD_LEADTEK_PVR2000 9 154#define CX88_BOARD_LEADTEK_PVR2000 9
@@ -174,6 +174,11 @@ extern struct sram_channel cx88_sram_channels[];
174#define CX88_BOARD_ADSTECH_DVB_T_PCI 29 174#define CX88_BOARD_ADSTECH_DVB_T_PCI 29
175#define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1 30 175#define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1 30
176#define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31 176#define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
177#define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
178#define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
179#define CX88_BOARD_ATI_HDTVWONDER 34
180#define CX88_BOARD_WINFAST_DTV1000 35
181#define CX88_BOARD_AVERTV_303 36
177 182
178enum cx88_itype { 183enum cx88_itype {
179 CX88_VMUX_COMPOSITE1 = 1, 184 CX88_VMUX_COMPOSITE1 = 1,
@@ -203,8 +208,8 @@ struct cx88_board {
203 int tda9887_conf; 208 int tda9887_conf;
204 struct cx88_input input[MAX_CX88_INPUT]; 209 struct cx88_input input[MAX_CX88_INPUT];
205 struct cx88_input radio; 210 struct cx88_input radio;
206 int blackbird:1; 211 unsigned int blackbird:1;
207 int dvb:1; 212 unsigned int dvb:1;
208}; 213};
209 214
210struct cx88_subid { 215struct cx88_subid {
@@ -255,8 +260,8 @@ struct cx88_core {
255 /* pci stuff */ 260 /* pci stuff */
256 int pci_bus; 261 int pci_bus;
257 int pci_slot; 262 int pci_slot;
258 u32 __iomem *lmmio; 263 u32 __iomem *lmmio;
259 u8 __iomem *bmmio; 264 u8 __iomem *bmmio;
260 u32 shadow[SHADOW_MAX]; 265 u32 shadow[SHADOW_MAX];
261 int pci_irqmask; 266 int pci_irqmask;
262 267
@@ -287,6 +292,7 @@ struct cx88_core {
287 u32 audiomode_current; 292 u32 audiomode_current;
288 u32 input; 293 u32 input;
289 u32 astat; 294 u32 astat;
295 u32 use_nicam;
290 296
291 /* IR remote control state */ 297 /* IR remote control state */
292 struct cx88_IR *ir; 298 struct cx88_IR *ir;
@@ -370,6 +376,14 @@ struct cx8802_suspend_state {
370 int disabled; 376 int disabled;
371}; 377};
372 378
379/* TODO: move this to struct v4l2_mpeg_compression ? */
380struct blackbird_dnr {
381 u32 mode;
382 u32 type;
383 u32 spatial;
384 u32 temporal;
385};
386
373struct cx8802_dev { 387struct cx8802_dev {
374 struct cx88_core *core; 388 struct cx88_core *core;
375 spinlock_t slock; 389 spinlock_t slock;
@@ -400,6 +414,10 @@ struct cx8802_dev {
400 414
401 /* for switching modulation types */ 415 /* for switching modulation types */
402 unsigned char ts_gen_cntrl; 416 unsigned char ts_gen_cntrl;
417
418 /* mpeg params */
419 struct v4l2_mpeg_compression params;
420 struct blackbird_dnr dnr_params;
403}; 421};
404 422
405/* ----------------------------------------------------------- */ 423/* ----------------------------------------------------------- */
@@ -514,22 +532,20 @@ extern void cx88_card_setup(struct cx88_core *core);
514 532
515#define WW_NONE 1 533#define WW_NONE 1
516#define WW_BTSC 2 534#define WW_BTSC 2
517#define WW_NICAM_I 3 535#define WW_BG 3
518#define WW_NICAM_BGDKL 4 536#define WW_DK 4
519#define WW_A1 5 537#define WW_I 5
520#define WW_A2_BG 6 538#define WW_L 6
521#define WW_A2_DK 7 539#define WW_EIAJ 7
522#define WW_A2_M 8 540#define WW_I2SPT 8
523#define WW_EIAJ 9 541#define WW_FM 9
524#define WW_SYSTEM_L_AM 10
525#define WW_I2SPT 11
526#define WW_FM 12
527 542
528void cx88_set_tvaudio(struct cx88_core *core); 543void cx88_set_tvaudio(struct cx88_core *core);
529void cx88_newstation(struct cx88_core *core); 544void cx88_newstation(struct cx88_core *core);
530void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t); 545void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
531void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual); 546void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
532int cx88_audio_thread(void *data); 547int cx88_audio_thread(void *data);
548int cx88_detect_nicam(struct cx88_core *core);
533 549
534/* ----------------------------------------------------------- */ 550/* ----------------------------------------------------------- */
535/* cx88-input.c */ 551/* cx88-input.c */
@@ -541,7 +557,8 @@ void cx88_ir_irq(struct cx88_core *core);
541/* ----------------------------------------------------------- */ 557/* ----------------------------------------------------------- */
542/* cx88-mpeg.c */ 558/* cx88-mpeg.c */
543 559
544int cx8802_buf_prepare(struct cx8802_dev *dev, struct cx88_buffer *buf); 560int cx8802_buf_prepare(struct cx8802_dev *dev, struct cx88_buffer *buf,
561 enum v4l2_field field);
545void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf); 562void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
546void cx8802_cancel_buffers(struct cx8802_dev *dev); 563void cx8802_cancel_buffers(struct cx8802_dev *dev);
547 564
@@ -562,6 +579,10 @@ extern int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
562extern int (*cx88_ioctl_hook)(struct inode *inode, struct file *file, 579extern int (*cx88_ioctl_hook)(struct inode *inode, struct file *file,
563 unsigned int cmd, void *arg); 580 unsigned int cmd, void *arg);
564extern unsigned int (*cx88_ioctl_translator)(unsigned int cmd); 581extern unsigned int (*cx88_ioctl_translator)(unsigned int cmd);
582void blackbird_set_params(struct cx8802_dev *dev,
583 struct v4l2_mpeg_compression *params);
584void blackbird_set_dnr_params(struct cx8802_dev *dev,
585 struct blackbird_dnr* dnr_params);
565 586
566/* 587/*
567 * Local variables: 588 * Local variables:
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 09:19:16 -0500