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-rw-r--r--drivers/media/video/cx18/cx18-io.h378
1 files changed, 378 insertions, 0 deletions
diff --git a/drivers/media/video/cx18/cx18-io.h b/drivers/media/video/cx18/cx18-io.h
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index 000000000000..197d4fbd9f95
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1/*
2 * cx18 driver PCI memory mapped IO access routines
3 *
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
5 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20 * 02111-1307 USA
21 */
22
23#ifndef CX18_IO_H
24#define CX18_IO_H
25
26#include "cx18-driver.h"
27
28static inline void cx18_io_delay(struct cx18 *cx)
29{
30 if (cx->options.mmio_ndelay)
31 ndelay(cx->options.mmio_ndelay);
32}
33
34/*
35 * Readback and retry of MMIO access for reliability:
36 * The concept was suggested by Steve Toth <stoth@linuxtv.org>.
37 * The implmentation is the fault of Andy Walls <awalls@radix.net>.
38 */
39
40/* Statistics gathering */
41static inline
42void cx18_log_write_retries(struct cx18 *cx, int i, const void *addr)
43{
44 if (i > CX18_MAX_MMIO_RETRIES)
45 i = CX18_MAX_MMIO_RETRIES;
46 atomic_inc(&cx->mmio_stats.retried_write[i]);
47 return;
48}
49
50static inline
51void cx18_log_read_retries(struct cx18 *cx, int i, const void *addr)
52{
53 if (i > CX18_MAX_MMIO_RETRIES)
54 i = CX18_MAX_MMIO_RETRIES;
55 atomic_inc(&cx->mmio_stats.retried_read[i]);
56 return;
57}
58
59void cx18_log_statistics(struct cx18 *cx);
60
61/* Non byteswapping memory mapped IO */
62static inline
63void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
64{
65 __raw_writel(val, addr);
66 cx18_io_delay(cx);
67}
68
69void cx18_raw_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr);
70
71static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr)
72{
73 if (cx18_retry_mmio)
74 cx18_raw_writel_retry(cx, val, addr);
75 else
76 cx18_raw_writel_noretry(cx, val, addr);
77}
78
79
80static inline
81u32 cx18_raw_readl_noretry(struct cx18 *cx, const void __iomem *addr)
82{
83 u32 ret = __raw_readl(addr);
84 cx18_io_delay(cx);
85 return ret;
86}
87
88u32 cx18_raw_readl_retry(struct cx18 *cx, const void __iomem *addr);
89
90static inline u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr)
91{
92 if (cx18_retry_mmio)
93 return cx18_raw_readl_retry(cx, addr);
94
95 return cx18_raw_readl_noretry(cx, addr);
96}
97
98
99static inline
100u16 cx18_raw_readw_noretry(struct cx18 *cx, const void __iomem *addr)
101{
102 u16 ret = __raw_readw(addr);
103 cx18_io_delay(cx);
104 return ret;
105}
106
107u16 cx18_raw_readw_retry(struct cx18 *cx, const void __iomem *addr);
108
109static inline u16 cx18_raw_readw(struct cx18 *cx, const void __iomem *addr)
110{
111 if (cx18_retry_mmio)
112 return cx18_raw_readw_retry(cx, addr);
113
114 return cx18_raw_readw_noretry(cx, addr);
115}
116
117
118/* Normal memory mapped IO */
119static inline
120void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
121{
122 writel(val, addr);
123 cx18_io_delay(cx);
124}
125
126void cx18_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr);
127
128static inline void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr)
129{
130 if (cx18_retry_mmio)
131 cx18_writel_retry(cx, val, addr);
132 else
133 cx18_writel_noretry(cx, val, addr);
134}
135
136
137static inline
138void cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr)
139{
140 writew(val, addr);
141 cx18_io_delay(cx);
142}
143
144void cx18_writew_retry(struct cx18 *cx, u16 val, void __iomem *addr);
145
146static inline void cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr)
147{
148 if (cx18_retry_mmio)
149 cx18_writew_retry(cx, val, addr);
150 else
151 cx18_writew_noretry(cx, val, addr);
152}
153
154
155static inline
156void cx18_writeb_noretry(struct cx18 *cx, u8 val, void __iomem *addr)
157{
158 writeb(val, addr);
159 cx18_io_delay(cx);
160}
161
162void cx18_writeb_retry(struct cx18 *cx, u8 val, void __iomem *addr);
163
164static inline void cx18_writeb(struct cx18 *cx, u8 val, void __iomem *addr)
165{
166 if (cx18_retry_mmio)
167 cx18_writeb_retry(cx, val, addr);
168 else
169 cx18_writeb_noretry(cx, val, addr);
170}
171
172
173static inline u32 cx18_readl_noretry(struct cx18 *cx, const void __iomem *addr)
174{
175 u32 ret = readl(addr);
176 cx18_io_delay(cx);
177 return ret;
178}
179
180u32 cx18_readl_retry(struct cx18 *cx, const void __iomem *addr);
181
182static inline u32 cx18_readl(struct cx18 *cx, const void __iomem *addr)
183{
184 if (cx18_retry_mmio)
185 return cx18_readl_retry(cx, addr);
186
187 return cx18_readl_noretry(cx, addr);
188}
189
190
191static inline u16 cx18_readw_noretry(struct cx18 *cx, const void __iomem *addr)
192{
193 u16 ret = readw(addr);
194 cx18_io_delay(cx);
195 return ret;
196}
197
198u16 cx18_readw_retry(struct cx18 *cx, const void __iomem *addr);
199
200static inline u16 cx18_readw(struct cx18 *cx, const void __iomem *addr)
201{
202 if (cx18_retry_mmio)
203 return cx18_readw_retry(cx, addr);
204
205 return cx18_readw_noretry(cx, addr);
206}
207
208
209static inline u8 cx18_readb_noretry(struct cx18 *cx, const void __iomem *addr)
210{
211 u8 ret = readb(addr);
212 cx18_io_delay(cx);
213 return ret;
214}
215
216u8 cx18_readb_retry(struct cx18 *cx, const void __iomem *addr);
217
218static inline u8 cx18_readb(struct cx18 *cx, const void __iomem *addr)
219{
220 if (cx18_retry_mmio)
221 return cx18_readb_retry(cx, addr);
222
223 return cx18_readb_noretry(cx, addr);
224}
225
226
227static inline
228u32 cx18_write_sync_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
229{
230 cx18_writel_noretry(cx, val, addr);
231 return cx18_readl_noretry(cx, addr);
232}
233
234static inline
235u32 cx18_write_sync_retry(struct cx18 *cx, u32 val, void __iomem *addr)
236{
237 cx18_writel_retry(cx, val, addr);
238 return cx18_readl_retry(cx, addr);
239}
240
241static inline u32 cx18_write_sync(struct cx18 *cx, u32 val, void __iomem *addr)
242{
243 if (cx18_retry_mmio)
244 return cx18_write_sync_retry(cx, val, addr);
245
246 return cx18_write_sync_noretry(cx, val, addr);
247}
248
249
250void cx18_memcpy_fromio(struct cx18 *cx, void *to,
251 const void __iomem *from, unsigned int len);
252void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count);
253
254
255/* Access "register" region of CX23418 memory mapped I/O */
256static inline void cx18_write_reg_noretry(struct cx18 *cx, u32 val, u32 reg)
257{
258 cx18_writel_noretry(cx, val, cx->reg_mem + reg);
259}
260
261static inline void cx18_write_reg_retry(struct cx18 *cx, u32 val, u32 reg)
262{
263 cx18_writel_retry(cx, val, cx->reg_mem + reg);
264}
265
266static inline void cx18_write_reg(struct cx18 *cx, u32 val, u32 reg)
267{
268 if (cx18_retry_mmio)
269 cx18_write_reg_retry(cx, val, reg);
270 else
271 cx18_write_reg_noretry(cx, val, reg);
272}
273
274
275static inline u32 cx18_read_reg_noretry(struct cx18 *cx, u32 reg)
276{
277 return cx18_readl_noretry(cx, cx->reg_mem + reg);
278}
279
280static inline u32 cx18_read_reg_retry(struct cx18 *cx, u32 reg)
281{
282 return cx18_readl_retry(cx, cx->reg_mem + reg);
283}
284
285static inline u32 cx18_read_reg(struct cx18 *cx, u32 reg)
286{
287 if (cx18_retry_mmio)
288 return cx18_read_reg_retry(cx, reg);
289
290 return cx18_read_reg_noretry(cx, reg);
291}
292
293
294static inline u32 cx18_write_reg_sync_noretry(struct cx18 *cx, u32 val, u32 reg)
295{
296 return cx18_write_sync_noretry(cx, val, cx->reg_mem + reg);
297}
298
299static inline u32 cx18_write_reg_sync_retry(struct cx18 *cx, u32 val, u32 reg)
300{
301 return cx18_write_sync_retry(cx, val, cx->reg_mem + reg);
302}
303
304static inline u32 cx18_write_reg_sync(struct cx18 *cx, u32 val, u32 reg)
305{
306 if (cx18_retry_mmio)
307 return cx18_write_reg_sync_retry(cx, val, reg);
308
309 return cx18_write_reg_sync_noretry(cx, val, reg);
310}
311
312
313/* Access "encoder memory" region of CX23418 memory mapped I/O */
314static inline void cx18_write_enc_noretry(struct cx18 *cx, u32 val, u32 addr)
315{
316 cx18_writel_noretry(cx, val, cx->enc_mem + addr);
317}
318
319static inline void cx18_write_enc_retry(struct cx18 *cx, u32 val, u32 addr)
320{
321 cx18_writel_retry(cx, val, cx->enc_mem + addr);
322}
323
324static inline void cx18_write_enc(struct cx18 *cx, u32 val, u32 addr)
325{
326 if (cx18_retry_mmio)
327 cx18_write_enc_retry(cx, val, addr);
328 else
329 cx18_write_enc_noretry(cx, val, addr);
330}
331
332
333static inline u32 cx18_read_enc_noretry(struct cx18 *cx, u32 addr)
334{
335 return cx18_readl_noretry(cx, cx->enc_mem + addr);
336}
337
338static inline u32 cx18_read_enc_retry(struct cx18 *cx, u32 addr)
339{
340 return cx18_readl_retry(cx, cx->enc_mem + addr);
341}
342
343static inline u32 cx18_read_enc(struct cx18 *cx, u32 addr)
344{
345 if (cx18_retry_mmio)
346 return cx18_read_enc_retry(cx, addr);
347
348 return cx18_read_enc_noretry(cx, addr);
349}
350
351static inline
352u32 cx18_write_enc_sync_noretry(struct cx18 *cx, u32 val, u32 addr)
353{
354 return cx18_write_sync_noretry(cx, val, cx->enc_mem + addr);
355}
356
357static inline
358u32 cx18_write_enc_sync_retry(struct cx18 *cx, u32 val, u32 addr)
359{
360 return cx18_write_sync_retry(cx, val, cx->enc_mem + addr);
361}
362
363static inline
364u32 cx18_write_enc_sync(struct cx18 *cx, u32 val, u32 addr)
365{
366 if (cx18_retry_mmio)
367 return cx18_write_enc_sync_retry(cx, val, addr);
368
369 return cx18_write_enc_sync_noretry(cx, val, addr);
370}
371
372void cx18_sw1_irq_enable(struct cx18 *cx, u32 val);
373void cx18_sw1_irq_disable(struct cx18 *cx, u32 val);
374void cx18_sw2_irq_enable(struct cx18 *cx, u32 val);
375void cx18_sw2_irq_disable(struct cx18 *cx, u32 val);
376void cx18_setup_page(struct cx18 *cx, u32 addr);
377
378#endif /* CX18_IO_H */