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path: root/drivers/media/video/cx18/cx18-io.c
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Diffstat (limited to 'drivers/media/video/cx18/cx18-io.c')
-rw-r--r--drivers/media/video/cx18/cx18-io.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/media/video/cx18/cx18-io.c b/drivers/media/video/cx18/cx18-io.c
index 700ab9439c16..220fae8d4ad7 100644
--- a/drivers/media/video/cx18/cx18-io.c
+++ b/drivers/media/video/cx18/cx18-io.c
@@ -88,6 +88,19 @@ void cx18_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr)
88 cx18_log_write_retries(cx, i, addr); 88 cx18_log_write_retries(cx, i, addr);
89} 89}
90 90
91void _cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr,
92 u32 eval, u32 mask)
93{
94 int i;
95 eval &= mask;
96 for (i = 0; i < CX18_MAX_MMIO_RETRIES; i++) {
97 cx18_writel_noretry(cx, val, addr);
98 if (eval == (cx18_readl_noretry(cx, addr) & mask))
99 break;
100 }
101 cx18_log_write_retries(cx, i, addr);
102}
103
91void cx18_writew_retry(struct cx18 *cx, u16 val, void __iomem *addr) 104void cx18_writew_retry(struct cx18 *cx, u16 val, void __iomem *addr)
92{ 105{
93 int i; 106 int i;
@@ -218,7 +231,7 @@ void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
218void cx18_sw1_irq_enable(struct cx18 *cx, u32 val) 231void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
219{ 232{
220 u32 r; 233 u32 r;
221 cx18_write_reg(cx, val, SW1_INT_STATUS); 234 cx18_write_reg_expect(cx, val, SW1_INT_STATUS, ~val, val);
222 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI); 235 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
223 cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI); 236 cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI);
224} 237}
@@ -233,7 +246,7 @@ void cx18_sw1_irq_disable(struct cx18 *cx, u32 val)
233void cx18_sw2_irq_enable(struct cx18 *cx, u32 val) 246void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
234{ 247{
235 u32 r; 248 u32 r;
236 cx18_write_reg(cx, val, SW2_INT_STATUS); 249 cx18_write_reg_expect(cx, val, SW2_INT_STATUS, ~val, val);
237 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI); 250 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
238 cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI); 251 cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI);
239} 252}