1 files changed, 18 insertions, 13 deletions

diff --git a/drivers/media/video/cx18/cx18-i2c.c b/drivers/media/video/cx18/cx18-i2c.c
index aa09e557b195..8941f58bed7f 100644
--- a/drivers/media/video/cx18/cx18-i2c.c
+++ b/drivers/media/video/cx18/cx18-i2c.c
@@ -4,6 +4,7 @@
  *  Derived from ivtv-i2c.c
  *
  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
+ *  Copyright (C) 2008  Andy Walls <awalls@radix.net>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -27,6 +28,7 @@
 #include "cx18-gpio.h"
 #include "cx18-av-core.h"
 #include "cx18-i2c.h"
+#include "cx18-irq.h"
 
 #define CX18_REG_I2C_1_WR   0xf15000
 #define CX18_REG_I2C_1_RD   0xf15008
@@ -160,9 +162,9 @@ static void cx18_setscl(void *data, int state)
         u32 r = cx18_read_reg(cx, addr);
 
         if (state)
-                cx18_write_reg_sync(cx, r | SETSCL_BIT, addr);
+                cx18_write_reg(cx, r | SETSCL_BIT, addr);
         else
-                cx18_write_reg_sync(cx, r & ~SETSCL_BIT, addr);
+                cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
 }
 
 static void cx18_setsda(void *data, int state)
@@ -173,9 +175,9 @@ static void cx18_setsda(void *data, int state)
         u32 r = cx18_read_reg(cx, addr);
 
         if (state)
-                cx18_write_reg_sync(cx, r | SETSDL_BIT, addr);
+                cx18_write_reg(cx, r | SETSDL_BIT, addr);
         else
-                cx18_write_reg_sync(cx, r & ~SETSDL_BIT, addr);
+                cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
 }
 
 static int cx18_getscl(void *data)
@@ -396,30 +398,33 @@ int init_cx18_i2c(struct cx18 *cx)
         if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
                 /* Reset/Unreset I2C hardware block */
                 /* Clock select 220MHz */
-                cx18_write_reg(cx, 0x10000000, 0xc71004);
+                cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
+                                          0x00000000, 0x10001000);
                 /* Clock Enable */
-                cx18_write_reg_sync(cx, 0x10001000, 0xc71024);
+                cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
+                                          0x00001000, 0x10001000);
         }
         /* courtesy of Steven Toth <stoth@hauppauge.com> */
-        cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c);
+        cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
         mdelay(10);
-        cx18_write_reg_sync(cx, 0x00c000c0, 0xc7001c);
+        cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
         mdelay(10);
-        cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c);
+        cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
         mdelay(10);
 
         /* Set to edge-triggered intrs. */
-        cx18_write_reg_sync(cx, 0x00c00000, 0xc730c8);
+        cx18_write_reg(cx, 0x00c00000, 0xc730c8);
         /* Clear any stale intrs */
-        cx18_write_reg_sync(cx, 0x00c00000, 0xc730c4);
+        cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
+                       ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
 
         /* Hw I2C1 Clock Freq ~100kHz */
-        cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
+        cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
         cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
         cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
 
         /* Hw I2C2 Clock Freq ~100kHz */
-        cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
+        cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
         cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
         cx18_setsda(&cx->i2c_algo_cb_data[1], 1);