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path: root/drivers/media/video/cx18/cx18-gpio.c
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Diffstat (limited to 'drivers/media/video/cx18/cx18-gpio.c')
-rw-r--r--drivers/media/video/cx18/cx18-gpio.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/media/video/cx18/cx18-gpio.c b/drivers/media/video/cx18/cx18-gpio.c
index d753a40973ba..3d495dba4983 100644
--- a/drivers/media/video/cx18/cx18-gpio.c
+++ b/drivers/media/video/cx18/cx18-gpio.c
@@ -83,6 +83,47 @@ void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
83 mutex_unlock(&cx->gpio_lock); 83 mutex_unlock(&cx->gpio_lock);
84} 84}
85 85
86void cx18_reset_ir_gpio(void *data)
87{
88 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
89 const struct cx18_gpio_i2c_slave_reset *p;
90
91 p = &cx->card->gpio_i2c_slave_reset;
92
93 if (p->ir_reset_mask == 0)
94 return;
95
96 CX18_DEBUG_INFO("Resetting IR microcontroller\n");
97
98 /*
99 Assert timing for the Z8F0811 on HVR-1600 boards:
100 1. Assert RESET for min of 4 clock cycles at 18.432 MHz to initiate
101 2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock cycles
102 (6,601,085 nanoseconds ~= 7 milliseconds)
103 3. DBG pin must be high before chip exits reset for normal operation.
104 DBG is open drain and hopefully pulled high since we don't
105 normally drive it (GPIO 1?) for the HVR-1600
106 4. Z8F0811 won't exit reset until RESET is deasserted
107 */
108 mutex_lock(&cx->gpio_lock);
109 cx->gpio_val = cx->gpio_val & ~p->ir_reset_mask;
110 gpio_write(cx);
111 mutex_unlock(&cx->gpio_lock);
112 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
113
114 /*
115 Zilog comes out of reset, loads reset vector address and executes
116 from there. Required recovery delay unknown.
117 */
118 mutex_lock(&cx->gpio_lock);
119 cx->gpio_val = cx->gpio_val | p->ir_reset_mask;
120 gpio_write(cx);
121 mutex_unlock(&cx->gpio_lock);
122 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
123}
124EXPORT_SYMBOL(cx18_reset_ir_gpio);
125/* This symbol is exported for use by an infrared module for the IR-blaster */
126
86void cx18_gpio_init(struct cx18 *cx) 127void cx18_gpio_init(struct cx18 *cx)
87{ 128{
88 mutex_lock(&cx->gpio_lock); 129 mutex_lock(&cx->gpio_lock);