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path: root/drivers/media/video/cx18/cx18-gpio.c
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Diffstat (limited to 'drivers/media/video/cx18/cx18-gpio.c')
-rw-r--r--drivers/media/video/cx18/cx18-gpio.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/media/video/cx18/cx18-gpio.c b/drivers/media/video/cx18/cx18-gpio.c
index 089bad6d85a0..d753a40973ba 100644
--- a/drivers/media/video/cx18/cx18-gpio.c
+++ b/drivers/media/video/cx18/cx18-gpio.c
@@ -69,6 +69,7 @@ void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
69 /* Assuming that the masks are a subset of the bits in gpio_dir */ 69 /* Assuming that the masks are a subset of the bits in gpio_dir */
70 70
71 /* Assert */ 71 /* Assert */
72 mutex_lock(&cx->gpio_lock);
72 cx->gpio_val = 73 cx->gpio_val =
73 (cx->gpio_val | p->active_hi_mask) & ~(p->active_lo_mask); 74 (cx->gpio_val | p->active_hi_mask) & ~(p->active_lo_mask);
74 gpio_write(cx); 75 gpio_write(cx);
@@ -79,10 +80,12 @@ void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
79 (cx->gpio_val | p->active_lo_mask) & ~(p->active_hi_mask); 80 (cx->gpio_val | p->active_lo_mask) & ~(p->active_hi_mask);
80 gpio_write(cx); 81 gpio_write(cx);
81 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery)); 82 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
83 mutex_unlock(&cx->gpio_lock);
82} 84}
83 85
84void cx18_gpio_init(struct cx18 *cx) 86void cx18_gpio_init(struct cx18 *cx)
85{ 87{
88 mutex_lock(&cx->gpio_lock);
86 cx->gpio_dir = cx->card->gpio_init.direction; 89 cx->gpio_dir = cx->card->gpio_init.direction;
87 cx->gpio_val = cx->card->gpio_init.initial_value; 90 cx->gpio_val = cx->card->gpio_init.initial_value;
88 91
@@ -91,14 +94,17 @@ void cx18_gpio_init(struct cx18 *cx)
91 cx->gpio_val |= 1 << cx->card->xceive_pin; 94 cx->gpio_val |= 1 << cx->card->xceive_pin;
92 } 95 }
93 96
94 if (cx->gpio_dir == 0) 97 if (cx->gpio_dir == 0) {
98 mutex_unlock(&cx->gpio_lock);
95 return; 99 return;
100 }
96 101
97 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n", 102 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n",
98 read_reg(CX18_REG_GPIO_DIR1), read_reg(CX18_REG_GPIO_DIR2), 103 read_reg(CX18_REG_GPIO_DIR1), read_reg(CX18_REG_GPIO_DIR2),
99 read_reg(CX18_REG_GPIO_OUT1), read_reg(CX18_REG_GPIO_OUT2)); 104 read_reg(CX18_REG_GPIO_OUT1), read_reg(CX18_REG_GPIO_OUT2));
100 105
101 gpio_write(cx); 106 gpio_write(cx);
107 mutex_unlock(&cx->gpio_lock);
102} 108}
103 109
104/* Xceive tuner reset function */ 110/* Xceive tuner reset function */
@@ -112,13 +118,16 @@ int cx18_reset_tuner_gpio(void *dev, int cmd, int value)
112 return 0; 118 return 0;
113 CX18_DEBUG_INFO("Resetting tuner\n"); 119 CX18_DEBUG_INFO("Resetting tuner\n");
114 120
121 mutex_lock(&cx->gpio_lock);
115 cx->gpio_val &= ~(1 << cx->card->xceive_pin); 122 cx->gpio_val &= ~(1 << cx->card->xceive_pin);
116
117 gpio_write(cx); 123 gpio_write(cx);
124 mutex_unlock(&cx->gpio_lock);
118 schedule_timeout_interruptible(msecs_to_jiffies(1)); 125 schedule_timeout_interruptible(msecs_to_jiffies(1));
119 126
127 mutex_lock(&cx->gpio_lock);
120 cx->gpio_val |= 1 << cx->card->xceive_pin; 128 cx->gpio_val |= 1 << cx->card->xceive_pin;
121 gpio_write(cx); 129 gpio_write(cx);
130 mutex_unlock(&cx->gpio_lock);
122 schedule_timeout_interruptible(msecs_to_jiffies(1)); 131 schedule_timeout_interruptible(msecs_to_jiffies(1));
123 return 0; 132 return 0;
124} 133}
@@ -151,8 +160,10 @@ int cx18_gpio(struct cx18 *cx, unsigned int command, void *arg)
151 return -EINVAL; 160 return -EINVAL;
152 } 161 }
153 if (mask) { 162 if (mask) {
163 mutex_lock(&cx->gpio_lock);
154 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask); 164 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask);
155 gpio_write(cx); 165 gpio_write(cx);
166 mutex_unlock(&cx->gpio_lock);
156 } 167 }
157 return 0; 168 return 0;
158} 169}