diff options
Diffstat (limited to 'drivers/media/video/cx18/cx18-firmware.c')
-rw-r--r-- | drivers/media/video/cx18/cx18-firmware.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/media/video/cx18/cx18-firmware.c b/drivers/media/video/cx18/cx18-firmware.c index 06f5563d6d5a..d9c5f55ab17c 100644 --- a/drivers/media/video/cx18/cx18-firmware.c +++ b/drivers/media/video/cx18/cx18-firmware.c | |||
@@ -153,7 +153,7 @@ static int load_apu_fw_direct(const char *fn, u8 __iomem *dst, struct cx18 *cx, | |||
153 | return -ENOMEM; | 153 | return -ENOMEM; |
154 | } | 154 | } |
155 | 155 | ||
156 | *entry_addr = 0xffffffff; | 156 | *entry_addr = 0; |
157 | src = (const u32 *)fw->data; | 157 | src = (const u32 *)fw->data; |
158 | vers = fw->data + sizeof(seghdr); | 158 | vers = fw->data + sizeof(seghdr); |
159 | sz = fw->size; | 159 | sz = fw->size; |
@@ -170,7 +170,7 @@ static int load_apu_fw_direct(const char *fn, u8 __iomem *dst, struct cx18 *cx, | |||
170 | } | 170 | } |
171 | CX18_DEBUG_INFO("load segment %x-%x\n", seghdr.addr, | 171 | CX18_DEBUG_INFO("load segment %x-%x\n", seghdr.addr, |
172 | seghdr.addr + seghdr.size - 1); | 172 | seghdr.addr + seghdr.size - 1); |
173 | if (*entry_addr == 0xffffffff) | 173 | if (*entry_addr == 0) |
174 | *entry_addr = seghdr.addr; | 174 | *entry_addr = seghdr.addr; |
175 | if (offset + seghdr.size > sz) | 175 | if (offset + seghdr.size > sz) |
176 | break; | 176 | break; |
@@ -340,10 +340,13 @@ int cx18_firmware_init(struct cx18 *cx) | |||
340 | 340 | ||
341 | /* Only if the processor is not running */ | 341 | /* Only if the processor is not running */ |
342 | if (cx18_read_reg(cx, CX18_PROC_SOFT_RESET) & 8) { | 342 | if (cx18_read_reg(cx, CX18_PROC_SOFT_RESET) & 8) { |
343 | u32 fw_entry_addr; | 343 | u32 fw_entry_addr = 0; |
344 | int sz = load_apu_fw_direct("v4l-cx23418-apu.fw", | 344 | int sz = load_apu_fw_direct("v4l-cx23418-apu.fw", |
345 | cx->enc_mem, cx, &fw_entry_addr); | 345 | cx->enc_mem, cx, &fw_entry_addr); |
346 | 346 | ||
347 | if (sz <= 0) | ||
348 | return sz; | ||
349 | |||
347 | /* Clear bit0 for APU to start from 0 */ | 350 | /* Clear bit0 for APU to start from 0 */ |
348 | cx18_write_reg(cx, cx18_read_reg(cx, 0xc72030) & ~1, 0xc72030); | 351 | cx18_write_reg(cx, cx18_read_reg(cx, 0xc72030) & ~1, 0xc72030); |
349 | 352 | ||