diff options
Diffstat (limited to 'drivers/media/video/cx18/cx18-av-firmware.c')
-rw-r--r-- | drivers/media/video/cx18/cx18-av-firmware.c | 72 |
1 files changed, 45 insertions, 27 deletions
diff --git a/drivers/media/video/cx18/cx18-av-firmware.c b/drivers/media/video/cx18/cx18-av-firmware.c index a1a6af6c1c8f..834b9248242e 100644 --- a/drivers/media/video/cx18/cx18-av-firmware.c +++ b/drivers/media/video/cx18/cx18-av-firmware.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include "cx18-driver.h" | 22 | #include "cx18-driver.h" |
23 | #include <linux/firmware.h> | 23 | #include <linux/firmware.h> |
24 | 24 | ||
25 | #define CX18_AUDIO_ENABLE 0xc72014 | ||
25 | #define FWFILE "v4l-cx23418-dig.fw" | 26 | #define FWFILE "v4l-cx23418-dig.fw" |
26 | 27 | ||
27 | int cx18_av_loadfw(struct cx18 *cx) | 28 | int cx18_av_loadfw(struct cx18 *cx) |
@@ -31,40 +32,58 @@ int cx18_av_loadfw(struct cx18 *cx) | |||
31 | u32 v; | 32 | u32 v; |
32 | const u8 *ptr; | 33 | const u8 *ptr; |
33 | int i; | 34 | int i; |
35 | int retries = 0; | ||
34 | 36 | ||
35 | if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) { | 37 | if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) { |
36 | CX18_ERR("unable to open firmware %s\n", FWFILE); | 38 | CX18_ERR("unable to open firmware %s\n", FWFILE); |
37 | return -EINVAL; | 39 | return -EINVAL; |
38 | } | 40 | } |
39 | 41 | ||
40 | cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000); | 42 | /* The firmware load often has byte errors, so allow for several |
41 | cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6); /* Byte 0 */ | 43 | retries, both at byte level and at the firmware load level. */ |
42 | 44 | while (retries < 5) { | |
43 | /* Reset the Mako core (Register is undocumented.) */ | 45 | cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000); |
44 | cx18_av_write4(cx, 0x8100, 0x00010000); | 46 | cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6); |
45 | 47 | ||
46 | /* Put the 8051 in reset and enable firmware upload */ | 48 | /* Reset the Mako core (Register is undocumented.) */ |
47 | cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000); | 49 | cx18_av_write4(cx, 0x8100, 0x00010000); |
48 | 50 | ||
49 | ptr = fw->data; | 51 | /* Put the 8051 in reset and enable firmware upload */ |
50 | size = fw->size; | 52 | cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000); |
51 | 53 | ||
52 | for (i = 0; i < size; i++) { | 54 | ptr = fw->data; |
53 | u32 dl_control = 0x0F000000 | ((u32)ptr[i] << 16); | 55 | size = fw->size; |
54 | u32 value = 0; | 56 | |
55 | int retries; | 57 | for (i = 0; i < size; i++) { |
56 | 58 | u32 dl_control = 0x0F000000 | i | ((u32)ptr[i] << 16); | |
57 | for (retries = 0; retries < 5; retries++) { | 59 | u32 value = 0; |
58 | cx18_av_write4(cx, CXADEC_DL_CTL, dl_control); | 60 | int retries; |
59 | value = cx18_av_read4(cx, CXADEC_DL_CTL); | 61 | |
60 | if ((value & 0x3F00) == (dl_control & 0x3F00)) | 62 | for (retries = 0; retries < 5; retries++) { |
63 | cx18_av_write4(cx, CXADEC_DL_CTL, dl_control); | ||
64 | udelay(10); | ||
65 | value = cx18_av_read4(cx, CXADEC_DL_CTL); | ||
66 | if (value == dl_control) | ||
67 | break; | ||
68 | /* Check if we can correct the byte by changing | ||
69 | the address. We can only write the lower | ||
70 | address byte of the address. */ | ||
71 | if ((value & 0x3F00) != (dl_control & 0x3F00)) { | ||
72 | retries = 5; | ||
73 | break; | ||
74 | } | ||
75 | } | ||
76 | if (retries >= 5) | ||
61 | break; | 77 | break; |
62 | } | 78 | } |
63 | if (retries >= 5) { | 79 | if (i == size) |
64 | CX18_ERR("unable to load firmware %s\n", FWFILE); | 80 | break; |
65 | release_firmware(fw); | 81 | retries++; |
66 | return -EIO; | 82 | } |
67 | } | 83 | if (retries >= 5) { |
84 | CX18_ERR("unable to load firmware %s\n", FWFILE); | ||
85 | release_firmware(fw); | ||
86 | return -EIO; | ||
68 | } | 87 | } |
69 | 88 | ||
70 | cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 | fw->size); | 89 | cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 | fw->size); |
@@ -100,7 +119,6 @@ int cx18_av_loadfw(struct cx18 *cx) | |||
100 | have a name in the spec. */ | 119 | have a name in the spec. */ |
101 | cx18_av_write4(cx, 0x09CC, 1); | 120 | cx18_av_write4(cx, 0x09CC, 1); |
102 | 121 | ||
103 | #define CX18_AUDIO_ENABLE 0xc72014 | ||
104 | v = read_reg(CX18_AUDIO_ENABLE); | 122 | v = read_reg(CX18_AUDIO_ENABLE); |
105 | /* If bit 11 is 1 */ | 123 | /* If bit 11 is 1 */ |
106 | if (v & 0x800) | 124 | if (v & 0x800) |