diff options
Diffstat (limited to 'drivers/media/platform/s5p-fimc/fimc-lite-reg.c')
-rw-r--r-- | drivers/media/platform/s5p-fimc/fimc-lite-reg.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/media/platform/s5p-fimc/fimc-lite-reg.c b/drivers/media/platform/s5p-fimc/fimc-lite-reg.c index a22d7eb05c82..f0af0754a7b4 100644 --- a/drivers/media/platform/s5p-fimc/fimc-lite-reg.c +++ b/drivers/media/platform/s5p-fimc/fimc-lite-reg.c | |||
@@ -65,7 +65,7 @@ void flite_hw_set_interrupt_mask(struct fimc_lite *dev) | |||
65 | u32 cfg, intsrc; | 65 | u32 cfg, intsrc; |
66 | 66 | ||
67 | /* Select interrupts to be enabled for each output mode */ | 67 | /* Select interrupts to be enabled for each output mode */ |
68 | if (dev->out_path == FIMC_IO_DMA) { | 68 | if (atomic_read(&dev->out_path) == FIMC_IO_DMA) { |
69 | intsrc = FLITE_REG_CIGCTRL_IRQ_OVFEN | | 69 | intsrc = FLITE_REG_CIGCTRL_IRQ_OVFEN | |
70 | FLITE_REG_CIGCTRL_IRQ_LASTEN | | 70 | FLITE_REG_CIGCTRL_IRQ_LASTEN | |
71 | FLITE_REG_CIGCTRL_IRQ_STARTEN; | 71 | FLITE_REG_CIGCTRL_IRQ_STARTEN; |
@@ -187,12 +187,12 @@ static void flite_hw_set_camera_port(struct fimc_lite *dev, int id) | |||
187 | 187 | ||
188 | /* Select serial or parallel bus, camera port (A,B) and set signals polarity */ | 188 | /* Select serial or parallel bus, camera port (A,B) and set signals polarity */ |
189 | void flite_hw_set_camera_bus(struct fimc_lite *dev, | 189 | void flite_hw_set_camera_bus(struct fimc_lite *dev, |
190 | struct s5p_fimc_isp_info *s_info) | 190 | struct fimc_source_info *si) |
191 | { | 191 | { |
192 | u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); | 192 | u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); |
193 | unsigned int flags = s_info->flags; | 193 | unsigned int flags = si->flags; |
194 | 194 | ||
195 | if (s_info->bus_type != FIMC_MIPI_CSI2) { | 195 | if (si->sensor_bus_type != FIMC_BUS_TYPE_MIPI_CSI2) { |
196 | cfg &= ~(FLITE_REG_CIGCTRL_SELCAM_MIPI | | 196 | cfg &= ~(FLITE_REG_CIGCTRL_SELCAM_MIPI | |
197 | FLITE_REG_CIGCTRL_INVPOLPCLK | | 197 | FLITE_REG_CIGCTRL_INVPOLPCLK | |
198 | FLITE_REG_CIGCTRL_INVPOLVSYNC | | 198 | FLITE_REG_CIGCTRL_INVPOLVSYNC | |
@@ -212,7 +212,7 @@ void flite_hw_set_camera_bus(struct fimc_lite *dev, | |||
212 | 212 | ||
213 | writel(cfg, dev->regs + FLITE_REG_CIGCTRL); | 213 | writel(cfg, dev->regs + FLITE_REG_CIGCTRL); |
214 | 214 | ||
215 | flite_hw_set_camera_port(dev, s_info->mux_id); | 215 | flite_hw_set_camera_port(dev, si->mux_id); |
216 | } | 216 | } |
217 | 217 | ||
218 | static void flite_hw_set_out_order(struct fimc_lite *dev, struct flite_frame *f) | 218 | static void flite_hw_set_out_order(struct fimc_lite *dev, struct flite_frame *f) |
@@ -292,9 +292,11 @@ void flite_hw_dump_regs(struct fimc_lite *dev, const char *label) | |||
292 | }; | 292 | }; |
293 | u32 i; | 293 | u32 i; |
294 | 294 | ||
295 | pr_info("--- %s ---\n", label); | 295 | v4l2_info(&dev->subdev, "--- %s ---\n", label); |
296 | |||
296 | for (i = 0; i < ARRAY_SIZE(registers); i++) { | 297 | for (i = 0; i < ARRAY_SIZE(registers); i++) { |
297 | u32 cfg = readl(dev->regs + registers[i].offset); | 298 | u32 cfg = readl(dev->regs + registers[i].offset); |
298 | pr_info("%s: %s:\t0x%08x\n", __func__, registers[i].name, cfg); | 299 | v4l2_info(&dev->subdev, "%9s: 0x%08x\n", |
300 | registers[i].name, cfg); | ||
299 | } | 301 | } |
300 | } | 302 | } |