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path: root/drivers/media/dvb/ttpci/av7110.c
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Diffstat (limited to 'drivers/media/dvb/ttpci/av7110.c')
-rw-r--r--drivers/media/dvb/ttpci/av7110.c47
1 files changed, 21 insertions, 26 deletions
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c
index f05d43d8b5cf..0777e8f9544b 100644
--- a/drivers/media/dvb/ttpci/av7110.c
+++ b/drivers/media/dvb/ttpci/av7110.c
@@ -587,7 +587,7 @@ static void gpioirq(unsigned long data)
587 } 587 }
588 DVB_RINGBUFFER_SKIP(cibuf, 2); 588 DVB_RINGBUFFER_SKIP(cibuf, 2);
589 589
590 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len, 0); 590 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len);
591 591
592 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2); 592 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
593 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2); 593 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
@@ -1198,7 +1198,6 @@ static int start_ts_capture(struct av7110 *budget)
1198 if (budget->feeding1) 1198 if (budget->feeding1)
1199 return ++budget->feeding1; 1199 return ++budget->feeding1;
1200 memset(budget->grabbing, 0x00, TS_HEIGHT * TS_WIDTH); 1200 memset(budget->grabbing, 0x00, TS_HEIGHT * TS_WIDTH);
1201 budget->tsf = 0xff;
1202 budget->ttbp = 0; 1201 budget->ttbp = 0;
1203 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */ 1202 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1204 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ 1203 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
@@ -2403,18 +2402,18 @@ static int __devinit av7110_attach(struct saa7146_dev* dev,
2403 saa7146_write(dev, MC1, MASK_29); 2402 saa7146_write(dev, MC1, MASK_29);
2404 /* RPS1 timeout disable */ 2403 /* RPS1 timeout disable */
2405 saa7146_write(dev, RPS_TOV1, 0); 2404 saa7146_write(dev, RPS_TOV1, 0);
2406 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B)); 2405 WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
2407 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); 2406 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
2408 WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); 2407 WRITE_RPS1(GPIO3_MSK);
2409 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); 2408 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
2410#if RPS_IRQ 2409#if RPS_IRQ
2411 /* issue RPS1 interrupt to increment counter */ 2410 /* issue RPS1 interrupt to increment counter */
2412 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 2411 WRITE_RPS1(CMD_INTERRUPT);
2413#endif 2412#endif
2414 WRITE_RPS1(cpu_to_le32(CMD_STOP)); 2413 WRITE_RPS1(CMD_STOP);
2415 /* Jump to begin of RPS program as safety measure (p37) */ 2414 /* Jump to begin of RPS program as safety measure (p37) */
2416 WRITE_RPS1(cpu_to_le32(CMD_JUMP)); 2415 WRITE_RPS1(CMD_JUMP);
2417 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle)); 2416 WRITE_RPS1(dev->d_rps1.dma_handle);
2418 2417
2419#if RPS_IRQ 2418#if RPS_IRQ
2420 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) 2419 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
@@ -2472,11 +2471,7 @@ static int __devinit av7110_attach(struct saa7146_dev* dev,
2472 get recognized before the main driver is fully loaded */ 2471 get recognized before the main driver is fully loaded */
2473 saa7146_write(dev, GPIO_CTRL, 0x500000); 2472 saa7146_write(dev, GPIO_CTRL, 0x500000);
2474 2473
2475#ifdef I2C_ADAP_CLASS_TV_DIGITAL
2476 av7110->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL;
2477#else
2478 av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL; 2474 av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
2479#endif
2480 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name)); 2475 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
2481 2476
2482 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */ 2477 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
@@ -2527,28 +2522,28 @@ static int __devinit av7110_attach(struct saa7146_dev* dev,
2527 count = 0; 2522 count = 0;
2528 2523
2529 /* Wait Source Line Counter Threshold (p36) */ 2524 /* Wait Source Line Counter Threshold (p36) */
2530 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS)); 2525 WRITE_RPS1(CMD_PAUSE | EVT_HS);
2531 /* Set GPIO3=1 (p42) */ 2526 /* Set GPIO3=1 (p42) */
2532 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); 2527 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
2533 WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); 2528 WRITE_RPS1(GPIO3_MSK);
2534 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24)); 2529 WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
2535#if RPS_IRQ 2530#if RPS_IRQ
2536 /* issue RPS1 interrupt */ 2531 /* issue RPS1 interrupt */
2537 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 2532 WRITE_RPS1(CMD_INTERRUPT);
2538#endif 2533#endif
2539 /* Wait reset Source Line Counter Threshold (p36) */ 2534 /* Wait reset Source Line Counter Threshold (p36) */
2540 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS)); 2535 WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
2541 /* Set GPIO3=0 (p42) */ 2536 /* Set GPIO3=0 (p42) */
2542 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); 2537 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
2543 WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); 2538 WRITE_RPS1(GPIO3_MSK);
2544 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); 2539 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
2545#if RPS_IRQ 2540#if RPS_IRQ
2546 /* issue RPS1 interrupt */ 2541 /* issue RPS1 interrupt */
2547 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 2542 WRITE_RPS1(CMD_INTERRUPT);
2548#endif 2543#endif
2549 /* Jump to begin of RPS program (p37) */ 2544 /* Jump to begin of RPS program (p37) */
2550 WRITE_RPS1(cpu_to_le32(CMD_JUMP)); 2545 WRITE_RPS1(CMD_JUMP);
2551 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle)); 2546 WRITE_RPS1(dev->d_rps1.dma_handle);
2552 2547
2553 /* Fix VSYNC level */ 2548 /* Fix VSYNC level */
2554 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); 2549 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);