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-rw-r--r--drivers/media/dvb/frontends/cx24110.c22
-rw-r--r--drivers/media/dvb/frontends/cx24110.h2
-rw-r--r--drivers/media/dvb/frontends/dib3000mb.c1
-rw-r--r--drivers/media/dvb/frontends/dib3000mc.c1
-rw-r--r--drivers/media/dvb/frontends/mt352.c6
-rw-r--r--drivers/media/dvb/frontends/nxt6000.c9
-rw-r--r--drivers/media/dvb/frontends/or51132.c29
-rw-r--r--drivers/media/dvb/frontends/s5h1420.c162
-rw-r--r--drivers/media/dvb/frontends/s5h1420.h3
-rw-r--r--drivers/media/dvb/frontends/stv0297.c129
-rw-r--r--drivers/media/dvb/frontends/stv0297.h8
-rw-r--r--drivers/media/dvb/frontends/stv0299.c19
-rw-r--r--drivers/media/dvb/frontends/stv0299.h4
-rw-r--r--drivers/media/dvb/frontends/tda1004x.c3
-rw-r--r--drivers/media/dvb/frontends/ves1820.c15
15 files changed, 173 insertions, 240 deletions
diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c
index 8222b88cb486..d4b97989e3ed 100644
--- a/drivers/media/dvb/frontends/cx24110.c
+++ b/drivers/media/dvb/frontends/cx24110.c
@@ -1,7 +1,7 @@
1/* 1/*
2 cx24110 - Single Chip Satellite Channel Receiver driver module 2 cx24110 - Single Chip Satellite Channel Receiver driver module
3 3
4 Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@t-online.de> based on 4 Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de> based on
5 work 5 work
6 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> 6 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
7 7
@@ -387,8 +387,9 @@ static int cx24110_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltag
387 387
388static int cx24110_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t burst) 388static int cx24110_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t burst)
389{ 389{
390 int rv, bit, i; 390 int rv, bit;
391 struct cx24110_state *state = fe->demodulator_priv; 391 struct cx24110_state *state = fe->demodulator_priv;
392 unsigned long timeout;
392 393
393 if (burst == SEC_MINI_A) 394 if (burst == SEC_MINI_A)
394 bit = 0x00; 395 bit = 0x00;
@@ -398,12 +399,14 @@ static int cx24110_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t
398 return -EINVAL; 399 return -EINVAL;
399 400
400 rv = cx24110_readreg(state, 0x77); 401 rv = cx24110_readreg(state, 0x77);
401 cx24110_writereg(state, 0x77, rv|0x04); 402 if (!(rv & 0x04))
403 cx24110_writereg(state, 0x77, rv | 0x04);
402 404
403 rv = cx24110_readreg(state, 0x76); 405 rv = cx24110_readreg(state, 0x76);
404 cx24110_writereg(state, 0x76, ((rv & 0x90) | 0x40 | bit)); 406 cx24110_writereg(state, 0x76, ((rv & 0x90) | 0x40 | bit));
405 for (i = 500; i-- > 0 && !(cx24110_readreg(state,0x76)&0x40) ; ) 407 timeout = jiffies + msecs_to_jiffies(100);
406 ; /* wait for LNB ready */ 408 while (!time_after(jiffies, timeout) && !(cx24110_readreg(state, 0x76) & 0x40))
409 ; /* wait for LNB ready */
407 410
408 return 0; 411 return 0;
409} 412}
@@ -413,17 +416,22 @@ static int cx24110_send_diseqc_msg(struct dvb_frontend* fe,
413{ 416{
414 int i, rv; 417 int i, rv;
415 struct cx24110_state *state = fe->demodulator_priv; 418 struct cx24110_state *state = fe->demodulator_priv;
419 unsigned long timeout;
416 420
417 for (i = 0; i < cmd->msg_len; i++) 421 for (i = 0; i < cmd->msg_len; i++)
418 cx24110_writereg(state, 0x79 + i, cmd->msg[i]); 422 cx24110_writereg(state, 0x79 + i, cmd->msg[i]);
419 423
420 rv = cx24110_readreg(state, 0x77); 424 rv = cx24110_readreg(state, 0x77);
421 cx24110_writereg(state, 0x77, rv|0x04); 425 if (rv & 0x04) {
426 cx24110_writereg(state, 0x77, rv & ~0x04);
427 msleep(30); /* reportedly fixes switching problems */
428 }
422 429
423 rv = cx24110_readreg(state, 0x76); 430 rv = cx24110_readreg(state, 0x76);
424 431
425 cx24110_writereg(state, 0x76, ((rv & 0x90) | 0x40) | ((cmd->msg_len-3) & 3)); 432 cx24110_writereg(state, 0x76, ((rv & 0x90) | 0x40) | ((cmd->msg_len-3) & 3));
426 for (i=500; i-- > 0 && !(cx24110_readreg(state,0x76)&0x40);) 433 timeout = jiffies + msecs_to_jiffies(100);
434 while (!time_after(jiffies, timeout) && !(cx24110_readreg(state, 0x76) & 0x40))
427 ; /* wait for LNB ready */ 435 ; /* wait for LNB ready */
428 436
429 return 0; 437 return 0;
diff --git a/drivers/media/dvb/frontends/cx24110.h b/drivers/media/dvb/frontends/cx24110.h
index 6b663f4744e0..b63ecf26421a 100644
--- a/drivers/media/dvb/frontends/cx24110.h
+++ b/drivers/media/dvb/frontends/cx24110.h
@@ -1,7 +1,7 @@
1/* 1/*
2 cx24110 - Single Chip Satellite Channel Receiver driver module 2 cx24110 - Single Chip Satellite Channel Receiver driver module
3 3
4 Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@t-online.de> based on 4 Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de> based on
5 work 5 work
6 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> 6 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
7 7
diff --git a/drivers/media/dvb/frontends/dib3000mb.c b/drivers/media/dvb/frontends/dib3000mb.c
index cd434b7cf9db..21433e1831e7 100644
--- a/drivers/media/dvb/frontends/dib3000mb.c
+++ b/drivers/media/dvb/frontends/dib3000mb.c
@@ -23,7 +23,6 @@
23 23
24#include <linux/config.h> 24#include <linux/config.h>
25#include <linux/kernel.h> 25#include <linux/kernel.h>
26#include <linux/version.h>
27#include <linux/module.h> 26#include <linux/module.h>
28#include <linux/moduleparam.h> 27#include <linux/moduleparam.h>
29#include <linux/init.h> 28#include <linux/init.h>
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c
index cd33705a4320..441de665fec3 100644
--- a/drivers/media/dvb/frontends/dib3000mc.c
+++ b/drivers/media/dvb/frontends/dib3000mc.c
@@ -22,7 +22,6 @@
22 */ 22 */
23#include <linux/config.h> 23#include <linux/config.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/version.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/moduleparam.h> 26#include <linux/moduleparam.h>
28#include <linux/init.h> 27#include <linux/init.h>
diff --git a/drivers/media/dvb/frontends/mt352.c b/drivers/media/dvb/frontends/mt352.c
index d32dc4de9e7f..cc1bc0edd65e 100644
--- a/drivers/media/dvb/frontends/mt352.c
+++ b/drivers/media/dvb/frontends/mt352.c
@@ -462,9 +462,11 @@ static int mt352_read_signal_strength(struct dvb_frontend* fe, u16* strength)
462{ 462{
463 struct mt352_state* state = fe->demodulator_priv; 463 struct mt352_state* state = fe->demodulator_priv;
464 464
465 u16 signal = ((mt352_read_register(state, AGC_GAIN_1) << 8) & 0x0f) | 465 /* align the 12 bit AGC gain with the most significant bits */
466 (mt352_read_register(state, AGC_GAIN_0)); 466 u16 signal = ((mt352_read_register(state, AGC_GAIN_1) & 0x0f) << 12) |
467 (mt352_read_register(state, AGC_GAIN_0) << 4);
467 468
469 /* inverse of gain is signal strength */
468 *strength = ~signal; 470 *strength = ~signal;
469 return 0; 471 return 0;
470} 472}
diff --git a/drivers/media/dvb/frontends/nxt6000.c b/drivers/media/dvb/frontends/nxt6000.c
index 966de9853d18..88a57b791112 100644
--- a/drivers/media/dvb/frontends/nxt6000.c
+++ b/drivers/media/dvb/frontends/nxt6000.c
@@ -482,6 +482,7 @@ static int nxt6000_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
482 if ((result = nxt6000_set_inversion(state, param->inversion)) < 0) 482 if ((result = nxt6000_set_inversion(state, param->inversion)) < 0)
483 return result; 483 return result;
484 484
485 msleep(500);
485 return 0; 486 return 0;
486} 487}
487 488
@@ -525,6 +526,12 @@ static int nxt6000_read_signal_strength(struct dvb_frontend* fe, u16* signal_str
525 return 0; 526 return 0;
526} 527}
527 528
529static int nxt6000_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
530{
531 tune->min_delay_ms = 500;
532 return 0;
533}
534
528static struct dvb_frontend_ops nxt6000_ops; 535static struct dvb_frontend_ops nxt6000_ops;
529 536
530struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config, 537struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
@@ -578,6 +585,8 @@ static struct dvb_frontend_ops nxt6000_ops = {
578 585
579 .init = nxt6000_init, 586 .init = nxt6000_init,
580 587
588 .get_tune_settings = nxt6000_fe_get_tune_settings,
589
581 .set_frontend = nxt6000_set_frontend, 590 .set_frontend = nxt6000_set_frontend,
582 591
583 .read_status = nxt6000_read_status, 592 .read_status = nxt6000_read_status,
diff --git a/drivers/media/dvb/frontends/or51132.c b/drivers/media/dvb/frontends/or51132.c
index cc0a77c790f1..b6d0eecc59eb 100644
--- a/drivers/media/dvb/frontends/or51132.c
+++ b/drivers/media/dvb/frontends/or51132.c
@@ -370,22 +370,19 @@ static int or51132_set_parameters(struct dvb_frontend* fe,
370 or51132_setmode(fe); 370 or51132_setmode(fe);
371 } 371 }
372 372
373 /* Change only if we are actually changing the channel */ 373 dvb_pll_configure(state->config->pll_desc, buf,
374 if (state->current_frequency != param->frequency) { 374 param->frequency, 0);
375 dvb_pll_configure(state->config->pll_desc, buf, 375 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
376 param->frequency, 0); 376 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
377 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x " 377 if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
378 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]); 378 printk(KERN_WARNING "or51132: set_parameters error "
379 if (i2c_writebytes(state, state->config->pll_address ,buf, 4)) 379 "writing to tuner\n");
380 printk(KERN_WARNING "or51132: set_parameters error " 380
381 "writing to tuner\n"); 381 /* Set to current mode */
382 382 or51132_setmode(fe);
383 /* Set to current mode */ 383
384 or51132_setmode(fe); 384 /* Update current frequency */
385 385 state->current_frequency = param->frequency;
386 /* Update current frequency */
387 state->current_frequency = param->frequency;
388 }
389 return 0; 386 return 0;
390} 387}
391 388
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c
index 4f396ac8de77..c7fe27fd530c 100644
--- a/drivers/media/dvb/frontends/s5h1420.c
+++ b/drivers/media/dvb/frontends/s5h1420.c
@@ -48,7 +48,8 @@ struct s5h1420_state {
48}; 48};
49 49
50static u32 s5h1420_getsymbolrate(struct s5h1420_state* state); 50static u32 s5h1420_getsymbolrate(struct s5h1420_state* state);
51static int s5h1420_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings); 51static int s5h1420_get_tune_settings(struct dvb_frontend* fe,
52 struct dvb_frontend_tune_settings* fesettings);
52 53
53 54
54static int debug = 0; 55static int debug = 0;
@@ -91,7 +92,8 @@ static int s5h1420_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltag
91 92
92 switch(voltage) { 93 switch(voltage) {
93 case SEC_VOLTAGE_13: 94 case SEC_VOLTAGE_13:
94 s5h1420_writereg(state, 0x3c, (s5h1420_readreg(state, 0x3c) & 0xfe) | 0x02); 95 s5h1420_writereg(state, 0x3c,
96 (s5h1420_readreg(state, 0x3c) & 0xfe) | 0x02);
95 break; 97 break;
96 98
97 case SEC_VOLTAGE_18: 99 case SEC_VOLTAGE_18:
@@ -112,18 +114,21 @@ static int s5h1420_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
112 114
113 switch(tone) { 115 switch(tone) {
114 case SEC_TONE_ON: 116 case SEC_TONE_ON:
115 s5h1420_writereg(state, 0x3b, (s5h1420_readreg(state, 0x3b) & 0x74) | 0x08); 117 s5h1420_writereg(state, 0x3b,
118 (s5h1420_readreg(state, 0x3b) & 0x74) | 0x08);
116 break; 119 break;
117 120
118 case SEC_TONE_OFF: 121 case SEC_TONE_OFF:
119 s5h1420_writereg(state, 0x3b, (s5h1420_readreg(state, 0x3b) & 0x74) | 0x01); 122 s5h1420_writereg(state, 0x3b,
123 (s5h1420_readreg(state, 0x3b) & 0x74) | 0x01);
120 break; 124 break;
121 } 125 }
122 126
123 return 0; 127 return 0;
124} 128}
125 129
126static int s5h1420_send_master_cmd (struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) 130static int s5h1420_send_master_cmd (struct dvb_frontend* fe,
131 struct dvb_diseqc_master_cmd* cmd)
127{ 132{
128 struct s5h1420_state* state = fe->demodulator_priv; 133 struct s5h1420_state* state = fe->demodulator_priv;
129 u8 val; 134 u8 val;
@@ -131,6 +136,9 @@ static int s5h1420_send_master_cmd (struct dvb_frontend* fe, struct dvb_diseqc_m
131 unsigned long timeout; 136 unsigned long timeout;
132 int result = 0; 137 int result = 0;
133 138
139 if (cmd->msg_len > 8)
140 return -EINVAL;
141
134 /* setup for DISEQC */ 142 /* setup for DISEQC */
135 val = s5h1420_readreg(state, 0x3b); 143 val = s5h1420_readreg(state, 0x3b);
136 s5h1420_writereg(state, 0x3b, 0x02); 144 s5h1420_writereg(state, 0x3b, 0x02);
@@ -138,16 +146,17 @@ static int s5h1420_send_master_cmd (struct dvb_frontend* fe, struct dvb_diseqc_m
138 146
139 /* write the DISEQC command bytes */ 147 /* write the DISEQC command bytes */
140 for(i=0; i< cmd->msg_len; i++) { 148 for(i=0; i< cmd->msg_len; i++) {
141 s5h1420_writereg(state, 0x3c + i, cmd->msg[i]); 149 s5h1420_writereg(state, 0x3d + i, cmd->msg[i]);
142 } 150 }
143 151
144 /* kick off transmission */ 152 /* kick off transmission */
145 s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | ((cmd->msg_len-1) << 4) | 0x08); 153 s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) |
154 ((cmd->msg_len-1) << 4) | 0x08);
146 155
147 /* wait for transmission to complete */ 156 /* wait for transmission to complete */
148 timeout = jiffies + ((100*HZ) / 1000); 157 timeout = jiffies + ((100*HZ) / 1000);
149 while(time_before(jiffies, timeout)) { 158 while(time_before(jiffies, timeout)) {
150 if (s5h1420_readreg(state, 0x3b) & 0x08) 159 if (!(s5h1420_readreg(state, 0x3b) & 0x08))
151 break; 160 break;
152 161
153 msleep(5); 162 msleep(5);
@@ -161,7 +170,8 @@ static int s5h1420_send_master_cmd (struct dvb_frontend* fe, struct dvb_diseqc_m
161 return result; 170 return result;
162} 171}
163 172
164static int s5h1420_recv_slave_reply (struct dvb_frontend* fe, struct dvb_diseqc_slave_reply* reply) 173static int s5h1420_recv_slave_reply (struct dvb_frontend* fe,
174 struct dvb_diseqc_slave_reply* reply)
165{ 175{
166 struct s5h1420_state* state = fe->demodulator_priv; 176 struct s5h1420_state* state = fe->demodulator_priv;
167 u8 val; 177 u8 val;
@@ -205,7 +215,7 @@ static int s5h1420_recv_slave_reply (struct dvb_frontend* fe, struct dvb_diseqc_
205 215
206 /* extract data */ 216 /* extract data */
207 for(i=0; i< length; i++) { 217 for(i=0; i< length; i++) {
208 reply->msg[i] = s5h1420_readreg(state, 0x3c + i); 218 reply->msg[i] = s5h1420_readreg(state, 0x3d + i);
209 } 219 }
210 220
211exit: 221exit:
@@ -236,7 +246,7 @@ static int s5h1420_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicm
236 s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | 0x08); 246 s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | 0x08);
237 247
238 /* wait for transmission to complete */ 248 /* wait for transmission to complete */
239 timeout = jiffies + ((20*HZ) / 1000); 249 timeout = jiffies + ((100*HZ) / 1000);
240 while(time_before(jiffies, timeout)) { 250 while(time_before(jiffies, timeout)) {
241 if (!(s5h1420_readreg(state, 0x3b) & 0x08)) 251 if (!(s5h1420_readreg(state, 0x3b) & 0x08))
242 break; 252 break;
@@ -259,9 +269,9 @@ static fe_status_t s5h1420_get_status_bits(struct s5h1420_state* state)
259 269
260 val = s5h1420_readreg(state, 0x14); 270 val = s5h1420_readreg(state, 0x14);
261 if (val & 0x02) 271 if (val & 0x02)
262 status |= FE_HAS_SIGNAL; // FIXME: not sure if this is right 272 status |= FE_HAS_SIGNAL;
263 if (val & 0x01) 273 if (val & 0x01)
264 status |= FE_HAS_CARRIER; // FIXME: not sure if this is right 274 status |= FE_HAS_CARRIER;
265 val = s5h1420_readreg(state, 0x36); 275 val = s5h1420_readreg(state, 0x36);
266 if (val & 0x01) 276 if (val & 0x01)
267 status |= FE_HAS_VITERBI; 277 status |= FE_HAS_VITERBI;
@@ -284,8 +294,8 @@ static int s5h1420_read_status(struct dvb_frontend* fe, fe_status_t* status)
284 /* determine lock state */ 294 /* determine lock state */
285 *status = s5h1420_get_status_bits(state); 295 *status = s5h1420_get_status_bits(state);
286 296
287 /* fix for FEC 5/6 inversion issue - if it doesn't quite lock, invert the inversion, 297 /* fix for FEC 5/6 inversion issue - if it doesn't quite lock, invert
288 wait a bit and check again */ 298 the inversion, wait a bit and check again */
289 if (*status == (FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI)) { 299 if (*status == (FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI)) {
290 val = s5h1420_readreg(state, 0x32); 300 val = s5h1420_readreg(state, 0x32);
291 if ((val & 0x07) == 0x03) { 301 if ((val & 0x07) == 0x03) {
@@ -330,6 +340,10 @@ static int s5h1420_read_status(struct dvb_frontend* fe, fe_status_t* status)
330 tmp = (tmp * 2 * 7) / 8; 340 tmp = (tmp * 2 * 7) / 8;
331 break; 341 break;
332 } 342 }
343 if (tmp == 0) {
344 printk("s5h1420: avoided division by 0\n");
345 tmp = 1;
346 }
333 tmp = state->fclk / tmp; 347 tmp = state->fclk / tmp;
334 348
335 /* set the MPEG_CLK_INTL for the calculated data rate */ 349 /* set the MPEG_CLK_INTL for the calculated data rate */
@@ -368,16 +382,21 @@ static int s5h1420_read_ber(struct dvb_frontend* fe, u32* ber)
368 382
369 s5h1420_writereg(state, 0x46, 0x1d); 383 s5h1420_writereg(state, 0x46, 0x1d);
370 mdelay(25); 384 mdelay(25);
371 return (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47); 385
386 *ber = (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47);
387
388 return 0;
372} 389}
373 390
374static int s5h1420_read_signal_strength(struct dvb_frontend* fe, u16* strength) 391static int s5h1420_read_signal_strength(struct dvb_frontend* fe, u16* strength)
375{ 392{
376 struct s5h1420_state* state = fe->demodulator_priv; 393 struct s5h1420_state* state = fe->demodulator_priv;
377 394
378 u8 val = 0xff - s5h1420_readreg(state, 0x15); 395 u8 val = s5h1420_readreg(state, 0x15);
379 396
380 return (int) ((val << 8) | val); 397 *strength = (u16) ((val << 8) | val);
398
399 return 0;
381} 400}
382 401
383static int s5h1420_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 402static int s5h1420_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
@@ -386,7 +405,10 @@ static int s5h1420_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
386 405
387 s5h1420_writereg(state, 0x46, 0x1f); 406 s5h1420_writereg(state, 0x46, 0x1f);
388 mdelay(25); 407 mdelay(25);
389 return (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47); 408
409 *ucblocks = (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47);
410
411 return 0;
390} 412}
391 413
392static void s5h1420_reset(struct s5h1420_state* state) 414static void s5h1420_reset(struct s5h1420_state* state)
@@ -396,11 +418,12 @@ static void s5h1420_reset(struct s5h1420_state* state)
396 udelay(10); 418 udelay(10);
397} 419}
398 420
399static void s5h1420_setsymbolrate(struct s5h1420_state* state, struct dvb_frontend_parameters *p) 421static void s5h1420_setsymbolrate(struct s5h1420_state* state,
422 struct dvb_frontend_parameters *p)
400{ 423{
401 u64 val; 424 u64 val;
402 425
403 val = (p->u.qpsk.symbol_rate / 1000) * (1<<24); 426 val = ((u64) p->u.qpsk.symbol_rate / 1000ULL) * (1ULL<<24);
404 if (p->u.qpsk.symbol_rate <= 21000000) { 427 if (p->u.qpsk.symbol_rate <= 21000000) {
405 val *= 2; 428 val *= 2;
406 } 429 }
@@ -415,7 +438,7 @@ static void s5h1420_setsymbolrate(struct s5h1420_state* state, struct dvb_fronte
415 438
416static u32 s5h1420_getsymbolrate(struct s5h1420_state* state) 439static u32 s5h1420_getsymbolrate(struct s5h1420_state* state)
417{ 440{
418 u64 val; 441 u64 val = 0;
419 int sampling = 2; 442 int sampling = 2;
420 443
421 if (s5h1420_readreg(state, 0x05) & 0x2) 444 if (s5h1420_readreg(state, 0x05) & 0x2)
@@ -427,10 +450,10 @@ static u32 s5h1420_getsymbolrate(struct s5h1420_state* state)
427 val |= s5h1420_readreg(state, 0x13); 450 val |= s5h1420_readreg(state, 0x13);
428 s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) & 0xf7); 451 s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) & 0xf7);
429 452
430 val *= (state->fclk / 1000); 453 val *= (state->fclk / 1000ULL);
431 do_div(val, ((1<<24) * sampling)); 454 do_div(val, ((1<<24) * sampling));
432 455
433 return (u32) (val * 1000); 456 return (u32) (val * 1000ULL);
434} 457}
435 458
436static void s5h1420_setfreqoffset(struct s5h1420_state* state, int freqoffset) 459static void s5h1420_setfreqoffset(struct s5h1420_state* state, int freqoffset)
@@ -463,46 +486,55 @@ static int s5h1420_getfreqoffset(struct s5h1420_state* state)
463 486
464 /* remember freqoffset is in kHz, but the chip wants the offset in Hz, so 487 /* remember freqoffset is in kHz, but the chip wants the offset in Hz, so
465 * divide fclk by 1000000 to get the correct value. */ 488 * divide fclk by 1000000 to get the correct value. */
466 val = - ((val * (state->fclk/1000000)) / (1<<24)); 489 val = (((-val) * (state->fclk/1000000)) / (1<<24));
467 490
468 return val; 491 return val;
469} 492}
470 493
471static void s5h1420_setfec(struct s5h1420_state* state, struct dvb_frontend_parameters *p) 494static void s5h1420_setfec_inversion(struct s5h1420_state* state,
495 struct dvb_frontend_parameters *p)
472{ 496{
497 u8 inversion = 0;
498
499 if (p->inversion == INVERSION_OFF) {
500 inversion = state->config->invert ? 0x08 : 0;
501 } else if (p->inversion == INVERSION_ON) {
502 inversion = state->config->invert ? 0 : 0x08;
503 }
504
473 if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) { 505 if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) {
474 s5h1420_writereg(state, 0x31, 0x00);
475 s5h1420_writereg(state, 0x30, 0x3f); 506 s5h1420_writereg(state, 0x30, 0x3f);
507 s5h1420_writereg(state, 0x31, 0x00 | inversion);
476 } else { 508 } else {
477 switch(p->u.qpsk.fec_inner) { 509 switch(p->u.qpsk.fec_inner) {
478 case FEC_1_2: 510 case FEC_1_2:
479 s5h1420_writereg(state, 0x31, 0x10);
480 s5h1420_writereg(state, 0x30, 0x01); 511 s5h1420_writereg(state, 0x30, 0x01);
512 s5h1420_writereg(state, 0x31, 0x10 | inversion);
481 break; 513 break;
482 514
483 case FEC_2_3: 515 case FEC_2_3:
484 s5h1420_writereg(state, 0x31, 0x11);
485 s5h1420_writereg(state, 0x30, 0x02); 516 s5h1420_writereg(state, 0x30, 0x02);
517 s5h1420_writereg(state, 0x31, 0x11 | inversion);
486 break; 518 break;
487 519
488 case FEC_3_4: 520 case FEC_3_4:
489 s5h1420_writereg(state, 0x31, 0x12);
490 s5h1420_writereg(state, 0x30, 0x04); 521 s5h1420_writereg(state, 0x30, 0x04);
491 break; 522 s5h1420_writereg(state, 0x31, 0x12 | inversion);
523 break;
492 524
493 case FEC_5_6: 525 case FEC_5_6:
494 s5h1420_writereg(state, 0x31, 0x13);
495 s5h1420_writereg(state, 0x30, 0x08); 526 s5h1420_writereg(state, 0x30, 0x08);
527 s5h1420_writereg(state, 0x31, 0x13 | inversion);
496 break; 528 break;
497 529
498 case FEC_6_7: 530 case FEC_6_7:
499 s5h1420_writereg(state, 0x31, 0x14);
500 s5h1420_writereg(state, 0x30, 0x10); 531 s5h1420_writereg(state, 0x30, 0x10);
532 s5h1420_writereg(state, 0x31, 0x14 | inversion);
501 break; 533 break;
502 534
503 case FEC_7_8: 535 case FEC_7_8:
504 s5h1420_writereg(state, 0x31, 0x15);
505 s5h1420_writereg(state, 0x30, 0x20); 536 s5h1420_writereg(state, 0x30, 0x20);
537 s5h1420_writereg(state, 0x31, 0x15 | inversion);
506 break; 538 break;
507 539
508 default: 540 default:
@@ -536,22 +568,6 @@ static fe_code_rate_t s5h1420_getfec(struct s5h1420_state* state)
536 return FEC_NONE; 568 return FEC_NONE;
537} 569}
538 570
539static void s5h1420_setinversion(struct s5h1420_state* state, struct dvb_frontend_parameters *p)
540{
541 if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) {
542 s5h1420_writereg(state, 0x31, 0x00);
543 s5h1420_writereg(state, 0x30, 0x3f);
544 } else {
545 u8 tmp = s5h1420_readreg(state, 0x31) & 0xf7;
546 tmp |= 0x10;
547
548 if (p->inversion == INVERSION_ON)
549 tmp |= 0x80;
550
551 s5h1420_writereg(state, 0x31, tmp);
552 }
553}
554
555static fe_spectral_inversion_t s5h1420_getinversion(struct s5h1420_state* state) 571static fe_spectral_inversion_t s5h1420_getinversion(struct s5h1420_state* state)
556{ 572{
557 if (s5h1420_readreg(state, 0x32) & 0x08) 573 if (s5h1420_readreg(state, 0x32) & 0x08)
@@ -560,35 +576,35 @@ static fe_spectral_inversion_t s5h1420_getinversion(struct s5h1420_state* state)
560 return INVERSION_OFF; 576 return INVERSION_OFF;
561} 577}
562 578
563static int s5h1420_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 579static int s5h1420_set_frontend(struct dvb_frontend* fe,
580 struct dvb_frontend_parameters *p)
564{ 581{
565 struct s5h1420_state* state = fe->demodulator_priv; 582 struct s5h1420_state* state = fe->demodulator_priv;
566 u32 frequency_delta; 583 int frequency_delta;
567 struct dvb_frontend_tune_settings fesettings; 584 struct dvb_frontend_tune_settings fesettings;
585 u32 tmp;
568 586
569 /* check if we should do a fast-tune */ 587 /* check if we should do a fast-tune */
570 memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters)); 588 memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters));
571 s5h1420_get_tune_settings(fe, &fesettings); 589 s5h1420_get_tune_settings(fe, &fesettings);
572 frequency_delta = p->frequency - state->tunedfreq; 590 frequency_delta = p->frequency - state->tunedfreq;
573 if ((frequency_delta > -fesettings.max_drift) && (frequency_delta < fesettings.max_drift) && 591 if ((frequency_delta > -fesettings.max_drift) &&
592 (frequency_delta < fesettings.max_drift) &&
574 (frequency_delta != 0) && 593 (frequency_delta != 0) &&
575 (state->fec_inner == p->u.qpsk.fec_inner) && 594 (state->fec_inner == p->u.qpsk.fec_inner) &&
576 (state->symbol_rate == p->u.qpsk.symbol_rate)) { 595 (state->symbol_rate == p->u.qpsk.symbol_rate)) {
577 596
578 s5h1420_setfreqoffset(state, frequency_delta); 597 if (state->config->pll_set) {
598 s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1);
599 state->config->pll_set(fe, p, &tmp);
600 s5h1420_setfreqoffset(state, p->frequency - tmp);
601 }
579 return 0; 602 return 0;
580 } 603 }
581 604
582 /* first of all, software reset */ 605 /* first of all, software reset */
583 s5h1420_reset(state); 606 s5h1420_reset(state);
584 607
585 /* set tuner PLL */
586 if (state->config->pll_set) {
587 s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1);
588 state->config->pll_set(fe, p, &state->tunedfreq);
589 s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) & 0xfe);
590 }
591
592 /* set s5h1420 fclk PLL according to desired symbol rate */ 608 /* set s5h1420 fclk PLL according to desired symbol rate */
593 if (p->u.qpsk.symbol_rate > 28000000) { 609 if (p->u.qpsk.symbol_rate > 28000000) {
594 state->fclk = 88000000; 610 state->fclk = 88000000;
@@ -609,8 +625,9 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
609 625
610 /* set misc registers */ 626 /* set misc registers */
611 s5h1420_writereg(state, 0x02, 0x00); 627 s5h1420_writereg(state, 0x02, 0x00);
628 s5h1420_writereg(state, 0x06, 0x00);
612 s5h1420_writereg(state, 0x07, 0xb0); 629 s5h1420_writereg(state, 0x07, 0xb0);
613 s5h1420_writereg(state, 0x0a, 0x67); 630 s5h1420_writereg(state, 0x0a, 0xe7);
614 s5h1420_writereg(state, 0x0b, 0x78); 631 s5h1420_writereg(state, 0x0b, 0x78);
615 s5h1420_writereg(state, 0x0c, 0x48); 632 s5h1420_writereg(state, 0x0c, 0x48);
616 s5h1420_writereg(state, 0x0d, 0x6b); 633 s5h1420_writereg(state, 0x0d, 0x6b);
@@ -626,21 +643,26 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
626 /* start QPSK */ 643 /* start QPSK */
627 s5h1420_writereg(state, 0x05, s5h1420_readreg(state, 0x05) | 1); 644 s5h1420_writereg(state, 0x05, s5h1420_readreg(state, 0x05) | 1);
628 645
629 /* set the frequency offset to adjust for PLL inaccuracy */ 646 /* set tuner PLL */
630 s5h1420_setfreqoffset(state, p->frequency - state->tunedfreq); 647 if (state->config->pll_set) {
648 s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1);
649 state->config->pll_set(fe, p, &tmp);
650 s5h1420_setfreqoffset(state, 0);
651 }
631 652
632 /* set the reset of the parameters */ 653 /* set the reset of the parameters */
633 s5h1420_setsymbolrate(state, p); 654 s5h1420_setsymbolrate(state, p);
634 s5h1420_setinversion(state, p); 655 s5h1420_setfec_inversion(state, p);
635 s5h1420_setfec(state, p);
636 656
637 state->fec_inner = p->u.qpsk.fec_inner; 657 state->fec_inner = p->u.qpsk.fec_inner;
638 state->symbol_rate = p->u.qpsk.symbol_rate; 658 state->symbol_rate = p->u.qpsk.symbol_rate;
639 state->postlocked = 0; 659 state->postlocked = 0;
660 state->tunedfreq = p->frequency;
640 return 0; 661 return 0;
641} 662}
642 663
643static int s5h1420_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 664static int s5h1420_get_frontend(struct dvb_frontend* fe,
665 struct dvb_frontend_parameters *p)
644{ 666{
645 struct s5h1420_state* state = fe->demodulator_priv; 667 struct s5h1420_state* state = fe->demodulator_priv;
646 668
@@ -652,7 +674,8 @@ static int s5h1420_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
652 return 0; 674 return 0;
653} 675}
654 676
655static int s5h1420_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) 677static int s5h1420_get_tune_settings(struct dvb_frontend* fe,
678 struct dvb_frontend_tune_settings* fesettings)
656{ 679{
657 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) { 680 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) {
658 fesettings->min_delay_ms = 50; 681 fesettings->min_delay_ms = 50;
@@ -717,7 +740,8 @@ static void s5h1420_release(struct dvb_frontend* fe)
717 740
718static struct dvb_frontend_ops s5h1420_ops; 741static struct dvb_frontend_ops s5h1420_ops;
719 742
720struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config, struct i2c_adapter* i2c) 743struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config,
744 struct i2c_adapter* i2c)
721{ 745{
722 struct s5h1420_state* state = NULL; 746 struct s5h1420_state* state = NULL;
723 u8 identity; 747 u8 identity;
diff --git a/drivers/media/dvb/frontends/s5h1420.h b/drivers/media/dvb/frontends/s5h1420.h
index b687fc77ceb3..872028ddf2a2 100644
--- a/drivers/media/dvb/frontends/s5h1420.h
+++ b/drivers/media/dvb/frontends/s5h1420.h
@@ -30,6 +30,9 @@ struct s5h1420_config
30 /* the demodulator's i2c address */ 30 /* the demodulator's i2c address */
31 u8 demod_address; 31 u8 demod_address;
32 32
33 /* does the inversion require inversion? */
34 u8 invert:1;
35
33 /* PLL maintenance */ 36 /* PLL maintenance */
34 int (*pll_init)(struct dvb_frontend* fe); 37 int (*pll_init)(struct dvb_frontend* fe);
35 int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u32* freqout); 38 int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u32* freqout);
diff --git a/drivers/media/dvb/frontends/stv0297.c b/drivers/media/dvb/frontends/stv0297.c
index 928aca052afe..8d09afd7545d 100644
--- a/drivers/media/dvb/frontends/stv0297.c
+++ b/drivers/media/dvb/frontends/stv0297.c
@@ -35,7 +35,6 @@ struct stv0297_state {
35 struct dvb_frontend frontend; 35 struct dvb_frontend frontend;
36 36
37 unsigned long base_freq; 37 unsigned long base_freq;
38 u8 pwm;
39}; 38};
40 39
41#if 1 40#if 1
@@ -46,94 +45,6 @@ struct stv0297_state {
46 45
47#define STV0297_CLOCK_KHZ 28900 46#define STV0297_CLOCK_KHZ 28900
48 47
49static u8 init_tab[] = {
50 0x00, 0x09,
51 0x01, 0x69,
52 0x03, 0x00,
53 0x04, 0x00,
54 0x07, 0x00,
55 0x08, 0x00,
56 0x20, 0x00,
57 0x21, 0x40,
58 0x22, 0x00,
59 0x23, 0x00,
60 0x24, 0x40,
61 0x25, 0x88,
62 0x30, 0xff,
63 0x31, 0x00,
64 0x32, 0xff,
65 0x33, 0x00,
66 0x34, 0x50,
67 0x35, 0x7f,
68 0x36, 0x00,
69 0x37, 0x20,
70 0x38, 0x00,
71 0x40, 0x1c,
72 0x41, 0xff,
73 0x42, 0x29,
74 0x43, 0x00,
75 0x44, 0xff,
76 0x45, 0x00,
77 0x46, 0x00,
78 0x49, 0x04,
79 0x4a, 0xff,
80 0x4b, 0x7f,
81 0x52, 0x30,
82 0x55, 0xae,
83 0x56, 0x47,
84 0x57, 0xe1,
85 0x58, 0x3a,
86 0x5a, 0x1e,
87 0x5b, 0x34,
88 0x60, 0x00,
89 0x63, 0x00,
90 0x64, 0x00,
91 0x65, 0x00,
92 0x66, 0x00,
93 0x67, 0x00,
94 0x68, 0x00,
95 0x69, 0x00,
96 0x6a, 0x02,
97 0x6b, 0x00,
98 0x70, 0xff,
99 0x71, 0x00,
100 0x72, 0x00,
101 0x73, 0x00,
102 0x74, 0x0c,
103 0x80, 0x00,
104 0x81, 0x00,
105 0x82, 0x00,
106 0x83, 0x00,
107 0x84, 0x04,
108 0x85, 0x80,
109 0x86, 0x24,
110 0x87, 0x78,
111 0x88, 0x00,
112 0x89, 0x00,
113 0x90, 0x01,
114 0x91, 0x01,
115 0xa0, 0x00,
116 0xa1, 0x00,
117 0xa2, 0x00,
118 0xb0, 0x91,
119 0xb1, 0x0b,
120 0xc0, 0x53,
121 0xc1, 0x70,
122 0xc2, 0x12,
123 0xd0, 0x00,
124 0xd1, 0x00,
125 0xd2, 0x00,
126 0xd3, 0x00,
127 0xd4, 0x00,
128 0xd5, 0x00,
129 0xde, 0x00,
130 0xdf, 0x00,
131 0x61, 0x49,
132 0x62, 0x0b,
133 0x53, 0x08,
134 0x59, 0x08,
135};
136
137 48
138static int stv0297_writereg(struct stv0297_state *state, u8 reg, u8 data) 49static int stv0297_writereg(struct stv0297_state *state, u8 reg, u8 data)
139{ 50{
@@ -378,34 +289,9 @@ static int stv0297_init(struct dvb_frontend *fe)
378 struct stv0297_state *state = fe->demodulator_priv; 289 struct stv0297_state *state = fe->demodulator_priv;
379 int i; 290 int i;
380 291
381 /* soft reset */
382 stv0297_writereg_mask(state, 0x80, 1, 1);
383 stv0297_writereg_mask(state, 0x80, 1, 0);
384
385 /* reset deinterleaver */
386 stv0297_writereg_mask(state, 0x81, 1, 1);
387 stv0297_writereg_mask(state, 0x81, 1, 0);
388
389 /* load init table */ 292 /* load init table */
390 for (i = 0; i < sizeof(init_tab); i += 2) { 293 for (i=0; !(state->config->inittab[i] == 0xff && state->config->inittab[i+1] == 0xff); i+=2)
391 stv0297_writereg(state, init_tab[i], init_tab[i + 1]); 294 stv0297_writereg(state, state->config->inittab[i], state->config->inittab[i+1]);
392 }
393
394 /* set a dummy symbol rate */
395 stv0297_set_symbolrate(state, 6900);
396
397 /* invert AGC1 polarity */
398 stv0297_writereg_mask(state, 0x88, 0x10, 0x10);
399
400 /* setup bit error counting */
401 stv0297_writereg_mask(state, 0xA0, 0x80, 0x00);
402 stv0297_writereg_mask(state, 0xA0, 0x10, 0x00);
403 stv0297_writereg_mask(state, 0xA0, 0x08, 0x00);
404 stv0297_writereg_mask(state, 0xA0, 0x07, 0x04);
405
406 /* min + max PWM */
407 stv0297_writereg(state, 0x4a, 0x00);
408 stv0297_writereg(state, 0x4b, state->pwm);
409 msleep(200); 295 msleep(200);
410 296
411 if (state->config->pll_init) 297 if (state->config->pll_init)
@@ -606,7 +492,13 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
606 stv0297_set_inversion(state, inversion); 492 stv0297_set_inversion(state, inversion);
607 493
608 /* kick off lock */ 494 /* kick off lock */
609 stv0297_writereg_mask(state, 0x88, 0x08, 0x08); 495 /* Disable corner detection for higher QAMs */
496 if (p->u.qam.modulation == QAM_128 ||
497 p->u.qam.modulation == QAM_256)
498 stv0297_writereg_mask(state, 0x88, 0x08, 0x00);
499 else
500 stv0297_writereg_mask(state, 0x88, 0x08, 0x08);
501
610 stv0297_writereg_mask(state, 0x5a, 0x20, 0x00); 502 stv0297_writereg_mask(state, 0x5a, 0x20, 0x00);
611 stv0297_writereg_mask(state, 0x6a, 0x01, 0x01); 503 stv0297_writereg_mask(state, 0x6a, 0x01, 0x01);
612 stv0297_writereg_mask(state, 0x43, 0x40, 0x40); 504 stv0297_writereg_mask(state, 0x43, 0x40, 0x40);
@@ -732,7 +624,7 @@ static void stv0297_release(struct dvb_frontend *fe)
732static struct dvb_frontend_ops stv0297_ops; 624static struct dvb_frontend_ops stv0297_ops;
733 625
734struct dvb_frontend *stv0297_attach(const struct stv0297_config *config, 626struct dvb_frontend *stv0297_attach(const struct stv0297_config *config,
735 struct i2c_adapter *i2c, int pwm) 627 struct i2c_adapter *i2c)
736{ 628{
737 struct stv0297_state *state = NULL; 629 struct stv0297_state *state = NULL;
738 630
@@ -746,7 +638,6 @@ struct dvb_frontend *stv0297_attach(const struct stv0297_config *config,
746 state->i2c = i2c; 638 state->i2c = i2c;
747 memcpy(&state->ops, &stv0297_ops, sizeof(struct dvb_frontend_ops)); 639 memcpy(&state->ops, &stv0297_ops, sizeof(struct dvb_frontend_ops));
748 state->base_freq = 0; 640 state->base_freq = 0;
749 state->pwm = pwm;
750 641
751 /* check if the demod is there */ 642 /* check if the demod is there */
752 if ((stv0297_readreg(state, 0x80) & 0x70) != 0x20) 643 if ((stv0297_readreg(state, 0x80) & 0x70) != 0x20)
diff --git a/drivers/media/dvb/frontends/stv0297.h b/drivers/media/dvb/frontends/stv0297.h
index 3be535989302..9e53f019db71 100644
--- a/drivers/media/dvb/frontends/stv0297.h
+++ b/drivers/media/dvb/frontends/stv0297.h
@@ -29,6 +29,12 @@ struct stv0297_config
29 /* the demodulator's i2c address */ 29 /* the demodulator's i2c address */
30 u8 demod_address; 30 u8 demod_address;
31 31
32 /* inittab - array of pairs of values.
33 * First of each pair is the register, second is the value.
34 * List should be terminated with an 0xff, 0xff pair.
35 */
36 u8* inittab;
37
32 /* does the "inversion" need inverted? */ 38 /* does the "inversion" need inverted? */
33 u8 invert:1; 39 u8 invert:1;
34 40
@@ -38,7 +44,7 @@ struct stv0297_config
38}; 44};
39 45
40extern struct dvb_frontend* stv0297_attach(const struct stv0297_config* config, 46extern struct dvb_frontend* stv0297_attach(const struct stv0297_config* config,
41 struct i2c_adapter* i2c, int pwm); 47 struct i2c_adapter* i2c);
42extern int stv0297_enable_plli2c(struct dvb_frontend* fe); 48extern int stv0297_enable_plli2c(struct dvb_frontend* fe);
43 49
44#endif // STV0297_H 50#endif // STV0297_H
diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c
index cfa3928bb487..2d62931f20b5 100644
--- a/drivers/media/dvb/frontends/stv0299.c
+++ b/drivers/media/dvb/frontends/stv0299.c
@@ -63,12 +63,8 @@ struct stv0299_state {
63 u32 tuner_frequency; 63 u32 tuner_frequency;
64 u32 symbol_rate; 64 u32 symbol_rate;
65 fe_code_rate_t fec_inner; 65 fe_code_rate_t fec_inner;
66 int errmode;
67}; 66};
68 67
69#define STATUS_BER 0
70#define STATUS_UCBLOCKS 1
71
72static int debug; 68static int debug;
73static int debug_legacy_dish_switch; 69static int debug_legacy_dish_switch;
74#define dprintk(args...) \ 70#define dprintk(args...) \
@@ -481,7 +477,7 @@ static int stv0299_init (struct dvb_frontend* fe)
481 477
482 if (state->config->pll_init) { 478 if (state->config->pll_init) {
483 stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */ 479 stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */
484 state->config->pll_init(fe); 480 state->config->pll_init(fe, state->i2c);
485 stv0299_writeregI(state, 0x05, 0x35); /* disable i2c repeater on stv0299 */ 481 stv0299_writeregI(state, 0x05, 0x35); /* disable i2c repeater on stv0299 */
486 } 482 }
487 483
@@ -520,7 +516,8 @@ static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber)
520{ 516{
521 struct stv0299_state* state = fe->demodulator_priv; 517 struct stv0299_state* state = fe->demodulator_priv;
522 518
523 if (state->errmode != STATUS_BER) return 0; 519 stv0299_writeregI(state, 0x34, (stv0299_readreg(state, 0x34) & 0xcf) | 0x10);
520 msleep(100);
524 *ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); 521 *ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e);
525 522
526 return 0; 523 return 0;
@@ -559,8 +556,9 @@ static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
559{ 556{
560 struct stv0299_state* state = fe->demodulator_priv; 557 struct stv0299_state* state = fe->demodulator_priv;
561 558
562 if (state->errmode != STATUS_UCBLOCKS) *ucblocks = 0; 559 stv0299_writeregI(state, 0x34, (stv0299_readreg(state, 0x34) & 0xcf) | 0x30);
563 else *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); 560 msleep(100);
561 *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e);
564 562
565 return 0; 563 return 0;
566} 564}
@@ -603,7 +601,7 @@ static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
603 } else { 601 } else {
604 /* A "normal" tune is requested */ 602 /* A "normal" tune is requested */
605 stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */ 603 stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */
606 state->config->pll_set(fe, p); 604 state->config->pll_set(fe, state->i2c, p);
607 stv0299_writeregI(state, 0x05, 0x35); /* disable i2c repeater on stv0299 */ 605 stv0299_writeregI(state, 0x05, 0x35); /* disable i2c repeater on stv0299 */
608 606
609 stv0299_writeregI(state, 0x32, 0x80); 607 stv0299_writeregI(state, 0x32, 0x80);
@@ -615,7 +613,7 @@ static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
615 } 613 }
616 } else { 614 } else {
617 stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */ 615 stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */
618 state->config->pll_set(fe, p); 616 state->config->pll_set(fe, state->i2c, p);
619 stv0299_writeregI(state, 0x05, 0x35); /* disable i2c repeater on stv0299 */ 617 stv0299_writeregI(state, 0x05, 0x35); /* disable i2c repeater on stv0299 */
620 618
621 stv0299_set_FEC (state, p->u.qpsk.fec_inner); 619 stv0299_set_FEC (state, p->u.qpsk.fec_inner);
@@ -709,7 +707,6 @@ struct dvb_frontend* stv0299_attach(const struct stv0299_config* config,
709 state->tuner_frequency = 0; 707 state->tuner_frequency = 0;
710 state->symbol_rate = 0; 708 state->symbol_rate = 0;
711 state->fec_inner = 0; 709 state->fec_inner = 0;
712 state->errmode = STATUS_BER;
713 710
714 /* check if the demod is there */ 711 /* check if the demod is there */
715 stv0299_writeregI(state, 0x02, 0x34); /* standby off */ 712 stv0299_writeregI(state, 0x02, 0x34); /* standby off */
diff --git a/drivers/media/dvb/frontends/stv0299.h b/drivers/media/dvb/frontends/stv0299.h
index 79457a80a11f..d0c4484861e1 100644
--- a/drivers/media/dvb/frontends/stv0299.h
+++ b/drivers/media/dvb/frontends/stv0299.h
@@ -92,8 +92,8 @@ struct stv0299_config
92 int (*set_symbol_rate)(struct dvb_frontend* fe, u32 srate, u32 ratio); 92 int (*set_symbol_rate)(struct dvb_frontend* fe, u32 srate, u32 ratio);
93 93
94 /* PLL maintenance */ 94 /* PLL maintenance */
95 int (*pll_init)(struct dvb_frontend* fe); 95 int (*pll_init)(struct dvb_frontend *fe, struct i2c_adapter *i2c);
96 int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); 96 int (*pll_set)(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters *params);
97}; 97};
98 98
99extern int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data); 99extern int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data);
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c
index ab0c032472cc..74cea9f8d721 100644
--- a/drivers/media/dvb/frontends/tda1004x.c
+++ b/drivers/media/dvb/frontends/tda1004x.c
@@ -1046,8 +1046,7 @@ static int tda1004x_read_snr(struct dvb_frontend* fe, u16 * snr)
1046 tmp = tda1004x_read_byte(state, TDA1004X_SNR); 1046 tmp = tda1004x_read_byte(state, TDA1004X_SNR);
1047 if (tmp < 0) 1047 if (tmp < 0)
1048 return -EIO; 1048 return -EIO;
1049 if (tmp) 1049 tmp = 255 - tmp;
1050 tmp = 255 - tmp;
1051 1050
1052 *snr = ((tmp << 8) | tmp); 1051 *snr = ((tmp << 8) | tmp);
1053 dprintk("%s: snr=0x%x\n", __FUNCTION__, *snr); 1052 dprintk("%s: snr=0x%x\n", __FUNCTION__, *snr);
diff --git a/drivers/media/dvb/frontends/ves1820.c b/drivers/media/dvb/frontends/ves1820.c
index 70fb44b391a7..c6d276618e86 100644
--- a/drivers/media/dvb/frontends/ves1820.c
+++ b/drivers/media/dvb/frontends/ves1820.c
@@ -194,19 +194,18 @@ static int ves1820_init(struct dvb_frontend* fe)
194{ 194{
195 struct ves1820_state* state = fe->demodulator_priv; 195 struct ves1820_state* state = fe->demodulator_priv;
196 int i; 196 int i;
197 int val;
198 197
199 ves1820_writereg(state, 0, 0); 198 ves1820_writereg(state, 0, 0);
200 199
201 for (i = 0; i < 53; i++) { 200 for (i = 0; i < sizeof(ves1820_inittab); i++)
202 val = ves1820_inittab[i]; 201 ves1820_writereg(state, i, ves1820_inittab[i]);
203 if ((i == 2) && (state->config->selagc)) val |= 0x08; 202 if (state->config->selagc)
204 ves1820_writereg(state, i, val); 203 ves1820_writereg(state, 2, ves1820_inittab[2] | 0x08);
205 }
206 204
207 ves1820_writereg(state, 0x34, state->pwm); 205 ves1820_writereg(state, 0x34, state->pwm);
208 206
209 if (state->config->pll_init) state->config->pll_init(fe); 207 if (state->config->pll_init)
208 state->config->pll_init(fe);
210 209
211 return 0; 210 return 0;
212} 211}
@@ -234,7 +233,7 @@ static int ves1820_set_parameters(struct dvb_frontend* fe, struct dvb_frontend_p
234 ves1820_writereg(state, 0x09, reg0x09[real_qam]); 233 ves1820_writereg(state, 0x09, reg0x09[real_qam]);
235 234
236 ves1820_setup_reg0(state, reg0x00[real_qam], p->inversion); 235 ves1820_setup_reg0(state, reg0x00[real_qam], p->inversion);
237 236 ves1820_writereg(state, 2, ves1820_inittab[2] | (state->config->selagc ? 0x08 : 0));
238 return 0; 237 return 0;
239} 238}
240 239