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-rw-r--r--drivers/media/dvb/frontends/Kconfig24
-rw-r--r--drivers/media/dvb/frontends/Makefile3
-rw-r--r--drivers/media/dvb/frontends/at76c651.c450
-rw-r--r--drivers/media/dvb/frontends/at76c651.h47
-rw-r--r--drivers/media/dvb/frontends/dvb-pll.c8
-rw-r--r--drivers/media/dvb/frontends/dvb-pll.h2
-rw-r--r--drivers/media/dvb/frontends/nxt2002.c706
-rw-r--r--drivers/media/dvb/frontends/nxt2002.h23
-rw-r--r--drivers/media/dvb/frontends/nxt200x.c58
-rw-r--r--drivers/media/dvb/frontends/tda80xx.c734
-rw-r--r--drivers/media/dvb/frontends/tda80xx.h51
11 files changed, 55 insertions, 2051 deletions
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index db3a8b40031e..76b6a2aef32f 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -28,12 +28,6 @@ config DVB_TDA8083
28 help 28 help
29 A DVB-S tuner module. Say Y when you want to support this frontend. 29 A DVB-S tuner module. Say Y when you want to support this frontend.
30 30
31config DVB_TDA80XX
32 tristate "Philips TDA8044 or TDA8083 based"
33 depends on DVB_CORE
34 help
35 A DVB-S tuner module. Say Y when you want to support this frontend.
36
37config DVB_MT312 31config DVB_MT312
38 tristate "Zarlink MT312 based" 32 tristate "Zarlink MT312 based"
39 depends on DVB_CORE 33 depends on DVB_CORE
@@ -139,12 +133,6 @@ config DVB_DIB3000MC
139comment "DVB-C (cable) frontends" 133comment "DVB-C (cable) frontends"
140 depends on DVB_CORE 134 depends on DVB_CORE
141 135
142config DVB_ATMEL_AT76C651
143 tristate "Atmel AT76C651 based"
144 depends on DVB_CORE
145 help
146 A DVB-C tuner module. Say Y when you want to support this frontend.
147
148config DVB_VES1820 136config DVB_VES1820
149 tristate "VLSI VES1820 based" 137 tristate "VLSI VES1820 based"
150 depends on DVB_CORE 138 depends on DVB_CORE
@@ -166,18 +154,6 @@ config DVB_STV0297
166comment "ATSC (North American/Korean Terresterial DTV) frontends" 154comment "ATSC (North American/Korean Terresterial DTV) frontends"
167 depends on DVB_CORE 155 depends on DVB_CORE
168 156
169config DVB_NXT2002
170 tristate "Nxt2002 based"
171 depends on DVB_CORE
172 select FW_LOADER
173 help
174 An ATSC 8VSB tuner module. Say Y when you want to support this frontend.
175
176 This driver needs external firmware. Please use the command
177 "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to
178 download/extract it, and then copy it to /usr/lib/hotplug/firmware
179 or /lib/firmware (depending on configuration of firmware hotplug).
180
181config DVB_NXT200X 157config DVB_NXT200X
182 tristate "Nextwave NXT2002/NXT2004 based" 158 tristate "Nextwave NXT2002/NXT2004 based"
183 depends on DVB_CORE 159 depends on DVB_CORE
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index 615ec830e1c9..1af769cd90c0 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_DVB_CORE) += dvb-pll.o
8obj-$(CONFIG_DVB_STV0299) += stv0299.o 8obj-$(CONFIG_DVB_STV0299) += stv0299.o
9obj-$(CONFIG_DVB_SP8870) += sp8870.o 9obj-$(CONFIG_DVB_SP8870) += sp8870.o
10obj-$(CONFIG_DVB_CX22700) += cx22700.o 10obj-$(CONFIG_DVB_CX22700) += cx22700.o
11obj-$(CONFIG_DVB_ATMEL_AT76C651) += at76c651.o
12obj-$(CONFIG_DVB_CX24110) += cx24110.o 11obj-$(CONFIG_DVB_CX24110) += cx24110.o
13obj-$(CONFIG_DVB_TDA8083) += tda8083.o 12obj-$(CONFIG_DVB_TDA8083) += tda8083.o
14obj-$(CONFIG_DVB_L64781) += l64781.o 13obj-$(CONFIG_DVB_L64781) += l64781.o
@@ -22,10 +21,8 @@ obj-$(CONFIG_DVB_SP887X) += sp887x.o
22obj-$(CONFIG_DVB_NXT6000) += nxt6000.o 21obj-$(CONFIG_DVB_NXT6000) += nxt6000.o
23obj-$(CONFIG_DVB_MT352) += mt352.o 22obj-$(CONFIG_DVB_MT352) += mt352.o
24obj-$(CONFIG_DVB_CX22702) += cx22702.o 23obj-$(CONFIG_DVB_CX22702) += cx22702.o
25obj-$(CONFIG_DVB_TDA80XX) += tda80xx.o
26obj-$(CONFIG_DVB_TDA10021) += tda10021.o 24obj-$(CONFIG_DVB_TDA10021) += tda10021.o
27obj-$(CONFIG_DVB_STV0297) += stv0297.o 25obj-$(CONFIG_DVB_STV0297) += stv0297.o
28obj-$(CONFIG_DVB_NXT2002) += nxt2002.o
29obj-$(CONFIG_DVB_NXT200X) += nxt200x.o 26obj-$(CONFIG_DVB_NXT200X) += nxt200x.o
30obj-$(CONFIG_DVB_OR51211) += or51211.o 27obj-$(CONFIG_DVB_OR51211) += or51211.o
31obj-$(CONFIG_DVB_OR51132) += or51132.o 28obj-$(CONFIG_DVB_OR51132) += or51132.o
diff --git a/drivers/media/dvb/frontends/at76c651.c b/drivers/media/dvb/frontends/at76c651.c
deleted file mode 100644
index 8e0f4b3a1417..000000000000
--- a/drivers/media/dvb/frontends/at76c651.c
+++ /dev/null
@@ -1,450 +0,0 @@
1/*
2 * at76c651.c
3 *
4 * Atmel DVB-C Frontend Driver (at76c651/tua6010xs)
5 *
6 * Copyright (C) 2001 fnbrd <fnbrd@gmx.de>
7 * & 2002-2004 Andreas Oberritter <obi@linuxtv.org>
8 * & 2003 Wolfram Joost <dbox2@frokaschwei.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 * AT76C651
25 * http://www.nalanda.nitc.ac.in/industry/datasheets/atmel/acrobat/doc1293.pdf
26 * http://www.atmel.com/atmel/acrobat/doc1320.pdf
27 */
28
29#include <linux/init.h>
30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/kernel.h>
33#include <linux/string.h>
34#include <linux/slab.h>
35#include <linux/bitops.h>
36#include "dvb_frontend.h"
37#include "at76c651.h"
38
39
40struct at76c651_state {
41
42 struct i2c_adapter* i2c;
43
44 struct dvb_frontend_ops ops;
45
46 const struct at76c651_config* config;
47
48 struct dvb_frontend frontend;
49
50 /* revision of the chip */
51 u8 revision;
52
53 /* last QAM value set */
54 u8 qam;
55};
56
57static int debug;
58#define dprintk(args...) \
59 do { \
60 if (debug) printk(KERN_DEBUG "at76c651: " args); \
61 } while (0)
62
63
64#if ! defined(__powerpc__)
65static __inline__ int __ilog2(unsigned long x)
66{
67 int i;
68
69 if (x == 0)
70 return -1;
71
72 for (i = 0; x != 0; i++)
73 x >>= 1;
74
75 return i - 1;
76}
77#endif
78
79static int at76c651_writereg(struct at76c651_state* state, u8 reg, u8 data)
80{
81 int ret;
82 u8 buf[] = { reg, data };
83 struct i2c_msg msg =
84 { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
85
86 ret = i2c_transfer(state->i2c, &msg, 1);
87
88 if (ret != 1)
89 dprintk("%s: writereg error "
90 "(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
91 __FUNCTION__, reg, data, ret);
92
93 msleep(10);
94
95 return (ret != 1) ? -EREMOTEIO : 0;
96}
97
98static u8 at76c651_readreg(struct at76c651_state* state, u8 reg)
99{
100 int ret;
101 u8 val;
102 struct i2c_msg msg[] = {
103 { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 },
104 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = &val, .len = 1 }
105 };
106
107 ret = i2c_transfer(state->i2c, msg, 2);
108
109 if (ret != 2)
110 dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
111
112 return val;
113}
114
115static int at76c651_reset(struct at76c651_state* state)
116{
117 return at76c651_writereg(state, 0x07, 0x01);
118}
119
120static void at76c651_disable_interrupts(struct at76c651_state* state)
121{
122 at76c651_writereg(state, 0x0b, 0x00);
123}
124
125static int at76c651_set_auto_config(struct at76c651_state *state)
126{
127 /*
128 * Autoconfig
129 */
130
131 at76c651_writereg(state, 0x06, 0x01);
132
133 /*
134 * Performance optimizations, should be done after autoconfig
135 */
136
137 at76c651_writereg(state, 0x10, 0x06);
138 at76c651_writereg(state, 0x11, ((state->qam == 5) || (state->qam == 7)) ? 0x12 : 0x10);
139 at76c651_writereg(state, 0x15, 0x28);
140 at76c651_writereg(state, 0x20, 0x09);
141 at76c651_writereg(state, 0x24, ((state->qam == 5) || (state->qam == 7)) ? 0xC0 : 0x90);
142 at76c651_writereg(state, 0x30, 0x90);
143 if (state->qam == 5)
144 at76c651_writereg(state, 0x35, 0x2A);
145
146 /*
147 * Initialize A/D-converter
148 */
149
150 if (state->revision == 0x11) {
151 at76c651_writereg(state, 0x2E, 0x38);
152 at76c651_writereg(state, 0x2F, 0x13);
153 }
154
155 at76c651_disable_interrupts(state);
156
157 /*
158 * Restart operation
159 */
160
161 at76c651_reset(state);
162
163 return 0;
164}
165
166static void at76c651_set_bbfreq(struct at76c651_state* state)
167{
168 at76c651_writereg(state, 0x04, 0x3f);
169 at76c651_writereg(state, 0x05, 0xee);
170}
171
172static int at76c651_set_symbol_rate(struct at76c651_state* state, u32 symbol_rate)
173{
174 u8 exponent;
175 u32 mantissa;
176
177 if (symbol_rate > 9360000)
178 return -EINVAL;
179
180 /*
181 * FREF = 57800 kHz
182 * exponent = 10 + floor (log2(symbol_rate / FREF))
183 * mantissa = (symbol_rate / FREF) * (1 << (30 - exponent))
184 */
185
186 exponent = __ilog2((symbol_rate << 4) / 903125);
187 mantissa = ((symbol_rate / 3125) * (1 << (24 - exponent))) / 289;
188
189 at76c651_writereg(state, 0x00, mantissa >> 13);
190 at76c651_writereg(state, 0x01, mantissa >> 5);
191 at76c651_writereg(state, 0x02, (mantissa << 3) | exponent);
192
193 return 0;
194}
195
196static int at76c651_set_qam(struct at76c651_state *state, fe_modulation_t qam)
197{
198 switch (qam) {
199 case QPSK:
200 state->qam = 0x02;
201 break;
202 case QAM_16:
203 state->qam = 0x04;
204 break;
205 case QAM_32:
206 state->qam = 0x05;
207 break;
208 case QAM_64:
209 state->qam = 0x06;
210 break;
211 case QAM_128:
212 state->qam = 0x07;
213 break;
214 case QAM_256:
215 state->qam = 0x08;
216 break;
217#if 0
218 case QAM_512:
219 state->qam = 0x09;
220 break;
221 case QAM_1024:
222 state->qam = 0x0A;
223 break;
224#endif
225 default:
226 return -EINVAL;
227
228 }
229
230 return at76c651_writereg(state, 0x03, state->qam);
231}
232
233static int at76c651_set_inversion(struct at76c651_state* state, fe_spectral_inversion_t inversion)
234{
235 u8 feciqinv = at76c651_readreg(state, 0x60);
236
237 switch (inversion) {
238 case INVERSION_OFF:
239 feciqinv |= 0x02;
240 feciqinv &= 0xFE;
241 break;
242
243 case INVERSION_ON:
244 feciqinv |= 0x03;
245 break;
246
247 case INVERSION_AUTO:
248 feciqinv &= 0xFC;
249 break;
250
251 default:
252 return -EINVAL;
253 }
254
255 return at76c651_writereg(state, 0x60, feciqinv);
256}
257
258static int at76c651_set_parameters(struct dvb_frontend* fe,
259 struct dvb_frontend_parameters *p)
260{
261 int ret;
262 struct at76c651_state* state = fe->demodulator_priv;
263
264 at76c651_writereg(state, 0x0c, 0xc3);
265 state->config->pll_set(fe, p);
266 at76c651_writereg(state, 0x0c, 0xc2);
267
268 if ((ret = at76c651_set_symbol_rate(state, p->u.qam.symbol_rate)))
269 return ret;
270
271 if ((ret = at76c651_set_inversion(state, p->inversion)))
272 return ret;
273
274 return at76c651_set_auto_config(state);
275}
276
277static int at76c651_set_defaults(struct dvb_frontend* fe)
278{
279 struct at76c651_state* state = fe->demodulator_priv;
280
281 at76c651_set_symbol_rate(state, 6900000);
282 at76c651_set_qam(state, QAM_64);
283 at76c651_set_bbfreq(state);
284 at76c651_set_auto_config(state);
285
286 if (state->config->pll_init) {
287 at76c651_writereg(state, 0x0c, 0xc3);
288 state->config->pll_init(fe);
289 at76c651_writereg(state, 0x0c, 0xc2);
290 }
291
292 return 0;
293}
294
295static int at76c651_read_status(struct dvb_frontend* fe, fe_status_t* status)
296{
297 struct at76c651_state* state = fe->demodulator_priv;
298 u8 sync;
299
300 /*
301 * Bits: FEC, CAR, EQU, TIM, AGC2, AGC1, ADC, PLL (PLL=0)
302 */
303 sync = at76c651_readreg(state, 0x80);
304 *status = 0;
305
306 if (sync & (0x04 | 0x10)) /* AGC1 || TIM */
307 *status |= FE_HAS_SIGNAL;
308 if (sync & 0x10) /* TIM */
309 *status |= FE_HAS_CARRIER;
310 if (sync & 0x80) /* FEC */
311 *status |= FE_HAS_VITERBI;
312 if (sync & 0x40) /* CAR */
313 *status |= FE_HAS_SYNC;
314 if ((sync & 0xF0) == 0xF0) /* TIM && EQU && CAR && FEC */
315 *status |= FE_HAS_LOCK;
316
317 return 0;
318}
319
320static int at76c651_read_ber(struct dvb_frontend* fe, u32* ber)
321{
322 struct at76c651_state* state = fe->demodulator_priv;
323
324 *ber = (at76c651_readreg(state, 0x81) & 0x0F) << 16;
325 *ber |= at76c651_readreg(state, 0x82) << 8;
326 *ber |= at76c651_readreg(state, 0x83);
327 *ber *= 10;
328
329 return 0;
330}
331
332static int at76c651_read_signal_strength(struct dvb_frontend* fe, u16* strength)
333{
334 struct at76c651_state* state = fe->demodulator_priv;
335
336 u8 gain = ~at76c651_readreg(state, 0x91);
337 *strength = (gain << 8) | gain;
338
339 return 0;
340}
341
342static int at76c651_read_snr(struct dvb_frontend* fe, u16* snr)
343{
344 struct at76c651_state* state = fe->demodulator_priv;
345
346 *snr = 0xFFFF -
347 ((at76c651_readreg(state, 0x8F) << 8) |
348 at76c651_readreg(state, 0x90));
349
350 return 0;
351}
352
353static int at76c651_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
354{
355 struct at76c651_state* state = fe->demodulator_priv;
356
357 *ucblocks = at76c651_readreg(state, 0x82);
358
359 return 0;
360}
361
362static int at76c651_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *fesettings)
363{
364 fesettings->min_delay_ms = 50;
365 fesettings->step_size = 0;
366 fesettings->max_drift = 0;
367 return 0;
368}
369
370static void at76c651_release(struct dvb_frontend* fe)
371{
372 struct at76c651_state* state = fe->demodulator_priv;
373 kfree(state);
374}
375
376static struct dvb_frontend_ops at76c651_ops;
377
378struct dvb_frontend* at76c651_attach(const struct at76c651_config* config,
379 struct i2c_adapter* i2c)
380{
381 struct at76c651_state* state = NULL;
382
383 /* allocate memory for the internal state */
384 state = kmalloc(sizeof(struct at76c651_state), GFP_KERNEL);
385 if (state == NULL) goto error;
386
387 /* setup the state */
388 state->config = config;
389 state->qam = 0;
390
391 /* check if the demod is there */
392 if (at76c651_readreg(state, 0x0e) != 0x65) goto error;
393
394 /* finalise state setup */
395 state->i2c = i2c;
396 state->revision = at76c651_readreg(state, 0x0f) & 0xfe;
397 memcpy(&state->ops, &at76c651_ops, sizeof(struct dvb_frontend_ops));
398
399 /* create dvb_frontend */
400 state->frontend.ops = &state->ops;
401 state->frontend.demodulator_priv = state;
402 return &state->frontend;
403
404error:
405 kfree(state);
406 return NULL;
407}
408
409static struct dvb_frontend_ops at76c651_ops = {
410
411 .info = {
412 .name = "Atmel AT76C651B DVB-C",
413 .type = FE_QAM,
414 .frequency_min = 48250000,
415 .frequency_max = 863250000,
416 .frequency_stepsize = 62500,
417 /*.frequency_tolerance = */ /* FIXME: 12% of SR */
418 .symbol_rate_min = 0, /* FIXME */
419 .symbol_rate_max = 9360000, /* FIXME */
420 .symbol_rate_tolerance = 4000,
421 .caps = FE_CAN_INVERSION_AUTO |
422 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
423 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
424 FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
425 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | FE_CAN_QAM_128 |
426 FE_CAN_MUTE_TS | FE_CAN_QAM_256 | FE_CAN_RECOVER
427 },
428
429 .release = at76c651_release,
430
431 .init = at76c651_set_defaults,
432
433 .set_frontend = at76c651_set_parameters,
434 .get_tune_settings = at76c651_get_tune_settings,
435
436 .read_status = at76c651_read_status,
437 .read_ber = at76c651_read_ber,
438 .read_signal_strength = at76c651_read_signal_strength,
439 .read_snr = at76c651_read_snr,
440 .read_ucblocks = at76c651_read_ucblocks,
441};
442
443module_param(debug, int, 0644);
444MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
445
446MODULE_DESCRIPTION("Atmel AT76C651 DVB-C Demodulator Driver");
447MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
448MODULE_LICENSE("GPL");
449
450EXPORT_SYMBOL(at76c651_attach);
diff --git a/drivers/media/dvb/frontends/at76c651.h b/drivers/media/dvb/frontends/at76c651.h
deleted file mode 100644
index 34054df93608..000000000000
--- a/drivers/media/dvb/frontends/at76c651.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * at76c651.c
3 *
4 * Atmel DVB-C Frontend Driver (at76c651)
5 *
6 * Copyright (C) 2001 fnbrd <fnbrd@gmx.de>
7 * & 2002-2004 Andreas Oberritter <obi@linuxtv.org>
8 * & 2003 Wolfram Joost <dbox2@frokaschwei.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 * AT76C651
25 * http://www.nalanda.nitc.ac.in/industry/datasheets/atmel/acrobat/doc1293.pdf
26 * http://www.atmel.com/atmel/acrobat/doc1320.pdf
27 */
28
29#ifndef AT76C651_H
30#define AT76C651_H
31
32#include <linux/dvb/frontend.h>
33
34struct at76c651_config
35{
36 /* the demodulator's i2c address */
37 u8 demod_address;
38
39 /* PLL maintenance */
40 int (*pll_init)(struct dvb_frontend* fe);
41 int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params);
42};
43
44extern struct dvb_frontend* at76c651_attach(const struct at76c651_config* config,
45 struct i2c_adapter* i2c);
46
47#endif // AT76C651_H
diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c
index 1b9934ea5b06..4dcb6050d4fa 100644
--- a/drivers/media/dvb/frontends/dvb-pll.c
+++ b/drivers/media/dvb/frontends/dvb-pll.c
@@ -326,11 +326,11 @@ struct dvb_pll_desc dvb_pll_tuv1236d = {
326}; 326};
327EXPORT_SYMBOL(dvb_pll_tuv1236d); 327EXPORT_SYMBOL(dvb_pll_tuv1236d);
328 328
329/* Samsung TBMV30111IN 329/* Samsung TBMV30111IN / TBMV30712IN1
330 * used in Air2PC ATSC - 2nd generation (nxt2002) 330 * used in Air2PC ATSC - 2nd generation (nxt2002)
331 */ 331 */
332struct dvb_pll_desc dvb_pll_tbmv30111in = { 332struct dvb_pll_desc dvb_pll_samsung_tbmv = {
333 .name = "Samsung TBMV30111IN", 333 .name = "Samsung TBMV30111IN / TBMV30712IN1",
334 .min = 54000000, 334 .min = 54000000,
335 .max = 860000000, 335 .max = 860000000,
336 .count = 6, 336 .count = 6,
@@ -343,7 +343,7 @@ struct dvb_pll_desc dvb_pll_tbmv30111in = {
343 { 999999999, 44000000, 166666, 0xfc, 0x02 }, 343 { 999999999, 44000000, 166666, 0xfc, 0x02 },
344 } 344 }
345}; 345};
346EXPORT_SYMBOL(dvb_pll_tbmv30111in); 346EXPORT_SYMBOL(dvb_pll_samsung_tbmv);
347 347
348/* 348/*
349 * Philips SD1878 Tuner. 349 * Philips SD1878 Tuner.
diff --git a/drivers/media/dvb/frontends/dvb-pll.h b/drivers/media/dvb/frontends/dvb-pll.h
index f682c09189b3..bb8d4b4eb183 100644
--- a/drivers/media/dvb/frontends/dvb-pll.h
+++ b/drivers/media/dvb/frontends/dvb-pll.h
@@ -38,7 +38,7 @@ extern struct dvb_pll_desc dvb_pll_tded4;
38 38
39extern struct dvb_pll_desc dvb_pll_tuv1236d; 39extern struct dvb_pll_desc dvb_pll_tuv1236d;
40extern struct dvb_pll_desc dvb_pll_tdhu2; 40extern struct dvb_pll_desc dvb_pll_tdhu2;
41extern struct dvb_pll_desc dvb_pll_tbmv30111in; 41extern struct dvb_pll_desc dvb_pll_samsung_tbmv;
42extern struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261; 42extern struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261;
43 43
44int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf, 44int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
diff --git a/drivers/media/dvb/frontends/nxt2002.c b/drivers/media/dvb/frontends/nxt2002.c
deleted file mode 100644
index 4f263e65ba14..000000000000
--- a/drivers/media/dvb/frontends/nxt2002.c
+++ /dev/null
@@ -1,706 +0,0 @@
1/*
2 Support for B2C2/BBTI Technisat Air2PC - ATSC
3
4 Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20*/
21
22/*
23 * This driver needs external firmware. Please use the command
24 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to
25 * download/extract it, and then copy it to /usr/lib/hotplug/firmware
26 * or /lib/firmware (depending on configuration of firmware hotplug).
27 */
28#define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
29#define CRC_CCIT_MASK 0x1021
30
31#include <linux/init.h>
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/device.h>
35#include <linux/firmware.h>
36#include <linux/string.h>
37#include <linux/slab.h>
38
39#include "dvb_frontend.h"
40#include "nxt2002.h"
41
42struct nxt2002_state {
43
44 struct i2c_adapter* i2c;
45 struct dvb_frontend_ops ops;
46 const struct nxt2002_config* config;
47 struct dvb_frontend frontend;
48
49 /* demodulator private data */
50 u8 initialised:1;
51};
52
53static int debug;
54#define dprintk(args...) \
55 do { \
56 if (debug) printk(KERN_DEBUG "nxt2002: " args); \
57 } while (0)
58
59static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len)
60{
61 /* probbably a much better way or doing this */
62 u8 buf2 [256],x;
63 int err;
64 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
65
66 buf2[0] = reg;
67 for (x = 0 ; x < len ; x++)
68 buf2[x+1] = buf[x];
69
70 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
71 printk ("%s: i2c write error (addr %02x, err == %i)\n",
72 __FUNCTION__, state->config->demod_address, err);
73 return -EREMOTEIO;
74 }
75
76 return 0;
77}
78
79static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len)
80{
81 u8 reg2 [] = { reg };
82
83 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
84 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
85
86 int err;
87
88 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
89 printk ("%s: i2c read error (addr %02x, err == %i)\n",
90 __FUNCTION__, state->config->demod_address, err);
91 return -EREMOTEIO;
92 }
93
94 return 0;
95}
96
97static u16 nxt2002_crc(u16 crc, u8 c)
98{
99
100 u8 i;
101 u16 input = (u16) c & 0xFF;
102
103 input<<=8;
104 for(i=0 ;i<8 ;i++) {
105 if((crc ^ input) & 0x8000)
106 crc=(crc<<1)^CRC_CCIT_MASK;
107 else
108 crc<<=1;
109 input<<=1;
110 }
111 return crc;
112}
113
114static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
115{
116 u8 buf;
117 dprintk("%s\n", __FUNCTION__);
118
119 /* set multi register length */
120 i2c_writebytes(state,0x34,&len,1);
121
122 /* set mutli register register */
123 i2c_writebytes(state,0x35,&reg,1);
124
125 /* send the actual data */
126 i2c_writebytes(state,0x36,data,len);
127
128 /* toggle the multireg write bit*/
129 buf = 0x02;
130 i2c_writebytes(state,0x21,&buf,1);
131
132 i2c_readbytes(state,0x21,&buf,1);
133
134 if ((buf & 0x02) == 0)
135 return 0;
136
137 dprintk("Error writing multireg register %02X\n",reg);
138
139 return 0;
140}
141
142static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
143{
144 u8 len2;
145 dprintk("%s\n", __FUNCTION__);
146
147 /* set multi register length */
148 len2 = len & 0x80;
149 i2c_writebytes(state,0x34,&len2,1);
150
151 /* set mutli register register */
152 i2c_writebytes(state,0x35,&reg,1);
153
154 /* send the actual data */
155 i2c_readbytes(state,reg,data,len);
156
157 return 0;
158}
159
160static void nxt2002_microcontroller_stop (struct nxt2002_state* state)
161{
162 u8 buf[2],counter = 0;
163 dprintk("%s\n", __FUNCTION__);
164
165 buf[0] = 0x80;
166 i2c_writebytes(state,0x22,buf,1);
167
168 while (counter < 20) {
169 i2c_readbytes(state,0x31,buf,1);
170 if (buf[0] & 0x40)
171 return;
172 msleep(10);
173 counter++;
174 }
175
176 dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n");
177 return;
178}
179
180static void nxt2002_microcontroller_start (struct nxt2002_state* state)
181{
182 u8 buf;
183 dprintk("%s\n", __FUNCTION__);
184
185 buf = 0x00;
186 i2c_writebytes(state,0x22,&buf,1);
187}
188
189static int nxt2002_writetuner (struct nxt2002_state* state, u8* data)
190{
191 u8 buf,count = 0;
192
193 dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]);
194
195 dprintk("%s\n", __FUNCTION__);
196 /* stop the micro first */
197 nxt2002_microcontroller_stop(state);
198
199 /* set the i2c transfer speed to the tuner */
200 buf = 0x03;
201 i2c_writebytes(state,0x20,&buf,1);
202
203 /* setup to transfer 4 bytes via i2c */
204 buf = 0x04;
205 i2c_writebytes(state,0x34,&buf,1);
206
207 /* write actual tuner bytes */
208 i2c_writebytes(state,0x36,data,4);
209
210 /* set tuner i2c address */
211 buf = 0xC2;
212 i2c_writebytes(state,0x35,&buf,1);
213
214 /* write UC Opmode to begin transfer */
215 buf = 0x80;
216 i2c_writebytes(state,0x21,&buf,1);
217
218 while (count < 20) {
219 i2c_readbytes(state,0x21,&buf,1);
220 if ((buf & 0x80)== 0x00)
221 return 0;
222 msleep(100);
223 count++;
224 }
225
226 printk("nxt2002: timeout error writing tuner\n");
227 return 0;
228}
229
230static void nxt2002_agc_reset(struct nxt2002_state* state)
231{
232 u8 buf;
233 dprintk("%s\n", __FUNCTION__);
234
235 buf = 0x08;
236 i2c_writebytes(state,0x08,&buf,1);
237
238 buf = 0x00;
239 i2c_writebytes(state,0x08,&buf,1);
240
241 return;
242}
243
244static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
245{
246
247 struct nxt2002_state* state = fe->demodulator_priv;
248 u8 buf[256],written = 0,chunkpos = 0;
249 u16 rambase,position,crc = 0;
250
251 dprintk("%s\n", __FUNCTION__);
252 dprintk("Firmware is %zu bytes\n",fw->size);
253
254 /* Get the RAM base for this nxt2002 */
255 i2c_readbytes(state,0x10,buf,1);
256
257 if (buf[0] & 0x10)
258 rambase = 0x1000;
259 else
260 rambase = 0x0000;
261
262 dprintk("rambase on this nxt2002 is %04X\n",rambase);
263
264 /* Hold the micro in reset while loading firmware */
265 buf[0] = 0x80;
266 i2c_writebytes(state,0x2B,buf,1);
267
268 for (position = 0; position < fw->size ; position++) {
269 if (written == 0) {
270 crc = 0;
271 chunkpos = 0x28;
272 buf[0] = ((rambase + position) >> 8);
273 buf[1] = (rambase + position) & 0xFF;
274 buf[2] = 0x81;
275 /* write starting address */
276 i2c_writebytes(state,0x29,buf,3);
277 }
278 written++;
279 chunkpos++;
280
281 if ((written % 4) == 0)
282 i2c_writebytes(state,chunkpos,&fw->data[position-3],4);
283
284 crc = nxt2002_crc(crc,fw->data[position]);
285
286 if ((written == 255) || (position+1 == fw->size)) {
287 /* write remaining bytes of firmware */
288 i2c_writebytes(state, chunkpos+4-(written %4),
289 &fw->data[position-(written %4) + 1],
290 written %4);
291 buf[0] = crc << 8;
292 buf[1] = crc & 0xFF;
293
294 /* write crc */
295 i2c_writebytes(state,0x2C,buf,2);
296
297 /* do a read to stop things */
298 i2c_readbytes(state,0x2A,buf,1);
299
300 /* set transfer mode to complete */
301 buf[0] = 0x80;
302 i2c_writebytes(state,0x2B,buf,1);
303
304 written = 0;
305 }
306 }
307
308 printk ("done.\n");
309 return 0;
310};
311
312static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe,
313 struct dvb_frontend_parameters *p)
314{
315 struct nxt2002_state* state = fe->demodulator_priv;
316 u32 freq = 0;
317 u16 tunerfreq = 0;
318 u8 buf[4];
319
320 freq = 44000 + ( p->frequency / 1000 );
321
322 dprintk("freq = %d p->frequency = %d\n",freq,p->frequency);
323
324 tunerfreq = freq * 24/4000;
325
326 buf[0] = (tunerfreq >> 8) & 0x7F;
327 buf[1] = (tunerfreq & 0xFF);
328
329 if (p->frequency <= 214000000) {
330 buf[2] = 0x84 + (0x06 << 3);
331 buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02;
332 } else if (p->frequency <= 721000000) {
333 buf[2] = 0x84 + (0x07 << 3);
334 buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08;
335 } else if (p->frequency <= 841000000) {
336 buf[2] = 0x84 + (0x0E << 3);
337 buf[3] = 0x08;
338 } else {
339 buf[2] = 0x84 + (0x0F << 3);
340 buf[3] = 0x02;
341 }
342
343 /* write frequency information */
344 nxt2002_writetuner(state,buf);
345
346 /* reset the agc now that tuning has been completed */
347 nxt2002_agc_reset(state);
348
349 /* set target power level */
350 switch (p->u.vsb.modulation) {
351 case QAM_64:
352 case QAM_256:
353 buf[0] = 0x74;
354 break;
355 case VSB_8:
356 buf[0] = 0x70;
357 break;
358 default:
359 return -EINVAL;
360 break;
361 }
362 i2c_writebytes(state,0x42,buf,1);
363
364 /* configure sdm */
365 buf[0] = 0x87;
366 i2c_writebytes(state,0x57,buf,1);
367
368 /* write sdm1 input */
369 buf[0] = 0x10;
370 buf[1] = 0x00;
371 nxt2002_writereg_multibyte(state,0x58,buf,2);
372
373 /* write sdmx input */
374 switch (p->u.vsb.modulation) {
375 case QAM_64:
376 buf[0] = 0x68;
377 break;
378 case QAM_256:
379 buf[0] = 0x64;
380 break;
381 case VSB_8:
382 buf[0] = 0x60;
383 break;
384 default:
385 return -EINVAL;
386 break;
387 }
388 buf[1] = 0x00;
389 nxt2002_writereg_multibyte(state,0x5C,buf,2);
390
391 /* write adc power lpf fc */
392 buf[0] = 0x05;
393 i2c_writebytes(state,0x43,buf,1);
394
395 /* write adc power lpf fc */
396 buf[0] = 0x05;
397 i2c_writebytes(state,0x43,buf,1);
398
399 /* write accumulator2 input */
400 buf[0] = 0x80;
401 buf[1] = 0x00;
402 nxt2002_writereg_multibyte(state,0x4B,buf,2);
403
404 /* write kg1 */
405 buf[0] = 0x00;
406 i2c_writebytes(state,0x4D,buf,1);
407
408 /* write sdm12 lpf fc */
409 buf[0] = 0x44;
410 i2c_writebytes(state,0x55,buf,1);
411
412 /* write agc control reg */
413 buf[0] = 0x04;
414 i2c_writebytes(state,0x41,buf,1);
415
416 /* write agc ucgp0 */
417 switch (p->u.vsb.modulation) {
418 case QAM_64:
419 buf[0] = 0x02;
420 break;
421 case QAM_256:
422 buf[0] = 0x03;
423 break;
424 case VSB_8:
425 buf[0] = 0x00;
426 break;
427 default:
428 return -EINVAL;
429 break;
430 }
431 i2c_writebytes(state,0x30,buf,1);
432
433 /* write agc control reg */
434 buf[0] = 0x00;
435 i2c_writebytes(state,0x41,buf,1);
436
437 /* write accumulator2 input */
438 buf[0] = 0x80;
439 buf[1] = 0x00;
440 nxt2002_writereg_multibyte(state,0x49,buf,2);
441 nxt2002_writereg_multibyte(state,0x4B,buf,2);
442
443 /* write agc control reg */
444 buf[0] = 0x04;
445 i2c_writebytes(state,0x41,buf,1);
446
447 nxt2002_microcontroller_start(state);
448
449 /* adjacent channel detection should be done here, but I don't
450 have any stations with this need so I cannot test it */
451
452 return 0;
453}
454
455static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status)
456{
457 struct nxt2002_state* state = fe->demodulator_priv;
458 u8 lock;
459 i2c_readbytes(state,0x31,&lock,1);
460
461 *status = 0;
462 if (lock & 0x20) {
463 *status |= FE_HAS_SIGNAL;
464 *status |= FE_HAS_CARRIER;
465 *status |= FE_HAS_VITERBI;
466 *status |= FE_HAS_SYNC;
467 *status |= FE_HAS_LOCK;
468 }
469 return 0;
470}
471
472static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber)
473{
474 struct nxt2002_state* state = fe->demodulator_priv;
475 u8 b[3];
476
477 nxt2002_readreg_multibyte(state,0xE6,b,3);
478
479 *ber = ((b[0] << 8) + b[1]) * 8;
480
481 return 0;
482}
483
484static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength)
485{
486 struct nxt2002_state* state = fe->demodulator_priv;
487 u8 b[2];
488 u16 temp = 0;
489
490 /* setup to read cluster variance */
491 b[0] = 0x00;
492 i2c_writebytes(state,0xA1,b,1);
493
494 /* get multreg val */
495 nxt2002_readreg_multibyte(state,0xA6,b,2);
496
497 temp = (b[0] << 8) | b[1];
498 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
499
500 return 0;
501}
502
503static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr)
504{
505
506 struct nxt2002_state* state = fe->demodulator_priv;
507 u8 b[2];
508 u16 temp = 0, temp2;
509 u32 snrdb = 0;
510
511 /* setup to read cluster variance */
512 b[0] = 0x00;
513 i2c_writebytes(state,0xA1,b,1);
514
515 /* get multreg val from 0xA6 */
516 nxt2002_readreg_multibyte(state,0xA6,b,2);
517
518 temp = (b[0] << 8) | b[1];
519 temp2 = 0x7FFF - temp;
520
521 /* snr will be in db */
522 if (temp2 > 0x7F00)
523 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
524 else if (temp2 > 0x7EC0)
525 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
526 else if (temp2 > 0x7C00)
527 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
528 else
529 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
530
531 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
532
533 *snr = snrdb * (0xFFFF/32000);
534
535 return 0;
536}
537
538static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
539{
540 struct nxt2002_state* state = fe->demodulator_priv;
541 u8 b[3];
542
543 nxt2002_readreg_multibyte(state,0xE6,b,3);
544 *ucblocks = b[2];
545
546 return 0;
547}
548
549static int nxt2002_sleep(struct dvb_frontend* fe)
550{
551 return 0;
552}
553
554static int nxt2002_init(struct dvb_frontend* fe)
555{
556 struct nxt2002_state* state = fe->demodulator_priv;
557 const struct firmware *fw;
558 int ret;
559 u8 buf[2];
560
561 if (!state->initialised) {
562 /* request the firmware, this will block until someone uploads it */
563 printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
564 ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE);
565 printk("nxt2002: Waiting for firmware upload(2)...\n");
566 if (ret) {
567 printk("nxt2002: no firmware upload (timeout or file not found?)\n");
568 return ret;
569 }
570
571 ret = nxt2002_load_firmware(fe, fw);
572 if (ret) {
573 printk("nxt2002: writing firmware to device failed\n");
574 release_firmware(fw);
575 return ret;
576 }
577 printk("nxt2002: firmware upload complete\n");
578
579 /* Put the micro into reset */
580 nxt2002_microcontroller_stop(state);
581
582 /* ensure transfer is complete */
583 buf[0]=0;
584 i2c_writebytes(state,0x2B,buf,1);
585
586 /* Put the micro into reset for real this time */
587 nxt2002_microcontroller_stop(state);
588
589 /* soft reset everything (agc,frontend,eq,fec)*/
590 buf[0] = 0x0F;
591 i2c_writebytes(state,0x08,buf,1);
592 buf[0] = 0x00;
593 i2c_writebytes(state,0x08,buf,1);
594
595 /* write agc sdm configure */
596 buf[0] = 0xF1;
597 i2c_writebytes(state,0x57,buf,1);
598
599 /* write mod output format */
600 buf[0] = 0x20;
601 i2c_writebytes(state,0x09,buf,1);
602
603 /* write fec mpeg mode */
604 buf[0] = 0x7E;
605 buf[1] = 0x00;
606 i2c_writebytes(state,0xE9,buf,2);
607
608 /* write mux selection */
609 buf[0] = 0x00;
610 i2c_writebytes(state,0xCC,buf,1);
611
612 state->initialised = 1;
613 }
614
615 return 0;
616}
617
618static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
619{
620 fesettings->min_delay_ms = 500;
621 fesettings->step_size = 0;
622 fesettings->max_drift = 0;
623 return 0;
624}
625
626static void nxt2002_release(struct dvb_frontend* fe)
627{
628 struct nxt2002_state* state = fe->demodulator_priv;
629 kfree(state);
630}
631
632static struct dvb_frontend_ops nxt2002_ops;
633
634struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
635 struct i2c_adapter* i2c)
636{
637 struct nxt2002_state* state = NULL;
638 u8 buf [] = {0,0,0,0,0};
639
640 /* allocate memory for the internal state */
641 state = kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL);
642 if (state == NULL) goto error;
643
644 /* setup the state */
645 state->config = config;
646 state->i2c = i2c;
647 memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops));
648 state->initialised = 0;
649
650 /* Check the first 5 registers to ensure this a revision we can handle */
651
652 i2c_readbytes(state, 0x00, buf, 5);
653 if (buf[0] != 0x04) goto error; /* device id */
654 if (buf[1] != 0x02) goto error; /* fab id */
655 if (buf[2] != 0x11) goto error; /* month */
656 if (buf[3] != 0x20) goto error; /* year msb */
657 if (buf[4] != 0x00) goto error; /* year lsb */
658
659 /* create dvb_frontend */
660 state->frontend.ops = &state->ops;
661 state->frontend.demodulator_priv = state;
662 return &state->frontend;
663
664error:
665 kfree(state);
666 return NULL;
667}
668
669static struct dvb_frontend_ops nxt2002_ops = {
670
671 .info = {
672 .name = "Nextwave nxt2002 VSB/QAM frontend",
673 .type = FE_ATSC,
674 .frequency_min = 54000000,
675 .frequency_max = 860000000,
676 /* stepsize is just a guess */
677 .frequency_stepsize = 166666,
678 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
679 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
680 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
681 },
682
683 .release = nxt2002_release,
684
685 .init = nxt2002_init,
686 .sleep = nxt2002_sleep,
687
688 .set_frontend = nxt2002_setup_frontend_parameters,
689 .get_tune_settings = nxt2002_get_tune_settings,
690
691 .read_status = nxt2002_read_status,
692 .read_ber = nxt2002_read_ber,
693 .read_signal_strength = nxt2002_read_signal_strength,
694 .read_snr = nxt2002_read_snr,
695 .read_ucblocks = nxt2002_read_ucblocks,
696
697};
698
699module_param(debug, int, 0644);
700MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
701
702MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
703MODULE_AUTHOR("Taylor Jacob");
704MODULE_LICENSE("GPL");
705
706EXPORT_SYMBOL(nxt2002_attach);
diff --git a/drivers/media/dvb/frontends/nxt2002.h b/drivers/media/dvb/frontends/nxt2002.h
deleted file mode 100644
index 462301f577ee..000000000000
--- a/drivers/media/dvb/frontends/nxt2002.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 Driver for the Nxt2002 demodulator
3*/
4
5#ifndef NXT2002_H
6#define NXT2002_H
7
8#include <linux/dvb/frontend.h>
9#include <linux/firmware.h>
10
11struct nxt2002_config
12{
13 /* the demodulator's i2c address */
14 u8 demod_address;
15
16 /* request firmware for device */
17 int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name);
18};
19
20extern struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
21 struct i2c_adapter* i2c);
22
23#endif // NXT2002_H
diff --git a/drivers/media/dvb/frontends/nxt200x.c b/drivers/media/dvb/frontends/nxt200x.c
index 78d2b93d35b9..9e3535394509 100644
--- a/drivers/media/dvb/frontends/nxt200x.c
+++ b/drivers/media/dvb/frontends/nxt200x.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * Support for NXT2002 and NXT2004 - VSB/QAM 2 * Support for NXT2002 and NXT2004 - VSB/QAM
3 * 3 *
4 * Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com) 4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
5 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net> 6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
6 * and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com) 7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -614,7 +615,17 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
614 /* write sdm1 input */ 615 /* write sdm1 input */
615 buf[0] = 0x10; 616 buf[0] = 0x10;
616 buf[1] = 0x00; 617 buf[1] = 0x00;
617 nxt200x_writebytes(state, 0x58, buf, 2); 618 switch (state->demod_chip) {
619 case NXT2002:
620 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
621 break;
622 case NXT2004:
623 nxt200x_writebytes(state, 0x58, buf, 2);
624 break;
625 default:
626 return -EINVAL;
627 break;
628 }
618 629
619 /* write sdmx input */ 630 /* write sdmx input */
620 switch (p->u.vsb.modulation) { 631 switch (p->u.vsb.modulation) {
@@ -632,7 +643,17 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
632 break; 643 break;
633 } 644 }
634 buf[1] = 0x00; 645 buf[1] = 0x00;
635 nxt200x_writebytes(state, 0x5C, buf, 2); 646 switch (state->demod_chip) {
647 case NXT2002:
648 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
649 break;
650 case NXT2004:
651 nxt200x_writebytes(state, 0x5C, buf, 2);
652 break;
653 default:
654 return -EINVAL;
655 break;
656 }
636 657
637 /* write adc power lpf fc */ 658 /* write adc power lpf fc */
638 buf[0] = 0x05; 659 buf[0] = 0x05;
@@ -648,7 +669,17 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
648 /* write accumulator2 input */ 669 /* write accumulator2 input */
649 buf[0] = 0x80; 670 buf[0] = 0x80;
650 buf[1] = 0x00; 671 buf[1] = 0x00;
651 nxt200x_writebytes(state, 0x4B, buf, 2); 672 switch (state->demod_chip) {
673 case NXT2002:
674 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
675 break;
676 case NXT2004:
677 nxt200x_writebytes(state, 0x4B, buf, 2);
678 break;
679 default:
680 return -EINVAL;
681 break;
682 }
652 683
653 /* write kg1 */ 684 /* write kg1 */
654 buf[0] = 0x00; 685 buf[0] = 0x00;
@@ -714,8 +745,19 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
714 /* write accumulator2 input */ 745 /* write accumulator2 input */
715 buf[0] = 0x80; 746 buf[0] = 0x80;
716 buf[1] = 0x00; 747 buf[1] = 0x00;
717 nxt200x_writebytes(state, 0x49, buf,2); 748 switch (state->demod_chip) {
718 nxt200x_writebytes(state, 0x4B, buf,2); 749 case NXT2002:
750 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
751 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
752 break;
753 case NXT2004:
754 nxt200x_writebytes(state, 0x49, buf, 2);
755 nxt200x_writebytes(state, 0x4B, buf, 2);
756 break;
757 default:
758 return -EINVAL;
759 break;
760 }
719 761
720 /* write agc control reg */ 762 /* write agc control reg */
721 buf[0] = 0x04; 763 buf[0] = 0x04;
@@ -1199,7 +1241,7 @@ module_param(debug, int, 0644);
1199MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 1241MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1200 1242
1201MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); 1243MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1202MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob"); 1244MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1203MODULE_LICENSE("GPL"); 1245MODULE_LICENSE("GPL");
1204 1246
1205EXPORT_SYMBOL(nxt200x_attach); 1247EXPORT_SYMBOL(nxt200x_attach);
diff --git a/drivers/media/dvb/frontends/tda80xx.c b/drivers/media/dvb/frontends/tda80xx.c
deleted file mode 100644
index d1cabb6a0a13..000000000000
--- a/drivers/media/dvb/frontends/tda80xx.c
+++ /dev/null
@@ -1,734 +0,0 @@
1/*
2 * tda80xx.c
3 *
4 * Philips TDA8044 / TDA8083 QPSK demodulator driver
5 *
6 * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net>
7 * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/config.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/spinlock.h>
28#include <linux/threads.h>
29#include <linux/interrupt.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/slab.h>
33#include <asm/irq.h>
34#include <asm/div64.h>
35
36#include "dvb_frontend.h"
37#include "tda80xx.h"
38
39enum {
40 ID_TDA8044 = 0x04,
41 ID_TDA8083 = 0x05,
42};
43
44
45struct tda80xx_state {
46
47 struct i2c_adapter* i2c;
48
49 struct dvb_frontend_ops ops;
50
51 /* configuration settings */
52 const struct tda80xx_config* config;
53
54 struct dvb_frontend frontend;
55
56 u32 clk;
57 int afc_loop;
58 struct work_struct worklet;
59 fe_code_rate_t code_rate;
60 fe_spectral_inversion_t spectral_inversion;
61 fe_status_t status;
62 u8 id;
63};
64
65static int debug = 1;
66#define dprintk if (debug) printk
67
68static u8 tda8044_inittab_pre[] = {
69 0x02, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea,
70 0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x58,
71 0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68,
72 0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x00,
73 0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00
75};
76
77static u8 tda8044_inittab_post[] = {
78 0x04, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea,
79 0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x50,
80 0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68,
81 0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x6c,
82 0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00
84};
85
86static u8 tda8083_inittab[] = {
87 0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea,
88 0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10,
89 0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8,
90 0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00,
91 0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x00
93};
94
95static __inline__ u32 tda80xx_div(u32 a, u32 b)
96{
97 return (a + (b / 2)) / b;
98}
99
100static __inline__ u32 tda80xx_gcd(u32 a, u32 b)
101{
102 u32 r;
103
104 while ((r = a % b)) {
105 a = b;
106 b = r;
107 }
108
109 return b;
110}
111
112static int tda80xx_read(struct tda80xx_state* state, u8 reg, u8 *buf, u8 len)
113{
114 int ret;
115 struct i2c_msg msg[] = { { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 },
116 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
117
118 ret = i2c_transfer(state->i2c, msg, 2);
119
120 if (ret != 2)
121 dprintk("%s: readreg error (reg %02x, ret == %i)\n",
122 __FUNCTION__, reg, ret);
123
124 mdelay(10);
125
126 return (ret == 2) ? 0 : -EREMOTEIO;
127}
128
129static int tda80xx_write(struct tda80xx_state* state, u8 reg, const u8 *buf, u8 len)
130{
131 int ret;
132 u8 wbuf[len + 1];
133 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = wbuf, .len = len + 1 };
134
135 wbuf[0] = reg;
136 memcpy(&wbuf[1], buf, len);
137
138 ret = i2c_transfer(state->i2c, &msg, 1);
139
140 if (ret != 1)
141 dprintk("%s: i2c xfer error (ret == %i)\n", __FUNCTION__, ret);
142
143 mdelay(10);
144
145 return (ret == 1) ? 0 : -EREMOTEIO;
146}
147
148static __inline__ u8 tda80xx_readreg(struct tda80xx_state* state, u8 reg)
149{
150 u8 val;
151
152 tda80xx_read(state, reg, &val, 1);
153
154 return val;
155}
156
157static __inline__ int tda80xx_writereg(struct tda80xx_state* state, u8 reg, u8 data)
158{
159 return tda80xx_write(state, reg, &data, 1);
160}
161
162static int tda80xx_set_parameters(struct tda80xx_state* state,
163 fe_spectral_inversion_t inversion,
164 u32 symbol_rate,
165 fe_code_rate_t fec_inner)
166{
167 u8 buf[15];
168 u64 ratio;
169 u32 clk;
170 u32 k;
171 u32 sr = symbol_rate;
172 u32 gcd;
173 u8 scd;
174
175 if (symbol_rate > (state->clk * 3) / 16)
176 scd = 0;
177 else if (symbol_rate > (state->clk * 3) / 32)
178 scd = 1;
179 else if (symbol_rate > (state->clk * 3) / 64)
180 scd = 2;
181 else
182 scd = 3;
183
184 clk = scd ? (state->clk / (scd * 2)) : state->clk;
185
186 /*
187 * Viterbi decoder:
188 * Differential decoding off
189 * Spectral inversion unknown
190 * QPSK modulation
191 */
192 if (inversion == INVERSION_ON)
193 buf[0] = 0x60;
194 else if (inversion == INVERSION_OFF)
195 buf[0] = 0x20;
196 else
197 buf[0] = 0x00;
198
199 /*
200 * CLK ratio:
201 * system clock frequency is up to 64 or 96 MHz
202 *
203 * formula:
204 * r = k * clk / symbol_rate
205 *
206 * k: 2^21 for caa 0..3,
207 * 2^20 for caa 4..5,
208 * 2^19 for caa 6..7
209 */
210 if (symbol_rate <= (clk * 3) / 32)
211 k = (1 << 19);
212 else if (symbol_rate <= (clk * 3) / 16)
213 k = (1 << 20);
214 else
215 k = (1 << 21);
216
217 gcd = tda80xx_gcd(clk, sr);
218 clk /= gcd;
219 sr /= gcd;
220
221 gcd = tda80xx_gcd(k, sr);
222 k /= gcd;
223 sr /= gcd;
224
225 ratio = (u64)k * (u64)clk;
226 do_div(ratio, sr);
227
228 buf[1] = ratio >> 16;
229 buf[2] = ratio >> 8;
230 buf[3] = ratio;
231
232 /* nyquist filter roll-off factor 35% */
233 buf[4] = 0x20;
234
235 clk = scd ? (state->clk / (scd * 2)) : state->clk;
236
237 /* Anti Alias Filter */
238 if (symbol_rate < (clk * 3) / 64)
239 printk("tda80xx: unsupported symbol rate: %u\n", symbol_rate);
240 else if (symbol_rate <= clk / 16)
241 buf[4] |= 0x07;
242 else if (symbol_rate <= (clk * 3) / 32)
243 buf[4] |= 0x06;
244 else if (symbol_rate <= clk / 8)
245 buf[4] |= 0x05;
246 else if (symbol_rate <= (clk * 3) / 16)
247 buf[4] |= 0x04;
248 else if (symbol_rate <= clk / 4)
249 buf[4] |= 0x03;
250 else if (symbol_rate <= (clk * 3) / 8)
251 buf[4] |= 0x02;
252 else if (symbol_rate <= clk / 2)
253 buf[4] |= 0x01;
254 else
255 buf[4] |= 0x00;
256
257 /* Sigma Delta converter */
258 buf[5] = 0x00;
259
260 /* FEC: Possible puncturing rates */
261 if (fec_inner == FEC_NONE)
262 buf[6] = 0x00;
263 else if ((fec_inner >= FEC_1_2) && (fec_inner <= FEC_8_9))
264 buf[6] = (1 << (8 - fec_inner));
265 else if (fec_inner == FEC_AUTO)
266 buf[6] = 0xff;
267 else
268 return -EINVAL;
269
270 /* carrier lock detector threshold value */
271 buf[7] = 0x30;
272 /* AFC1: proportional part settings */
273 buf[8] = 0x42;
274 /* AFC1: integral part settings */
275 buf[9] = 0x98;
276 /* PD: Leaky integrator SCPC mode */
277 buf[10] = 0x28;
278 /* AFC2, AFC1 controls */
279 buf[11] = 0x30;
280 /* PD: proportional part settings */
281 buf[12] = 0x42;
282 /* PD: integral part settings */
283 buf[13] = 0x99;
284 /* AGC */
285 buf[14] = 0x50 | scd;
286
287 printk("symbol_rate=%u clk=%u\n", symbol_rate, clk);
288
289 return tda80xx_write(state, 0x01, buf, sizeof(buf));
290}
291
292static int tda80xx_set_clk(struct tda80xx_state* state)
293{
294 u8 buf[2];
295
296 /* CLK proportional part */
297 buf[0] = (0x06 << 5) | 0x08; /* CMP[2:0], CSP[4:0] */
298 /* CLK integral part */
299 buf[1] = (0x04 << 5) | 0x1a; /* CMI[2:0], CSI[4:0] */
300
301 return tda80xx_write(state, 0x17, buf, sizeof(buf));
302}
303
304#if 0
305static int tda80xx_set_scpc_freq_offset(struct tda80xx_state* state)
306{
307 /* a constant value is nonsense here imho */
308 return tda80xx_writereg(state, 0x22, 0xf9);
309}
310#endif
311
312static int tda80xx_close_loop(struct tda80xx_state* state)
313{
314 u8 buf[2];
315
316 /* PD: Loop closed, LD: lock detect enable, SCPC: Sweep mode - AFC1 loop closed */
317 buf[0] = 0x68;
318 /* AFC1: Loop closed, CAR Feedback: 8192 */
319 buf[1] = 0x70;
320
321 return tda80xx_write(state, 0x0b, buf, sizeof(buf));
322}
323
324static irqreturn_t tda80xx_irq(int irq, void *priv, struct pt_regs *pt)
325{
326 schedule_work(priv);
327
328 return IRQ_HANDLED;
329}
330
331static void tda80xx_read_status_int(struct tda80xx_state* state)
332{
333 u8 val;
334
335 static const fe_spectral_inversion_t inv_tab[] = {
336 INVERSION_OFF, INVERSION_ON
337 };
338
339 static const fe_code_rate_t fec_tab[] = {
340 FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4,
341 FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8,
342 };
343
344 val = tda80xx_readreg(state, 0x02);
345
346 state->status = 0;
347
348 if (val & 0x01) /* demodulator lock */
349 state->status |= FE_HAS_SIGNAL;
350 if (val & 0x02) /* clock recovery lock */
351 state->status |= FE_HAS_CARRIER;
352 if (val & 0x04) /* viterbi lock */
353 state->status |= FE_HAS_VITERBI;
354 if (val & 0x08) /* deinterleaver lock (packet sync) */
355 state->status |= FE_HAS_SYNC;
356 if (val & 0x10) /* derandomizer lock (frame sync) */
357 state->status |= FE_HAS_LOCK;
358 if (val & 0x20) /* frontend can not lock */
359 state->status |= FE_TIMEDOUT;
360
361 if ((state->status & (FE_HAS_CARRIER)) && (state->afc_loop)) {
362 printk("tda80xx: closing loop\n");
363 tda80xx_close_loop(state);
364 state->afc_loop = 0;
365 }
366
367 if (state->status & (FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK)) {
368 val = tda80xx_readreg(state, 0x0e);
369 state->code_rate = fec_tab[val & 0x07];
370 if (state->status & (FE_HAS_SYNC | FE_HAS_LOCK))
371 state->spectral_inversion = inv_tab[(val >> 7) & 0x01];
372 else
373 state->spectral_inversion = INVERSION_AUTO;
374 }
375 else {
376 state->code_rate = FEC_AUTO;
377 }
378}
379
380static void tda80xx_worklet(void *priv)
381{
382 struct tda80xx_state *state = priv;
383
384 tda80xx_writereg(state, 0x00, 0x04);
385 enable_irq(state->config->irq);
386
387 tda80xx_read_status_int(state);
388}
389
390static void tda80xx_wait_diseqc_fifo(struct tda80xx_state* state)
391{
392 size_t i;
393
394 for (i = 0; i < 100; i++) {
395 if (tda80xx_readreg(state, 0x02) & 0x80)
396 break;
397 msleep(10);
398 }
399}
400
401static int tda8044_init(struct dvb_frontend* fe)
402{
403 struct tda80xx_state* state = fe->demodulator_priv;
404 int ret;
405
406 /*
407 * this function is a mess...
408 */
409
410 if ((ret = tda80xx_write(state, 0x00, tda8044_inittab_pre, sizeof(tda8044_inittab_pre))))
411 return ret;
412
413 tda80xx_writereg(state, 0x0f, 0x50);
414#if 1
415 tda80xx_writereg(state, 0x20, 0x8F); /* FIXME */
416 tda80xx_writereg(state, 0x20, state->config->volt18setting); /* FIXME */
417 //tda80xx_writereg(state, 0x00, 0x04);
418 tda80xx_writereg(state, 0x00, 0x0C);
419#endif
420 //tda80xx_writereg(state, 0x00, 0x08); /* Reset AFC1 loop filter */
421
422 tda80xx_write(state, 0x00, tda8044_inittab_post, sizeof(tda8044_inittab_post));
423
424 if (state->config->pll_init) {
425 tda80xx_writereg(state, 0x1c, 0x80);
426 state->config->pll_init(fe);
427 tda80xx_writereg(state, 0x1c, 0x00);
428 }
429
430 return 0;
431}
432
433static int tda8083_init(struct dvb_frontend* fe)
434{
435 struct tda80xx_state* state = fe->demodulator_priv;
436
437 tda80xx_write(state, 0x00, tda8083_inittab, sizeof(tda8083_inittab));
438
439 if (state->config->pll_init) {
440 tda80xx_writereg(state, 0x1c, 0x80);
441 state->config->pll_init(fe);
442 tda80xx_writereg(state, 0x1c, 0x00);
443 }
444
445 return 0;
446}
447
448static int tda80xx_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
449{
450 struct tda80xx_state* state = fe->demodulator_priv;
451
452 switch (voltage) {
453 case SEC_VOLTAGE_13:
454 return tda80xx_writereg(state, 0x20, state->config->volt13setting);
455 case SEC_VOLTAGE_18:
456 return tda80xx_writereg(state, 0x20, state->config->volt18setting);
457 case SEC_VOLTAGE_OFF:
458 return tda80xx_writereg(state, 0x20, 0);
459 default:
460 return -EINVAL;
461 }
462}
463
464static int tda80xx_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
465{
466 struct tda80xx_state* state = fe->demodulator_priv;
467
468 switch (tone) {
469 case SEC_TONE_OFF:
470 return tda80xx_writereg(state, 0x29, 0x00);
471 case SEC_TONE_ON:
472 return tda80xx_writereg(state, 0x29, 0x80);
473 default:
474 return -EINVAL;
475 }
476}
477
478static int tda80xx_send_diseqc_msg(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *cmd)
479{
480 struct tda80xx_state* state = fe->demodulator_priv;
481
482 if (cmd->msg_len > 6)
483 return -EINVAL;
484
485 tda80xx_writereg(state, 0x29, 0x08 | (cmd->msg_len - 3));
486 tda80xx_write(state, 0x23, cmd->msg, cmd->msg_len);
487 tda80xx_writereg(state, 0x29, 0x0c | (cmd->msg_len - 3));
488 tda80xx_wait_diseqc_fifo(state);
489
490 return 0;
491}
492
493static int tda80xx_send_diseqc_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t cmd)
494{
495 struct tda80xx_state* state = fe->demodulator_priv;
496
497 switch (cmd) {
498 case SEC_MINI_A:
499 tda80xx_writereg(state, 0x29, 0x14);
500 break;
501 case SEC_MINI_B:
502 tda80xx_writereg(state, 0x29, 0x1c);
503 break;
504 default:
505 return -EINVAL;
506 }
507
508 tda80xx_wait_diseqc_fifo(state);
509
510 return 0;
511}
512
513static int tda80xx_sleep(struct dvb_frontend* fe)
514{
515 struct tda80xx_state* state = fe->demodulator_priv;
516
517 tda80xx_writereg(state, 0x00, 0x02); /* enter standby */
518
519 return 0;
520}
521
522static int tda80xx_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
523{
524 struct tda80xx_state* state = fe->demodulator_priv;
525
526 tda80xx_writereg(state, 0x1c, 0x80);
527 state->config->pll_set(fe, p);
528 tda80xx_writereg(state, 0x1c, 0x00);
529
530 tda80xx_set_parameters(state, p->inversion, p->u.qpsk.symbol_rate, p->u.qpsk.fec_inner);
531 tda80xx_set_clk(state);
532 //tda80xx_set_scpc_freq_offset(state);
533 state->afc_loop = 1;
534
535 return 0;
536}
537
538static int tda80xx_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
539{
540 struct tda80xx_state* state = fe->demodulator_priv;
541
542 if (!state->config->irq)
543 tda80xx_read_status_int(state);
544
545 p->inversion = state->spectral_inversion;
546 p->u.qpsk.fec_inner = state->code_rate;
547
548 return 0;
549}
550
551static int tda80xx_read_status(struct dvb_frontend* fe, fe_status_t* status)
552{
553 struct tda80xx_state* state = fe->demodulator_priv;
554
555 if (!state->config->irq)
556 tda80xx_read_status_int(state);
557 *status = state->status;
558
559 return 0;
560}
561
562static int tda80xx_read_ber(struct dvb_frontend* fe, u32* ber)
563{
564 struct tda80xx_state* state = fe->demodulator_priv;
565 int ret;
566 u8 buf[3];
567
568 if ((ret = tda80xx_read(state, 0x0b, buf, sizeof(buf))))
569 return ret;
570
571 *ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2];
572
573 return 0;
574}
575
576static int tda80xx_read_signal_strength(struct dvb_frontend* fe, u16* strength)
577{
578 struct tda80xx_state* state = fe->demodulator_priv;
579
580 u8 gain = ~tda80xx_readreg(state, 0x01);
581 *strength = (gain << 8) | gain;
582
583 return 0;
584}
585
586static int tda80xx_read_snr(struct dvb_frontend* fe, u16* snr)
587{
588 struct tda80xx_state* state = fe->demodulator_priv;
589
590 u8 quality = tda80xx_readreg(state, 0x08);
591 *snr = (quality << 8) | quality;
592
593 return 0;
594}
595
596static int tda80xx_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
597{
598 struct tda80xx_state* state = fe->demodulator_priv;
599
600 *ucblocks = tda80xx_readreg(state, 0x0f);
601 if (*ucblocks == 0xff)
602 *ucblocks = 0xffffffff;
603
604 return 0;
605}
606
607static int tda80xx_init(struct dvb_frontend* fe)
608{
609 struct tda80xx_state* state = fe->demodulator_priv;
610
611 switch(state->id) {
612 case ID_TDA8044:
613 return tda8044_init(fe);
614
615 case ID_TDA8083:
616 return tda8083_init(fe);
617 }
618 return 0;
619}
620
621static void tda80xx_release(struct dvb_frontend* fe)
622{
623 struct tda80xx_state* state = fe->demodulator_priv;
624
625 if (state->config->irq)
626 free_irq(state->config->irq, &state->worklet);
627
628 kfree(state);
629}
630
631static struct dvb_frontend_ops tda80xx_ops;
632
633struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config,
634 struct i2c_adapter* i2c)
635{
636 struct tda80xx_state* state = NULL;
637 int ret;
638
639 /* allocate memory for the internal state */
640 state = kmalloc(sizeof(struct tda80xx_state), GFP_KERNEL);
641 if (state == NULL) goto error;
642
643 /* setup the state */
644 state->config = config;
645 state->i2c = i2c;
646 memcpy(&state->ops, &tda80xx_ops, sizeof(struct dvb_frontend_ops));
647 state->spectral_inversion = INVERSION_AUTO;
648 state->code_rate = FEC_AUTO;
649 state->status = 0;
650 state->afc_loop = 0;
651
652 /* check if the demod is there */
653 if (tda80xx_writereg(state, 0x89, 0x00) < 0) goto error;
654 state->id = tda80xx_readreg(state, 0x00);
655
656 switch (state->id) {
657 case ID_TDA8044:
658 state->clk = 96000000;
659 printk("tda80xx: Detected tda8044\n");
660 break;
661
662 case ID_TDA8083:
663 state->clk = 64000000;
664 printk("tda80xx: Detected tda8083\n");
665 break;
666
667 default:
668 goto error;
669 }
670
671 /* setup IRQ */
672 if (state->config->irq) {
673 INIT_WORK(&state->worklet, tda80xx_worklet, state);
674 if ((ret = request_irq(state->config->irq, tda80xx_irq, SA_ONESHOT, "tda80xx", &state->worklet)) < 0) {
675 printk(KERN_ERR "tda80xx: request_irq failed (%d)\n", ret);
676 goto error;
677 }
678 }
679
680 /* create dvb_frontend */
681 state->frontend.ops = &state->ops;
682 state->frontend.demodulator_priv = state;
683 return &state->frontend;
684
685error:
686 kfree(state);
687 return NULL;
688}
689
690static struct dvb_frontend_ops tda80xx_ops = {
691
692 .info = {
693 .name = "Philips TDA80xx DVB-S",
694 .type = FE_QPSK,
695 .frequency_min = 500000,
696 .frequency_max = 2700000,
697 .frequency_stepsize = 125,
698 .symbol_rate_min = 4500000,
699 .symbol_rate_max = 45000000,
700 .caps = FE_CAN_INVERSION_AUTO |
701 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
702 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
703 FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
704 FE_CAN_QPSK |
705 FE_CAN_MUTE_TS
706 },
707
708 .release = tda80xx_release,
709
710 .init = tda80xx_init,
711 .sleep = tda80xx_sleep,
712
713 .set_frontend = tda80xx_set_frontend,
714 .get_frontend = tda80xx_get_frontend,
715
716 .read_status = tda80xx_read_status,
717 .read_ber = tda80xx_read_ber,
718 .read_signal_strength = tda80xx_read_signal_strength,
719 .read_snr = tda80xx_read_snr,
720 .read_ucblocks = tda80xx_read_ucblocks,
721
722 .diseqc_send_master_cmd = tda80xx_send_diseqc_msg,
723 .diseqc_send_burst = tda80xx_send_diseqc_burst,
724 .set_tone = tda80xx_set_tone,
725 .set_voltage = tda80xx_set_voltage,
726};
727
728module_param(debug, int, 0644);
729
730MODULE_DESCRIPTION("Philips TDA8044 / TDA8083 DVB-S Demodulator driver");
731MODULE_AUTHOR("Felix Domke, Andreas Oberritter");
732MODULE_LICENSE("GPL");
733
734EXPORT_SYMBOL(tda80xx_attach);
diff --git a/drivers/media/dvb/frontends/tda80xx.h b/drivers/media/dvb/frontends/tda80xx.h
deleted file mode 100644
index cd639a0aad55..000000000000
--- a/drivers/media/dvb/frontends/tda80xx.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * tda80xx.c
3 *
4 * Philips TDA8044 / TDA8083 QPSK demodulator driver
5 *
6 * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net>
7 * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#ifndef TDA80XX_H
25#define TDA80XX_H
26
27#include <linux/dvb/frontend.h>
28
29struct tda80xx_config
30{
31 /* the demodulator's i2c address */
32 u8 demod_address;
33
34 /* IRQ to use (0=>no IRQ used) */
35 u32 irq;
36
37 /* Register setting to use for 13v */
38 u8 volt13setting;
39
40 /* Register setting to use for 18v */
41 u8 volt18setting;
42
43 /* PLL maintenance */
44 int (*pll_init)(struct dvb_frontend* fe);
45 int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params);
46};
47
48extern struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config,
49 struct i2c_adapter* i2c);
50
51#endif // TDA80XX_H
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-08 18:09:07 -0500