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path: root/drivers/media/dvb/frontends/stv090x.c
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Diffstat (limited to 'drivers/media/dvb/frontends/stv090x.c')
-rw-r--r--drivers/media/dvb/frontends/stv090x.c4299
1 files changed, 4299 insertions, 0 deletions
diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c
new file mode 100644
index 000000000000..96ef745a2e4e
--- /dev/null
+++ b/drivers/media/dvb/frontends/stv090x.c
@@ -0,0 +1,4299 @@
1/*
2 STV0900/0903 Multistandard Broadcast Frontend driver
3 Copyright (C) Manu Abraham <abraham.manu@gmail.com>
4
5 Copyright (C) ST Microelectronics
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/mutex.h>
27
28#include <linux/dvb/frontend.h>
29#include "dvb_frontend.h"
30
31#include "stv6110x.h" /* for demodulator internal modes */
32
33#include "stv090x_reg.h"
34#include "stv090x.h"
35#include "stv090x_priv.h"
36
37static unsigned int verbose;
38module_param(verbose, int, 0644);
39
40struct mutex demod_lock;
41
42/* DVBS1 and DSS C/N Lookup table */
43static const struct stv090x_tab stv090x_s1cn_tab[] = {
44 { 0, 8917 }, /* 0.0dB */
45 { 5, 8801 }, /* 0.5dB */
46 { 10, 8667 }, /* 1.0dB */
47 { 15, 8522 }, /* 1.5dB */
48 { 20, 8355 }, /* 2.0dB */
49 { 25, 8175 }, /* 2.5dB */
50 { 30, 7979 }, /* 3.0dB */
51 { 35, 7763 }, /* 3.5dB */
52 { 40, 7530 }, /* 4.0dB */
53 { 45, 7282 }, /* 4.5dB */
54 { 50, 7026 }, /* 5.0dB */
55 { 55, 6781 }, /* 5.5dB */
56 { 60, 6514 }, /* 6.0dB */
57 { 65, 6241 }, /* 6.5dB */
58 { 70, 5965 }, /* 7.0dB */
59 { 75, 5690 }, /* 7.5dB */
60 { 80, 5424 }, /* 8.0dB */
61 { 85, 5161 }, /* 8.5dB */
62 { 90, 4902 }, /* 9.0dB */
63 { 95, 4654 }, /* 9.5dB */
64 { 100, 4417 }, /* 10.0dB */
65 { 105, 4186 }, /* 10.5dB */
66 { 110, 3968 }, /* 11.0dB */
67 { 115, 3757 }, /* 11.5dB */
68 { 120, 3558 }, /* 12.0dB */
69 { 125, 3366 }, /* 12.5dB */
70 { 130, 3185 }, /* 13.0dB */
71 { 135, 3012 }, /* 13.5dB */
72 { 140, 2850 }, /* 14.0dB */
73 { 145, 2698 }, /* 14.5dB */
74 { 150, 2550 }, /* 15.0dB */
75 { 160, 2283 }, /* 16.0dB */
76 { 170, 2042 }, /* 17.0dB */
77 { 180, 1827 }, /* 18.0dB */
78 { 190, 1636 }, /* 19.0dB */
79 { 200, 1466 }, /* 20.0dB */
80 { 210, 1315 }, /* 21.0dB */
81 { 220, 1181 }, /* 22.0dB */
82 { 230, 1064 }, /* 23.0dB */
83 { 240, 960 }, /* 24.0dB */
84 { 250, 869 }, /* 25.0dB */
85 { 260, 792 }, /* 26.0dB */
86 { 270, 724 }, /* 27.0dB */
87 { 280, 665 }, /* 28.0dB */
88 { 290, 616 }, /* 29.0dB */
89 { 300, 573 }, /* 30.0dB */
90 { 310, 537 }, /* 31.0dB */
91 { 320, 507 }, /* 32.0dB */
92 { 330, 483 }, /* 33.0dB */
93 { 400, 398 }, /* 40.0dB */
94 { 450, 381 }, /* 45.0dB */
95 { 500, 377 } /* 50.0dB */
96};
97
98/* DVBS2 C/N Lookup table */
99static const struct stv090x_tab stv090x_s2cn_tab[] = {
100 { -30, 13348 }, /* -3.0dB */
101 { -20, 12640 }, /* -2d.0B */
102 { -10, 11883 }, /* -1.0dB */
103 { 0, 11101 }, /* -0.0dB */
104 { 5, 10718 }, /* 0.5dB */
105 { 10, 10339 }, /* 1.0dB */
106 { 15, 9947 }, /* 1.5dB */
107 { 20, 9552 }, /* 2.0dB */
108 { 25, 9183 }, /* 2.5dB */
109 { 30, 8799 }, /* 3.0dB */
110 { 35, 8422 }, /* 3.5dB */
111 { 40, 8062 }, /* 4.0dB */
112 { 45, 7707 }, /* 4.5dB */
113 { 50, 7353 }, /* 5.0dB */
114 { 55, 7025 }, /* 5.5dB */
115 { 60, 6684 }, /* 6.0dB */
116 { 65, 6331 }, /* 6.5dB */
117 { 70, 6036 }, /* 7.0dB */
118 { 75, 5727 }, /* 7.5dB */
119 { 80, 5437 }, /* 8.0dB */
120 { 85, 5164 }, /* 8.5dB */
121 { 90, 4902 }, /* 9.0dB */
122 { 95, 4653 }, /* 9.5dB */
123 { 100, 4408 }, /* 10.0dB */
124 { 105, 4187 }, /* 10.5dB */
125 { 110, 3961 }, /* 11.0dB */
126 { 115, 3751 }, /* 11.5dB */
127 { 120, 3558 }, /* 12.0dB */
128 { 125, 3368 }, /* 12.5dB */
129 { 130, 3191 }, /* 13.0dB */
130 { 135, 3017 }, /* 13.5dB */
131 { 140, 2862 }, /* 14.0dB */
132 { 145, 2710 }, /* 14.5dB */
133 { 150, 2565 }, /* 15.0dB */
134 { 160, 2300 }, /* 16.0dB */
135 { 170, 2058 }, /* 17.0dB */
136 { 180, 1849 }, /* 18.0dB */
137 { 190, 1663 }, /* 19.0dB */
138 { 200, 1495 }, /* 20.0dB */
139 { 210, 1349 }, /* 21.0dB */
140 { 220, 1222 }, /* 22.0dB */
141 { 230, 1110 }, /* 23.0dB */
142 { 240, 1011 }, /* 24.0dB */
143 { 250, 925 }, /* 25.0dB */
144 { 260, 853 }, /* 26.0dB */
145 { 270, 789 }, /* 27.0dB */
146 { 280, 734 }, /* 28.0dB */
147 { 290, 690 }, /* 29.0dB */
148 { 300, 650 }, /* 30.0dB */
149 { 310, 619 }, /* 31.0dB */
150 { 320, 593 }, /* 32.0dB */
151 { 330, 571 }, /* 33.0dB */
152 { 400, 498 }, /* 40.0dB */
153 { 450, 484 }, /* 45.0dB */
154 { 500, 481 } /* 50.0dB */
155};
156
157/* RF level C/N lookup table */
158static const struct stv090x_tab stv090x_rf_tab[] = {
159 { -5, 0xcaa1 }, /* -5dBm */
160 { -10, 0xc229 }, /* -10dBm */
161 { -15, 0xbb08 }, /* -15dBm */
162 { -20, 0xb4bc }, /* -20dBm */
163 { -25, 0xad5a }, /* -25dBm */
164 { -30, 0xa298 }, /* -30dBm */
165 { -35, 0x98a8 }, /* -35dBm */
166 { -40, 0x8389 }, /* -40dBm */
167 { -45, 0x59be }, /* -45dBm */
168 { -50, 0x3a14 }, /* -50dBm */
169 { -55, 0x2d11 }, /* -55dBm */
170 { -60, 0x210d }, /* -60dBm */
171 { -65, 0xa14f }, /* -65dBm */
172 { -70, 0x07aa } /* -70dBm */
173};
174
175
176static struct stv090x_reg stv0900_initval[] = {
177
178 { STV090x_OUTCFG, 0x00 },
179 { STV090x_MODECFG, 0xff },
180 { STV090x_AGCRF1CFG, 0x11 },
181 { STV090x_AGCRF2CFG, 0x13 },
182 { STV090x_TSGENERAL1X, 0x14 },
183 { STV090x_TSTTNR2, 0x21 },
184 { STV090x_TSTTNR4, 0x21 },
185 { STV090x_P2_DISTXCTL, 0x22 },
186 { STV090x_P2_F22TX, 0xc0 },
187 { STV090x_P2_F22RX, 0xc0 },
188 { STV090x_P2_DISRXCTL, 0x00 },
189 { STV090x_P2_DMDCFGMD, 0xF9 },
190 { STV090x_P2_DEMOD, 0x08 },
191 { STV090x_P2_DMDCFG3, 0xc4 },
192 { STV090x_P2_CARFREQ, 0xed },
193 { STV090x_P2_LDT, 0xd0 },
194 { STV090x_P2_LDT2, 0xb8 },
195 { STV090x_P2_TMGCFG, 0xd2 },
196 { STV090x_P2_TMGTHRISE, 0x20 },
197 { STV090x_P1_TMGCFG, 0xd2 },
198
199 { STV090x_P2_TMGTHFALL, 0x00 },
200 { STV090x_P2_FECSPY, 0x88 },
201 { STV090x_P2_FSPYDATA, 0x3a },
202 { STV090x_P2_FBERCPT4, 0x00 },
203 { STV090x_P2_FSPYBER, 0x10 },
204 { STV090x_P2_ERRCTRL1, 0x35 },
205 { STV090x_P2_ERRCTRL2, 0xc1 },
206 { STV090x_P2_CFRICFG, 0xf8 },
207 { STV090x_P2_NOSCFG, 0x1c },
208 { STV090x_P2_DMDTOM, 0x20 },
209 { STV090x_P2_CORRELMANT, 0x70 },
210 { STV090x_P2_CORRELABS, 0x88 },
211 { STV090x_P2_AGC2O, 0x5b },
212 { STV090x_P2_AGC2REF, 0x38 },
213 { STV090x_P2_CARCFG, 0xe4 },
214 { STV090x_P2_ACLC, 0x1A },
215 { STV090x_P2_BCLC, 0x09 },
216 { STV090x_P2_CARHDR, 0x08 },
217 { STV090x_P2_KREFTMG, 0xc1 },
218 { STV090x_P2_SFRUPRATIO, 0xf0 },
219 { STV090x_P2_SFRLOWRATIO, 0x70 },
220 { STV090x_P2_SFRSTEP, 0x58 },
221 { STV090x_P2_TMGCFG2, 0x01 },
222 { STV090x_P2_CAR2CFG, 0x26 },
223 { STV090x_P2_BCLC2S2Q, 0x86 },
224 { STV090x_P2_BCLC2S28, 0x86 },
225 { STV090x_P2_SMAPCOEF7, 0x77 },
226 { STV090x_P2_SMAPCOEF6, 0x85 },
227 { STV090x_P2_SMAPCOEF5, 0x77 },
228 { STV090x_P2_TSCFGL, 0x20 },
229 { STV090x_P2_DMDCFG2, 0x3b },
230 { STV090x_P2_MODCODLST0, 0xff },
231 { STV090x_P2_MODCODLST1, 0xff },
232 { STV090x_P2_MODCODLST2, 0xff },
233 { STV090x_P2_MODCODLST3, 0xff },
234 { STV090x_P2_MODCODLST4, 0xff },
235 { STV090x_P2_MODCODLST5, 0xff },
236 { STV090x_P2_MODCODLST6, 0xff },
237 { STV090x_P2_MODCODLST7, 0xcc },
238 { STV090x_P2_MODCODLST8, 0xcc },
239 { STV090x_P2_MODCODLST9, 0xcc },
240 { STV090x_P2_MODCODLSTA, 0xcc },
241 { STV090x_P2_MODCODLSTB, 0xcc },
242 { STV090x_P2_MODCODLSTC, 0xcc },
243 { STV090x_P2_MODCODLSTD, 0xcc },
244 { STV090x_P2_MODCODLSTE, 0xcc },
245 { STV090x_P2_MODCODLSTF, 0xcf },
246 { STV090x_P1_DISTXCTL, 0x22 },
247 { STV090x_P1_F22TX, 0xc0 },
248 { STV090x_P1_F22RX, 0xc0 },
249 { STV090x_P1_DISRXCTL, 0x00 },
250 { STV090x_P1_DMDCFGMD, 0xf9 },
251 { STV090x_P1_DEMOD, 0x08 },
252 { STV090x_P1_DMDCFG3, 0xc4 },
253 { STV090x_P1_DMDTOM, 0x20 },
254 { STV090x_P1_CARFREQ, 0xed },
255 { STV090x_P1_LDT, 0xd0 },
256 { STV090x_P1_LDT2, 0xb8 },
257 { STV090x_P1_TMGCFG, 0xd2 },
258 { STV090x_P1_TMGTHRISE, 0x20 },
259 { STV090x_P1_TMGTHFALL, 0x00 },
260 { STV090x_P1_SFRUPRATIO, 0xf0 },
261 { STV090x_P1_SFRLOWRATIO, 0x70 },
262 { STV090x_P1_TSCFGL, 0x20 },
263 { STV090x_P1_FECSPY, 0x88 },
264 { STV090x_P1_FSPYDATA, 0x3a },
265 { STV090x_P1_FBERCPT4, 0x00 },
266 { STV090x_P1_FSPYBER, 0x10 },
267 { STV090x_P1_ERRCTRL1, 0x35 },
268 { STV090x_P1_ERRCTRL2, 0xc1 },
269 { STV090x_P1_CFRICFG, 0xf8 },
270 { STV090x_P1_NOSCFG, 0x1c },
271 { STV090x_P1_CORRELMANT, 0x70 },
272 { STV090x_P1_CORRELABS, 0x88 },
273 { STV090x_P1_AGC2O, 0x5b },
274 { STV090x_P1_AGC2REF, 0x38 },
275 { STV090x_P1_CARCFG, 0xe4 },
276 { STV090x_P1_ACLC, 0x1A },
277 { STV090x_P1_BCLC, 0x09 },
278 { STV090x_P1_CARHDR, 0x08 },
279 { STV090x_P1_KREFTMG, 0xc1 },
280 { STV090x_P1_SFRSTEP, 0x58 },
281 { STV090x_P1_TMGCFG2, 0x01 },
282 { STV090x_P1_CAR2CFG, 0x26 },
283 { STV090x_P1_BCLC2S2Q, 0x86 },
284 { STV090x_P1_BCLC2S28, 0x86 },
285 { STV090x_P1_SMAPCOEF7, 0x77 },
286 { STV090x_P1_SMAPCOEF6, 0x85 },
287 { STV090x_P1_SMAPCOEF5, 0x77 },
288 { STV090x_P1_DMDCFG2, 0x3b },
289 { STV090x_P1_MODCODLST0, 0xff },
290 { STV090x_P1_MODCODLST1, 0xff },
291 { STV090x_P1_MODCODLST2, 0xff },
292 { STV090x_P1_MODCODLST3, 0xff },
293 { STV090x_P1_MODCODLST4, 0xff },
294 { STV090x_P1_MODCODLST5, 0xff },
295 { STV090x_P1_MODCODLST6, 0xff },
296 { STV090x_P1_MODCODLST7, 0xcc },
297 { STV090x_P1_MODCODLST8, 0xcc },
298 { STV090x_P1_MODCODLST9, 0xcc },
299 { STV090x_P1_MODCODLSTA, 0xcc },
300 { STV090x_P1_MODCODLSTB, 0xcc },
301 { STV090x_P1_MODCODLSTC, 0xcc },
302 { STV090x_P1_MODCODLSTD, 0xcc },
303 { STV090x_P1_MODCODLSTE, 0xcc },
304 { STV090x_P1_MODCODLSTF, 0xcf },
305 { STV090x_GENCFG, 0x1d },
306 { STV090x_NBITER_NF4, 0x37 },
307 { STV090x_NBITER_NF5, 0x29 },
308 { STV090x_NBITER_NF6, 0x37 },
309 { STV090x_NBITER_NF7, 0x33 },
310 { STV090x_NBITER_NF8, 0x31 },
311 { STV090x_NBITER_NF9, 0x2f },
312 { STV090x_NBITER_NF10, 0x39 },
313 { STV090x_NBITER_NF11, 0x3a },
314 { STV090x_NBITER_NF12, 0x29 },
315 { STV090x_NBITER_NF13, 0x37 },
316 { STV090x_NBITER_NF14, 0x33 },
317 { STV090x_NBITER_NF15, 0x2f },
318 { STV090x_NBITER_NF16, 0x39 },
319 { STV090x_NBITER_NF17, 0x3a },
320 { STV090x_NBITERNOERR, 0x04 },
321 { STV090x_GAINLLR_NF4, 0x0C },
322 { STV090x_GAINLLR_NF5, 0x0F },
323 { STV090x_GAINLLR_NF6, 0x11 },
324 { STV090x_GAINLLR_NF7, 0x14 },
325 { STV090x_GAINLLR_NF8, 0x17 },
326 { STV090x_GAINLLR_NF9, 0x19 },
327 { STV090x_GAINLLR_NF10, 0x20 },
328 { STV090x_GAINLLR_NF11, 0x21 },
329 { STV090x_GAINLLR_NF12, 0x0D },
330 { STV090x_GAINLLR_NF13, 0x0F },
331 { STV090x_GAINLLR_NF14, 0x13 },
332 { STV090x_GAINLLR_NF15, 0x1A },
333 { STV090x_GAINLLR_NF16, 0x1F },
334 { STV090x_GAINLLR_NF17, 0x21 },
335 { STV090x_RCCFGH, 0x20 },
336 { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
337 { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
338 { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
339 { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
340};
341
342static struct stv090x_reg stv0903_initval[] = {
343 { STV090x_OUTCFG, 0x00 },
344 { STV090x_AGCRF1CFG, 0x11 },
345 { STV090x_STOPCLK1, 0x48 },
346 { STV090x_STOPCLK2, 0x14 },
347 { STV090x_TSTTNR1, 0x27 },
348 { STV090x_TSTTNR2, 0x21 },
349 { STV090x_P1_DISTXCTL, 0x22 },
350 { STV090x_P1_F22TX, 0xc0 },
351 { STV090x_P1_F22RX, 0xc0 },
352 { STV090x_P1_DISRXCTL, 0x00 },
353 { STV090x_P1_DMDCFGMD, 0xF9 },
354 { STV090x_P1_DEMOD, 0x08 },
355 { STV090x_P1_DMDCFG3, 0xc4 },
356 { STV090x_P1_CARFREQ, 0xed },
357 { STV090x_P1_TNRCFG2, 0x82 },
358 { STV090x_P1_LDT, 0xd0 },
359 { STV090x_P1_LDT2, 0xb8 },
360 { STV090x_P1_TMGCFG, 0xd2 },
361 { STV090x_P1_TMGTHRISE, 0x20 },
362 { STV090x_P1_TMGTHFALL, 0x00 },
363 { STV090x_P1_SFRUPRATIO, 0xf0 },
364 { STV090x_P1_SFRLOWRATIO, 0x70 },
365 { STV090x_P1_TSCFGL, 0x20 },
366 { STV090x_P1_FECSPY, 0x88 },
367 { STV090x_P1_FSPYDATA, 0x3a },
368 { STV090x_P1_FBERCPT4, 0x00 },
369 { STV090x_P1_FSPYBER, 0x10 },
370 { STV090x_P1_ERRCTRL1, 0x35 },
371 { STV090x_P1_ERRCTRL2, 0xc1 },
372 { STV090x_P1_CFRICFG, 0xf8 },
373 { STV090x_P1_NOSCFG, 0x1c },
374 { STV090x_P1_DMDTOM, 0x20 },
375 { STV090x_P1_CORRELMANT, 0x70 },
376 { STV090x_P1_CORRELABS, 0x88 },
377 { STV090x_P1_AGC2O, 0x5b },
378 { STV090x_P1_AGC2REF, 0x38 },
379 { STV090x_P1_CARCFG, 0xe4 },
380 { STV090x_P1_ACLC, 0x1A },
381 { STV090x_P1_BCLC, 0x09 },
382 { STV090x_P1_CARHDR, 0x08 },
383 { STV090x_P1_KREFTMG, 0xc1 },
384 { STV090x_P1_SFRSTEP, 0x58 },
385 { STV090x_P1_TMGCFG2, 0x01 },
386 { STV090x_P1_CAR2CFG, 0x26 },
387 { STV090x_P1_BCLC2S2Q, 0x86 },
388 { STV090x_P1_BCLC2S28, 0x86 },
389 { STV090x_P1_SMAPCOEF7, 0x77 },
390 { STV090x_P1_SMAPCOEF6, 0x85 },
391 { STV090x_P1_SMAPCOEF5, 0x77 },
392 { STV090x_P1_DMDCFG2, 0x3b },
393 { STV090x_P1_MODCODLST0, 0xff },
394 { STV090x_P1_MODCODLST1, 0xff },
395 { STV090x_P1_MODCODLST2, 0xff },
396 { STV090x_P1_MODCODLST3, 0xff },
397 { STV090x_P1_MODCODLST4, 0xff },
398 { STV090x_P1_MODCODLST5, 0xff },
399 { STV090x_P1_MODCODLST6, 0xff },
400 { STV090x_P1_MODCODLST7, 0xcc },
401 { STV090x_P1_MODCODLST8, 0xcc },
402 { STV090x_P1_MODCODLST9, 0xcc },
403 { STV090x_P1_MODCODLSTA, 0xcc },
404 { STV090x_P1_MODCODLSTB, 0xcc },
405 { STV090x_P1_MODCODLSTC, 0xcc },
406 { STV090x_P1_MODCODLSTD, 0xcc },
407 { STV090x_P1_MODCODLSTE, 0xcc },
408 { STV090x_P1_MODCODLSTF, 0xcf },
409 { STV090x_GENCFG, 0x1c },
410 { STV090x_NBITER_NF4, 0x37 },
411 { STV090x_NBITER_NF5, 0x29 },
412 { STV090x_NBITER_NF6, 0x37 },
413 { STV090x_NBITER_NF7, 0x33 },
414 { STV090x_NBITER_NF8, 0x31 },
415 { STV090x_NBITER_NF9, 0x2f },
416 { STV090x_NBITER_NF10, 0x39 },
417 { STV090x_NBITER_NF11, 0x3a },
418 { STV090x_NBITER_NF12, 0x29 },
419 { STV090x_NBITER_NF13, 0x37 },
420 { STV090x_NBITER_NF14, 0x33 },
421 { STV090x_NBITER_NF15, 0x2f },
422 { STV090x_NBITER_NF16, 0x39 },
423 { STV090x_NBITER_NF17, 0x3a },
424 { STV090x_NBITERNOERR, 0x04 },
425 { STV090x_GAINLLR_NF4, 0x0C },
426 { STV090x_GAINLLR_NF5, 0x0F },
427 { STV090x_GAINLLR_NF6, 0x11 },
428 { STV090x_GAINLLR_NF7, 0x14 },
429 { STV090x_GAINLLR_NF8, 0x17 },
430 { STV090x_GAINLLR_NF9, 0x19 },
431 { STV090x_GAINLLR_NF10, 0x20 },
432 { STV090x_GAINLLR_NF11, 0x21 },
433 { STV090x_GAINLLR_NF12, 0x0D },
434 { STV090x_GAINLLR_NF13, 0x0F },
435 { STV090x_GAINLLR_NF14, 0x13 },
436 { STV090x_GAINLLR_NF15, 0x1A },
437 { STV090x_GAINLLR_NF16, 0x1F },
438 { STV090x_GAINLLR_NF17, 0x21 },
439 { STV090x_RCCFGH, 0x20 },
440 { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
441 { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
442};
443
444static struct stv090x_reg stv0900_cut20_val[] = {
445
446 { STV090x_P2_DMDCFG3, 0xe8 },
447 { STV090x_P2_DMDCFG4, 0x10 },
448 { STV090x_P2_CARFREQ, 0x38 },
449 { STV090x_P2_CARHDR, 0x20 },
450 { STV090x_P2_KREFTMG, 0x5a },
451 { STV090x_P2_SMAPCOEF7, 0x06 },
452 { STV090x_P2_SMAPCOEF6, 0x00 },
453 { STV090x_P2_SMAPCOEF5, 0x04 },
454 { STV090x_P2_NOSCFG, 0x0c },
455 { STV090x_P1_DMDCFG3, 0xe8 },
456 { STV090x_P1_DMDCFG4, 0x10 },
457 { STV090x_P1_CARFREQ, 0x38 },
458 { STV090x_P1_CARHDR, 0x20 },
459 { STV090x_P1_KREFTMG, 0x5a },
460 { STV090x_P1_SMAPCOEF7, 0x06 },
461 { STV090x_P1_SMAPCOEF6, 0x00 },
462 { STV090x_P1_SMAPCOEF5, 0x04 },
463 { STV090x_P1_NOSCFG, 0x0c },
464 { STV090x_GAINLLR_NF4, 0x21 },
465 { STV090x_GAINLLR_NF5, 0x21 },
466 { STV090x_GAINLLR_NF6, 0x20 },
467 { STV090x_GAINLLR_NF7, 0x1F },
468 { STV090x_GAINLLR_NF8, 0x1E },
469 { STV090x_GAINLLR_NF9, 0x1E },
470 { STV090x_GAINLLR_NF10, 0x1D },
471 { STV090x_GAINLLR_NF11, 0x1B },
472 { STV090x_GAINLLR_NF12, 0x20 },
473 { STV090x_GAINLLR_NF13, 0x20 },
474 { STV090x_GAINLLR_NF14, 0x20 },
475 { STV090x_GAINLLR_NF15, 0x20 },
476 { STV090x_GAINLLR_NF16, 0x20 },
477 { STV090x_GAINLLR_NF17, 0x21 },
478};
479
480static struct stv090x_reg stv0903_cut20_val[] = {
481 { STV090x_P1_DMDCFG3, 0xe8 },
482 { STV090x_P1_DMDCFG4, 0x10 },
483 { STV090x_P1_CARFREQ, 0x38 },
484 { STV090x_P1_CARHDR, 0x20 },
485 { STV090x_P1_KREFTMG, 0x5a },
486 { STV090x_P1_SMAPCOEF7, 0x06 },
487 { STV090x_P1_SMAPCOEF6, 0x00 },
488 { STV090x_P1_SMAPCOEF5, 0x04 },
489 { STV090x_P1_NOSCFG, 0x0c },
490 { STV090x_GAINLLR_NF4, 0x21 },
491 { STV090x_GAINLLR_NF5, 0x21 },
492 { STV090x_GAINLLR_NF6, 0x20 },
493 { STV090x_GAINLLR_NF7, 0x1F },
494 { STV090x_GAINLLR_NF8, 0x1E },
495 { STV090x_GAINLLR_NF9, 0x1E },
496 { STV090x_GAINLLR_NF10, 0x1D },
497 { STV090x_GAINLLR_NF11, 0x1B },
498 { STV090x_GAINLLR_NF12, 0x20 },
499 { STV090x_GAINLLR_NF13, 0x20 },
500 { STV090x_GAINLLR_NF14, 0x20 },
501 { STV090x_GAINLLR_NF15, 0x20 },
502 { STV090x_GAINLLR_NF16, 0x20 },
503 { STV090x_GAINLLR_NF17, 0x21 }
504};
505
506/* Cut 2.0 Long Frame Tracking CR loop */
507static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
508 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
509 { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
510 { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
511 { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
512 { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
513 { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
514 { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
515 { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
516 { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
517 { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
518 { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
519 { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
520 { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
521 { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
522 { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
523};
524
525/* Cut 3.0 Long Frame Tracking CR loop */
526static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
527 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
528 { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
529 { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
530 { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
531 { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
532 { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
533 { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
534 { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
535 { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
536 { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
537 { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
538 { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
539 { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
540 { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
541 { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
542};
543
544/* Cut 2.0 Long Frame Tracking CR Loop */
545static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
546 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
547 { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
548 { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
549 { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
550 { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
551 { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
552 { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
553 { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
554 { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
555 { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
556 { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
557 { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
558};
559
560/* Cut 3.0 Long Frame Tracking CR Loop */
561static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
562 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
563 { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
564 { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
565 { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
566 { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
567 { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
568 { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
569 { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
570 { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
571 { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
572 { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
573 { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
574};
575
576static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
577 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
578 { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
579 { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
580 { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
581};
582
583static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
584 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
585 { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
586 { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
587 { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
588};
589
590/* Cut 2.0 Short Frame Tracking CR Loop */
591static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
592 /* MODCOD 2M 5M 10M 20M 30M */
593 { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
594 { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
595 { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
596 { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
597};
598
599/* Cut 3.0 Short Frame Tracking CR Loop */
600static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
601 /* MODCOD 2M 5M 10M 20M 30M */
602 { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
603 { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
604 { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
605 { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
606};
607
608static inline s32 comp2(s32 __x, s32 __width)
609{
610 if (__width == 32)
611 return __x;
612 else
613 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
614}
615
616static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
617{
618 const struct stv090x_config *config = state->config;
619 int ret;
620
621 u8 b0[] = { reg >> 8, reg & 0xff };
622 u8 buf;
623
624 struct i2c_msg msg[] = {
625 { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
626 { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
627 };
628
629 ret = i2c_transfer(state->i2c, msg, 2);
630 if (ret != 2) {
631 if (ret != -ERESTARTSYS)
632 dprintk(FE_ERROR, 1,
633 "Read error, Reg=[0x%02x], Status=%d",
634 reg, ret);
635
636 return ret < 0 ? ret : -EREMOTEIO;
637 }
638 if (unlikely(*state->verbose >= FE_DEBUGREG))
639 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
640 reg, buf);
641
642 return (unsigned int) buf;
643}
644
645static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
646{
647 const struct stv090x_config *config = state->config;
648 int ret;
649 u8 buf[2 + count];
650 struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
651
652 buf[0] = reg >> 8;
653 buf[1] = reg & 0xff;
654 memcpy(&buf[2], data, count);
655
656 if (unlikely(*state->verbose >= FE_DEBUGREG)) {
657 int i;
658
659 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
660 for (i = 0; i < count; i++)
661 printk(" %02x", data[i]);
662 printk("\n");
663 }
664
665 ret = i2c_transfer(state->i2c, &i2c_msg, 1);
666 if (ret != 1) {
667 if (ret != -ERESTARTSYS)
668 dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
669 reg, data[0], count, ret);
670 return ret < 0 ? ret : -EREMOTEIO;
671 }
672
673 return 0;
674}
675
676static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
677{
678 return stv090x_write_regs(state, reg, &data, 1);
679}
680
681static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
682{
683 struct stv090x_state *state = fe->demodulator_priv;
684 u32 reg;
685
686 reg = STV090x_READ_DEMOD(state, I2CRPT);
687 if (enable) {
688 dprintk(FE_DEBUG, 1, "Enable Gate");
689 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
690 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
691 goto err;
692
693 } else {
694 dprintk(FE_DEBUG, 1, "Disable Gate");
695 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
696 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
697 goto err;
698 }
699 return 0;
700err:
701 dprintk(FE_ERROR, 1, "I/O error");
702 return -1;
703}
704
705static void stv090x_get_lock_tmg(struct stv090x_state *state)
706{
707 switch (state->algo) {
708 case STV090x_BLIND_SEARCH:
709 dprintk(FE_DEBUG, 1, "Blind Search");
710 if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
711 state->DemodTimeout = 1500;
712 state->FecTimeout = 400;
713 } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
714 state->DemodTimeout = 1000;
715 state->FecTimeout = 300;
716 } else { /*SR >20Msps*/
717 state->DemodTimeout = 700;
718 state->FecTimeout = 100;
719 }
720 break;
721
722 case STV090x_COLD_SEARCH:
723 case STV090x_WARM_SEARCH:
724 default:
725 dprintk(FE_DEBUG, 1, "Normal Search");
726 if (state->srate <= 1000000) { /*SR <=1Msps*/
727 state->DemodTimeout = 4500;
728 state->FecTimeout = 1700;
729 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
730 state->DemodTimeout = 2500;
731 state->FecTimeout = 1100;
732 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
733 state->DemodTimeout = 1000;
734 state->FecTimeout = 550;
735 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
736 state->DemodTimeout = 700;
737 state->FecTimeout = 250;
738 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
739 state->DemodTimeout = 400;
740 state->FecTimeout = 130;
741 } else { /*SR >20Msps*/
742 state->DemodTimeout = 300;
743 state->FecTimeout = 100;
744 }
745 break;
746 }
747
748 if (state->algo == STV090x_WARM_SEARCH)
749 state->DemodTimeout /= 2;
750}
751
752static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
753{
754 u32 sym;
755
756 if (srate > 60000000) {
757 sym = (srate << 4); /* SR * 2^16 / master_clk */
758 sym /= (state->mclk >> 12);
759 } else if (srate > 6000000) {
760 sym = (srate << 6);
761 sym /= (state->mclk >> 10);
762 } else {
763 sym = (srate << 9);
764 sym /= (state->mclk >> 7);
765 }
766
767 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
768 goto err;
769 if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
770 goto err;
771
772 return 0;
773err:
774 dprintk(FE_ERROR, 1, "I/O error");
775 return -1;
776}
777
778static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
779{
780 u32 sym;
781
782 srate = 105 * (srate / 100);
783 if (srate > 60000000) {
784 sym = (srate << 4); /* SR * 2^16 / master_clk */
785 sym /= (state->mclk >> 12);
786 } else if (srate > 6000000) {
787 sym = (srate << 6);
788 sym /= (state->mclk >> 10);
789 } else {
790 sym = (srate << 9);
791 sym /= (state->mclk >> 7);
792 }
793
794 if (sym < 0x7fff) {
795 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
796 goto err;
797 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
798 goto err;
799 } else {
800 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
801 goto err;
802 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
803 goto err;
804 }
805
806 return 0;
807err:
808 dprintk(FE_ERROR, 1, "I/O error");
809 return -1;
810}
811
812static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
813{
814 u32 sym;
815
816 srate = 95 * (srate / 100);
817 if (srate > 60000000) {
818 sym = (srate << 4); /* SR * 2^16 / master_clk */
819 sym /= (state->mclk >> 12);
820 } else if (srate > 6000000) {
821 sym = (srate << 6);
822 sym /= (state->mclk >> 10);
823 } else {
824 sym = (srate << 9);
825 sym /= (state->mclk >> 7);
826 }
827
828 if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0xff)) < 0) /* MSB */
829 goto err;
830 if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
831 goto err;
832 return 0;
833err:
834 dprintk(FE_ERROR, 1, "I/O error");
835 return -1;
836}
837
838static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
839{
840 u32 ro;
841
842 switch (rolloff) {
843 case STV090x_RO_20:
844 ro = 20;
845 break;
846 case STV090x_RO_25:
847 ro = 25;
848 break;
849 case STV090x_RO_35:
850 default:
851 ro = 35;
852 break;
853 }
854
855 return srate + (srate * ro) / 100;
856}
857
858static int stv090x_set_vit_thacq(struct stv090x_state *state)
859{
860 if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
861 goto err;
862 if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
863 goto err;
864 if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
865 goto err;
866 if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
867 goto err;
868 if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
869 goto err;
870 if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
871 goto err;
872 return 0;
873err:
874 dprintk(FE_ERROR, 1, "I/O error");
875 return -1;
876}
877
878static int stv090x_set_vit_thtracq(struct stv090x_state *state)
879{
880 if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
881 goto err;
882 if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
883 goto err;
884 if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
885 goto err;
886 if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
887 goto err;
888 if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
889 goto err;
890 if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
891 goto err;
892 return 0;
893err:
894 dprintk(FE_ERROR, 1, "I/O error");
895 return -1;
896}
897
898static int stv090x_set_viterbi(struct stv090x_state *state)
899{
900 switch (state->search_mode) {
901 case STV090x_SEARCH_AUTO:
902 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
903 goto err;
904 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
905 goto err;
906 break;
907 case STV090x_SEARCH_DVBS1:
908 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
909 goto err;
910 switch (state->fec) {
911 case STV090x_PR12:
912 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
913 goto err;
914 break;
915
916 case STV090x_PR23:
917 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
918 goto err;
919 break;
920
921 case STV090x_PR34:
922 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
923 goto err;
924 break;
925
926 case STV090x_PR56:
927 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
928 goto err;
929 break;
930
931 case STV090x_PR78:
932 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
933 goto err;
934 break;
935
936 default:
937 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
938 goto err;
939 break;
940 }
941 break;
942 case STV090x_SEARCH_DSS:
943 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
944 goto err;
945 switch (state->fec) {
946 case STV090x_PR12:
947 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
948 goto err;
949 break;
950
951 case STV090x_PR23:
952 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
953 goto err;
954 break;
955
956 case STV090x_PR67:
957 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
958 goto err;
959 break;
960
961 default:
962 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
963 goto err;
964 break;
965 }
966 break;
967 default:
968 break;
969 }
970 return 0;
971err:
972 dprintk(FE_ERROR, 1, "I/O error");
973 return -1;
974}
975
976static int stv090x_stop_modcod(struct stv090x_state *state)
977{
978 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
979 goto err;
980 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
981 goto err;
982 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
983 goto err;
984 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
985 goto err;
986 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
987 goto err;
988 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
989 goto err;
990 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
991 goto err;
992 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
993 goto err;
994 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
995 goto err;
996 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
997 goto err;
998 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
999 goto err;
1000 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
1001 goto err;
1002 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
1003 goto err;
1004 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
1005 goto err;
1006 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
1007 goto err;
1008 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
1009 goto err;
1010 return 0;
1011err:
1012 dprintk(FE_ERROR, 1, "I/O error");
1013 return -1;
1014}
1015
1016static int stv090x_activate_modcod(struct stv090x_state *state)
1017{
1018 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1019 goto err;
1020 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1021 goto err;
1022 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1023 goto err;
1024 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1025 goto err;
1026 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1027 goto err;
1028 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1029 goto err;
1030 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1031 goto err;
1032 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1033 goto err;
1034 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1035 goto err;
1036 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1037 goto err;
1038 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1039 goto err;
1040 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1041 goto err;
1042 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1043 goto err;
1044 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1045 goto err;
1046 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1047 goto err;
1048 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1049 goto err;
1050
1051 return 0;
1052err:
1053 dprintk(FE_ERROR, 1, "I/O error");
1054 return -1;
1055}
1056
1057static int stv090x_activate_modcod_single(struct stv090x_state *state)
1058{
1059
1060 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1061 goto err;
1062 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
1063 goto err;
1064 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
1065 goto err;
1066 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
1067 goto err;
1068 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
1069 goto err;
1070 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
1071 goto err;
1072 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
1073 goto err;
1074 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
1075 goto err;
1076 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
1077 goto err;
1078 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
1079 goto err;
1080 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
1081 goto err;
1082 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
1083 goto err;
1084 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
1085 goto err;
1086 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
1087 goto err;
1088 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
1089 goto err;
1090 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
1091 goto err;
1092
1093 return 0;
1094
1095err:
1096 dprintk(FE_ERROR, 1, "I/O error");
1097 return -1;
1098}
1099
1100static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1101{
1102 u32 reg;
1103
1104 switch (state->demod) {
1105 case STV090x_DEMODULATOR_0:
1106 mutex_lock(&demod_lock);
1107 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1108 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1109 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1110 goto err;
1111 mutex_unlock(&demod_lock);
1112 break;
1113
1114 case STV090x_DEMODULATOR_1:
1115 mutex_lock(&demod_lock);
1116 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1117 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1118 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1119 goto err;
1120 mutex_unlock(&demod_lock);
1121 break;
1122
1123 default:
1124 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1125 break;
1126 }
1127 return 0;
1128err:
1129 mutex_unlock(&demod_lock);
1130 dprintk(FE_ERROR, 1, "I/O error");
1131 return -1;
1132}
1133
1134static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1135{
1136 if (state->dev_ver >= 0x30) {
1137 /* Set ACLC BCLC optimised value vs SR */
1138 if (state->srate >= 15000000) {
1139 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
1140 goto err;
1141 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
1142 goto err;
1143 } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
1144 if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
1145 goto err;
1146 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
1147 goto err;
1148 } else if (state->srate < 7000000) {
1149 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
1150 goto err;
1151 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
1152 goto err;
1153 }
1154
1155 } else {
1156 /* Cut 2.0 */
1157 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1158 goto err;
1159 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1160 goto err;
1161 }
1162 return 0;
1163err:
1164 dprintk(FE_ERROR, 1, "I/O error");
1165 return -1;
1166}
1167
1168static int stv090x_delivery_search(struct stv090x_state *state)
1169{
1170 u32 reg;
1171
1172 switch (state->search_mode) {
1173 case STV090x_SEARCH_DVBS1:
1174 case STV090x_SEARCH_DSS:
1175 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1176 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1177 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1178 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1179 goto err;
1180
1181 /* Activate Viterbi decoder in legacy search,
1182 * do not use FRESVIT1, might impact VITERBI2
1183 */
1184 if (stv090x_vitclk_ctl(state, 0) < 0)
1185 goto err;
1186
1187 if (stv090x_dvbs_track_crl(state) < 0)
1188 goto err;
1189
1190 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1191 goto err;
1192
1193 if (stv090x_set_vit_thacq(state) < 0)
1194 goto err;
1195 if (stv090x_set_viterbi(state) < 0)
1196 goto err;
1197 break;
1198
1199 case STV090x_SEARCH_DVBS2:
1200 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1201 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1202 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1203 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1204 goto err;
1205 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1206 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1207 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1208 goto err;
1209
1210 if (stv090x_vitclk_ctl(state, 1) < 0)
1211 goto err;
1212
1213 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1214 goto err;
1215 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1216 goto err;
1217
1218 if (state->dev_ver <= 0x20) {
1219 /* enable S2 carrier loop */
1220 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1221 goto err;
1222 } else {
1223 /* > Cut 3: Stop carrier 3 */
1224 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1225 goto err;
1226 }
1227
1228 if (state->demod_mode != STV090x_SINGLE) {
1229 /* Cut 2: enable link during search */
1230 if (stv090x_activate_modcod(state) < 0)
1231 goto err;
1232 } else {
1233 /* Single demodulator
1234 * Authorize SHORT and LONG frames,
1235 * QPSK, 8PSK, 16APSK and 32APSK
1236 */
1237 if (stv090x_activate_modcod_single(state) < 0)
1238 goto err;
1239 }
1240
1241 break;
1242
1243 case STV090x_SEARCH_AUTO:
1244 default:
1245 /* enable DVB-S2 and DVB-S2 in Auto MODE */
1246 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1247 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1248 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1249 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1250 goto err;
1251
1252 if (stv090x_vitclk_ctl(state, 0) < 0)
1253 goto err;
1254
1255 if (stv090x_dvbs_track_crl(state) < 0)
1256 goto err;
1257
1258 if (state->dev_ver <= 0x20) {
1259 /* enable S2 carrier loop */
1260 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1261 goto err;
1262 } else {
1263 /* > Cut 3: Stop carrier 3 */
1264 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1265 goto err;
1266 }
1267
1268 if (state->demod_mode != STV090x_SINGLE) {
1269 /* Cut 2: enable link during search */
1270 if (stv090x_activate_modcod(state) < 0)
1271 goto err;
1272 } else {
1273 /* Single demodulator
1274 * Authorize SHORT and LONG frames,
1275 * QPSK, 8PSK, 16APSK and 32APSK
1276 */
1277 if (stv090x_activate_modcod_single(state) < 0)
1278 goto err;
1279 }
1280
1281 if (state->srate >= 2000000) {
1282 /* Srate >= 2MSPS, Viterbi threshold to acquire */
1283 if (stv090x_set_vit_thacq(state) < 0)
1284 goto err;
1285 } else {
1286 /* Srate < 2MSPS, Reset Viterbi thresholdto track
1287 * and then re-acquire
1288 */
1289 if (stv090x_set_vit_thtracq(state) < 0)
1290 goto err;
1291 }
1292
1293 if (stv090x_set_viterbi(state) < 0)
1294 goto err;
1295 break;
1296 }
1297 return 0;
1298err:
1299 dprintk(FE_ERROR, 1, "I/O error");
1300 return -1;
1301}
1302
1303static int stv090x_start_search(struct stv090x_state *state)
1304{
1305 u32 reg, freq_abs;
1306 s16 freq;
1307
1308 /* Reset demodulator */
1309 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1310 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1311 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1312 goto err;
1313
1314 if (state->dev_ver <= 0x20) {
1315 if (state->srate <= 5000000) {
1316 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1317 goto err;
1318 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1319 goto err;
1320 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0xff) < 0)
1321 goto err;
1322 if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1323 goto err;
1324 if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1325 goto err;
1326
1327 /*enlarge the timing bandwith for Low SR*/
1328 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1329 goto err;
1330 } else {
1331 /* If the symbol rate is >5 Msps
1332 Set The carrier search up and low to auto mode */
1333 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1334 goto err;
1335 /*reduce the timing bandwith for high SR*/
1336 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1337 goto err;
1338 }
1339 } else {
1340 /* >= Cut 3 */
1341 if (state->srate <= 5000000) {
1342 /* enlarge the timing bandwith for Low SR */
1343 STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
1344 } else {
1345 /* reduce timing bandwith for high SR */
1346 STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
1347 }
1348
1349 /* Set CFR min and max to manual mode */
1350 STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
1351
1352 if (state->algo == STV090x_WARM_SEARCH) {
1353 /* WARM Start
1354 * CFR min = -1MHz,
1355 * CFR max = +1MHz
1356 */
1357 freq_abs = 1000 << 16;
1358 freq_abs /= (state->mclk / 1000);
1359 freq = (s16) freq_abs;
1360 } else {
1361 /* COLD Start
1362 * CFR min =- (SearchRange / 2 + 600KHz)
1363 * CFR max = +(SearchRange / 2 + 600KHz)
1364 * (600KHz for the tuner step size)
1365 */
1366 freq_abs = (state->search_range / 2000) + 600;
1367 freq_abs = freq_abs << 16;
1368 freq_abs /= (state->mclk / 1000);
1369 freq = (s16) freq_abs;
1370 }
1371
1372 if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
1373 goto err;
1374 if (STV090x_WRITE_DEMOD(state, CFRUP1, LSB(freq)) < 0)
1375 goto err;
1376
1377 freq *= -1;
1378
1379 if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
1380 goto err;
1381 if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
1382 goto err;
1383
1384 }
1385
1386 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1387 goto err;
1388 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1389 goto err;
1390
1391 if (state->dev_ver >= 0x20) {
1392 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1393 goto err;
1394 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1395 goto err;
1396
1397 if ((state->search_mode == STV090x_DVBS1) ||
1398 (state->search_mode == STV090x_DSS) ||
1399 (state->search_mode == STV090x_SEARCH_AUTO)) {
1400
1401 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1402 goto err;
1403 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1404 goto err;
1405 }
1406 }
1407
1408 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1409 goto err;
1410 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1411 goto err;
1412 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1413 goto err;
1414
1415 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1416 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1417 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1418 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1419 goto err;
1420 reg = STV090x_READ_DEMOD(state, DMDCFG2);
1421 STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1422 if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1423 goto err;
1424
1425 if (state->dev_ver >= 0x20) {
1426 /*Frequency offset detector setting*/
1427 if (state->srate < 2000000) {
1428 if (state->dev_ver <= 0x20) {
1429 /* Cut 2 */
1430 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1431 goto err;
1432 } else {
1433 /* Cut 2 */
1434 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
1435 goto err;
1436 }
1437 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
1438 goto err;
1439 }
1440
1441 if (state->srate < 10000000) {
1442 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1443 goto err;
1444 } else {
1445 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1446 goto err;
1447 }
1448 } else {
1449 if (state->srate < 10000000) {
1450 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1451 goto err;
1452 } else {
1453 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1454 goto err;
1455 }
1456 }
1457
1458 switch (state->algo) {
1459 case STV090x_WARM_SEARCH:
1460 /* The symbol rate and the exact
1461 * carrier Frequency are known
1462 */
1463 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1464 goto err;
1465 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1466 goto err;
1467 break;
1468
1469 case STV090x_COLD_SEARCH:
1470 /* The symbol rate is known */
1471 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1472 goto err;
1473 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1474 goto err;
1475 break;
1476
1477 default:
1478 break;
1479 }
1480 return 0;
1481err:
1482 dprintk(FE_ERROR, 1, "I/O error");
1483 return -1;
1484}
1485
1486static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1487{
1488 u32 agc2_min = 0, agc2 = 0, freq_init, freq_step, reg;
1489 s32 i, j, steps, dir;
1490
1491 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1492 goto err;
1493 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1494 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1495 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1496 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1497 goto err;
1498
1499 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1500 goto err;
1501 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1502 goto err;
1503 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1504 goto err;
1505 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1506 goto err;
1507 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1508 goto err;
1509 if (stv090x_set_srate(state, 1000000) < 0)
1510 goto err;
1511
1512 steps = -1 + state->search_range / 1000000;
1513 steps /= 2;
1514 steps = (2 * steps) + 1;
1515 if (steps < 0)
1516 steps = 1;
1517
1518 dir = 1;
1519 freq_step = (1000000 * 256) / (state->mclk / 256);
1520 freq_init = 0;
1521
1522 for (i = 0; i < steps; i++) {
1523 if (dir > 0)
1524 freq_init = freq_init + (freq_step * i);
1525 else
1526 freq_init = freq_init - (freq_step * i);
1527
1528 dir = -1;
1529
1530 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1531 goto err;
1532 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1533 goto err;
1534 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1535 goto err;
1536 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1537 goto err;
1538 msleep(10);
1539 for (j = 0; j < 10; j++) {
1540 agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1541 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1542 }
1543 agc2 /= 10;
1544 agc2_min = 0xffff;
1545 if (agc2 < 0xffff)
1546 agc2_min = agc2;
1547 }
1548
1549 return agc2_min;
1550err:
1551 dprintk(FE_ERROR, 1, "I/O error");
1552 return -1;
1553}
1554
1555static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1556{
1557 u8 r3, r2, r1, r0;
1558 s32 srate, int_1, int_2, tmp_1, tmp_2;
1559
1560 r3 = STV090x_READ_DEMOD(state, SFR3);
1561 r2 = STV090x_READ_DEMOD(state, SFR2);
1562 r1 = STV090x_READ_DEMOD(state, SFR1);
1563 r0 = STV090x_READ_DEMOD(state, SFR0);
1564
1565 srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
1566
1567 int_1 = clk >> 16;
1568 int_2 = srate >> 16;
1569
1570 tmp_1 = clk % 0x10000;
1571 tmp_2 = srate % 0x10000;
1572
1573 srate = (int_1 * int_2) +
1574 ((int_1 * tmp_2) >> 16) +
1575 ((int_2 * tmp_1) >> 16);
1576
1577 return srate;
1578}
1579
1580static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1581{
1582 struct dvb_frontend *fe = &state->frontend;
1583
1584 int tmg_lock = 0, i;
1585 s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1586 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1587
1588 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1589 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1590 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1591 goto err;
1592 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1593 goto err;
1594 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1595 goto err;
1596 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1597 goto err;
1598 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1599 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1600 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1601 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1602 goto err;
1603
1604 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1605 goto err;
1606 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1607 goto err;
1608 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1609 goto err;
1610 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1611 goto err;
1612 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1613 goto err;
1614 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0)
1615 goto err;
1616
1617 if (state->dev_ver >= 0x30) {
1618 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
1619 goto err;
1620 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1621 goto err;
1622
1623 } else if (state->dev_ver >= 0x20) {
1624 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1625 goto err;
1626 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1627 goto err;
1628 }
1629
1630 if (state->srate <= 2000000)
1631 car_step = 1000;
1632 else if (state->srate <= 5000000)
1633 car_step = 2000;
1634 else if (state->srate <= 12000000)
1635 car_step = 3000;
1636 else
1637 car_step = 5000;
1638
1639 steps = -1 + ((state->search_range / 1000) / car_step);
1640 steps /= 2;
1641 steps = (2 * steps) + 1;
1642 if (steps < 0)
1643 steps = 1;
1644 else if (steps > 10) {
1645 steps = 11;
1646 car_step = (state->search_range / 1000) / 10;
1647 }
1648 cur_step = 0;
1649 dir = 1;
1650 freq = state->frequency;
1651
1652 while ((!tmg_lock) && (cur_step < steps)) {
1653 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1654 goto err;
1655 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1656 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x00); /* trigger acquisition */
1657 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1658 goto err;
1659 msleep(50);
1660 for (i = 0; i < 10; i++) {
1661 reg = STV090x_READ_DEMOD(state, DSTATUS);
1662 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1663 tmg_cpt++;
1664 agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1665 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1666 }
1667 agc2 /= 10;
1668 srate_coarse = stv090x_get_srate(state, state->mclk);
1669 cur_step++;
1670 dir *= -1;
1671 if ((tmg_cpt >= 5) && (agc2 < 0x1f00) && (srate_coarse < 55000000) && (srate_coarse > 850000))
1672 tmg_lock = 1;
1673 else if (cur_step < steps) {
1674 if (dir > 0)
1675 freq += cur_step * car_step;
1676 else
1677 freq -= cur_step * car_step;
1678
1679 /* Setup tuner */
1680 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
1681 goto err;
1682
1683 if (state->config->tuner_set_frequency) {
1684 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
1685 goto err;
1686 }
1687
1688 if (state->config->tuner_set_bandwidth) {
1689 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1690 goto err;
1691 }
1692
1693 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
1694 goto err;
1695
1696 msleep(50);
1697
1698 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
1699 goto err;
1700
1701 if (state->config->tuner_get_status) {
1702 if (state->config->tuner_get_status(fe, &reg) < 0)
1703 goto err;
1704 }
1705
1706 if (reg)
1707 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1708 else
1709 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1710
1711 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
1712 goto err;
1713
1714 }
1715 }
1716 if (!tmg_lock)
1717 srate_coarse = 0;
1718 else
1719 srate_coarse = stv090x_get_srate(state, state->mclk);
1720
1721 return srate_coarse;
1722err:
1723 dprintk(FE_ERROR, 1, "I/O error");
1724 return -1;
1725}
1726
1727static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1728{
1729 u32 srate_coarse, freq_coarse, sym, reg;
1730
1731 srate_coarse = stv090x_get_srate(state, state->mclk);
1732 freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
1733 freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1734 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1735
1736 if (sym < state->srate)
1737 srate_coarse = 0;
1738 else {
1739 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1740 goto err;
1741 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
1742 goto err;
1743 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1744 goto err;
1745 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1746 goto err;
1747 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1748 goto err;
1749 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1750 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1751 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1752 goto err;
1753
1754 if (state->dev_ver >= 0x30) {
1755 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
1756 goto err;
1757 } else if (state->dev_ver >= 0x20) {
1758 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1759 goto err;
1760 }
1761
1762 if (srate_coarse > 3000000) {
1763 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1764 sym = (sym / 1000) * 65536;
1765 sym /= (state->mclk / 1000);
1766 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1767 goto err;
1768 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1769 goto err;
1770 sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1771 sym = (sym / 1000) * 65536;
1772 sym /= (state->mclk / 1000);
1773 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1774 goto err;
1775 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1776 goto err;
1777 sym = (srate_coarse / 1000) * 65536;
1778 sym /= (state->mclk / 1000);
1779 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1780 goto err;
1781 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1782 goto err;
1783 } else {
1784 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1785 sym = (sym / 100) * 65536;
1786 sym /= (state->mclk / 100);
1787 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1788 goto err;
1789 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1790 goto err;
1791 sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1792 sym = (sym / 100) * 65536;
1793 sym /= (state->mclk / 100);
1794 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1795 goto err;
1796 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1797 goto err;
1798 sym = (srate_coarse / 100) * 65536;
1799 sym /= (state->mclk / 100);
1800 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1801 goto err;
1802 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1803 goto err;
1804 }
1805 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1806 goto err;
1807 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1808 goto err;
1809 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1810 goto err;
1811 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1812 goto err;
1813 }
1814
1815 return srate_coarse;
1816
1817err:
1818 dprintk(FE_ERROR, 1, "I/O error");
1819 return -1;
1820}
1821
1822static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1823{
1824 s32 timer = 0, lock = 0;
1825 u32 reg;
1826 u8 stat;
1827
1828 while ((timer < timeout) && (!lock)) {
1829 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1830 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1831
1832 switch (stat) {
1833 case 0: /* searching */
1834 case 1: /* first PLH detected */
1835 default:
1836 dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1837 lock = 0;
1838 break;
1839 case 2: /* DVB-S2 mode */
1840 case 3: /* DVB-S1/legacy mode */
1841 reg = STV090x_READ_DEMOD(state, DSTATUS);
1842 lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1843 break;
1844 }
1845
1846 if (!lock)
1847 msleep(10);
1848 else
1849 dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1850
1851 timer += 10;
1852 }
1853 return lock;
1854}
1855
1856static int stv090x_blind_search(struct stv090x_state *state)
1857{
1858 u32 agc2, reg, srate_coarse;
1859 s32 timeout_dmd = 500, cpt_fail, agc2_ovflw, i;
1860 u8 k_ref, k_max, k_min;
1861 int coarse_fail, lock;
1862
1863 k_max = 120;
1864 k_min = 30;
1865
1866 agc2 = stv090x_get_agc2_min_level(state);
1867
1868 if (agc2 > STV090x_SEARCH_AGC2_TH(state->dev_ver)) {
1869 lock = 0;
1870 } else {
1871
1872 if (state->dev_ver <= 0x20) {
1873 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1874 goto err;
1875 } else {
1876 /* > Cut 3 */
1877 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
1878 goto err;
1879 }
1880
1881 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1882 goto err;
1883
1884 if (state->dev_ver >= 0x20) {
1885 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1886 goto err;
1887 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1888 goto err;
1889 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1890 goto err;
1891 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
1892 goto err;
1893 }
1894
1895 k_ref = k_max;
1896 do {
1897 if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
1898 goto err;
1899 if (stv090x_srate_srch_coarse(state) != 0) {
1900 srate_coarse = stv090x_srate_srch_fine(state);
1901 if (srate_coarse != 0) {
1902 stv090x_get_lock_tmg(state);
1903 lock = stv090x_get_dmdlock(state, timeout_dmd);
1904 } else {
1905 lock = 0;
1906 }
1907 } else {
1908 cpt_fail = 0;
1909 agc2_ovflw = 0;
1910 for (i = 0; i < 10; i++) {
1911 agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
1912 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1913 if (agc2 >= 0xff00)
1914 agc2_ovflw++;
1915 reg = STV090x_READ_DEMOD(state, DSTATUS2);
1916 if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
1917 (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
1918
1919 cpt_fail++;
1920 }
1921 if ((cpt_fail > 7) || (agc2_ovflw > 7))
1922 coarse_fail = 1;
1923
1924 lock = 0;
1925 }
1926 k_ref -= 30;
1927 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
1928 }
1929
1930 return lock;
1931
1932err:
1933 dprintk(FE_ERROR, 1, "I/O error");
1934 return -1;
1935}
1936
1937static int stv090x_chk_tmg(struct stv090x_state *state)
1938{
1939 u32 reg;
1940 s32 tmg_cpt = 0, i;
1941 u8 freq, tmg_thh, tmg_thl;
1942 int tmg_lock;
1943
1944 freq = STV090x_READ_DEMOD(state, CARFREQ);
1945 tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
1946 tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
1947 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1948 goto err;
1949 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1950 goto err;
1951
1952 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1953 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
1954 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1955 goto err;
1956 if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
1957 goto err;
1958
1959 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
1960 goto err;
1961 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
1962 goto err;
1963
1964 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
1965 goto err;
1966 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1967 goto err;
1968 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
1969 goto err;
1970
1971 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
1972 goto err;
1973 msleep(10);
1974
1975 for (i = 0; i < 10; i++) {
1976 reg = STV090x_READ_DEMOD(state, DSTATUS);
1977 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1978 tmg_cpt++;
1979 msleep(1);
1980 }
1981 if (tmg_cpt >= 3)
1982 tmg_lock = 1;
1983
1984 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1985 goto err;
1986 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
1987 goto err;
1988 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
1989 goto err;
1990
1991 if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
1992 goto err;
1993 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
1994 goto err;
1995 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
1996 goto err;
1997
1998 return tmg_lock;
1999
2000err:
2001 dprintk(FE_ERROR, 1, "I/O error");
2002 return -1;
2003}
2004
2005static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2006{
2007 struct dvb_frontend *fe = &state->frontend;
2008
2009 u32 reg;
2010 s32 car_step, steps, cur_step, dir, freq, timeout_lock;
2011 int lock = 0;
2012
2013 if (state->srate >= 10000000)
2014 timeout_lock = timeout_dmd / 3;
2015 else
2016 timeout_lock = timeout_dmd / 2;
2017
2018 lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
2019 if (!lock) {
2020 if (state->srate >= 10000000) {
2021 if (stv090x_chk_tmg(state)) {
2022 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2023 goto err;
2024 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2025 goto err;
2026 lock = stv090x_get_dmdlock(state, timeout_dmd);
2027 } else {
2028 lock = 0;
2029 }
2030 } else {
2031 if (state->srate <= 4000000)
2032 car_step = 1000;
2033 else if (state->srate <= 7000000)
2034 car_step = 2000;
2035 else if (state->srate <= 10000000)
2036 car_step = 3000;
2037 else
2038 car_step = 5000;
2039
2040 steps = (state->search_range / 1000) / car_step;
2041 steps /= 2;
2042 steps = 2 * (steps + 1);
2043 if (steps < 0)
2044 steps = 2;
2045 else if (steps > 12)
2046 steps = 12;
2047
2048 cur_step = 1;
2049 dir = 1;
2050
2051 if (!lock) {
2052 freq = state->frequency;
2053 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
2054 while ((cur_step <= steps) && (!lock)) {
2055 if (dir > 0)
2056 freq += cur_step * car_step;
2057 else
2058 freq -= cur_step * car_step;
2059
2060 /* Setup tuner */
2061 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2062 goto err;
2063
2064 if (state->config->tuner_set_frequency) {
2065 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
2066 goto err;
2067 }
2068
2069 if (state->config->tuner_set_bandwidth) {
2070 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2071 goto err;
2072 }
2073
2074 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2075 goto err;
2076
2077 msleep(50);
2078
2079 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2080 goto err;
2081
2082 if (state->config->tuner_get_status) {
2083 if (state->config->tuner_get_status(fe, &reg) < 0)
2084 goto err;
2085 }
2086
2087 if (reg)
2088 dprintk(FE_DEBUG, 1, "Tuner phase locked");
2089 else
2090 dprintk(FE_DEBUG, 1, "Tuner unlocked");
2091
2092 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2093 goto err;
2094
2095 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
2096 if (state->delsys == STV090x_DVBS2) {
2097 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2098 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2099 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2100 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2101 goto err;
2102 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2103 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2104 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2105 goto err;
2106 }
2107 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
2108 goto err;
2109 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2110 goto err;
2111 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2112 goto err;
2113 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2114 goto err;
2115 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
2116
2117 dir *= -1;
2118 cur_step++;
2119 }
2120 }
2121 }
2122 }
2123
2124 return lock;
2125
2126err:
2127 dprintk(FE_ERROR, 1, "I/O error");
2128 return -1;
2129}
2130
2131static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
2132{
2133 s32 timeout, inc, steps_max, srate, car_max;
2134
2135 srate = state->srate;
2136 car_max = state->search_range / 1000;
2137 car_max += car_max / 10;
2138 car_max = 65536 * (car_max / 2);
2139 car_max /= (state->mclk / 1000);
2140
2141 if (car_max > 0x4000)
2142 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2143
2144 inc = srate;
2145 inc /= state->mclk / 1000;
2146 inc *= 256;
2147 inc *= 256;
2148 inc /= 1000;
2149
2150 switch (state->search_mode) {
2151 case STV090x_SEARCH_DVBS1:
2152 case STV090x_SEARCH_DSS:
2153 inc *= 3; /* freq step = 3% of srate */
2154 timeout = 20;
2155 break;
2156
2157 case STV090x_SEARCH_DVBS2:
2158 inc *= 4;
2159 timeout = 25;
2160 break;
2161
2162 case STV090x_SEARCH_AUTO:
2163 default:
2164 inc *= 3;
2165 timeout = 25;
2166 break;
2167 }
2168 inc /= 100;
2169 if ((inc > car_max) || (inc < 0))
2170 inc = car_max / 2; /* increment <= 1/8 Mclk */
2171
2172 timeout *= 27500; /* 27.5 Msps reference */
2173 if (srate > 0)
2174 timeout /= (srate / 1000);
2175
2176 if ((timeout > 100) || (timeout < 0))
2177 timeout = 100;
2178
2179 steps_max = (car_max / inc) + 1; /* min steps = 3 */
2180 if ((steps_max > 100) || (steps_max < 0)) {
2181 steps_max = 100; /* max steps <= 100 */
2182 inc = car_max / steps_max;
2183 }
2184 *freq_inc = inc;
2185 *timeout_sw = timeout;
2186 *steps = steps_max;
2187
2188 return 0;
2189}
2190
2191static int stv090x_chk_signal(struct stv090x_state *state)
2192{
2193 s32 offst_car, agc2, car_max;
2194 int no_signal;
2195
2196 offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
2197 offst_car |= STV090x_READ_DEMOD(state, CFR1);
2198 offst_car = comp2(offst_car, 16);
2199
2200 agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2201 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2202 car_max = state->search_range / 1000;
2203
2204 car_max += (car_max / 10); /* 10% margin */
2205 car_max = (65536 * car_max / 2);
2206 car_max /= state->mclk / 1000;
2207
2208 if (car_max > 0x4000)
2209 car_max = 0x4000;
2210
2211 if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2212 no_signal = 1;
2213 dprintk(FE_DEBUG, 1, "No Signal");
2214 } else {
2215 no_signal = 0;
2216 dprintk(FE_DEBUG, 1, "Found Signal");
2217 }
2218
2219 return no_signal;
2220}
2221
2222static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2223{
2224 int no_signal, lock = 0;
2225 s32 cpt_step = 0, offst_freq, car_max;
2226 u32 reg;
2227
2228 car_max = state->search_range / 1000;
2229 car_max += (car_max / 10);
2230 car_max = (65536 * car_max / 2);
2231 car_max /= (state->mclk / 1000);
2232 if (car_max > 0x4000)
2233 car_max = 0x4000;
2234
2235 if (zigzag)
2236 offst_freq = 0;
2237 else
2238 offst_freq = -car_max + inc;
2239
2240 do {
2241 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2242 goto err;
2243 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2244 goto err;
2245 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2246 goto err;
2247 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2248 goto err;
2249
2250 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2251 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2252 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2253 goto err;
2254
2255 if (zigzag) {
2256 if (offst_freq >= 0)
2257 offst_freq = -offst_freq - 2 * inc;
2258 else
2259 offst_freq = -offst_freq;
2260 } else {
2261 offst_freq += 2 * inc;
2262 }
2263
2264 cpt_step++;
2265
2266 lock = stv090x_get_dmdlock(state, timeout);
2267 no_signal = stv090x_chk_signal(state);
2268
2269 } while ((!lock) &&
2270 (!no_signal) &&
2271 ((offst_freq - inc) < car_max) &&
2272 ((offst_freq + inc) > -car_max) &&
2273 (cpt_step < steps_max));
2274
2275 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2276 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2277 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2278 goto err;
2279
2280 return lock;
2281err:
2282 dprintk(FE_ERROR, 1, "I/O error");
2283 return -1;
2284}
2285
2286static int stv090x_sw_algo(struct stv090x_state *state)
2287{
2288 int no_signal, zigzag, lock = 0;
2289 u32 reg;
2290
2291 s32 dvbs2_fly_wheel;
2292 s32 inc, timeout_step, trials, steps_max;
2293
2294 /* get params */
2295 stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
2296
2297 switch (state->search_mode) {
2298 case STV090x_SEARCH_DVBS1:
2299 case STV090x_SEARCH_DSS:
2300 /* accelerate the frequency detector */
2301 if (state->dev_ver >= 0x20) {
2302 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2303 goto err;
2304 }
2305
2306 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2307 goto err;
2308 zigzag = 0;
2309 break;
2310
2311 case STV090x_SEARCH_DVBS2:
2312 if (state->dev_ver >= 0x20) {
2313 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2314 goto err;
2315 }
2316
2317 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2318 goto err;
2319 zigzag = 1;
2320 break;
2321
2322 case STV090x_SEARCH_AUTO:
2323 default:
2324 /* accelerate the frequency detector */
2325 if (state->dev_ver >= 0x20) {
2326 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2327 goto err;
2328 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2329 goto err;
2330 }
2331
2332 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
2333 goto err;
2334 zigzag = 0;
2335 break;
2336 }
2337
2338 trials = 0;
2339 do {
2340 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2341 no_signal = stv090x_chk_signal(state);
2342 trials++;
2343
2344 /*run the SW search 2 times maximum*/
2345 if (lock || no_signal || (trials == 2)) {
2346 /*Check if the demod is not losing lock in DVBS2*/
2347 if (state->dev_ver >= 0x20) {
2348 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2349 goto err;
2350 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2351 goto err;
2352 }
2353
2354 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2355 if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2356 /*Check if the demod is not losing lock in DVBS2*/
2357 msleep(timeout_step);
2358 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2359 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2360 if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
2361 msleep(timeout_step);
2362 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2363 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2364 }
2365 if (dvbs2_fly_wheel < 0xd) {
2366 /*FALSE lock, The demod is loosing lock */
2367 lock = 0;
2368 if (trials < 2) {
2369 if (state->dev_ver >= 0x20) {
2370 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2371 goto err;
2372 }
2373
2374 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2375 goto err;
2376 }
2377 }
2378 }
2379 }
2380 } while ((!lock) && (trials < 2) && (!no_signal));
2381
2382 return lock;
2383err:
2384 dprintk(FE_ERROR, 1, "I/O error");
2385 return -1;
2386}
2387
2388static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2389{
2390 u32 reg;
2391 enum stv090x_delsys delsys;
2392
2393 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2394 if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2395 delsys = STV090x_DVBS2;
2396 else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2397 reg = STV090x_READ_DEMOD(state, FECM);
2398 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2399 delsys = STV090x_DSS;
2400 else
2401 delsys = STV090x_DVBS1;
2402 } else {
2403 delsys = STV090x_ERROR;
2404 }
2405
2406 return delsys;
2407}
2408
2409/* in Hz */
2410static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2411{
2412 s32 derot, int_1, int_2, tmp_1, tmp_2;
2413
2414 derot = STV090x_READ_DEMOD(state, CFR2) << 16;
2415 derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
2416 derot |= STV090x_READ_DEMOD(state, CFR0);
2417
2418 derot = comp2(derot, 24);
2419 int_1 = state->mclk >> 12;
2420 int_2 = derot >> 12;
2421
2422 /* carrier_frequency = MasterClock * Reg / 2^24 */
2423 tmp_1 = state->mclk % 0x1000;
2424 tmp_2 = derot % 0x1000;
2425
2426 derot = (int_1 * int_2) +
2427 ((int_1 * tmp_2) >> 12) +
2428 ((int_1 * tmp_1) >> 12);
2429
2430 return derot;
2431}
2432
2433static int stv090x_get_viterbi(struct stv090x_state *state)
2434{
2435 u32 reg, rate;
2436
2437 reg = STV090x_READ_DEMOD(state, VITCURPUN);
2438 rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2439
2440 switch (rate) {
2441 case 13:
2442 state->fec = STV090x_PR12;
2443 break;
2444
2445 case 18:
2446 state->fec = STV090x_PR23;
2447 break;
2448
2449 case 21:
2450 state->fec = STV090x_PR34;
2451 break;
2452
2453 case 24:
2454 state->fec = STV090x_PR56;
2455 break;
2456
2457 case 25:
2458 state->fec = STV090x_PR67;
2459 break;
2460
2461 case 26:
2462 state->fec = STV090x_PR78;
2463 break;
2464
2465 default:
2466 state->fec = STV090x_PRERR;
2467 break;
2468 }
2469
2470 return 0;
2471}
2472
2473static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2474{
2475 struct dvb_frontend *fe = &state->frontend;
2476
2477 u8 tmg;
2478 u32 reg;
2479 s32 i = 0, offst_freq;
2480
2481 msleep(5);
2482
2483 if (state->algo == STV090x_BLIND_SEARCH) {
2484 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2485 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2486 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
2487 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2488 msleep(5);
2489 i += 5;
2490 }
2491 }
2492 state->delsys = stv090x_get_std(state);
2493
2494 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2495 goto err;
2496
2497 if (state->config->tuner_get_frequency) {
2498 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2499 goto err;
2500 }
2501
2502 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2503 goto err;
2504
2505 offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000;
2506 state->frequency += offst_freq;
2507
2508 if (stv090x_get_viterbi(state) < 0)
2509 goto err;
2510
2511 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2512 state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2513 state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2514 state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2515 reg = STV090x_READ_DEMOD(state, TMGOBS);
2516 state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2517 reg = STV090x_READ_DEMOD(state, FECM);
2518 state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2519
2520 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2521
2522 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2523 goto err;
2524
2525 if (state->config->tuner_get_frequency) {
2526 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2527 goto err;
2528 }
2529
2530 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2531 goto err;
2532
2533 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2534 return STV090x_RANGEOK;
2535 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2536 return STV090x_RANGEOK;
2537 else
2538 return STV090x_OUTOFRANGE; /* Out of Range */
2539 } else {
2540 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2541 return STV090x_RANGEOK;
2542 else
2543 return STV090x_OUTOFRANGE;
2544 }
2545
2546 return STV090x_OUTOFRANGE;
2547err:
2548 dprintk(FE_ERROR, 1, "I/O error");
2549 return -1;
2550}
2551
2552static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2553{
2554 s32 offst_tmg;
2555
2556 offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2557 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
2558 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2559
2560 offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2561 if (!offst_tmg)
2562 offst_tmg = 1;
2563
2564 offst_tmg = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
2565 offst_tmg /= 320;
2566
2567 return offst_tmg;
2568}
2569
2570static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2571{
2572 u8 aclc = 0x29;
2573 s32 i;
2574 struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
2575
2576 if (state->dev_ver == 0x20) {
2577 car_loop = stv090x_s2_crl_cut20;
2578 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
2579 car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
2580 } else {
2581 /* >= Cut 3 */
2582 car_loop = stv090x_s2_crl_cut30;
2583 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30;
2584 car_loop_apsk_low = stv090x_s2_apsk_crl_cut30;
2585 }
2586
2587 if (modcod < STV090x_QPSK_12) {
2588 i = 0;
2589 while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
2590 i++;
2591
2592 if (i >= 3)
2593 i = 2;
2594
2595 } else {
2596 i = 0;
2597 while ((i < 14) && (modcod != car_loop[i].modcod))
2598 i++;
2599
2600 if (i >= 14) {
2601 i = 0;
2602 while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
2603 i++;
2604
2605 if (i >= 11)
2606 i = 10;
2607 }
2608 }
2609
2610 if (modcod <= STV090x_QPSK_25) {
2611 if (pilots) {
2612 if (state->srate <= 3000000)
2613 aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
2614 else if (state->srate <= 7000000)
2615 aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
2616 else if (state->srate <= 15000000)
2617 aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
2618 else if (state->srate <= 25000000)
2619 aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
2620 else
2621 aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
2622 } else {
2623 if (state->srate <= 3000000)
2624 aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
2625 else if (state->srate <= 7000000)
2626 aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
2627 else if (state->srate <= 15000000)
2628 aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
2629 else if (state->srate <= 25000000)
2630 aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
2631 else
2632 aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
2633 }
2634
2635 } else if (modcod <= STV090x_8PSK_910) {
2636 if (pilots) {
2637 if (state->srate <= 3000000)
2638 aclc = car_loop[i].crl_pilots_on_2;
2639 else if (state->srate <= 7000000)
2640 aclc = car_loop[i].crl_pilots_on_5;
2641 else if (state->srate <= 15000000)
2642 aclc = car_loop[i].crl_pilots_on_10;
2643 else if (state->srate <= 25000000)
2644 aclc = car_loop[i].crl_pilots_on_20;
2645 else
2646 aclc = car_loop[i].crl_pilots_on_30;
2647 } else {
2648 if (state->srate <= 3000000)
2649 aclc = car_loop[i].crl_pilots_off_2;
2650 else if (state->srate <= 7000000)
2651 aclc = car_loop[i].crl_pilots_off_5;
2652 else if (state->srate <= 15000000)
2653 aclc = car_loop[i].crl_pilots_off_10;
2654 else if (state->srate <= 25000000)
2655 aclc = car_loop[i].crl_pilots_off_20;
2656 else
2657 aclc = car_loop[i].crl_pilots_off_30;
2658 }
2659 } else { /* 16APSK and 32APSK */
2660 if (state->srate <= 3000000)
2661 aclc = car_loop_apsk_low[i].crl_pilots_on_2;
2662 else if (state->srate <= 7000000)
2663 aclc = car_loop_apsk_low[i].crl_pilots_on_5;
2664 else if (state->srate <= 15000000)
2665 aclc = car_loop_apsk_low[i].crl_pilots_on_10;
2666 else if (state->srate <= 25000000)
2667 aclc = car_loop_apsk_low[i].crl_pilots_on_20;
2668 else
2669 aclc = car_loop_apsk_low[i].crl_pilots_on_30;
2670 }
2671
2672 return aclc;
2673}
2674
2675static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2676{
2677 struct stv090x_short_frame_crloop *short_crl;
2678 s32 index = 0;
2679 u8 aclc = 0x0b;
2680
2681 switch (state->modulation) {
2682 case STV090x_QPSK:
2683 default:
2684 index = 0;
2685 break;
2686 case STV090x_8PSK:
2687 index = 1;
2688 break;
2689 case STV090x_16APSK:
2690 index = 2;
2691 break;
2692 case STV090x_32APSK:
2693 index = 3;
2694 break;
2695 }
2696
2697 if (state->dev_ver >= 0x30)
2698 short_crl = stv090x_s2_short_crl_cut20;
2699 else if (state->dev_ver >= 0x20)
2700 short_crl = stv090x_s2_short_crl_cut30;
2701
2702 if (state->srate <= 3000000)
2703 aclc = short_crl[index].crl_2;
2704 else if (state->srate <= 7000000)
2705 aclc = short_crl[index].crl_5;
2706 else if (state->srate <= 15000000)
2707 aclc = short_crl[index].crl_10;
2708 else if (state->srate <= 25000000)
2709 aclc = short_crl[index].crl_20;
2710 else
2711 aclc = short_crl[index].crl_30;
2712
2713 return aclc;
2714}
2715
2716static int stv090x_optimize_track(struct stv090x_state *state)
2717{
2718 struct dvb_frontend *fe = &state->frontend;
2719
2720 enum stv090x_rolloff rolloff;
2721 enum stv090x_modcod modcod;
2722
2723 s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2724 u32 reg;
2725
2726 srate = stv090x_get_srate(state, state->mclk);
2727 srate += stv090x_get_tmgoffst(state, srate);
2728
2729 switch (state->delsys) {
2730 case STV090x_DVBS1:
2731 case STV090x_DSS:
2732 if (state->algo == STV090x_SEARCH_AUTO) {
2733 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2734 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2735 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2736 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2737 goto err;
2738 }
2739 reg = STV090x_READ_DEMOD(state, DEMOD);
2740 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2741 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
2742 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2743 goto err;
2744
2745 if (state->dev_ver >= 0x30) {
2746 if (stv090x_get_viterbi(state) < 0)
2747 goto err;
2748
2749 if (state->fec == STV090x_PR12) {
2750 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
2751 goto err;
2752 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2753 goto err;
2754 } else {
2755 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
2756 goto err;
2757 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2758 goto err;
2759 }
2760 }
2761
2762 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2763 goto err;
2764 break;
2765
2766 case STV090x_DVBS2:
2767 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2768 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2769 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2770 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2771 goto err;
2772 if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2773 goto err;
2774 if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2775 goto err;
2776 if (state->frame_len == STV090x_LONG_FRAME) {
2777 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2778 modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2779 pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2780 aclc = stv090x_optimize_carloop(state, modcod, pilots);
2781 if (modcod <= STV090x_QPSK_910) {
2782 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2783 } else if (modcod <= STV090x_8PSK_910) {
2784 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2785 goto err;
2786 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2787 goto err;
2788 }
2789 if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2790 if (modcod <= STV090x_16APSK_910) {
2791 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2792 goto err;
2793 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2794 goto err;
2795 } else {
2796 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2797 goto err;
2798 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2799 goto err;
2800 }
2801 }
2802 } else {
2803 /*Carrier loop setting for short frame*/
2804 aclc = stv090x_optimize_carloop_short(state);
2805 if (state->modulation == STV090x_QPSK) {
2806 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2807 goto err;
2808 } else if (state->modulation == STV090x_8PSK) {
2809 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2810 goto err;
2811 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2812 goto err;
2813 } else if (state->modulation == STV090x_16APSK) {
2814 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2815 goto err;
2816 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2817 goto err;
2818 } else if (state->modulation == STV090x_32APSK) {
2819 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2820 goto err;
2821 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2822 goto err;
2823 }
2824 }
2825
2826 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2827 break;
2828
2829 case STV090x_UNKNOWN:
2830 default:
2831 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2832 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2833 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2834 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2835 goto err;
2836 break;
2837 }
2838
2839 f_1 = STV090x_READ_DEMOD(state, CFR2);
2840 f_0 = STV090x_READ_DEMOD(state, CFR1);
2841 reg = STV090x_READ_DEMOD(state, TMGOBS);
2842 rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2843
2844 if (state->algo == STV090x_BLIND_SEARCH) {
2845 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2846 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2847 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2848 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2849 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2850 goto err;
2851 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
2852 goto err;
2853
2854 if (stv090x_set_srate(state, srate) < 0)
2855 goto err;
2856 blind_tune = 1;
2857 }
2858
2859 if (state->dev_ver >= 0x20) {
2860 if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
2861 (state->search_mode == STV090x_SEARCH_DSS) ||
2862 (state->search_mode == STV090x_SEARCH_AUTO)) {
2863
2864 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2865 goto err;
2866 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
2867 goto err;
2868 }
2869 }
2870
2871 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2872 goto err;
2873
2874 /* AUTO tracking MODE */
2875 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
2876 goto err;
2877 /* AUTO tracking MODE */
2878 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
2879 goto err;
2880
2881 if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) {
2882 /* update initial carrier freq with the found freq offset */
2883 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2884 goto err;
2885 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2886 goto err;
2887 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2888
2889 if ((state->dev_ver >= 0x20) || (blind_tune == 1)) {
2890
2891 if (state->algo != STV090x_WARM_SEARCH) {
2892
2893 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2894 goto err;
2895
2896 if (state->config->tuner_set_bandwidth) {
2897 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2898 goto err;
2899 }
2900
2901 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2902 goto err;
2903
2904 }
2905 }
2906 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
2907 msleep(50); /* blind search: wait 50ms for SR stabilization */
2908 else
2909 msleep(5);
2910
2911 stv090x_get_lock_tmg(state);
2912
2913 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
2914 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2915 goto err;
2916 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2917 goto err;
2918 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2919 goto err;
2920 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2921 goto err;
2922
2923 i = 0;
2924
2925 while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
2926
2927 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2928 goto err;
2929 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2930 goto err;
2931 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2932 goto err;
2933 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2934 goto err;
2935 i++;
2936 }
2937 }
2938
2939 }
2940
2941 if (state->dev_ver >= 0x20) {
2942 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2943 goto err;
2944 }
2945
2946 if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
2947 stv090x_set_vit_thtracq(state);
2948
2949 return 0;
2950err:
2951 dprintk(FE_ERROR, 1, "I/O error");
2952 return -1;
2953}
2954
2955static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
2956{
2957 s32 timer = 0, lock = 0, stat;
2958 u32 reg;
2959
2960 while ((timer < timeout) && (!lock)) {
2961 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2962 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
2963
2964 switch (stat) {
2965 case 0: /* searching */
2966 case 1: /* first PLH detected */
2967 default:
2968 lock = 0;
2969 break;
2970
2971 case 2: /* DVB-S2 mode */
2972 reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
2973 lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
2974 break;
2975
2976 case 3: /* DVB-S1/legacy mode */
2977 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
2978 lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
2979 break;
2980 }
2981 if (!lock) {
2982 msleep(10);
2983 timer += 10;
2984 }
2985 }
2986 return lock;
2987}
2988
2989static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
2990{
2991 u32 reg;
2992 s32 timer = 0;
2993 int lock;
2994
2995 lock = stv090x_get_dmdlock(state, timeout_dmd);
2996 if (lock)
2997 lock = stv090x_get_feclock(state, timeout_fec);
2998
2999 if (lock) {
3000 lock = 0;
3001
3002 while ((timer < timeout_fec) && (!lock)) {
3003 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3004 lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
3005 msleep(1);
3006 timer++;
3007 }
3008 }
3009
3010 return lock;
3011}
3012
3013static int stv090x_set_s2rolloff(struct stv090x_state *state)
3014{
3015 u32 reg;
3016
3017 if (state->dev_ver <= 0x20) {
3018 /* rolloff to auto mode if DVBS2 */
3019 reg = STV090x_READ_DEMOD(state, DEMOD);
3020 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
3021 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3022 goto err;
3023 } else {
3024 /* DVB-S2 rolloff to auto mode if DVBS2 */
3025 reg = STV090x_READ_DEMOD(state, DEMOD);
3026 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
3027 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3028 goto err;
3029 }
3030 return 0;
3031err:
3032 dprintk(FE_ERROR, 1, "I/O error");
3033 return -1;
3034}
3035
3036
3037static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3038{
3039 struct dvb_frontend *fe = &state->frontend;
3040 enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
3041 u32 reg;
3042 s32 timeout_dmd = 500, timeout_fec = 50, agc1_power, power_iq = 0, i;
3043 int lock = 0, low_sr = 0, no_signal = 0;
3044
3045 reg = STV090x_READ_DEMOD(state, TSCFGH);
3046 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
3047 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3048 goto err;
3049
3050 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3051 goto err;
3052
3053 if (state->dev_ver >= 0x20) {
3054 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) /* cut 2.0 */
3055 goto err;
3056 }
3057
3058 stv090x_get_lock_tmg(state);
3059
3060 if (state->algo == STV090x_BLIND_SEARCH) {
3061 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
3062 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
3063 goto err;
3064 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3065 goto err;
3066 if (stv090x_set_srate(state, 1000000) < 0) /* inital srate = 1Msps */
3067 goto err;
3068 } else {
3069 /* known srate */
3070 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
3071 goto err;
3072 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
3073 goto err;
3074
3075 if (state->srate < 2000000) {
3076 /* SR < 2MSPS */
3077 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
3078 goto err;
3079 } else {
3080 /* SR >= 2Msps */
3081 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3082 goto err;
3083 }
3084
3085 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3086 goto err;
3087
3088 if (state->dev_ver >= 0x20) {
3089 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3090 goto err;
3091 if (state->algo == STV090x_COLD_SEARCH)
3092 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
3093 else if (state->algo == STV090x_WARM_SEARCH)
3094 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
3095 }
3096
3097 /* if cold start or warm (Symbolrate is known)
3098 * use a Narrow symbol rate scan range
3099 */
3100 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
3101 goto err;
3102
3103 if (stv090x_set_srate(state, state->srate) < 0)
3104 goto err;
3105
3106 if (stv090x_set_max_srate(state, state->mclk, state->srate) < 0)
3107 goto err;
3108 if (stv090x_set_min_srate(state, state->mclk, state->srate) < 0)
3109 goto err;
3110
3111 if (state->srate >= 10000000)
3112 low_sr = 0;
3113 else
3114 low_sr = 1;
3115 }
3116
3117 /* Setup tuner */
3118 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3119 goto err;
3120
3121 if (state->config->tuner_set_bbgain) {
3122 if (state->config->tuner_set_bbgain(fe, 10) < 0) /* 10dB */
3123 goto err;
3124 }
3125
3126 if (state->config->tuner_set_frequency) {
3127 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3128 goto err;
3129 }
3130
3131 if (state->config->tuner_set_bandwidth) {
3132 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3133 goto err;
3134 }
3135
3136 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
3137 goto err;
3138
3139 msleep(50);
3140
3141 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3142 goto err;
3143
3144 if (state->config->tuner_get_status) {
3145 if (state->config->tuner_get_status(fe, &reg) < 0)
3146 goto err;
3147 }
3148
3149 if (reg)
3150 dprintk(FE_DEBUG, 1, "Tuner phase locked");
3151 else
3152 dprintk(FE_DEBUG, 1, "Tuner unlocked");
3153
3154 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
3155 goto err;
3156
3157 msleep(10);
3158 agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
3159 STV090x_READ_DEMOD(state, AGCIQIN0));
3160
3161 if (agc1_power == 0) {
3162 /* If AGC1 integrator value is 0
3163 * then read POWERI, POWERQ
3164 */
3165 for (i = 0; i < 5; i++) {
3166 power_iq += (STV090x_READ_DEMOD(state, POWERI) +
3167 STV090x_READ_DEMOD(state, POWERQ)) >> 1;
3168 }
3169 power_iq /= 5;
3170 }
3171
3172 if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
3173 dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
3174 lock = 0;
3175
3176 } else {
3177 reg = STV090x_READ_DEMOD(state, DEMOD);
3178 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3179
3180 if (state->dev_ver <= 0x20) {
3181 /* rolloff to auto mode if DVBS2 */
3182 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3183 } else {
3184 /* DVB-S2 rolloff to auto mode if DVBS2 */
3185 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
3186 }
3187 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3188 goto err;
3189
3190 if (stv090x_delivery_search(state) < 0)
3191 goto err;
3192
3193 if (state->algo != STV090x_BLIND_SEARCH) {
3194 if (stv090x_start_search(state) < 0)
3195 goto err;
3196 }
3197 }
3198
3199 /* need to check for AGC1 state */
3200
3201
3202
3203 if (state->algo == STV090x_BLIND_SEARCH)
3204 lock = stv090x_blind_search(state);
3205
3206 else if (state->algo == STV090x_COLD_SEARCH)
3207 lock = stv090x_get_coldlock(state, timeout_dmd);
3208
3209 else if (state->algo == STV090x_WARM_SEARCH)
3210 lock = stv090x_get_dmdlock(state, timeout_dmd);
3211
3212 if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3213 if (!low_sr) {
3214 if (stv090x_chk_tmg(state))
3215 lock = stv090x_sw_algo(state);
3216 }
3217 }
3218
3219 if (lock)
3220 signal_state = stv090x_get_sig_params(state);
3221
3222 if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3223 stv090x_optimize_track(state);
3224
3225 if (state->dev_ver >= 0x20) {
3226 /* >= Cut 2.0 :release TS reset after
3227 * demod lock and optimized Tracking
3228 */
3229 reg = STV090x_READ_DEMOD(state, TSCFGH);
3230 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3231 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3232 goto err;
3233
3234 msleep(3);
3235
3236 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3237 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3238 goto err;
3239
3240 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3241 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3242 goto err;
3243 }
3244
3245 if (stv090x_get_lock(state, timeout_fec, timeout_fec)) {
3246 lock = 1;
3247 if (state->delsys == STV090x_DVBS2) {
3248 stv090x_set_s2rolloff(state);
3249
3250 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3251 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
3252 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3253 goto err;
3254 /* Reset DVBS2 packet delinator error counter */
3255 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3256 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
3257 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3258 goto err;
3259
3260 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3261 goto err;
3262 } else {
3263 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3264 goto err;
3265 }
3266 /* Reset the Total packet counter */
3267 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3268 goto err;
3269 /* Reset the packet Error counter2 */
3270 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3271 goto err;
3272 } else {
3273 lock = 0;
3274 signal_state = STV090x_NODATA;
3275 no_signal = stv090x_chk_signal(state);
3276 }
3277 }
3278 return signal_state;
3279
3280err:
3281 dprintk(FE_ERROR, 1, "I/O error");
3282 return -1;
3283}
3284
3285static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
3286{
3287 struct stv090x_state *state = fe->demodulator_priv;
3288 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3289
3290 state->delsys = props->delivery_system;
3291 state->frequency = p->frequency;
3292 state->srate = p->u.qpsk.symbol_rate;
3293 state->search_mode = STV090x_SEARCH_AUTO;
3294 state->algo = STV090x_COLD_SEARCH;
3295 state->fec = STV090x_PRERR;
3296 state->search_range = 2000000;
3297
3298 if (stv090x_algo(state) == STV090x_RANGEOK) {
3299 dprintk(FE_DEBUG, 1, "Search success!");
3300 return DVBFE_ALGO_SEARCH_SUCCESS;
3301 } else {
3302 dprintk(FE_DEBUG, 1, "Search failed!");
3303 return DVBFE_ALGO_SEARCH_FAILED;
3304 }
3305
3306 return DVBFE_ALGO_SEARCH_ERROR;
3307}
3308
3309/* FIXME! */
3310static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3311{
3312 struct stv090x_state *state = fe->demodulator_priv;
3313 u32 reg;
3314 u8 search_state;
3315
3316 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3317 search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3318
3319 switch (search_state) {
3320 case 0: /* searching */
3321 case 1: /* first PLH detected */
3322 default:
3323 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3324 *status = 0;
3325 break;
3326
3327 case 2: /* DVB-S2 mode */
3328 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3329 reg = STV090x_READ_DEMOD(state, DSTATUS);
3330 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3331 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3332 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3333 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3334 }
3335 }
3336 break;
3337
3338 case 3: /* DVB-S1/legacy mode */
3339 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3340 reg = STV090x_READ_DEMOD(state, DSTATUS);
3341 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3342 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3343 if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3344 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3345 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3346 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3347 }
3348 }
3349 }
3350 break;
3351 }
3352
3353 return 0;
3354}
3355
3356static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3357{
3358 struct stv090x_state *state = fe->demodulator_priv;
3359
3360 s32 count_4, count_3, count_2, count_1, count_0, count;
3361 u32 reg, h, m, l;
3362 enum fe_status status;
3363
3364 stv090x_read_status(fe, &status);
3365 if (!(status & FE_HAS_LOCK)) {
3366 *per = 1 << 23; /* Max PER */
3367 } else {
3368 /* Counter 2 */
3369 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3370 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3371
3372 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3373 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3374
3375 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3376 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3377
3378 *per = ((h << 16) | (m << 8) | l);
3379
3380 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3381 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3382 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3383 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3384 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3385
3386 if ((!count_4) && (!count_3)) {
3387 count = (count_2 & 0xff) << 16;
3388 count |= (count_1 & 0xff) << 8;
3389 count |= count_0 & 0xff;
3390 } else {
3391 count = 1 << 24;
3392 }
3393 if (count == 0)
3394 *per = 1;
3395 }
3396 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3397 goto err;
3398 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3399 goto err;
3400
3401 return 0;
3402err:
3403 dprintk(FE_ERROR, 1, "I/O error");
3404 return -1;
3405}
3406
3407static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3408{
3409 int res = 0;
3410 int min = 0, med;
3411
3412 if (val < tab[min].read)
3413 res = tab[min].real;
3414 else if (val >= tab[max].read)
3415 res = tab[max].real;
3416 else {
3417 while ((max - min) > 1) {
3418 med = (max + min) / 2;
3419 if (val >= tab[min].read && val < tab[med].read)
3420 max = med;
3421 else
3422 min = med;
3423 }
3424 res = ((val - tab[min].read) *
3425 (tab[max].real - tab[min].real) /
3426 (tab[max].read - tab[min].read)) +
3427 tab[min].real;
3428 }
3429
3430 return res;
3431}
3432
3433static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3434{
3435 struct stv090x_state *state = fe->demodulator_priv;
3436 u32 reg;
3437 s32 agc;
3438
3439 reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3440 agc = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3441
3442 *strength = stv090x_table_lookup(stv090x_rf_tab, ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3443 if (agc > stv090x_rf_tab[0].read)
3444 *strength = 5;
3445 else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3446 *strength = -100;
3447
3448 return 0;
3449}
3450
3451static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3452{
3453 struct stv090x_state *state = fe->demodulator_priv;
3454 u32 reg_0, reg_1, reg, i;
3455 s32 val_0, val_1, val = 0;
3456 u8 lock_f;
3457
3458 switch (state->delsys) {
3459 case STV090x_DVBS2:
3460 reg = STV090x_READ_DEMOD(state, DSTATUS);
3461 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3462 if (lock_f) {
3463 msleep(5);
3464 for (i = 0; i < 16; i++) {
3465 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3466 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3467 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3468 val_0 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3469 val += MAKEWORD16(val_1, val_0);
3470 msleep(1);
3471 }
3472 val /= 16;
3473 *cnr = stv090x_table_lookup(stv090x_s2cn_tab, ARRAY_SIZE(stv090x_s2cn_tab) - 1, val);
3474 if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s2cn_tab) - 1].read)
3475 *cnr = 1000;
3476 }
3477 break;
3478
3479 case STV090x_DVBS1:
3480 case STV090x_DSS:
3481 reg = STV090x_READ_DEMOD(state, DSTATUS);
3482 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3483 if (lock_f) {
3484 msleep(5);
3485 for (i = 0; i < 16; i++) {
3486 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3487 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3488 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3489 val_0 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3490 val += MAKEWORD16(val_1, val_0);
3491 msleep(1);
3492 }
3493 val /= 16;
3494 *cnr = stv090x_table_lookup(stv090x_s1cn_tab, ARRAY_SIZE(stv090x_s1cn_tab) - 1, val);
3495 if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s1cn_tab) - 1].read)
3496 *cnr = 1000;
3497 }
3498 break;
3499 default:
3500 break;
3501 }
3502
3503 return 0;
3504}
3505
3506static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
3507{
3508 struct stv090x_state *state = fe->demodulator_priv;
3509 u32 reg;
3510
3511 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3512 switch (tone) {
3513 case SEC_TONE_ON:
3514 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3515 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3516 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3517 goto err;
3518 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3519 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3520 goto err;
3521 break;
3522
3523 case SEC_TONE_OFF:
3524 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3525 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3526 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3527 goto err;
3528 break;
3529 default:
3530 return -EINVAL;
3531 }
3532
3533 return 0;
3534err:
3535 dprintk(FE_ERROR, 1, "I/O error");
3536 return -1;
3537}
3538
3539
3540static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3541{
3542 return DVBFE_ALGO_CUSTOM;
3543}
3544
3545static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3546{
3547 struct stv090x_state *state = fe->demodulator_priv;
3548 u32 reg, idle = 0, fifo_full = 1;
3549 int i;
3550
3551 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3552
3553 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 2);
3554 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3555 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3556 goto err;
3557 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3558 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3559 goto err;
3560
3561 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3562 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3563 goto err;
3564
3565 for (i = 0; i < cmd->msg_len; i++) {
3566
3567 while (fifo_full) {
3568 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3569 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3570 }
3571
3572 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3573 goto err;
3574 }
3575 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3576 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3577 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3578 goto err;
3579
3580 i = 0;
3581
3582 while ((!idle) && (i < 10)) {
3583 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3584 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3585 msleep(10);
3586 i++;
3587 }
3588
3589 return 0;
3590err:
3591 dprintk(FE_ERROR, 1, "I/O error");
3592 return -1;
3593}
3594
3595static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
3596{
3597 struct stv090x_state *state = fe->demodulator_priv;
3598 u32 reg, idle = 0, fifo_full = 1;
3599 u8 mode, value;
3600 int i;
3601
3602 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3603
3604 if (burst == SEC_MINI_A) {
3605 mode = 3;
3606 value = 0x00;
3607 } else {
3608 mode = 2;
3609 value = 0xFF;
3610 }
3611
3612 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3613 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3614 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3615 goto err;
3616 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3617 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3618 goto err;
3619
3620 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3621 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3622 goto err;
3623
3624 while (fifo_full) {
3625 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3626 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3627 }
3628
3629 if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3630 goto err;
3631
3632 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3633 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3634 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3635 goto err;
3636
3637 i = 0;
3638
3639 while ((!idle) && (i < 10)) {
3640 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3641 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3642 msleep(10);
3643 i++;
3644 }
3645
3646 return 0;
3647err:
3648 dprintk(FE_ERROR, 1, "I/O error");
3649 return -1;
3650}
3651
3652static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3653{
3654 struct stv090x_state *state = fe->demodulator_priv;
3655 u32 reg = 0, i = 0, rx_end = 0;
3656
3657 while ((rx_end != 1) && (i < 10)) {
3658 msleep(10);
3659 i++;
3660 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3661 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3662 }
3663
3664 if (rx_end) {
3665 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3666 for (i = 0; i < reply->msg_len; i++)
3667 reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3668 }
3669
3670 return 0;
3671}
3672
3673static int stv090x_sleep(struct dvb_frontend *fe)
3674{
3675 struct stv090x_state *state = fe->demodulator_priv;
3676 u32 reg;
3677
3678 dprintk(FE_DEBUG, 1, "Set %s to sleep",
3679 state->device == STV0900 ? "STV0900" : "STV0903");
3680
3681 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3682 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
3683 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3684 goto err;
3685
3686 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3687 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3688 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3689 goto err;
3690
3691 return 0;
3692err:
3693 dprintk(FE_ERROR, 1, "I/O error");
3694 return -1;
3695}
3696
3697static int stv090x_wakeup(struct dvb_frontend *fe)
3698{
3699 struct stv090x_state *state = fe->demodulator_priv;
3700 u32 reg;
3701
3702 dprintk(FE_DEBUG, 1, "Wake %s from standby",
3703 state->device == STV0900 ? "STV0900" : "STV0903");
3704
3705 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3706 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
3707 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3708 goto err;
3709
3710 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3711 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
3712 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3713 goto err;
3714
3715 return 0;
3716err:
3717 dprintk(FE_ERROR, 1, "I/O error");
3718 return -1;
3719}
3720
3721static void stv090x_release(struct dvb_frontend *fe)
3722{
3723 struct stv090x_state *state = fe->demodulator_priv;
3724
3725 kfree(state);
3726}
3727
3728static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
3729{
3730 u32 reg = 0;
3731
3732 switch (ldpc_mode) {
3733 case STV090x_DUAL:
3734 default:
3735 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
3736 /* set LDPC to dual mode */
3737 if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
3738 goto err;
3739
3740 state->demod_mode = STV090x_DUAL;
3741
3742 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3743 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3744 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3745 goto err;
3746 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3747 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3748 goto err;
3749
3750 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
3751 goto err;
3752 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
3753 goto err;
3754 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
3755 goto err;
3756 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
3757 goto err;
3758 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
3759 goto err;
3760 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
3761 goto err;
3762 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
3763 goto err;
3764
3765 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
3766 goto err;
3767 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
3768 goto err;
3769 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
3770 goto err;
3771 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
3772 goto err;
3773 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
3774 goto err;
3775 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
3776 goto err;
3777 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
3778 goto err;
3779
3780 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
3781 goto err;
3782 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
3783 goto err;
3784 }
3785 break;
3786
3787 case STV090x_SINGLE:
3788 if (stv090x_stop_modcod(state) < 0)
3789 goto err;
3790 if (stv090x_activate_modcod_single(state) < 0)
3791 goto err;
3792
3793 if (state->demod == STV090x_DEMODULATOR_1) {
3794 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
3795 goto err;
3796 } else {
3797 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
3798 goto err;
3799 }
3800
3801 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3802 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3803 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3804 goto err;
3805 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3806 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3807 goto err;
3808
3809 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3810 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
3811 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3812 goto err;
3813 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
3814 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3815 goto err;
3816 break;
3817 }
3818
3819 return 0;
3820err:
3821 dprintk(FE_ERROR, 1, "I/O error");
3822 return -1;
3823}
3824
3825/* return (Hz), clk in Hz*/
3826static u32 stv090x_get_mclk(struct stv090x_state *state)
3827{
3828 const struct stv090x_config *config = state->config;
3829 u32 div, reg;
3830 u8 ratio;
3831
3832 div = stv090x_read_reg(state, STV090x_NCOARSE);
3833 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3834 ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
3835
3836 return (div + 1) * config->xtal / ratio; /* kHz */
3837}
3838
3839static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3840{
3841 const struct stv090x_config *config = state->config;
3842 u32 reg, div, clk_sel;
3843
3844 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3845 clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
3846
3847 div = ((clk_sel * mclk) / config->xtal) - 1;
3848
3849 reg = stv090x_read_reg(state, STV090x_NCOARSE);
3850 STV090x_SETFIELD(reg, M_DIV_FIELD, div);
3851 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3852 goto err;
3853
3854 state->mclk = stv090x_get_mclk(state);
3855
3856 /*Set the DiseqC frequency to 22KHz */
3857 div = state->mclk / 704000;
3858 if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
3859 goto err;
3860 if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
3861 goto err;
3862
3863 return 0;
3864err:
3865 dprintk(FE_ERROR, 1, "I/O error");
3866 return -1;
3867}
3868
3869static int stv090x_set_tspath(struct stv090x_state *state)
3870{
3871 u32 reg;
3872
3873 if (state->dev_ver >= 0x20) {
3874 switch (state->config->ts1_mode) {
3875 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3876 case STV090x_TSMODE_DVBCI:
3877 switch (state->config->ts2_mode) {
3878 case STV090x_TSMODE_SERIAL_PUNCTURED:
3879 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3880 default:
3881 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
3882 break;
3883
3884 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3885 case STV090x_TSMODE_DVBCI:
3886 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
3887 goto err;
3888 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3889 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3890 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3891 goto err;
3892 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
3893 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3894 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
3895 goto err;
3896 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3897 goto err;
3898 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3899 goto err;
3900 break;
3901 }
3902 break;
3903
3904 case STV090x_TSMODE_SERIAL_PUNCTURED:
3905 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3906 default:
3907 switch (state->config->ts2_mode) {
3908 case STV090x_TSMODE_SERIAL_PUNCTURED:
3909 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3910 default:
3911 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3912 goto err;
3913 break;
3914
3915 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3916 case STV090x_TSMODE_DVBCI:
3917 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
3918 goto err;
3919 break;
3920 }
3921 break;
3922 }
3923 } else {
3924 switch (state->config->ts1_mode) {
3925 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3926 case STV090x_TSMODE_DVBCI:
3927 switch (state->config->ts2_mode) {
3928 case STV090x_TSMODE_SERIAL_PUNCTURED:
3929 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3930 default:
3931 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
3932 break;
3933
3934 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3935 case STV090x_TSMODE_DVBCI:
3936 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
3937 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3938 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3939 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3940 goto err;
3941 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3942 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
3943 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3944 goto err;
3945 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3946 goto err;
3947 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3948 goto err;
3949 break;
3950 }
3951 break;
3952
3953 case STV090x_TSMODE_SERIAL_PUNCTURED:
3954 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3955 default:
3956 switch (state->config->ts2_mode) {
3957 case STV090x_TSMODE_SERIAL_PUNCTURED:
3958 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3959 default:
3960 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
3961 break;
3962
3963 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3964 case STV090x_TSMODE_DVBCI:
3965 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
3966 break;
3967 }
3968 break;
3969 }
3970 }
3971
3972 switch (state->config->ts1_mode) {
3973 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3974 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3975 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3976 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3977 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3978 goto err;
3979 break;
3980
3981 case STV090x_TSMODE_DVBCI:
3982 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3983 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3984 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3985 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3986 goto err;
3987 break;
3988
3989 case STV090x_TSMODE_SERIAL_PUNCTURED:
3990 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3991 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3992 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3993 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3994 goto err;
3995 break;
3996
3997 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3998 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3999 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4000 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4001 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4002 goto err;
4003 break;
4004
4005 default:
4006 break;
4007 }
4008
4009 switch (state->config->ts2_mode) {
4010 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4011 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4012 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4013 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4014 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4015 goto err;
4016 break;
4017
4018 case STV090x_TSMODE_DVBCI:
4019 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4020 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4021 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4022 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4023 goto err;
4024 break;
4025
4026 case STV090x_TSMODE_SERIAL_PUNCTURED:
4027 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4028 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4029 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4030 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4031 goto err;
4032 break;
4033
4034 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4035 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4036 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4037 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4038 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4039 goto err;
4040 break;
4041
4042 default:
4043 break;
4044 }
4045 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4046 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4047 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4048 goto err;
4049 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4050 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4051 goto err;
4052
4053 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4054 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4055 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4056 goto err;
4057 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4058 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4059 goto err;
4060
4061 return 0;
4062err:
4063 dprintk(FE_ERROR, 1, "I/O error");
4064 return -1;
4065}
4066
4067static int stv090x_init(struct dvb_frontend *fe)
4068{
4069 struct stv090x_state *state = fe->demodulator_priv;
4070 const struct stv090x_config *config = state->config;
4071 u32 reg;
4072
4073 if (stv090x_wakeup(fe) < 0) {
4074 dprintk(FE_ERROR, 1, "Error waking device");
4075 goto err;
4076 }
4077
4078 if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
4079 goto err;
4080
4081 reg = STV090x_READ_DEMOD(state, TNRCFG2);
4082 STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
4083 if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
4084 goto err;
4085 reg = STV090x_READ_DEMOD(state, DEMOD);
4086 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
4087 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
4088 goto err;
4089
4090 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
4091 goto err;
4092
4093 if (config->tuner_set_mode) {
4094 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4095 goto err;
4096 }
4097
4098 if (config->tuner_init) {
4099 if (config->tuner_init(fe) < 0)
4100 goto err;
4101 }
4102
4103 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
4104 goto err;
4105
4106 if (stv090x_set_tspath(state) < 0)
4107 goto err;
4108
4109 return 0;
4110err:
4111 dprintk(FE_ERROR, 1, "I/O error");
4112 return -1;
4113}
4114
4115static int stv090x_setup(struct dvb_frontend *fe)
4116{
4117 struct stv090x_state *state = fe->demodulator_priv;
4118 const struct stv090x_config *config = state->config;
4119 const struct stv090x_reg *stv090x_initval = NULL;
4120 const struct stv090x_reg *stv090x_cut20_val = NULL;
4121 unsigned long t1_size = 0, t2_size = 0;
4122 u32 reg = 0;
4123
4124 int i;
4125
4126 if (state->device == STV0900) {
4127 dprintk(FE_DEBUG, 1, "Initializing STV0900");
4128 stv090x_initval = stv0900_initval;
4129 t1_size = ARRAY_SIZE(stv0900_initval);
4130 stv090x_cut20_val = stv0900_cut20_val;
4131 t2_size = ARRAY_SIZE(stv0900_cut20_val);
4132 } else if (state->device == STV0903) {
4133 dprintk(FE_DEBUG, 1, "Initializing STV0903");
4134 stv090x_initval = stv0903_initval;
4135 t1_size = ARRAY_SIZE(stv0903_initval);
4136 stv090x_cut20_val = stv0903_cut20_val;
4137 t2_size = ARRAY_SIZE(stv0903_cut20_val);
4138 }
4139
4140 /* STV090x init */
4141 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Stop Demod */
4142 goto err;
4143
4144 msleep(5);
4145
4146 if (STV090x_WRITE_DEMOD(state, TNRCFG, 0x6c) < 0) /* check register ! (No Tuner Mode) */
4147 goto err;
4148
4149 STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4150 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0) /* repeater OFF */
4151 goto err;
4152
4153 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
4154 goto err;
4155 msleep(5);
4156 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
4157 goto err;
4158 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
4159 goto err;
4160 msleep(5);
4161
4162 /* write initval */
4163 dprintk(FE_DEBUG, 1, "Setting up initial values");
4164 for (i = 0; i < t1_size; i++) {
4165 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
4166 goto err;
4167 }
4168
4169 state->dev_ver = stv090x_read_reg(state, STV090x_MID);
4170 if (state->dev_ver >= 0x20) {
4171 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4172 goto err;
4173
4174 /* write cut20_val*/
4175 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
4176 for (i = 0; i < t2_size; i++) {
4177 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
4178 goto err;
4179 }
4180
4181 } else if (state->dev_ver < 0x20) {
4182 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4183 state->dev_ver);
4184
4185 goto err;
4186 } else if (state->dev_ver > 0x30) {
4187 /* we shouldn't bail out from here */
4188 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4189 state->dev_ver);
4190 }
4191
4192 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4193 goto err;
4194 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4195 goto err;
4196
4197 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4198 msleep(5);
4199 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0)
4200 goto err;
4201 stv090x_get_mclk(state);
4202
4203 return 0;
4204err:
4205 dprintk(FE_ERROR, 1, "I/O error");
4206 return -1;
4207}
4208
4209static struct dvb_frontend_ops stv090x_ops = {
4210
4211 .info = {
4212 .name = "STV090x Multistandard",
4213 .type = FE_QPSK,
4214 .frequency_min = 950000,
4215 .frequency_max = 2150000,
4216 .frequency_stepsize = 0,
4217 .frequency_tolerance = 0,
4218 .symbol_rate_min = 1000000,
4219 .symbol_rate_max = 45000000,
4220 .caps = FE_CAN_INVERSION_AUTO |
4221 FE_CAN_FEC_AUTO |
4222 FE_CAN_QPSK |
4223 FE_CAN_2G_MODULATION
4224 },
4225
4226 .release = stv090x_release,
4227 .init = stv090x_init,
4228
4229 .sleep = stv090x_sleep,
4230 .get_frontend_algo = stv090x_frontend_algo,
4231
4232 .i2c_gate_ctrl = stv090x_i2c_gate_ctrl,
4233
4234 .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
4235 .diseqc_send_burst = stv090x_send_diseqc_burst,
4236 .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
4237 .set_tone = stv090x_set_tone,
4238
4239 .search = stv090x_search,
4240 .read_status = stv090x_read_status,
4241 .read_ber = stv090x_read_per,
4242 .read_signal_strength = stv090x_read_signal_strength,
4243 .read_snr = stv090x_read_cnr
4244};
4245
4246
4247struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4248 struct i2c_adapter *i2c,
4249 enum stv090x_demodulator demod)
4250{
4251 struct stv090x_state *state = NULL;
4252
4253 state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4254 if (state == NULL)
4255 goto error;
4256
4257 state->verbose = &verbose;
4258 state->config = config;
4259 state->i2c = i2c;
4260 state->frontend.ops = stv090x_ops;
4261 state->frontend.demodulator_priv = state;
4262 state->demod = demod;
4263 state->demod_mode = config->demod_mode; /* Single or Dual mode */
4264 state->device = config->device;
4265 state->rolloff = STV090x_RO_35; /* default */
4266
4267 if (state->demod == STV090x_DEMODULATOR_0)
4268 mutex_init(&demod_lock);
4269
4270 if (stv090x_sleep(&state->frontend) < 0) {
4271 dprintk(FE_ERROR, 1, "Error putting device to sleep");
4272 goto error;
4273 }
4274
4275 if (stv090x_setup(&state->frontend) < 0) {
4276 dprintk(FE_ERROR, 1, "Error setting up device");
4277 goto error;
4278 }
4279 if (stv090x_wakeup(&state->frontend) < 0) {
4280 dprintk(FE_ERROR, 1, "Error waking device");
4281 goto error;
4282 }
4283
4284 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x\n",
4285 state->device == STV0900 ? "STV0900" : "STV0903",
4286 demod,
4287 state->dev_ver);
4288
4289 return &state->frontend;
4290
4291error:
4292 kfree(state);
4293 return NULL;
4294}
4295EXPORT_SYMBOL(stv090x_attach);
4296MODULE_PARM_DESC(verbose, "Set Verbosity level");
4297MODULE_AUTHOR("Manu Abraham");
4298MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
4299MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-28 00:10:24 -0500