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path: root/drivers/media/dvb/frontends/s5h1420.c
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Diffstat (limited to 'drivers/media/dvb/frontends/s5h1420.c')
-rw-r--r--drivers/media/dvb/frontends/s5h1420.c71
1 files changed, 35 insertions, 36 deletions
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c
index 3879d2e378aa..2322257c69ae 100644
--- a/drivers/media/dvb/frontends/s5h1420.c
+++ b/drivers/media/dvb/frontends/s5h1420.c
@@ -472,15 +472,15 @@ static void s5h1420_reset(struct s5h1420_state* state)
472} 472}
473 473
474static void s5h1420_setsymbolrate(struct s5h1420_state* state, 474static void s5h1420_setsymbolrate(struct s5h1420_state* state,
475 struct dvb_frontend_parameters *p) 475 struct dtv_frontend_properties *p)
476{ 476{
477 u8 v; 477 u8 v;
478 u64 val; 478 u64 val;
479 479
480 dprintk("enter %s\n", __func__); 480 dprintk("enter %s\n", __func__);
481 481
482 val = ((u64) p->u.qpsk.symbol_rate / 1000ULL) * (1ULL<<24); 482 val = ((u64) p->symbol_rate / 1000ULL) * (1ULL<<24);
483 if (p->u.qpsk.symbol_rate < 29000000) 483 if (p->symbol_rate < 29000000)
484 val *= 2; 484 val *= 2;
485 do_div(val, (state->fclk / 1000)); 485 do_div(val, (state->fclk / 1000));
486 486
@@ -543,7 +543,7 @@ static int s5h1420_getfreqoffset(struct s5h1420_state* state)
543} 543}
544 544
545static void s5h1420_setfec_inversion(struct s5h1420_state* state, 545static void s5h1420_setfec_inversion(struct s5h1420_state* state,
546 struct dvb_frontend_parameters *p) 546 struct dtv_frontend_properties *p)
547{ 547{
548 u8 inversion = 0; 548 u8 inversion = 0;
549 u8 vit08, vit09; 549 u8 vit08, vit09;
@@ -555,11 +555,11 @@ static void s5h1420_setfec_inversion(struct s5h1420_state* state,
555 else if (p->inversion == INVERSION_ON) 555 else if (p->inversion == INVERSION_ON)
556 inversion = state->config->invert ? 0 : 0x08; 556 inversion = state->config->invert ? 0 : 0x08;
557 557
558 if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) { 558 if ((p->fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) {
559 vit08 = 0x3f; 559 vit08 = 0x3f;
560 vit09 = 0; 560 vit09 = 0;
561 } else { 561 } else {
562 switch(p->u.qpsk.fec_inner) { 562 switch (p->fec_inner) {
563 case FEC_1_2: 563 case FEC_1_2:
564 vit08 = 0x01; vit09 = 0x10; 564 vit08 = 0x01; vit09 = 0x10;
565 break; 565 break;
@@ -628,9 +628,9 @@ static fe_spectral_inversion_t s5h1420_getinversion(struct s5h1420_state* state)
628 return INVERSION_OFF; 628 return INVERSION_OFF;
629} 629}
630 630
631static int s5h1420_set_frontend(struct dvb_frontend* fe, 631static int s5h1420_set_frontend(struct dvb_frontend *fe)
632 struct dvb_frontend_parameters *p)
633{ 632{
633 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
634 struct s5h1420_state* state = fe->demodulator_priv; 634 struct s5h1420_state* state = fe->demodulator_priv;
635 int frequency_delta; 635 int frequency_delta;
636 struct dvb_frontend_tune_settings fesettings; 636 struct dvb_frontend_tune_settings fesettings;
@@ -639,17 +639,16 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
639 dprintk("enter %s\n", __func__); 639 dprintk("enter %s\n", __func__);
640 640
641 /* check if we should do a fast-tune */ 641 /* check if we should do a fast-tune */
642 memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters));
643 s5h1420_get_tune_settings(fe, &fesettings); 642 s5h1420_get_tune_settings(fe, &fesettings);
644 frequency_delta = p->frequency - state->tunedfreq; 643 frequency_delta = p->frequency - state->tunedfreq;
645 if ((frequency_delta > -fesettings.max_drift) && 644 if ((frequency_delta > -fesettings.max_drift) &&
646 (frequency_delta < fesettings.max_drift) && 645 (frequency_delta < fesettings.max_drift) &&
647 (frequency_delta != 0) && 646 (frequency_delta != 0) &&
648 (state->fec_inner == p->u.qpsk.fec_inner) && 647 (state->fec_inner == p->fec_inner) &&
649 (state->symbol_rate == p->u.qpsk.symbol_rate)) { 648 (state->symbol_rate == p->symbol_rate)) {
650 649
651 if (fe->ops.tuner_ops.set_params) { 650 if (fe->ops.tuner_ops.set_params) {
652 fe->ops.tuner_ops.set_params(fe, p); 651 fe->ops.tuner_ops.set_params(fe);
653 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 652 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
654 } 653 }
655 if (fe->ops.tuner_ops.get_frequency) { 654 if (fe->ops.tuner_ops.get_frequency) {
@@ -669,13 +668,13 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
669 s5h1420_reset(state); 668 s5h1420_reset(state);
670 669
671 /* set s5h1420 fclk PLL according to desired symbol rate */ 670 /* set s5h1420 fclk PLL according to desired symbol rate */
672 if (p->u.qpsk.symbol_rate > 33000000) 671 if (p->symbol_rate > 33000000)
673 state->fclk = 80000000; 672 state->fclk = 80000000;
674 else if (p->u.qpsk.symbol_rate > 28500000) 673 else if (p->symbol_rate > 28500000)
675 state->fclk = 59000000; 674 state->fclk = 59000000;
676 else if (p->u.qpsk.symbol_rate > 25000000) 675 else if (p->symbol_rate > 25000000)
677 state->fclk = 86000000; 676 state->fclk = 86000000;
678 else if (p->u.qpsk.symbol_rate > 1900000) 677 else if (p->symbol_rate > 1900000)
679 state->fclk = 88000000; 678 state->fclk = 88000000;
680 else 679 else
681 state->fclk = 44000000; 680 state->fclk = 44000000;
@@ -705,7 +704,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
705 s5h1420_writereg(state, DiS01, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32)); 704 s5h1420_writereg(state, DiS01, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32));
706 705
707 /* TODO DC offset removal, config parameter ? */ 706 /* TODO DC offset removal, config parameter ? */
708 if (p->u.qpsk.symbol_rate > 29000000) 707 if (p->symbol_rate > 29000000)
709 s5h1420_writereg(state, QPSK01, 0xae | 0x10); 708 s5h1420_writereg(state, QPSK01, 0xae | 0x10);
710 else 709 else
711 s5h1420_writereg(state, QPSK01, 0xac | 0x10); 710 s5h1420_writereg(state, QPSK01, 0xac | 0x10);
@@ -718,15 +717,15 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
718 s5h1420_writereg(state, Loop01, 0xF0); 717 s5h1420_writereg(state, Loop01, 0xF0);
719 s5h1420_writereg(state, Loop02, 0x2a); /* e7 for s5h1420 */ 718 s5h1420_writereg(state, Loop02, 0x2a); /* e7 for s5h1420 */
720 s5h1420_writereg(state, Loop03, 0x79); /* 78 for s5h1420 */ 719 s5h1420_writereg(state, Loop03, 0x79); /* 78 for s5h1420 */
721 if (p->u.qpsk.symbol_rate > 20000000) 720 if (p->symbol_rate > 20000000)
722 s5h1420_writereg(state, Loop04, 0x79); 721 s5h1420_writereg(state, Loop04, 0x79);
723 else 722 else
724 s5h1420_writereg(state, Loop04, 0x58); 723 s5h1420_writereg(state, Loop04, 0x58);
725 s5h1420_writereg(state, Loop05, 0x6b); 724 s5h1420_writereg(state, Loop05, 0x6b);
726 725
727 if (p->u.qpsk.symbol_rate >= 8000000) 726 if (p->symbol_rate >= 8000000)
728 s5h1420_writereg(state, Post01, (0 << 6) | 0x10); 727 s5h1420_writereg(state, Post01, (0 << 6) | 0x10);
729 else if (p->u.qpsk.symbol_rate >= 4000000) 728 else if (p->symbol_rate >= 4000000)
730 s5h1420_writereg(state, Post01, (1 << 6) | 0x10); 729 s5h1420_writereg(state, Post01, (1 << 6) | 0x10);
731 else 730 else
732 s5h1420_writereg(state, Post01, (3 << 6) | 0x10); 731 s5h1420_writereg(state, Post01, (3 << 6) | 0x10);
@@ -744,7 +743,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
744 743
745 /* set tuner PLL */ 744 /* set tuner PLL */
746 if (fe->ops.tuner_ops.set_params) { 745 if (fe->ops.tuner_ops.set_params) {
747 fe->ops.tuner_ops.set_params(fe, p); 746 fe->ops.tuner_ops.set_params(fe);
748 if (fe->ops.i2c_gate_ctrl) 747 if (fe->ops.i2c_gate_ctrl)
749 fe->ops.i2c_gate_ctrl(fe, 0); 748 fe->ops.i2c_gate_ctrl(fe, 0);
750 s5h1420_setfreqoffset(state, 0); 749 s5h1420_setfreqoffset(state, 0);
@@ -757,8 +756,8 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
757 /* start QPSK */ 756 /* start QPSK */
758 s5h1420_writereg(state, QPSK01, s5h1420_readreg(state, QPSK01) | 1); 757 s5h1420_writereg(state, QPSK01, s5h1420_readreg(state, QPSK01) | 1);
759 758
760 state->fec_inner = p->u.qpsk.fec_inner; 759 state->fec_inner = p->fec_inner;
761 state->symbol_rate = p->u.qpsk.symbol_rate; 760 state->symbol_rate = p->symbol_rate;
762 state->postlocked = 0; 761 state->postlocked = 0;
763 state->tunedfreq = p->frequency; 762 state->tunedfreq = p->frequency;
764 763
@@ -766,15 +765,15 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
766 return 0; 765 return 0;
767} 766}
768 767
769static int s5h1420_get_frontend(struct dvb_frontend* fe, 768static int s5h1420_get_frontend(struct dvb_frontend* fe)
770 struct dvb_frontend_parameters *p)
771{ 769{
770 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
772 struct s5h1420_state* state = fe->demodulator_priv; 771 struct s5h1420_state* state = fe->demodulator_priv;
773 772
774 p->frequency = state->tunedfreq + s5h1420_getfreqoffset(state); 773 p->frequency = state->tunedfreq + s5h1420_getfreqoffset(state);
775 p->inversion = s5h1420_getinversion(state); 774 p->inversion = s5h1420_getinversion(state);
776 p->u.qpsk.symbol_rate = s5h1420_getsymbolrate(state); 775 p->symbol_rate = s5h1420_getsymbolrate(state);
777 p->u.qpsk.fec_inner = s5h1420_getfec(state); 776 p->fec_inner = s5h1420_getfec(state);
778 777
779 return 0; 778 return 0;
780} 779}
@@ -782,29 +781,30 @@ static int s5h1420_get_frontend(struct dvb_frontend* fe,
782static int s5h1420_get_tune_settings(struct dvb_frontend* fe, 781static int s5h1420_get_tune_settings(struct dvb_frontend* fe,
783 struct dvb_frontend_tune_settings* fesettings) 782 struct dvb_frontend_tune_settings* fesettings)
784{ 783{
785 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) { 784 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
785 if (p->symbol_rate > 20000000) {
786 fesettings->min_delay_ms = 50; 786 fesettings->min_delay_ms = 50;
787 fesettings->step_size = 2000; 787 fesettings->step_size = 2000;
788 fesettings->max_drift = 8000; 788 fesettings->max_drift = 8000;
789 } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) { 789 } else if (p->symbol_rate > 12000000) {
790 fesettings->min_delay_ms = 100; 790 fesettings->min_delay_ms = 100;
791 fesettings->step_size = 1500; 791 fesettings->step_size = 1500;
792 fesettings->max_drift = 9000; 792 fesettings->max_drift = 9000;
793 } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) { 793 } else if (p->symbol_rate > 8000000) {
794 fesettings->min_delay_ms = 100; 794 fesettings->min_delay_ms = 100;
795 fesettings->step_size = 1000; 795 fesettings->step_size = 1000;
796 fesettings->max_drift = 8000; 796 fesettings->max_drift = 8000;
797 } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) { 797 } else if (p->symbol_rate > 4000000) {
798 fesettings->min_delay_ms = 100; 798 fesettings->min_delay_ms = 100;
799 fesettings->step_size = 500; 799 fesettings->step_size = 500;
800 fesettings->max_drift = 7000; 800 fesettings->max_drift = 7000;
801 } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) { 801 } else if (p->symbol_rate > 2000000) {
802 fesettings->min_delay_ms = 200; 802 fesettings->min_delay_ms = 200;
803 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); 803 fesettings->step_size = (p->symbol_rate / 8000);
804 fesettings->max_drift = 14 * fesettings->step_size; 804 fesettings->max_drift = 14 * fesettings->step_size;
805 } else { 805 } else {
806 fesettings->min_delay_ms = 200; 806 fesettings->min_delay_ms = 200;
807 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); 807 fesettings->step_size = (p->symbol_rate / 8000);
808 fesettings->max_drift = 18 * fesettings->step_size; 808 fesettings->max_drift = 18 * fesettings->step_size;
809 } 809 }
810 810
@@ -937,10 +937,9 @@ error:
937EXPORT_SYMBOL(s5h1420_attach); 937EXPORT_SYMBOL(s5h1420_attach);
938 938
939static struct dvb_frontend_ops s5h1420_ops = { 939static struct dvb_frontend_ops s5h1420_ops = {
940 940 .delsys = { SYS_DVBS },
941 .info = { 941 .info = {
942 .name = "Samsung S5H1420/PnpNetwork PN1010 DVB-S", 942 .name = "Samsung S5H1420/PnpNetwork PN1010 DVB-S",
943 .type = FE_QPSK,
944 .frequency_min = 950000, 943 .frequency_min = 950000,
945 .frequency_max = 2150000, 944 .frequency_max = 2150000,
946 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 945 .frequency_stepsize = 125, /* kHz for QPSK frontends */