diff options
Diffstat (limited to 'drivers/media/dvb/frontends/nxt2002.c')
-rw-r--r-- | drivers/media/dvb/frontends/nxt2002.c | 706 |
1 files changed, 0 insertions, 706 deletions
diff --git a/drivers/media/dvb/frontends/nxt2002.c b/drivers/media/dvb/frontends/nxt2002.c deleted file mode 100644 index 4f263e65ba14..000000000000 --- a/drivers/media/dvb/frontends/nxt2002.c +++ /dev/null | |||
@@ -1,706 +0,0 @@ | |||
1 | /* | ||
2 | Support for B2C2/BBTI Technisat Air2PC - ATSC | ||
3 | |||
4 | Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net> | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify | ||
7 | it under the terms of the GNU General Public License as published by | ||
8 | the Free Software Foundation; either version 2 of the License, or | ||
9 | (at your option) any later version. | ||
10 | |||
11 | This program is distributed in the hope that it will be useful, | ||
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | GNU General Public License for more details. | ||
15 | |||
16 | You should have received a copy of the GNU General Public License | ||
17 | along with this program; if not, write to the Free Software | ||
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | |||
20 | */ | ||
21 | |||
22 | /* | ||
23 | * This driver needs external firmware. Please use the command | ||
24 | * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to | ||
25 | * download/extract it, and then copy it to /usr/lib/hotplug/firmware | ||
26 | * or /lib/firmware (depending on configuration of firmware hotplug). | ||
27 | */ | ||
28 | #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw" | ||
29 | #define CRC_CCIT_MASK 0x1021 | ||
30 | |||
31 | #include <linux/init.h> | ||
32 | #include <linux/module.h> | ||
33 | #include <linux/moduleparam.h> | ||
34 | #include <linux/device.h> | ||
35 | #include <linux/firmware.h> | ||
36 | #include <linux/string.h> | ||
37 | #include <linux/slab.h> | ||
38 | |||
39 | #include "dvb_frontend.h" | ||
40 | #include "nxt2002.h" | ||
41 | |||
42 | struct nxt2002_state { | ||
43 | |||
44 | struct i2c_adapter* i2c; | ||
45 | struct dvb_frontend_ops ops; | ||
46 | const struct nxt2002_config* config; | ||
47 | struct dvb_frontend frontend; | ||
48 | |||
49 | /* demodulator private data */ | ||
50 | u8 initialised:1; | ||
51 | }; | ||
52 | |||
53 | static int debug; | ||
54 | #define dprintk(args...) \ | ||
55 | do { \ | ||
56 | if (debug) printk(KERN_DEBUG "nxt2002: " args); \ | ||
57 | } while (0) | ||
58 | |||
59 | static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len) | ||
60 | { | ||
61 | /* probbably a much better way or doing this */ | ||
62 | u8 buf2 [256],x; | ||
63 | int err; | ||
64 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 }; | ||
65 | |||
66 | buf2[0] = reg; | ||
67 | for (x = 0 ; x < len ; x++) | ||
68 | buf2[x+1] = buf[x]; | ||
69 | |||
70 | if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { | ||
71 | printk ("%s: i2c write error (addr %02x, err == %i)\n", | ||
72 | __FUNCTION__, state->config->demod_address, err); | ||
73 | return -EREMOTEIO; | ||
74 | } | ||
75 | |||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len) | ||
80 | { | ||
81 | u8 reg2 [] = { reg }; | ||
82 | |||
83 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 }, | ||
84 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } }; | ||
85 | |||
86 | int err; | ||
87 | |||
88 | if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) { | ||
89 | printk ("%s: i2c read error (addr %02x, err == %i)\n", | ||
90 | __FUNCTION__, state->config->demod_address, err); | ||
91 | return -EREMOTEIO; | ||
92 | } | ||
93 | |||
94 | return 0; | ||
95 | } | ||
96 | |||
97 | static u16 nxt2002_crc(u16 crc, u8 c) | ||
98 | { | ||
99 | |||
100 | u8 i; | ||
101 | u16 input = (u16) c & 0xFF; | ||
102 | |||
103 | input<<=8; | ||
104 | for(i=0 ;i<8 ;i++) { | ||
105 | if((crc ^ input) & 0x8000) | ||
106 | crc=(crc<<1)^CRC_CCIT_MASK; | ||
107 | else | ||
108 | crc<<=1; | ||
109 | input<<=1; | ||
110 | } | ||
111 | return crc; | ||
112 | } | ||
113 | |||
114 | static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len) | ||
115 | { | ||
116 | u8 buf; | ||
117 | dprintk("%s\n", __FUNCTION__); | ||
118 | |||
119 | /* set multi register length */ | ||
120 | i2c_writebytes(state,0x34,&len,1); | ||
121 | |||
122 | /* set mutli register register */ | ||
123 | i2c_writebytes(state,0x35,®,1); | ||
124 | |||
125 | /* send the actual data */ | ||
126 | i2c_writebytes(state,0x36,data,len); | ||
127 | |||
128 | /* toggle the multireg write bit*/ | ||
129 | buf = 0x02; | ||
130 | i2c_writebytes(state,0x21,&buf,1); | ||
131 | |||
132 | i2c_readbytes(state,0x21,&buf,1); | ||
133 | |||
134 | if ((buf & 0x02) == 0) | ||
135 | return 0; | ||
136 | |||
137 | dprintk("Error writing multireg register %02X\n",reg); | ||
138 | |||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len) | ||
143 | { | ||
144 | u8 len2; | ||
145 | dprintk("%s\n", __FUNCTION__); | ||
146 | |||
147 | /* set multi register length */ | ||
148 | len2 = len & 0x80; | ||
149 | i2c_writebytes(state,0x34,&len2,1); | ||
150 | |||
151 | /* set mutli register register */ | ||
152 | i2c_writebytes(state,0x35,®,1); | ||
153 | |||
154 | /* send the actual data */ | ||
155 | i2c_readbytes(state,reg,data,len); | ||
156 | |||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | static void nxt2002_microcontroller_stop (struct nxt2002_state* state) | ||
161 | { | ||
162 | u8 buf[2],counter = 0; | ||
163 | dprintk("%s\n", __FUNCTION__); | ||
164 | |||
165 | buf[0] = 0x80; | ||
166 | i2c_writebytes(state,0x22,buf,1); | ||
167 | |||
168 | while (counter < 20) { | ||
169 | i2c_readbytes(state,0x31,buf,1); | ||
170 | if (buf[0] & 0x40) | ||
171 | return; | ||
172 | msleep(10); | ||
173 | counter++; | ||
174 | } | ||
175 | |||
176 | dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n"); | ||
177 | return; | ||
178 | } | ||
179 | |||
180 | static void nxt2002_microcontroller_start (struct nxt2002_state* state) | ||
181 | { | ||
182 | u8 buf; | ||
183 | dprintk("%s\n", __FUNCTION__); | ||
184 | |||
185 | buf = 0x00; | ||
186 | i2c_writebytes(state,0x22,&buf,1); | ||
187 | } | ||
188 | |||
189 | static int nxt2002_writetuner (struct nxt2002_state* state, u8* data) | ||
190 | { | ||
191 | u8 buf,count = 0; | ||
192 | |||
193 | dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]); | ||
194 | |||
195 | dprintk("%s\n", __FUNCTION__); | ||
196 | /* stop the micro first */ | ||
197 | nxt2002_microcontroller_stop(state); | ||
198 | |||
199 | /* set the i2c transfer speed to the tuner */ | ||
200 | buf = 0x03; | ||
201 | i2c_writebytes(state,0x20,&buf,1); | ||
202 | |||
203 | /* setup to transfer 4 bytes via i2c */ | ||
204 | buf = 0x04; | ||
205 | i2c_writebytes(state,0x34,&buf,1); | ||
206 | |||
207 | /* write actual tuner bytes */ | ||
208 | i2c_writebytes(state,0x36,data,4); | ||
209 | |||
210 | /* set tuner i2c address */ | ||
211 | buf = 0xC2; | ||
212 | i2c_writebytes(state,0x35,&buf,1); | ||
213 | |||
214 | /* write UC Opmode to begin transfer */ | ||
215 | buf = 0x80; | ||
216 | i2c_writebytes(state,0x21,&buf,1); | ||
217 | |||
218 | while (count < 20) { | ||
219 | i2c_readbytes(state,0x21,&buf,1); | ||
220 | if ((buf & 0x80)== 0x00) | ||
221 | return 0; | ||
222 | msleep(100); | ||
223 | count++; | ||
224 | } | ||
225 | |||
226 | printk("nxt2002: timeout error writing tuner\n"); | ||
227 | return 0; | ||
228 | } | ||
229 | |||
230 | static void nxt2002_agc_reset(struct nxt2002_state* state) | ||
231 | { | ||
232 | u8 buf; | ||
233 | dprintk("%s\n", __FUNCTION__); | ||
234 | |||
235 | buf = 0x08; | ||
236 | i2c_writebytes(state,0x08,&buf,1); | ||
237 | |||
238 | buf = 0x00; | ||
239 | i2c_writebytes(state,0x08,&buf,1); | ||
240 | |||
241 | return; | ||
242 | } | ||
243 | |||
244 | static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw) | ||
245 | { | ||
246 | |||
247 | struct nxt2002_state* state = fe->demodulator_priv; | ||
248 | u8 buf[256],written = 0,chunkpos = 0; | ||
249 | u16 rambase,position,crc = 0; | ||
250 | |||
251 | dprintk("%s\n", __FUNCTION__); | ||
252 | dprintk("Firmware is %zu bytes\n",fw->size); | ||
253 | |||
254 | /* Get the RAM base for this nxt2002 */ | ||
255 | i2c_readbytes(state,0x10,buf,1); | ||
256 | |||
257 | if (buf[0] & 0x10) | ||
258 | rambase = 0x1000; | ||
259 | else | ||
260 | rambase = 0x0000; | ||
261 | |||
262 | dprintk("rambase on this nxt2002 is %04X\n",rambase); | ||
263 | |||
264 | /* Hold the micro in reset while loading firmware */ | ||
265 | buf[0] = 0x80; | ||
266 | i2c_writebytes(state,0x2B,buf,1); | ||
267 | |||
268 | for (position = 0; position < fw->size ; position++) { | ||
269 | if (written == 0) { | ||
270 | crc = 0; | ||
271 | chunkpos = 0x28; | ||
272 | buf[0] = ((rambase + position) >> 8); | ||
273 | buf[1] = (rambase + position) & 0xFF; | ||
274 | buf[2] = 0x81; | ||
275 | /* write starting address */ | ||
276 | i2c_writebytes(state,0x29,buf,3); | ||
277 | } | ||
278 | written++; | ||
279 | chunkpos++; | ||
280 | |||
281 | if ((written % 4) == 0) | ||
282 | i2c_writebytes(state,chunkpos,&fw->data[position-3],4); | ||
283 | |||
284 | crc = nxt2002_crc(crc,fw->data[position]); | ||
285 | |||
286 | if ((written == 255) || (position+1 == fw->size)) { | ||
287 | /* write remaining bytes of firmware */ | ||
288 | i2c_writebytes(state, chunkpos+4-(written %4), | ||
289 | &fw->data[position-(written %4) + 1], | ||
290 | written %4); | ||
291 | buf[0] = crc << 8; | ||
292 | buf[1] = crc & 0xFF; | ||
293 | |||
294 | /* write crc */ | ||
295 | i2c_writebytes(state,0x2C,buf,2); | ||
296 | |||
297 | /* do a read to stop things */ | ||
298 | i2c_readbytes(state,0x2A,buf,1); | ||
299 | |||
300 | /* set transfer mode to complete */ | ||
301 | buf[0] = 0x80; | ||
302 | i2c_writebytes(state,0x2B,buf,1); | ||
303 | |||
304 | written = 0; | ||
305 | } | ||
306 | } | ||
307 | |||
308 | printk ("done.\n"); | ||
309 | return 0; | ||
310 | }; | ||
311 | |||
312 | static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe, | ||
313 | struct dvb_frontend_parameters *p) | ||
314 | { | ||
315 | struct nxt2002_state* state = fe->demodulator_priv; | ||
316 | u32 freq = 0; | ||
317 | u16 tunerfreq = 0; | ||
318 | u8 buf[4]; | ||
319 | |||
320 | freq = 44000 + ( p->frequency / 1000 ); | ||
321 | |||
322 | dprintk("freq = %d p->frequency = %d\n",freq,p->frequency); | ||
323 | |||
324 | tunerfreq = freq * 24/4000; | ||
325 | |||
326 | buf[0] = (tunerfreq >> 8) & 0x7F; | ||
327 | buf[1] = (tunerfreq & 0xFF); | ||
328 | |||
329 | if (p->frequency <= 214000000) { | ||
330 | buf[2] = 0x84 + (0x06 << 3); | ||
331 | buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02; | ||
332 | } else if (p->frequency <= 721000000) { | ||
333 | buf[2] = 0x84 + (0x07 << 3); | ||
334 | buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08; | ||
335 | } else if (p->frequency <= 841000000) { | ||
336 | buf[2] = 0x84 + (0x0E << 3); | ||
337 | buf[3] = 0x08; | ||
338 | } else { | ||
339 | buf[2] = 0x84 + (0x0F << 3); | ||
340 | buf[3] = 0x02; | ||
341 | } | ||
342 | |||
343 | /* write frequency information */ | ||
344 | nxt2002_writetuner(state,buf); | ||
345 | |||
346 | /* reset the agc now that tuning has been completed */ | ||
347 | nxt2002_agc_reset(state); | ||
348 | |||
349 | /* set target power level */ | ||
350 | switch (p->u.vsb.modulation) { | ||
351 | case QAM_64: | ||
352 | case QAM_256: | ||
353 | buf[0] = 0x74; | ||
354 | break; | ||
355 | case VSB_8: | ||
356 | buf[0] = 0x70; | ||
357 | break; | ||
358 | default: | ||
359 | return -EINVAL; | ||
360 | break; | ||
361 | } | ||
362 | i2c_writebytes(state,0x42,buf,1); | ||
363 | |||
364 | /* configure sdm */ | ||
365 | buf[0] = 0x87; | ||
366 | i2c_writebytes(state,0x57,buf,1); | ||
367 | |||
368 | /* write sdm1 input */ | ||
369 | buf[0] = 0x10; | ||
370 | buf[1] = 0x00; | ||
371 | nxt2002_writereg_multibyte(state,0x58,buf,2); | ||
372 | |||
373 | /* write sdmx input */ | ||
374 | switch (p->u.vsb.modulation) { | ||
375 | case QAM_64: | ||
376 | buf[0] = 0x68; | ||
377 | break; | ||
378 | case QAM_256: | ||
379 | buf[0] = 0x64; | ||
380 | break; | ||
381 | case VSB_8: | ||
382 | buf[0] = 0x60; | ||
383 | break; | ||
384 | default: | ||
385 | return -EINVAL; | ||
386 | break; | ||
387 | } | ||
388 | buf[1] = 0x00; | ||
389 | nxt2002_writereg_multibyte(state,0x5C,buf,2); | ||
390 | |||
391 | /* write adc power lpf fc */ | ||
392 | buf[0] = 0x05; | ||
393 | i2c_writebytes(state,0x43,buf,1); | ||
394 | |||
395 | /* write adc power lpf fc */ | ||
396 | buf[0] = 0x05; | ||
397 | i2c_writebytes(state,0x43,buf,1); | ||
398 | |||
399 | /* write accumulator2 input */ | ||
400 | buf[0] = 0x80; | ||
401 | buf[1] = 0x00; | ||
402 | nxt2002_writereg_multibyte(state,0x4B,buf,2); | ||
403 | |||
404 | /* write kg1 */ | ||
405 | buf[0] = 0x00; | ||
406 | i2c_writebytes(state,0x4D,buf,1); | ||
407 | |||
408 | /* write sdm12 lpf fc */ | ||
409 | buf[0] = 0x44; | ||
410 | i2c_writebytes(state,0x55,buf,1); | ||
411 | |||
412 | /* write agc control reg */ | ||
413 | buf[0] = 0x04; | ||
414 | i2c_writebytes(state,0x41,buf,1); | ||
415 | |||
416 | /* write agc ucgp0 */ | ||
417 | switch (p->u.vsb.modulation) { | ||
418 | case QAM_64: | ||
419 | buf[0] = 0x02; | ||
420 | break; | ||
421 | case QAM_256: | ||
422 | buf[0] = 0x03; | ||
423 | break; | ||
424 | case VSB_8: | ||
425 | buf[0] = 0x00; | ||
426 | break; | ||
427 | default: | ||
428 | return -EINVAL; | ||
429 | break; | ||
430 | } | ||
431 | i2c_writebytes(state,0x30,buf,1); | ||
432 | |||
433 | /* write agc control reg */ | ||
434 | buf[0] = 0x00; | ||
435 | i2c_writebytes(state,0x41,buf,1); | ||
436 | |||
437 | /* write accumulator2 input */ | ||
438 | buf[0] = 0x80; | ||
439 | buf[1] = 0x00; | ||
440 | nxt2002_writereg_multibyte(state,0x49,buf,2); | ||
441 | nxt2002_writereg_multibyte(state,0x4B,buf,2); | ||
442 | |||
443 | /* write agc control reg */ | ||
444 | buf[0] = 0x04; | ||
445 | i2c_writebytes(state,0x41,buf,1); | ||
446 | |||
447 | nxt2002_microcontroller_start(state); | ||
448 | |||
449 | /* adjacent channel detection should be done here, but I don't | ||
450 | have any stations with this need so I cannot test it */ | ||
451 | |||
452 | return 0; | ||
453 | } | ||
454 | |||
455 | static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status) | ||
456 | { | ||
457 | struct nxt2002_state* state = fe->demodulator_priv; | ||
458 | u8 lock; | ||
459 | i2c_readbytes(state,0x31,&lock,1); | ||
460 | |||
461 | *status = 0; | ||
462 | if (lock & 0x20) { | ||
463 | *status |= FE_HAS_SIGNAL; | ||
464 | *status |= FE_HAS_CARRIER; | ||
465 | *status |= FE_HAS_VITERBI; | ||
466 | *status |= FE_HAS_SYNC; | ||
467 | *status |= FE_HAS_LOCK; | ||
468 | } | ||
469 | return 0; | ||
470 | } | ||
471 | |||
472 | static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber) | ||
473 | { | ||
474 | struct nxt2002_state* state = fe->demodulator_priv; | ||
475 | u8 b[3]; | ||
476 | |||
477 | nxt2002_readreg_multibyte(state,0xE6,b,3); | ||
478 | |||
479 | *ber = ((b[0] << 8) + b[1]) * 8; | ||
480 | |||
481 | return 0; | ||
482 | } | ||
483 | |||
484 | static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength) | ||
485 | { | ||
486 | struct nxt2002_state* state = fe->demodulator_priv; | ||
487 | u8 b[2]; | ||
488 | u16 temp = 0; | ||
489 | |||
490 | /* setup to read cluster variance */ | ||
491 | b[0] = 0x00; | ||
492 | i2c_writebytes(state,0xA1,b,1); | ||
493 | |||
494 | /* get multreg val */ | ||
495 | nxt2002_readreg_multibyte(state,0xA6,b,2); | ||
496 | |||
497 | temp = (b[0] << 8) | b[1]; | ||
498 | *strength = ((0x7FFF - temp) & 0x0FFF) * 16; | ||
499 | |||
500 | return 0; | ||
501 | } | ||
502 | |||
503 | static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr) | ||
504 | { | ||
505 | |||
506 | struct nxt2002_state* state = fe->demodulator_priv; | ||
507 | u8 b[2]; | ||
508 | u16 temp = 0, temp2; | ||
509 | u32 snrdb = 0; | ||
510 | |||
511 | /* setup to read cluster variance */ | ||
512 | b[0] = 0x00; | ||
513 | i2c_writebytes(state,0xA1,b,1); | ||
514 | |||
515 | /* get multreg val from 0xA6 */ | ||
516 | nxt2002_readreg_multibyte(state,0xA6,b,2); | ||
517 | |||
518 | temp = (b[0] << 8) | b[1]; | ||
519 | temp2 = 0x7FFF - temp; | ||
520 | |||
521 | /* snr will be in db */ | ||
522 | if (temp2 > 0x7F00) | ||
523 | snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) ); | ||
524 | else if (temp2 > 0x7EC0) | ||
525 | snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) ); | ||
526 | else if (temp2 > 0x7C00) | ||
527 | snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) ); | ||
528 | else | ||
529 | snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) ); | ||
530 | |||
531 | /* the value reported back from the frontend will be FFFF=32db 0000=0db */ | ||
532 | |||
533 | *snr = snrdb * (0xFFFF/32000); | ||
534 | |||
535 | return 0; | ||
536 | } | ||
537 | |||
538 | static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | ||
539 | { | ||
540 | struct nxt2002_state* state = fe->demodulator_priv; | ||
541 | u8 b[3]; | ||
542 | |||
543 | nxt2002_readreg_multibyte(state,0xE6,b,3); | ||
544 | *ucblocks = b[2]; | ||
545 | |||
546 | return 0; | ||
547 | } | ||
548 | |||
549 | static int nxt2002_sleep(struct dvb_frontend* fe) | ||
550 | { | ||
551 | return 0; | ||
552 | } | ||
553 | |||
554 | static int nxt2002_init(struct dvb_frontend* fe) | ||
555 | { | ||
556 | struct nxt2002_state* state = fe->demodulator_priv; | ||
557 | const struct firmware *fw; | ||
558 | int ret; | ||
559 | u8 buf[2]; | ||
560 | |||
561 | if (!state->initialised) { | ||
562 | /* request the firmware, this will block until someone uploads it */ | ||
563 | printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE); | ||
564 | ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE); | ||
565 | printk("nxt2002: Waiting for firmware upload(2)...\n"); | ||
566 | if (ret) { | ||
567 | printk("nxt2002: no firmware upload (timeout or file not found?)\n"); | ||
568 | return ret; | ||
569 | } | ||
570 | |||
571 | ret = nxt2002_load_firmware(fe, fw); | ||
572 | if (ret) { | ||
573 | printk("nxt2002: writing firmware to device failed\n"); | ||
574 | release_firmware(fw); | ||
575 | return ret; | ||
576 | } | ||
577 | printk("nxt2002: firmware upload complete\n"); | ||
578 | |||
579 | /* Put the micro into reset */ | ||
580 | nxt2002_microcontroller_stop(state); | ||
581 | |||
582 | /* ensure transfer is complete */ | ||
583 | buf[0]=0; | ||
584 | i2c_writebytes(state,0x2B,buf,1); | ||
585 | |||
586 | /* Put the micro into reset for real this time */ | ||
587 | nxt2002_microcontroller_stop(state); | ||
588 | |||
589 | /* soft reset everything (agc,frontend,eq,fec)*/ | ||
590 | buf[0] = 0x0F; | ||
591 | i2c_writebytes(state,0x08,buf,1); | ||
592 | buf[0] = 0x00; | ||
593 | i2c_writebytes(state,0x08,buf,1); | ||
594 | |||
595 | /* write agc sdm configure */ | ||
596 | buf[0] = 0xF1; | ||
597 | i2c_writebytes(state,0x57,buf,1); | ||
598 | |||
599 | /* write mod output format */ | ||
600 | buf[0] = 0x20; | ||
601 | i2c_writebytes(state,0x09,buf,1); | ||
602 | |||
603 | /* write fec mpeg mode */ | ||
604 | buf[0] = 0x7E; | ||
605 | buf[1] = 0x00; | ||
606 | i2c_writebytes(state,0xE9,buf,2); | ||
607 | |||
608 | /* write mux selection */ | ||
609 | buf[0] = 0x00; | ||
610 | i2c_writebytes(state,0xCC,buf,1); | ||
611 | |||
612 | state->initialised = 1; | ||
613 | } | ||
614 | |||
615 | return 0; | ||
616 | } | ||
617 | |||
618 | static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | ||
619 | { | ||
620 | fesettings->min_delay_ms = 500; | ||
621 | fesettings->step_size = 0; | ||
622 | fesettings->max_drift = 0; | ||
623 | return 0; | ||
624 | } | ||
625 | |||
626 | static void nxt2002_release(struct dvb_frontend* fe) | ||
627 | { | ||
628 | struct nxt2002_state* state = fe->demodulator_priv; | ||
629 | kfree(state); | ||
630 | } | ||
631 | |||
632 | static struct dvb_frontend_ops nxt2002_ops; | ||
633 | |||
634 | struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config, | ||
635 | struct i2c_adapter* i2c) | ||
636 | { | ||
637 | struct nxt2002_state* state = NULL; | ||
638 | u8 buf [] = {0,0,0,0,0}; | ||
639 | |||
640 | /* allocate memory for the internal state */ | ||
641 | state = kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL); | ||
642 | if (state == NULL) goto error; | ||
643 | |||
644 | /* setup the state */ | ||
645 | state->config = config; | ||
646 | state->i2c = i2c; | ||
647 | memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops)); | ||
648 | state->initialised = 0; | ||
649 | |||
650 | /* Check the first 5 registers to ensure this a revision we can handle */ | ||
651 | |||
652 | i2c_readbytes(state, 0x00, buf, 5); | ||
653 | if (buf[0] != 0x04) goto error; /* device id */ | ||
654 | if (buf[1] != 0x02) goto error; /* fab id */ | ||
655 | if (buf[2] != 0x11) goto error; /* month */ | ||
656 | if (buf[3] != 0x20) goto error; /* year msb */ | ||
657 | if (buf[4] != 0x00) goto error; /* year lsb */ | ||
658 | |||
659 | /* create dvb_frontend */ | ||
660 | state->frontend.ops = &state->ops; | ||
661 | state->frontend.demodulator_priv = state; | ||
662 | return &state->frontend; | ||
663 | |||
664 | error: | ||
665 | kfree(state); | ||
666 | return NULL; | ||
667 | } | ||
668 | |||
669 | static struct dvb_frontend_ops nxt2002_ops = { | ||
670 | |||
671 | .info = { | ||
672 | .name = "Nextwave nxt2002 VSB/QAM frontend", | ||
673 | .type = FE_ATSC, | ||
674 | .frequency_min = 54000000, | ||
675 | .frequency_max = 860000000, | ||
676 | /* stepsize is just a guess */ | ||
677 | .frequency_stepsize = 166666, | ||
678 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | ||
679 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | ||
680 | FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256 | ||
681 | }, | ||
682 | |||
683 | .release = nxt2002_release, | ||
684 | |||
685 | .init = nxt2002_init, | ||
686 | .sleep = nxt2002_sleep, | ||
687 | |||
688 | .set_frontend = nxt2002_setup_frontend_parameters, | ||
689 | .get_tune_settings = nxt2002_get_tune_settings, | ||
690 | |||
691 | .read_status = nxt2002_read_status, | ||
692 | .read_ber = nxt2002_read_ber, | ||
693 | .read_signal_strength = nxt2002_read_signal_strength, | ||
694 | .read_snr = nxt2002_read_snr, | ||
695 | .read_ucblocks = nxt2002_read_ucblocks, | ||
696 | |||
697 | }; | ||
698 | |||
699 | module_param(debug, int, 0644); | ||
700 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | ||
701 | |||
702 | MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver"); | ||
703 | MODULE_AUTHOR("Taylor Jacob"); | ||
704 | MODULE_LICENSE("GPL"); | ||
705 | |||
706 | EXPORT_SYMBOL(nxt2002_attach); | ||