aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/dvb/frontends/lgdt330x.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/media/dvb/frontends/lgdt330x.c')
-rw-r--r--drivers/media/dvb/frontends/lgdt330x.c514
1 files changed, 352 insertions, 162 deletions
diff --git a/drivers/media/dvb/frontends/lgdt330x.c b/drivers/media/dvb/frontends/lgdt330x.c
index e94dee50eecd..1f1cd7a8d500 100644
--- a/drivers/media/dvb/frontends/lgdt330x.c
+++ b/drivers/media/dvb/frontends/lgdt330x.c
@@ -1,11 +1,8 @@
1/* 1/*
2 * Support for LGDT3302 & LGDT3303 (DViCO FusionHDTV Gold) - VSB/QAM 2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
3 * 3 *
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> 4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
5 * 5 *
6 * Based on code from Kirk Lapray <kirk_lapray@bigfoot.com>
7 * Copyright (C) 2005
8 *
9 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or 8 * the Free Software Foundation; either version 2 of the License, or
@@ -25,11 +22,13 @@
25/* 22/*
26 * NOTES ABOUT THIS DRIVER 23 * NOTES ABOUT THIS DRIVER
27 * 24 *
28 * This driver supports DViCO FusionHDTV Gold under Linux. 25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * 29 *
30 * TODO: 30 * TODO:
31 * BER and signal strength always return 0. 31 * signal strength always returns 0.
32 * Include support for LGDT3303
33 * 32 *
34 */ 33 */
35 34
@@ -41,7 +40,6 @@
41#include <asm/byteorder.h> 40#include <asm/byteorder.h>
42 41
43#include "dvb_frontend.h" 42#include "dvb_frontend.h"
44#include "dvb-pll.h"
45#include "lgdt330x_priv.h" 43#include "lgdt330x_priv.h"
46#include "lgdt330x.h" 44#include "lgdt330x.h"
47 45
@@ -70,55 +68,37 @@ struct lgdt330x_state
70 u32 current_frequency; 68 u32 current_frequency;
71}; 69};
72 70
73static int i2c_writebytes (struct lgdt330x_state* state, 71static int i2c_write_demod_bytes (struct lgdt330x_state* state,
74 u8 addr, /* demod_address or pll_address */
75 u8 *buf, /* data bytes to send */ 72 u8 *buf, /* data bytes to send */
76 int len /* number of bytes to send */ ) 73 int len /* number of bytes to send */ )
77{ 74{
78 u8 tmp[] = { buf[0], buf[1] };
79 struct i2c_msg msg = 75 struct i2c_msg msg =
80 { .addr = addr, .flags = 0, .buf = tmp, .len = 2 }; 76 { .addr = state->config->demod_address,
81 int err; 77 .flags = 0,
78 .buf = buf,
79 .len = 2 };
82 int i; 80 int i;
81 int err;
83 82
84 for (i=1; i<len; i++) { 83 for (i=0; i<len-1; i+=2){
85 tmp[1] = buf[i];
86 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { 84 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
87 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err == %i)\n", __FUNCTION__, addr, buf[0], err); 85 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
88 if (err < 0) 86 if (err < 0)
89 return err; 87 return err;
90 else 88 else
91 return -EREMOTEIO; 89 return -EREMOTEIO;
92 } 90 }
93 tmp[0]++; 91 msg.buf += 2;
94 } 92 }
95 return 0; 93 return 0;
96} 94}
97 95
98#if 0
99static int i2c_readbytes (struct lgdt330x_state* state,
100 u8 addr, /* demod_address or pll_address */
101 u8 *buf, /* holds data bytes read */
102 int len /* number of bytes to read */ )
103{
104 struct i2c_msg msg =
105 { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
106 int err;
107
108 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
109 printk(KERN_WARNING "lgdt330x: %s error (addr %02x, err == %i)\n", __FUNCTION__, addr, err);
110 return -EREMOTEIO;
111 }
112 return 0;
113}
114#endif
115
116/* 96/*
117 * This routine writes the register (reg) to the demod bus 97 * This routine writes the register (reg) to the demod bus
118 * then reads the data returned for (len) bytes. 98 * then reads the data returned for (len) bytes.
119 */ 99 */
120 100
121static u8 i2c_selectreadbytes (struct lgdt330x_state* state, 101static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
122 enum I2C_REG reg, u8* buf, int len) 102 enum I2C_REG reg, u8* buf, int len)
123{ 103{
124 u8 wr [] = { reg }; 104 u8 wr [] = { reg };
@@ -139,7 +119,7 @@ static u8 i2c_selectreadbytes (struct lgdt330x_state* state,
139} 119}
140 120
141/* Software reset */ 121/* Software reset */
142int lgdt330x_SwReset(struct lgdt330x_state* state) 122static int lgdt3302_SwReset(struct lgdt330x_state* state)
143{ 123{
144 u8 ret; 124 u8 ret;
145 u8 reset[] = { 125 u8 reset[] = {
@@ -148,23 +128,51 @@ int lgdt330x_SwReset(struct lgdt330x_state* state)
148 * bits 5-0 are 1 to mask interrupts */ 128 * bits 5-0 are 1 to mask interrupts */
149 }; 129 };
150 130
151 ret = i2c_writebytes(state, 131 ret = i2c_write_demod_bytes(state,
152 state->config->demod_address, 132 reset, sizeof(reset));
133 if (ret == 0) {
134
135 /* force reset high (inactive) and unmask interrupts */
136 reset[1] = 0x7f;
137 ret = i2c_write_demod_bytes(state,
138 reset, sizeof(reset));
139 }
140 return ret;
141}
142
143static int lgdt3303_SwReset(struct lgdt330x_state* state)
144{
145 u8 ret;
146 u8 reset[] = {
147 0x02,
148 0x00 /* bit 0 is active low software reset */
149 };
150
151 ret = i2c_write_demod_bytes(state,
153 reset, sizeof(reset)); 152 reset, sizeof(reset));
154 if (ret == 0) { 153 if (ret == 0) {
155 /* spec says reset takes 100 ns why wait */ 154
156 /* mdelay(100); */ /* keep low for 100mS */ 155 /* force reset high (inactive) */
157 reset[1] = 0x7f; /* force reset high (inactive) 156 reset[1] = 0x01;
158 * and unmask interrupts */ 157 ret = i2c_write_demod_bytes(state,
159 ret = i2c_writebytes(state,
160 state->config->demod_address,
161 reset, sizeof(reset)); 158 reset, sizeof(reset));
162 } 159 }
163 /* Spec does not indicate a need for this either */
164 /*mdelay(5); */ /* wait 5 msec before doing more */
165 return ret; 160 return ret;
166} 161}
167 162
163static int lgdt330x_SwReset(struct lgdt330x_state* state)
164{
165 switch (state->config->demod_chip) {
166 case LGDT3302:
167 return lgdt3302_SwReset(state);
168 case LGDT3303:
169 return lgdt3303_SwReset(state);
170 default:
171 return -ENODEV;
172 }
173}
174
175
168static int lgdt330x_init(struct dvb_frontend* fe) 176static int lgdt330x_init(struct dvb_frontend* fe)
169{ 177{
170 /* Hardware reset is done using gpio[0] of cx23880x chip. 178 /* Hardware reset is done using gpio[0] of cx23880x chip.
@@ -173,22 +181,98 @@ static int lgdt330x_init(struct dvb_frontend* fe)
173 * Maybe there needs to be a callable function in cx88-core or 181 * Maybe there needs to be a callable function in cx88-core or
174 * the caller of this function needs to do it. */ 182 * the caller of this function needs to do it. */
175 183
176 dprintk("%s entered\n", __FUNCTION__); 184 /*
177 return lgdt330x_SwReset((struct lgdt330x_state*) fe->demodulator_priv); 185 * Array of byte pairs <address, value>
186 * to initialize each different chip
187 */
188 static u8 lgdt3302_init_data[] = {
189 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
190 /* Change the value of NCOCTFV[25:0] of carrier
191 recovery center frequency register */
192 VSB_CARRIER_FREQ0, 0x00,
193 VSB_CARRIER_FREQ1, 0x87,
194 VSB_CARRIER_FREQ2, 0x8e,
195 VSB_CARRIER_FREQ3, 0x01,
196 /* Change the TPCLK pin polarity
197 data is valid on falling clock */
198 DEMUX_CONTROL, 0xfb,
199 /* Change the value of IFBW[11:0] of
200 AGC IF/RF loop filter bandwidth register */
201 AGC_RF_BANDWIDTH0, 0x40,
202 AGC_RF_BANDWIDTH1, 0x93,
203 AGC_RF_BANDWIDTH2, 0x00,
204 /* Change the value of bit 6, 'nINAGCBY' and
205 'NSSEL[1:0] of ACG function control register 2 */
206 AGC_FUNC_CTRL2, 0xc6,
207 /* Change the value of bit 6 'RFFIX'
208 of AGC function control register 3 */
209 AGC_FUNC_CTRL3, 0x40,
210 /* Set the value of 'INLVTHD' register 0x2a/0x2c
211 to 0x7fe */
212 AGC_DELAY0, 0x07,
213 AGC_DELAY2, 0xfe,
214 /* Change the value of IAGCBW[15:8]
215 of inner AGC loop filter bandwith */
216 AGC_LOOP_BANDWIDTH0, 0x08,
217 AGC_LOOP_BANDWIDTH1, 0x9a
218 };
219
220 static u8 lgdt3303_init_data[] = {
221 0x4c, 0x14
222 };
223
224 struct lgdt330x_state* state = fe->demodulator_priv;
225 char *chip_name;
226 int err;
227
228 switch (state->config->demod_chip) {
229 case LGDT3302:
230 chip_name = "LGDT3302";
231 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
232 sizeof(lgdt3302_init_data));
233 break;
234 case LGDT3303:
235 chip_name = "LGDT3303";
236 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
237 sizeof(lgdt3303_init_data));
238 break;
239 default:
240 chip_name = "undefined";
241 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
242 err = -ENODEV;
243 }
244 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
245 if (err < 0)
246 return err;
247 return lgdt330x_SwReset(state);
178} 248}
179 249
180static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber) 250static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
181{ 251{
182 *ber = 0; /* Dummy out for now */ 252 *ber = 0; /* Not supplied by the demod chips */
183 return 0; 253 return 0;
184} 254}
185 255
186static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 256static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
187{ 257{
188 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 258 struct lgdt330x_state* state = fe->demodulator_priv;
259 int err;
189 u8 buf[2]; 260 u8 buf[2];
190 261
191 i2c_selectreadbytes(state, PACKET_ERR_COUNTER1, buf, sizeof(buf)); 262 switch (state->config->demod_chip) {
263 case LGDT3302:
264 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
265 buf, sizeof(buf));
266 break;
267 case LGDT3303:
268 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
269 buf, sizeof(buf));
270 break;
271 default:
272 printk(KERN_WARNING
273 "Only LGDT3302 and LGDT3303 are supported chips.\n");
274 err = -ENODEV;
275 }
192 276
193 *ucblocks = (buf[0] << 8) | buf[1]; 277 *ucblocks = (buf[0] << 8) | buf[1];
194 return 0; 278 return 0;
@@ -197,123 +281,113 @@ static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
197static int lgdt330x_set_parameters(struct dvb_frontend* fe, 281static int lgdt330x_set_parameters(struct dvb_frontend* fe,
198 struct dvb_frontend_parameters *param) 282 struct dvb_frontend_parameters *param)
199{ 283{
200 struct lgdt330x_state* state = 284 /*
201 (struct lgdt330x_state*) fe->demodulator_priv; 285 * Array of byte pairs <address, value>
286 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
287 */
288 static u8 lgdt3303_8vsb_44_data[] = {
289 0x04, 0x00,
290 0x0d, 0x40,
291 0x0e, 0x87,
292 0x0f, 0x8e,
293 0x10, 0x01,
294 0x47, 0x8b };
295
296 /*
297 * Array of byte pairs <address, value>
298 * to initialize QAM for lgdt3303 chip
299 */
300 static u8 lgdt3303_qam_data[] = {
301 0x04, 0x00,
302 0x0d, 0x00,
303 0x0e, 0x00,
304 0x0f, 0x00,
305 0x10, 0x00,
306 0x51, 0x63,
307 0x47, 0x66,
308 0x48, 0x66,
309 0x4d, 0x1a,
310 0x49, 0x08,
311 0x4a, 0x9b };
312
313 struct lgdt330x_state* state = fe->demodulator_priv;
202 314
203 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
204 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 }; 315 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
205 static u8 vsb_freq_cfg[] = { VSB_CARRIER_FREQ0, 0x00, 0x87, 0x8e, 0x01 };
206 static u8 demux_ctrl_cfg[] = { DEMUX_CONTROL, 0xfb };
207 static u8 agc_rf_cfg[] = { AGC_RF_BANDWIDTH0, 0x40, 0x93, 0x00 };
208 static u8 agc_ctrl_cfg[] = { AGC_FUNC_CTRL2, 0xc6, 0x40 };
209 static u8 agc_delay_cfg[] = { AGC_DELAY0, 0x07, 0x00, 0xfe };
210 static u8 agc_loop_cfg[] = { AGC_LOOP_BANDWIDTH0, 0x08, 0x9a };
211 316
317 int err;
212 /* Change only if we are actually changing the modulation */ 318 /* Change only if we are actually changing the modulation */
213 if (state->current_modulation != param->u.vsb.modulation) { 319 if (state->current_modulation != param->u.vsb.modulation) {
214 switch(param->u.vsb.modulation) { 320 switch(param->u.vsb.modulation) {
215 case VSB_8: 321 case VSB_8:
216 dprintk("%s: VSB_8 MODE\n", __FUNCTION__); 322 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
217 323
218 /* Select VSB mode and serial MPEG interface */ 324 /* Select VSB mode */
219 top_ctrl_cfg[1] = 0x07; 325 top_ctrl_cfg[1] = 0x03;
220 326
221 /* Select ANT connector if supported by card */ 327 /* Select ANT connector if supported by card */
222 if (state->config->pll_rf_set) 328 if (state->config->pll_rf_set)
223 state->config->pll_rf_set(fe, 1); 329 state->config->pll_rf_set(fe, 1);
330
331 if (state->config->demod_chip == LGDT3303) {
332 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
333 sizeof(lgdt3303_8vsb_44_data));
334 }
224 break; 335 break;
225 336
226 case QAM_64: 337 case QAM_64:
227 dprintk("%s: QAM_64 MODE\n", __FUNCTION__); 338 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
228 339
229 /* Select QAM_64 mode and serial MPEG interface */ 340 /* Select QAM_64 mode */
230 top_ctrl_cfg[1] = 0x04; 341 top_ctrl_cfg[1] = 0x00;
231 342
232 /* Select CABLE connector if supported by card */ 343 /* Select CABLE connector if supported by card */
233 if (state->config->pll_rf_set) 344 if (state->config->pll_rf_set)
234 state->config->pll_rf_set(fe, 0); 345 state->config->pll_rf_set(fe, 0);
346
347 if (state->config->demod_chip == LGDT3303) {
348 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
349 sizeof(lgdt3303_qam_data));
350 }
235 break; 351 break;
236 352
237 case QAM_256: 353 case QAM_256:
238 dprintk("%s: QAM_256 MODE\n", __FUNCTION__); 354 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
239 355
240 /* Select QAM_256 mode and serial MPEG interface */ 356 /* Select QAM_256 mode */
241 top_ctrl_cfg[1] = 0x05; 357 top_ctrl_cfg[1] = 0x01;
242 358
243 /* Select CABLE connector if supported by card */ 359 /* Select CABLE connector if supported by card */
244 if (state->config->pll_rf_set) 360 if (state->config->pll_rf_set)
245 state->config->pll_rf_set(fe, 0); 361 state->config->pll_rf_set(fe, 0);
362
363 if (state->config->demod_chip == LGDT3303) {
364 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
365 sizeof(lgdt3303_qam_data));
366 }
246 break; 367 break;
247 default: 368 default:
248 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation); 369 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
249 return -1; 370 return -1;
250 } 371 }
251 /* Initializations common to all modes */ 372 /*
373 * select serial or parallel MPEG harware interface
374 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
375 * Parallel: 0x00
376 */
377 top_ctrl_cfg[1] |= state->config->serial_mpeg;
252 378
253 /* Select the requested mode */ 379 /* Select the requested mode */
254 i2c_writebytes(state, state->config->demod_address, 380 i2c_write_demod_bytes(state, top_ctrl_cfg,
255 top_ctrl_cfg, sizeof(top_ctrl_cfg)); 381 sizeof(top_ctrl_cfg));
256
257 /* Change the value of IFBW[11:0]
258 of AGC IF/RF loop filter bandwidth register */
259 i2c_writebytes(state, state->config->demod_address,
260 agc_rf_cfg, sizeof(agc_rf_cfg));
261
262 /* Change the value of bit 6, 'nINAGCBY' and
263 'NSSEL[1:0] of ACG function control register 2 */
264 /* Change the value of bit 6 'RFFIX'
265 of AGC function control register 3 */
266 i2c_writebytes(state, state->config->demod_address,
267 agc_ctrl_cfg, sizeof(agc_ctrl_cfg));
268
269 /* Change the TPCLK pin polarity
270 data is valid on falling clock */
271 i2c_writebytes(state, state->config->demod_address,
272 demux_ctrl_cfg, sizeof(demux_ctrl_cfg));
273
274 /* Change the value of NCOCTFV[25:0] of carrier
275 recovery center frequency register */
276 i2c_writebytes(state, state->config->demod_address,
277 vsb_freq_cfg, sizeof(vsb_freq_cfg));
278
279 /* Set the value of 'INLVTHD' register 0x2a/0x2c to 0x7fe */
280 i2c_writebytes(state, state->config->demod_address,
281 agc_delay_cfg, sizeof(agc_delay_cfg));
282
283 /* Change the value of IAGCBW[15:8]
284 of inner AGC loop filter bandwith */
285 i2c_writebytes(state, state->config->demod_address,
286 agc_loop_cfg, sizeof(agc_loop_cfg));
287
288 state->config->set_ts_params(fe, 0); 382 state->config->set_ts_params(fe, 0);
289 state->current_modulation = param->u.vsb.modulation; 383 state->current_modulation = param->u.vsb.modulation;
290 } 384 }
291 385
292 /* Change only if we are actually changing the channel */ 386 /* Change only if we are actually changing the channel */
293 if (state->current_frequency != param->frequency) { 387 if (state->current_frequency != param->frequency) {
294 u8 buf[5]; 388 /* Tune to the new frequency */
295 struct i2c_msg msg = { .flags = 0, .buf = &buf[1], .len = 4 }; 389 state->config->pll_set(fe, param);
296 int err; 390 /* Keep track of the new frequency */
297
298 state->config->pll_set(fe, param, buf);
299 msg.addr = buf[0];
300
301 dprintk("%s: tuner at 0x%02x bytes: 0x%02x 0x%02x "
302 "0x%02x 0x%02x\n", __FUNCTION__,
303 buf[0],buf[1],buf[2],buf[3],buf[4]);
304 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
305 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, buf[0], buf[1], err);
306 if (err < 0)
307 return err;
308 else
309 return -EREMOTEIO;
310 }
311#if 0
312 /* Check the status of the tuner pll */
313 i2c_readbytes(state, buf[0], &buf[1], 1);
314 dprintk("%s: tuner status byte = 0x%02x\n", __FUNCTION__, buf[1]);
315#endif
316 /* Update current frequency */
317 state->current_frequency = param->frequency; 391 state->current_frequency = param->frequency;
318 } 392 }
319 lgdt330x_SwReset(state); 393 lgdt330x_SwReset(state);
@@ -328,21 +402,15 @@ static int lgdt330x_get_frontend(struct dvb_frontend* fe,
328 return 0; 402 return 0;
329} 403}
330 404
331static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status) 405static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
332{ 406{
333 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 407 struct lgdt330x_state* state = fe->demodulator_priv;
334 u8 buf[3]; 408 u8 buf[3];
335 409
336 *status = 0; /* Reset status result */ 410 *status = 0; /* Reset status result */
337 411
338 /*
339 * You must set the Mask bits to 1 in the IRQ_MASK in order
340 * to see that status bit in the IRQ_STATUS register.
341 * This is done in SwReset();
342 */
343
344 /* AGC status register */ 412 /* AGC status register */
345 i2c_selectreadbytes(state, AGC_STATUS, buf, 1); 413 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
346 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]); 414 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
347 if ((buf[0] & 0x0c) == 0x8){ 415 if ((buf[0] & 0x0c) == 0x8){
348 /* Test signal does not exist flag */ 416 /* Test signal does not exist flag */
@@ -353,16 +421,15 @@ static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
353 return 0; 421 return 0;
354 } 422 }
355 423
424 /*
425 * You must set the Mask bits to 1 in the IRQ_MASK in order
426 * to see that status bit in the IRQ_STATUS register.
427 * This is done in SwReset();
428 */
356 /* signal status */ 429 /* signal status */
357 i2c_selectreadbytes(state, TOP_CONTROL, buf, sizeof(buf)); 430 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
358 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]); 431 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
359 432
360#if 0
361 /* Alternative method to check for a signal */
362 /* using the SNR good/bad interrupts. */
363 if ((buf[2] & 0x30) == 0x10)
364 *status |= FE_HAS_SIGNAL;
365#endif
366 433
367 /* sync status */ 434 /* sync status */
368 if ((buf[2] & 0x03) == 0x01) { 435 if ((buf[2] & 0x03) == 0x01) {
@@ -376,7 +443,7 @@ static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
376 } 443 }
377 444
378 /* Carrier Recovery Lock Status Register */ 445 /* Carrier Recovery Lock Status Register */
379 i2c_selectreadbytes(state, CARRIER_LOCK, buf, 1); 446 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
380 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]); 447 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
381 switch (state->current_modulation) { 448 switch (state->current_modulation) {
382 case QAM_256: 449 case QAM_256:
@@ -396,13 +463,75 @@ static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
396 return 0; 463 return 0;
397} 464}
398 465
466static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
467{
468 struct lgdt330x_state* state = fe->demodulator_priv;
469 int err;
470 u8 buf[3];
471
472 *status = 0; /* Reset status result */
473
474 /* lgdt3303 AGC status register */
475 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
476 if (err < 0)
477 return err;
478
479 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
480 if ((buf[0] & 0x21) == 0x01){
481 /* Test input signal does not exist flag */
482 /* as well as the AGC lock flag. */
483 *status |= FE_HAS_SIGNAL;
484 } else {
485 /* Without a signal all other status bits are meaningless */
486 return 0;
487 }
488
489 /* Carrier Recovery Lock Status Register */
490 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
491 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
492 switch (state->current_modulation) {
493 case QAM_256:
494 case QAM_64:
495 /* Need to undestand why there are 3 lock levels here */
496 if ((buf[0] & 0x07) == 0x07)
497 *status |= FE_HAS_CARRIER;
498 else
499 break;
500 i2c_read_demod_bytes(state, 0x8a, buf, 1);
501 if ((buf[0] & 0x04) == 0x04)
502 *status |= FE_HAS_SYNC;
503 if ((buf[0] & 0x01) == 0x01)
504 *status |= FE_HAS_LOCK;
505 if ((buf[0] & 0x08) == 0x08)
506 *status |= FE_HAS_VITERBI;
507 break;
508 case VSB_8:
509 if ((buf[0] & 0x80) == 0x80)
510 *status |= FE_HAS_CARRIER;
511 else
512 break;
513 i2c_read_demod_bytes(state, 0x38, buf, 1);
514 if ((buf[0] & 0x02) == 0x00)
515 *status |= FE_HAS_SYNC;
516 if ((buf[0] & 0x01) == 0x01) {
517 *status |= FE_HAS_LOCK;
518 *status |= FE_HAS_VITERBI;
519 }
520 break;
521 default:
522 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
523 }
524 return 0;
525}
526
399static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength) 527static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
400{ 528{
401 /* not directly available. */ 529 /* not directly available. */
530 *strength = 0;
402 return 0; 531 return 0;
403} 532}
404 533
405static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr) 534static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
406{ 535{
407#ifdef SNR_IN_DB 536#ifdef SNR_IN_DB
408 /* 537 /*
@@ -451,7 +580,7 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
451 91, 115, 144, 182, 229, 288, 362, 456, 574, 722, 580 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
452 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216, 581 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
453 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151, 582 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
454 90833, 114351, 143960, 181235, 228161, 0x040000 583 90833, 114351, 143960, 181235, 228161, 0x080000
455 }; 584 };
456 585
457 static u8 buf[5];/* read data buffer */ 586 static u8 buf[5];/* read data buffer */
@@ -459,8 +588,8 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
459 static u32 snr_db; /* index into SNR_EQ[] */ 588 static u32 snr_db; /* index into SNR_EQ[] */
460 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 589 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
461 590
462 /* read both equalizer and pase tracker noise data */ 591 /* read both equalizer and phase tracker noise data */
463 i2c_selectreadbytes(state, EQPH_ERR0, buf, sizeof(buf)); 592 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
464 593
465 if (state->current_modulation == VSB_8) { 594 if (state->current_modulation == VSB_8) {
466 /* Equalizer Mean-Square Error Register for VSB */ 595 /* Equalizer Mean-Square Error Register for VSB */
@@ -496,19 +625,20 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
496 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 625 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
497 626
498 /* read both equalizer and pase tracker noise data */ 627 /* read both equalizer and pase tracker noise data */
499 i2c_selectreadbytes(state, EQPH_ERR0, buf, sizeof(buf)); 628 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
500 629
501 if (state->current_modulation == VSB_8) { 630 if (state->current_modulation == VSB_8) {
502 /* Equalizer Mean-Square Error Register for VSB */ 631 /* Phase Tracker Mean-Square Error Register for VSB */
503 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
504 } else {
505 /* Phase Tracker Mean-Square Error Register for QAM */
506 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4]; 632 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
633 } else {
634
635 /* Carrier Recovery Mean-Square Error for QAM */
636 i2c_read_demod_bytes(state, 0x1a, buf, 2);
637 noise = ((buf[0] & 3) << 8) | buf[1];
507 } 638 }
508 639
509 /* Small values for noise mean signal is better so invert noise */ 640 /* Small values for noise mean signal is better so invert noise */
510 /* Noise is 19 bit value so discard 3 LSB*/ 641 *snr = ~noise;
511 *snr = ~noise>>3;
512#endif 642#endif
513 643
514 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr); 644 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
@@ -516,6 +646,32 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
516 return 0; 646 return 0;
517} 647}
518 648
649static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
650{
651 /* Return the raw noise value */
652 static u8 buf[5];/* read data buffer */
653 static u32 noise; /* noise value */
654 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
655
656 if (state->current_modulation == VSB_8) {
657
658 /* Phase Tracker Mean-Square Error Register for VSB */
659 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
660 } else {
661
662 /* Carrier Recovery Mean-Square Error for QAM */
663 i2c_read_demod_bytes(state, 0x1a, buf, 2);
664 noise = (buf[0] << 8) | buf[1];
665 }
666
667 /* Small values for noise mean signal is better so invert noise */
668 *snr = ~noise;
669
670 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
671
672 return 0;
673}
674
519static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings) 675static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
520{ 676{
521 /* I have no idea about this - it may not be needed */ 677 /* I have no idea about this - it may not be needed */
@@ -531,7 +687,8 @@ static void lgdt330x_release(struct dvb_frontend* fe)
531 kfree(state); 687 kfree(state);
532} 688}
533 689
534static struct dvb_frontend_ops lgdt330x_ops; 690static struct dvb_frontend_ops lgdt3302_ops;
691static struct dvb_frontend_ops lgdt3303_ops;
535 692
536struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config, 693struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
537 struct i2c_adapter* i2c) 694 struct i2c_adapter* i2c)
@@ -548,9 +705,19 @@ struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
548 /* Setup the state */ 705 /* Setup the state */
549 state->config = config; 706 state->config = config;
550 state->i2c = i2c; 707 state->i2c = i2c;
551 memcpy(&state->ops, &lgdt330x_ops, sizeof(struct dvb_frontend_ops)); 708 switch (config->demod_chip) {
709 case LGDT3302:
710 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
711 break;
712 case LGDT3303:
713 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
714 break;
715 default:
716 goto error;
717 }
718
552 /* Verify communication with demod chip */ 719 /* Verify communication with demod chip */
553 if (i2c_selectreadbytes(state, 2, buf, 1)) 720 if (i2c_read_demod_bytes(state, 2, buf, 1))
554 goto error; 721 goto error;
555 722
556 state->current_frequency = -1; 723 state->current_frequency = -1;
@@ -568,9 +735,33 @@ error:
568 return NULL; 735 return NULL;
569} 736}
570 737
571static struct dvb_frontend_ops lgdt330x_ops = { 738static struct dvb_frontend_ops lgdt3302_ops = {
739 .info = {
740 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
741 .type = FE_ATSC,
742 .frequency_min= 54000000,
743 .frequency_max= 858000000,
744 .frequency_stepsize= 62500,
745 /* Symbol rate is for all VSB modes need to check QAM */
746 .symbol_rate_min = 10762000,
747 .symbol_rate_max = 10762000,
748 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
749 },
750 .init = lgdt330x_init,
751 .set_frontend = lgdt330x_set_parameters,
752 .get_frontend = lgdt330x_get_frontend,
753 .get_tune_settings = lgdt330x_get_tune_settings,
754 .read_status = lgdt3302_read_status,
755 .read_ber = lgdt330x_read_ber,
756 .read_signal_strength = lgdt330x_read_signal_strength,
757 .read_snr = lgdt3302_read_snr,
758 .read_ucblocks = lgdt330x_read_ucblocks,
759 .release = lgdt330x_release,
760};
761
762static struct dvb_frontend_ops lgdt3303_ops = {
572 .info = { 763 .info = {
573 .name= "LG Electronics lgdt330x VSB/QAM Frontend", 764 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
574 .type = FE_ATSC, 765 .type = FE_ATSC,
575 .frequency_min= 54000000, 766 .frequency_min= 54000000,
576 .frequency_max= 858000000, 767 .frequency_max= 858000000,
@@ -584,15 +775,15 @@ static struct dvb_frontend_ops lgdt330x_ops = {
584 .set_frontend = lgdt330x_set_parameters, 775 .set_frontend = lgdt330x_set_parameters,
585 .get_frontend = lgdt330x_get_frontend, 776 .get_frontend = lgdt330x_get_frontend,
586 .get_tune_settings = lgdt330x_get_tune_settings, 777 .get_tune_settings = lgdt330x_get_tune_settings,
587 .read_status = lgdt330x_read_status, 778 .read_status = lgdt3303_read_status,
588 .read_ber = lgdt330x_read_ber, 779 .read_ber = lgdt330x_read_ber,
589 .read_signal_strength = lgdt330x_read_signal_strength, 780 .read_signal_strength = lgdt330x_read_signal_strength,
590 .read_snr = lgdt330x_read_snr, 781 .read_snr = lgdt3303_read_snr,
591 .read_ucblocks = lgdt330x_read_ucblocks, 782 .read_ucblocks = lgdt330x_read_ucblocks,
592 .release = lgdt330x_release, 783 .release = lgdt330x_release,
593}; 784};
594 785
595MODULE_DESCRIPTION("lgdt330x [DViCO FusionHDTV 3 Gold] (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); 786MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
596MODULE_AUTHOR("Wilson Michaels"); 787MODULE_AUTHOR("Wilson Michaels");
597MODULE_LICENSE("GPL"); 788MODULE_LICENSE("GPL");
598 789
@@ -601,6 +792,5 @@ EXPORT_SYMBOL(lgdt330x_attach);
601/* 792/*
602 * Local variables: 793 * Local variables:
603 * c-basic-offset: 8 794 * c-basic-offset: 8
604 * compile-command: "make DVB=1"
605 * End: 795 * End:
606 */ 796 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-08 13:11:02 -0500