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Diffstat (limited to 'drivers/media/dvb/frontends/cx22702.c')
-rw-r--r--drivers/media/dvb/frontends/cx22702.c519
1 files changed, 519 insertions, 0 deletions
diff --git a/drivers/media/dvb/frontends/cx22702.c b/drivers/media/dvb/frontends/cx22702.c
new file mode 100644
index 000000000000..1930b513eefa
--- /dev/null
+++ b/drivers/media/dvb/frontends/cx22702.c
@@ -0,0 +1,519 @@
1/*
2 Conexant 22702 DVB OFDM demodulator driver
3
4 based on:
5 Alps TDMB7 DVB OFDM demodulator driver
6
7 Copyright (C) 2001-2002 Convergence Integrated Media GmbH
8 Holger Waechtler <holger@convergence.de>
9
10 Copyright (C) 2004 Steven Toth <steve@toth.demon.co.uk>
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25
26*/
27
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/module.h>
31#include <linux/string.h>
32#include <linux/slab.h>
33#include <linux/delay.h>
34#include "dvb_frontend.h"
35#include "cx22702.h"
36
37
38struct cx22702_state {
39
40 struct i2c_adapter* i2c;
41
42 struct dvb_frontend_ops ops;
43
44 /* configuration settings */
45 const struct cx22702_config* config;
46
47 struct dvb_frontend frontend;
48
49 /* previous uncorrected block counter */
50 u8 prevUCBlocks;
51};
52
53static int debug = 0;
54#define dprintk if (debug) printk
55
56/* Register values to initialise the demod */
57static u8 init_tab [] = {
58 0x00, 0x00, /* Stop aquisition */
59 0x0B, 0x06,
60 0x09, 0x01,
61 0x0D, 0x41,
62 0x16, 0x32,
63 0x20, 0x0A,
64 0x21, 0x17,
65 0x24, 0x3e,
66 0x26, 0xff,
67 0x27, 0x10,
68 0x28, 0x00,
69 0x29, 0x00,
70 0x2a, 0x10,
71 0x2b, 0x00,
72 0x2c, 0x10,
73 0x2d, 0x00,
74 0x48, 0xd4,
75 0x49, 0x56,
76 0x6b, 0x1e,
77 0xc8, 0x02,
78 0xf8, 0x02,
79 0xf9, 0x00,
80 0xfa, 0x00,
81 0xfb, 0x00,
82 0xfc, 0x00,
83 0xfd, 0x00,
84};
85
86static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
87{
88 int ret;
89 u8 buf [] = { reg, data };
90 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
91
92 ret = i2c_transfer(state->i2c, &msg, 1);
93
94 if (ret != 1)
95 printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
96 __FUNCTION__, reg, data, ret);
97
98 return (ret != 1) ? -1 : 0;
99}
100
101static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
102{
103 int ret;
104 u8 b0 [] = { reg };
105 u8 b1 [] = { 0 };
106
107 struct i2c_msg msg [] = {
108 { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
109 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
110
111 ret = i2c_transfer(state->i2c, msg, 2);
112
113 if (ret != 2)
114 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
115
116 return b1[0];
117}
118
119static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
120{
121 u8 val;
122
123 switch (inversion) {
124
125 case INVERSION_AUTO:
126 return -EOPNOTSUPP;
127
128 case INVERSION_ON:
129 val = cx22702_readreg (state, 0x0C);
130 return cx22702_writereg (state, 0x0C, val | 0x01);
131
132 case INVERSION_OFF:
133 val = cx22702_readreg (state, 0x0C);
134 return cx22702_writereg (state, 0x0C, val & 0xfe);
135
136 default:
137 return -EINVAL;
138
139 }
140
141}
142
143/* Retrieve the demod settings */
144static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_parameters *p)
145{
146 u8 val;
147
148 /* Make sure the TPS regs are valid */
149 if (!(cx22702_readreg(state, 0x0A) & 0x20))
150 return -EAGAIN;
151
152 val = cx22702_readreg (state, 0x01);
153 switch( (val&0x18)>>3) {
154 case 0: p->constellation = QPSK; break;
155 case 1: p->constellation = QAM_16; break;
156 case 2: p->constellation = QAM_64; break;
157 }
158 switch( val&0x07 ) {
159 case 0: p->hierarchy_information = HIERARCHY_NONE; break;
160 case 1: p->hierarchy_information = HIERARCHY_1; break;
161 case 2: p->hierarchy_information = HIERARCHY_2; break;
162 case 3: p->hierarchy_information = HIERARCHY_4; break;
163 }
164
165
166 val = cx22702_readreg (state, 0x02);
167 switch( (val&0x38)>>3 ) {
168 case 0: p->code_rate_HP = FEC_1_2; break;
169 case 1: p->code_rate_HP = FEC_2_3; break;
170 case 2: p->code_rate_HP = FEC_3_4; break;
171 case 3: p->code_rate_HP = FEC_5_6; break;
172 case 4: p->code_rate_HP = FEC_7_8; break;
173 }
174 switch( val&0x07 ) {
175 case 0: p->code_rate_LP = FEC_1_2; break;
176 case 1: p->code_rate_LP = FEC_2_3; break;
177 case 2: p->code_rate_LP = FEC_3_4; break;
178 case 3: p->code_rate_LP = FEC_5_6; break;
179 case 4: p->code_rate_LP = FEC_7_8; break;
180 }
181
182
183 val = cx22702_readreg (state, 0x03);
184 switch( (val&0x0c)>>2 ) {
185 case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
186 case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
187 case 2: p->guard_interval = GUARD_INTERVAL_1_8; break;
188 case 3: p->guard_interval = GUARD_INTERVAL_1_4; break;
189 }
190 switch( val&0x03 ) {
191 case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
192 case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
193 }
194
195 return 0;
196}
197
198/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
199static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
200{
201 u8 val;
202 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
203
204 /* set PLL */
205 cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe);
206 state->config->pll_set(fe, p);
207 cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);
208
209 /* set inversion */
210 cx22702_set_inversion (state, p->inversion);
211
212 /* set bandwidth */
213 switch(p->u.ofdm.bandwidth) {
214 case BANDWIDTH_6_MHZ:
215 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );
216 break;
217 case BANDWIDTH_7_MHZ:
218 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );
219 break;
220 case BANDWIDTH_8_MHZ:
221 cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
222 break;
223 default:
224 dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
225 return -EINVAL;
226 }
227
228
229 p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working
230
231 /* use auto configuration? */
232 if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||
233 (p->u.ofdm.constellation==QAM_AUTO) ||
234 (p->u.ofdm.code_rate_HP==FEC_AUTO) ||
235 (p->u.ofdm.code_rate_LP==FEC_AUTO) ||
236 (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||
237 (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {
238
239 /* TPS Source - use hardware driven values */
240 cx22702_writereg(state, 0x06, 0x10);
241 cx22702_writereg(state, 0x07, 0x9);
242 cx22702_writereg(state, 0x08, 0xC1);
243 cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
244 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
245 cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
246 printk("%s: Autodetecting\n",__FUNCTION__);
247 return 0;
248 }
249
250 /* manually programmed values */
251 val=0;
252 switch(p->u.ofdm.constellation) {
253 case QPSK: val = (val&0xe7); break;
254 case QAM_16: val = (val&0xe7)|0x08; break;
255 case QAM_64: val = (val&0xe7)|0x10; break;
256 default:
257 dprintk ("%s: invalid constellation\n",__FUNCTION__);
258 return -EINVAL;
259 }
260 switch(p->u.ofdm.hierarchy_information) {
261 case HIERARCHY_NONE: val = (val&0xf8); break;
262 case HIERARCHY_1: val = (val&0xf8)|1; break;
263 case HIERARCHY_2: val = (val&0xf8)|2; break;
264 case HIERARCHY_4: val = (val&0xf8)|3; break;
265 default:
266 dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
267 return -EINVAL;
268 }
269 cx22702_writereg (state, 0x06, val);
270
271 val=0;
272 switch(p->u.ofdm.code_rate_HP) {
273 case FEC_NONE:
274 case FEC_1_2: val = (val&0xc7); break;
275 case FEC_2_3: val = (val&0xc7)|0x08; break;
276 case FEC_3_4: val = (val&0xc7)|0x10; break;
277 case FEC_5_6: val = (val&0xc7)|0x18; break;
278 case FEC_7_8: val = (val&0xc7)|0x20; break;
279 default:
280 dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
281 return -EINVAL;
282 }
283 switch(p->u.ofdm.code_rate_LP) {
284 case FEC_NONE:
285 case FEC_1_2: val = (val&0xf8); break;
286 case FEC_2_3: val = (val&0xf8)|1; break;
287 case FEC_3_4: val = (val&0xf8)|2; break;
288 case FEC_5_6: val = (val&0xf8)|3; break;
289 case FEC_7_8: val = (val&0xf8)|4; break;
290 default:
291 dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
292 return -EINVAL;
293 }
294 cx22702_writereg (state, 0x07, val);
295
296 val=0;
297 switch(p->u.ofdm.guard_interval) {
298 case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
299 case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;
300 case GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;
301 case GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;
302 default:
303 dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
304 return -EINVAL;
305 }
306 switch(p->u.ofdm.transmission_mode) {
307 case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
308 case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;
309 default:
310 dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
311 return -EINVAL;
312 }
313 cx22702_writereg(state, 0x08, val);
314 cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );
315 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
316
317 /* Begin channel aquisition */
318 cx22702_writereg(state, 0x00, 0x01);
319
320 return 0;
321}
322
323/* Reset the demod hardware and reset all of the configuration registers
324 to a default state. */
325static int cx22702_init (struct dvb_frontend* fe)
326{
327 int i;
328 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
329
330 cx22702_writereg (state, 0x00, 0x02);
331
332 msleep(10);
333
334 for (i=0; i<sizeof(init_tab); i+=2)
335 cx22702_writereg (state, init_tab[i], init_tab[i+1]);
336
337
338 /* init PLL */
339 if (state->config->pll_init) {
340 cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe);
341 state->config->pll_init(fe);
342 cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);
343 }
344
345 return 0;
346}
347
348static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
349{
350 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
351 u8 reg0A;
352 u8 reg23;
353
354 *status = 0;
355
356 reg0A = cx22702_readreg (state, 0x0A);
357 reg23 = cx22702_readreg (state, 0x23);
358
359 dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
360 ,__FUNCTION__,reg0A,reg23);
361
362 if(reg0A & 0x10) {
363 *status |= FE_HAS_LOCK;
364 *status |= FE_HAS_VITERBI;
365 *status |= FE_HAS_SYNC;
366 }
367
368 if(reg0A & 0x20)
369 *status |= FE_HAS_CARRIER;
370
371 if(reg23 < 0xf0)
372 *status |= FE_HAS_SIGNAL;
373
374 return 0;
375}
376
377static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
378{
379 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
380
381 if(cx22702_readreg (state, 0xE4) & 0x02) {
382 /* Realtime statistics */
383 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
384 | (cx22702_readreg (state, 0xDF)&0x7F);
385 } else {
386 /* Averagtine statistics */
387 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
388 | cx22702_readreg (state, 0xDF);
389 }
390
391 return 0;
392}
393
394static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
395{
396 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
397
398 *signal_strength = cx22702_readreg (state, 0x23);
399
400 return 0;
401}
402
403static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
404{
405 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
406
407 u16 rs_ber=0;
408 if(cx22702_readreg (state, 0xE4) & 0x02) {
409 /* Realtime statistics */
410 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
411 | (cx22702_readreg (state, 0xDF)& 0x7F);
412 } else {
413 /* Averagine statistics */
414 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
415 | cx22702_readreg (state, 0xDF);
416 }
417 *snr = ~rs_ber;
418
419 return 0;
420}
421
422static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
423{
424 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
425
426 u8 _ucblocks;
427
428 /* RS Uncorrectable Packet Count then reset */
429 _ucblocks = cx22702_readreg (state, 0xE3);
430 if (state->prevUCBlocks < _ucblocks) *ucblocks = (_ucblocks - state->prevUCBlocks);
431 else *ucblocks = state->prevUCBlocks - _ucblocks;
432 state->prevUCBlocks = _ucblocks;
433
434 return 0;
435}
436
437static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
438{
439 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
440
441 u8 reg0C = cx22702_readreg (state, 0x0C);
442
443 p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
444 return cx22702_get_tps (state, &p->u.ofdm);
445}
446
447static void cx22702_release(struct dvb_frontend* fe)
448{
449 struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;
450 kfree(state);
451}
452
453static struct dvb_frontend_ops cx22702_ops;
454
455struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
456 struct i2c_adapter* i2c)
457{
458 struct cx22702_state* state = NULL;
459
460 /* allocate memory for the internal state */
461 state = (struct cx22702_state*) kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
462 if (state == NULL) goto error;
463
464 /* setup the state */
465 state->config = config;
466 state->i2c = i2c;
467 memcpy(&state->ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
468 state->prevUCBlocks = 0;
469
470 /* check if the demod is there */
471 if (cx22702_readreg(state, 0x1f) != 0x3) goto error;
472
473 /* create dvb_frontend */
474 state->frontend.ops = &state->ops;
475 state->frontend.demodulator_priv = state;
476 return &state->frontend;
477
478error:
479 kfree(state);
480 return NULL;
481}
482
483static struct dvb_frontend_ops cx22702_ops = {
484
485 .info = {
486 .name = "Conexant CX22702 DVB-T",
487 .type = FE_OFDM,
488 .frequency_min = 177000000,
489 .frequency_max = 858000000,
490 .frequency_stepsize = 166666,
491 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
492 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
493 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
494 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
495 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
496 },
497
498 .release = cx22702_release,
499
500 .init = cx22702_init,
501
502 .set_frontend = cx22702_set_tps,
503 .get_frontend = cx22702_get_frontend,
504
505 .read_status = cx22702_read_status,
506 .read_ber = cx22702_read_ber,
507 .read_signal_strength = cx22702_read_signal_strength,
508 .read_snr = cx22702_read_snr,
509 .read_ucblocks = cx22702_read_ucblocks,
510};
511
512module_param(debug, int, 0644);
513MODULE_PARM_DESC(debug, "Enable verbose debug messages");
514
515MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
516MODULE_AUTHOR("Steven Toth");
517MODULE_LICENSE("GPL");
518
519EXPORT_SYMBOL(cx22702_attach);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 23:15:27 -0500