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Diffstat (limited to 'drivers/media/dvb/dvb-usb/rtl28xxu.h')
-rw-r--r--drivers/media/dvb/dvb-usb/rtl28xxu.h264
1 files changed, 264 insertions, 0 deletions
diff --git a/drivers/media/dvb/dvb-usb/rtl28xxu.h b/drivers/media/dvb/dvb-usb/rtl28xxu.h
new file mode 100644
index 000000000000..90f3bb4f4c0e
--- /dev/null
+++ b/drivers/media/dvb/dvb-usb/rtl28xxu.h
@@ -0,0 +1,264 @@
1/*
2 * Realtek RTL28xxU DVB USB driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#ifndef RTL28XXU_H
23#define RTL28XXU_H
24
25#define DVB_USB_LOG_PREFIX "rtl28xxu"
26#include "dvb-usb.h"
27
28#define deb_info(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x01, args)
29#define deb_rc(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x02, args)
30#define deb_xfer(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x04, args)
31#define deb_reg(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x08, args)
32#define deb_i2c(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x10, args)
33#define deb_fw(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x20, args)
34
35#define deb_dump(r, t, v, i, b, l, func) { \
36 int loop_; \
37 func("%02x %02x %02x %02x %02x %02x %02x %02x", \
38 t, r, v & 0xff, v >> 8, i & 0xff, i >> 8, l & 0xff, l >> 8); \
39 if (t == (USB_TYPE_VENDOR | USB_DIR_OUT)) \
40 func(" >>> "); \
41 else \
42 func(" <<< "); \
43 for (loop_ = 0; loop_ < l; loop_++) \
44 func("%02x ", b[loop_]); \
45 func("\n");\
46}
47
48/*
49 * USB commands
50 * (usb_control_msg() index parameter)
51 */
52
53#define DEMOD 0x0000
54#define USB 0x0100
55#define SYS 0x0200
56#define I2C 0x0300
57#define I2C_DA 0x0600
58
59#define CMD_WR_FLAG 0x0010
60#define CMD_DEMOD_RD 0x0000
61#define CMD_DEMOD_WR 0x0010
62#define CMD_USB_RD 0x0100
63#define CMD_USB_WR 0x0110
64#define CMD_SYS_RD 0x0200
65#define CMD_IR_RD 0x0201
66#define CMD_IR_WR 0x0211
67#define CMD_SYS_WR 0x0210
68#define CMD_I2C_RD 0x0300
69#define CMD_I2C_WR 0x0310
70#define CMD_I2C_DA_RD 0x0600
71#define CMD_I2C_DA_WR 0x0610
72
73
74struct rtl28xxu_priv {
75 u8 chip_id;
76 u8 tuner;
77 u8 page; /* integrated demod active register page */
78 bool rc_active;
79};
80
81enum rtl28xxu_chip_id {
82 CHIP_ID_NONE,
83 CHIP_ID_RTL2831U,
84 CHIP_ID_RTL2832U,
85};
86
87enum rtl28xxu_tuner {
88 TUNER_NONE,
89
90 TUNER_RTL2830_QT1010,
91 TUNER_RTL2830_MT2060,
92 TUNER_RTL2830_MXL5005S,
93
94 TUNER_RTL2832_MT2266,
95 TUNER_RTL2832_FC2580,
96 TUNER_RTL2832_MT2063,
97 TUNER_RTL2832_MAX3543,
98 TUNER_RTL2832_TUA9001,
99 TUNER_RTL2832_MXL5007T,
100 TUNER_RTL2832_FC0012,
101 TUNER_RTL2832_E4000,
102 TUNER_RTL2832_TDA18272,
103 TUNER_RTL2832_FC0013,
104};
105
106struct rtl28xxu_req {
107 u16 value;
108 u16 index;
109 u16 size;
110 u8 *data;
111};
112
113struct rtl28xxu_reg_val {
114 u16 reg;
115 u8 val;
116};
117
118/*
119 * memory map
120 *
121 * 0x0000 DEMOD : demodulator
122 * 0x2000 USB : SIE, USB endpoint, debug, DMA
123 * 0x3000 SYS : system
124 * 0xfc00 RC : remote controller (not RTL2831U)
125 */
126
127/*
128 * USB registers
129 */
130/* SIE Control Registers */
131#define USB_SYSCTL 0x2000 /* USB system control */
132#define USB_SYSCTL_0 0x2000 /* USB system control */
133#define USB_SYSCTL_1 0x2001 /* USB system control */
134#define USB_SYSCTL_2 0x2002 /* USB system control */
135#define USB_SYSCTL_3 0x2003 /* USB system control */
136#define USB_IRQSTAT 0x2008 /* SIE interrupt status */
137#define USB_IRQEN 0x200C /* SIE interrupt enable */
138#define USB_CTRL 0x2010 /* USB control */
139#define USB_STAT 0x2014 /* USB status */
140#define USB_DEVADDR 0x2018 /* USB device address */
141#define USB_TEST 0x201C /* USB test mode */
142#define USB_FRAME_NUMBER 0x2020 /* frame number */
143#define USB_FIFO_ADDR 0x2028 /* address of SIE FIFO RAM */
144#define USB_FIFO_CMD 0x202A /* SIE FIFO RAM access command */
145#define USB_FIFO_DATA 0x2030 /* SIE FIFO RAM data */
146/* Endpoint Registers */
147#define EP0_SETUPA 0x20F8 /* EP 0 setup packet lower byte */
148#define EP0_SETUPB 0x20FC /* EP 0 setup packet higher byte */
149#define USB_EP0_CFG 0x2104 /* EP 0 configure */
150#define USB_EP0_CTL 0x2108 /* EP 0 control */
151#define USB_EP0_STAT 0x210C /* EP 0 status */
152#define USB_EP0_IRQSTAT 0x2110 /* EP 0 interrupt status */
153#define USB_EP0_IRQEN 0x2114 /* EP 0 interrupt enable */
154#define USB_EP0_MAXPKT 0x2118 /* EP 0 max packet size */
155#define USB_EP0_BC 0x2120 /* EP 0 FIFO byte counter */
156#define USB_EPA_CFG 0x2144 /* EP A configure */
157#define USB_EPA_CFG_0 0x2144 /* EP A configure */
158#define USB_EPA_CFG_1 0x2145 /* EP A configure */
159#define USB_EPA_CFG_2 0x2146 /* EP A configure */
160#define USB_EPA_CFG_3 0x2147 /* EP A configure */
161#define USB_EPA_CTL 0x2148 /* EP A control */
162#define USB_EPA_CTL_0 0x2148 /* EP A control */
163#define USB_EPA_CTL_1 0x2149 /* EP A control */
164#define USB_EPA_CTL_2 0x214A /* EP A control */
165#define USB_EPA_CTL_3 0x214B /* EP A control */
166#define USB_EPA_STAT 0x214C /* EP A status */
167#define USB_EPA_IRQSTAT 0x2150 /* EP A interrupt status */
168#define USB_EPA_IRQEN 0x2154 /* EP A interrupt enable */
169#define USB_EPA_MAXPKT 0x2158 /* EP A max packet size */
170#define USB_EPA_MAXPKT_0 0x2158 /* EP A max packet size */
171#define USB_EPA_MAXPKT_1 0x2159 /* EP A max packet size */
172#define USB_EPA_MAXPKT_2 0x215A /* EP A max packet size */
173#define USB_EPA_MAXPKT_3 0x215B /* EP A max packet size */
174#define USB_EPA_FIFO_CFG 0x2160 /* EP A FIFO configure */
175#define USB_EPA_FIFO_CFG_0 0x2160 /* EP A FIFO configure */
176#define USB_EPA_FIFO_CFG_1 0x2161 /* EP A FIFO configure */
177#define USB_EPA_FIFO_CFG_2 0x2162 /* EP A FIFO configure */
178#define USB_EPA_FIFO_CFG_3 0x2163 /* EP A FIFO configure */
179/* Debug Registers */
180#define USB_PHYTSTDIS 0x2F04 /* PHY test disable */
181#define USB_TOUT_VAL 0x2F08 /* USB time-out time */
182#define USB_VDRCTRL 0x2F10 /* UTMI vendor signal control */
183#define USB_VSTAIN 0x2F14 /* UTMI vendor signal status in */
184#define USB_VLOADM 0x2F18 /* UTMI load vendor signal status in */
185#define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
186#define USB_UTMI_TST 0x2F80 /* UTMI test */
187#define USB_UTMI_STATUS 0x2F84 /* UTMI status */
188#define USB_TSTCTL 0x2F88 /* test control */
189#define USB_TSTCTL2 0x2F8C /* test control 2 */
190#define USB_PID_FORCE 0x2F90 /* force PID */
191#define USB_PKTERR_CNT 0x2F94 /* packet error counter */
192#define USB_RXERR_CNT 0x2F98 /* RX error counter */
193#define USB_MEM_BIST 0x2F9C /* MEM BIST test */
194#define USB_SLBBIST 0x2FA0 /* self-loop-back BIST */
195#define USB_CNTTEST 0x2FA4 /* counter test */
196#define USB_PHYTST 0x2FC0 /* USB PHY test */
197#define USB_DBGIDX 0x2FF0 /* select individual block debug signal */
198#define USB_DBGMUX 0x2FF4 /* debug signal module mux */
199
200/*
201 * SYS registers
202 */
203/* demod control registers */
204#define SYS_SYS0 0x3000 /* include DEMOD_CTL, GPO, GPI, GPOE */
205#define SYS_DEMOD_CTL 0x3000 /* control register for DVB-T demodulator */
206/* GPIO registers */
207#define SYS_GPIO_OUT_VAL 0x3001 /* output value of GPIO */
208#define SYS_GPIO_IN_VAL 0x3002 /* input value of GPIO */
209#define SYS_GPIO_OUT_EN 0x3003 /* output enable of GPIO */
210#define SYS_SYS1 0x3004 /* include GPD, SYSINTE, SYSINTS, GP_CFG0 */
211#define SYS_GPIO_DIR 0x3004 /* direction control for GPIO */
212#define SYS_SYSINTE 0x3005 /* system interrupt enable */
213#define SYS_SYSINTS 0x3006 /* system interrupt status */
214#define SYS_GPIO_CFG0 0x3007 /* PAD configuration for GPIO0-GPIO3 */
215#define SYS_SYS2 0x3008 /* include GP_CFG1 and 3 reserved bytes */
216#define SYS_GPIO_CFG1 0x3008 /* PAD configuration for GPIO4 */
217#define SYS_DEMOD_CTL1 0x300B
218
219/* IrDA registers */
220#define SYS_IRRC_PSR 0x3020 /* IR protocol selection */
221#define SYS_IRRC_PER 0x3024 /* IR protocol extension */
222#define SYS_IRRC_SF 0x3028 /* IR sampling frequency */
223#define SYS_IRRC_DPIR 0x302C /* IR data package interval */
224#define SYS_IRRC_CR 0x3030 /* IR control */
225#define SYS_IRRC_RP 0x3034 /* IR read port */
226#define SYS_IRRC_SR 0x3038 /* IR status */
227/* I2C master registers */
228#define SYS_I2CCR 0x3040 /* I2C clock */
229#define SYS_I2CMCR 0x3044 /* I2C master control */
230#define SYS_I2CMSTR 0x3048 /* I2C master SCL timing */
231#define SYS_I2CMSR 0x304C /* I2C master status */
232#define SYS_I2CMFR 0x3050 /* I2C master FIFO */
233
234/*
235 * IR registers
236 */
237#define IR_RX_BUF 0xFC00
238#define IR_RX_IE 0xFD00
239#define IR_RX_IF 0xFD01
240#define IR_RX_CTRL 0xFD02
241#define IR_RX_CFG 0xFD03
242#define IR_MAX_DURATION0 0xFD04
243#define IR_MAX_DURATION1 0xFD05
244#define IR_IDLE_LEN0 0xFD06
245#define IR_IDLE_LEN1 0xFD07
246#define IR_GLITCH_LEN 0xFD08
247#define IR_RX_BUF_CTRL 0xFD09
248#define IR_RX_BUF_DATA 0xFD0A
249#define IR_RX_BC 0xFD0B
250#define IR_RX_CLK 0xFD0C
251#define IR_RX_C_COUNT_L 0xFD0D
252#define IR_RX_C_COUNT_H 0xFD0E
253#define IR_SUSPEND_CTRL 0xFD10
254#define IR_ERR_TOL_CTRL 0xFD11
255#define IR_UNIT_LEN 0xFD12
256#define IR_ERR_TOL_LEN 0xFD13
257#define IR_MAX_H_TOL_LEN 0xFD14
258#define IR_MAX_L_TOL_LEN 0xFD15
259#define IR_MASK_CTRL 0xFD16
260#define IR_MASK_DATA 0xFD17
261#define IR_RES_MASK_ADDR 0xFD18
262#define IR_RES_MASK_T_LEN 0xFD19
263
264#endif