diff options
Diffstat (limited to 'drivers/media/dvb/bt8xx/dvb-bt8xx.c')
-rw-r--r-- | drivers/media/dvb/bt8xx/dvb-bt8xx.c | 101 |
1 files changed, 61 insertions, 40 deletions
diff --git a/drivers/media/dvb/bt8xx/dvb-bt8xx.c b/drivers/media/dvb/bt8xx/dvb-bt8xx.c index f9572426a148..6f857c6091f3 100644 --- a/drivers/media/dvb/bt8xx/dvb-bt8xx.c +++ b/drivers/media/dvb/bt8xx/dvb-bt8xx.c | |||
@@ -142,7 +142,7 @@ static int thomson_dtt7579_demod_init(struct dvb_frontend* fe) | |||
142 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); | 142 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); |
143 | 143 | ||
144 | mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg)); | 144 | mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg)); |
145 | mt352_write(fe, mt352_gpp_ctl_cfg, sizeof(mt352_gpp_ctl_cfg)); | 145 | mt352_write(fe, mt352_gpp_ctl_cfg, sizeof(mt352_gpp_ctl_cfg)); |
146 | mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg)); | 146 | mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg)); |
147 | 147 | ||
148 | return 0; | 148 | return 0; |
@@ -161,7 +161,7 @@ static int thomson_dtt7579_pll_set(struct dvb_frontend* fe, struct dvb_frontend_ | |||
161 | else if (params->frequency < 771000000) cp = 0xbc; | 161 | else if (params->frequency < 771000000) cp = 0xbc; |
162 | else cp = 0xf4; | 162 | else cp = 0xf4; |
163 | 163 | ||
164 | if (params->frequency == 0) bs = 0x03; | 164 | if (params->frequency == 0) bs = 0x03; |
165 | else if (params->frequency < 443250000) bs = 0x02; | 165 | else if (params->frequency < 443250000) bs = 0x02; |
166 | else bs = 0x08; | 166 | else bs = 0x08; |
167 | 167 | ||
@@ -190,44 +190,44 @@ static int cx24108_pll_set(struct dvb_frontend* fe, struct dvb_frontend_paramete | |||
190 | 190 | ||
191 | 191 | ||
192 | u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000, | 192 | u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000, |
193 | 1576000,1718000,1856000,2036000,2150000}; | 193 | 1576000,1718000,1856000,2036000,2150000}; |
194 | u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000, | 194 | u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000, |
195 | 0x00102000,0x00104000,0x00108000,0x00110000, | 195 | 0x00102000,0x00104000,0x00108000,0x00110000, |
196 | 0x00120000,0x00140000}; | 196 | 0x00120000,0x00140000}; |
197 | 197 | ||
198 | #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */ | 198 | #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */ |
199 | printk("cx24108 debug: entering SetTunerFreq, freq=%d\n",freq); | 199 | printk("cx24108 debug: entering SetTunerFreq, freq=%d\n",freq); |
200 | 200 | ||
201 | /* This is really the bit driving the tuner chip cx24108 */ | 201 | /* This is really the bit driving the tuner chip cx24108 */ |
202 | 202 | ||
203 | if(freq<950000) freq=950000; /* kHz */ | 203 | if(freq<950000) freq=950000; /* kHz */ |
204 | if(freq>2150000) freq=2150000; /* satellite IF is 950..2150MHz */ | 204 | if(freq>2150000) freq=2150000; /* satellite IF is 950..2150MHz */ |
205 | 205 | ||
206 | /* decide which VCO to use for the input frequency */ | 206 | /* decide which VCO to use for the input frequency */ |
207 | for(i=1;(i<sizeof(osci)/sizeof(osci[0]))&&(osci[i]<freq);i++); | 207 | for(i=1;(i<sizeof(osci)/sizeof(osci[0]))&&(osci[i]<freq);i++); |
208 | printk("cx24108 debug: select vco #%d (f=%d)\n",i,freq); | 208 | printk("cx24108 debug: select vco #%d (f=%d)\n",i,freq); |
209 | band=bandsel[i]; | 209 | band=bandsel[i]; |
210 | /* the gain values must be set by SetSymbolrate */ | 210 | /* the gain values must be set by SetSymbolrate */ |
211 | /* compute the pll divider needed, from Conexant data sheet, | 211 | /* compute the pll divider needed, from Conexant data sheet, |
212 | resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4, | 212 | resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4, |
213 | depending on the divider bit. It is set to /4 on the 2 lowest | 213 | depending on the divider bit. It is set to /4 on the 2 lowest |
214 | bands */ | 214 | bands */ |
215 | n=((i<=2?2:1)*freq*10L)/(XTAL/100); | 215 | n=((i<=2?2:1)*freq*10L)/(XTAL/100); |
216 | a=n%32; n/=32; if(a==0) n--; | 216 | a=n%32; n/=32; if(a==0) n--; |
217 | pump=(freq<(osci[i-1]+osci[i])/2); | 217 | pump=(freq<(osci[i-1]+osci[i])/2); |
218 | pll=0xf8000000| | 218 | pll=0xf8000000| |
219 | ((pump?1:2)<<(14+11))| | 219 | ((pump?1:2)<<(14+11))| |
220 | ((n&0x1ff)<<(5+11))| | 220 | ((n&0x1ff)<<(5+11))| |
221 | ((a&0x1f)<<11); | 221 | ((a&0x1f)<<11); |
222 | /* everything is shifted left 11 bits to left-align the bits in the | 222 | /* everything is shifted left 11 bits to left-align the bits in the |
223 | 32bit word. Output to the tuner goes MSB-aligned, after all */ | 223 | 32bit word. Output to the tuner goes MSB-aligned, after all */ |
224 | printk("cx24108 debug: pump=%d, n=%d, a=%d\n",pump,n,a); | 224 | printk("cx24108 debug: pump=%d, n=%d, a=%d\n",pump,n,a); |
225 | cx24110_pll_write(fe,band); | 225 | cx24110_pll_write(fe,band); |
226 | /* set vga and vca to their widest-band settings, as a precaution. | 226 | /* set vga and vca to their widest-band settings, as a precaution. |
227 | SetSymbolrate might not be called to set this up */ | 227 | SetSymbolrate might not be called to set this up */ |
228 | cx24110_pll_write(fe,0x500c0000); | 228 | cx24110_pll_write(fe,0x500c0000); |
229 | cx24110_pll_write(fe,0x83f1f800); | 229 | cx24110_pll_write(fe,0x83f1f800); |
230 | cx24110_pll_write(fe,pll); | 230 | cx24110_pll_write(fe,pll); |
231 | /* writereg(client,0x56,0x7f);*/ | 231 | /* writereg(client,0x56,0x7f);*/ |
232 | 232 | ||
233 | return 0; | 233 | return 0; |
@@ -299,7 +299,7 @@ static int advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe) | |||
299 | static u8 mt352_reset [] = { 0x50, 0x80 }; | 299 | static u8 mt352_reset [] = { 0x50, 0x80 }; |
300 | static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | 300 | static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 }; |
301 | static u8 mt352_agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, | 301 | static u8 mt352_agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, |
302 | 0x00, 0xFF, 0x00, 0x40, 0x40 }; | 302 | 0x00, 0xFF, 0x00, 0x40, 0x40 }; |
303 | static u8 mt352_av771_extra[] = { 0xB5, 0x7A }; | 303 | static u8 mt352_av771_extra[] = { 0xB5, 0x7A }; |
304 | static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 }; | 304 | static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 }; |
305 | 305 | ||
@@ -463,6 +463,9 @@ static struct nxt6000_config vp3021_alps_tded4_config = { | |||
463 | 463 | ||
464 | static void frontend_init(struct dvb_bt8xx_card *card, u32 type) | 464 | static void frontend_init(struct dvb_bt8xx_card *card, u32 type) |
465 | { | 465 | { |
466 | int ret; | ||
467 | struct dst_state* state = NULL; | ||
468 | |||
466 | switch(type) { | 469 | switch(type) { |
467 | #ifdef BTTV_DVICO_DVBT_LITE | 470 | #ifdef BTTV_DVICO_DVBT_LITE |
468 | case BTTV_DVICO_DVBT_LITE: | 471 | case BTTV_DVICO_DVBT_LITE: |
@@ -503,7 +506,25 @@ static void frontend_init(struct dvb_bt8xx_card *card, u32 type) | |||
503 | break; | 506 | break; |
504 | 507 | ||
505 | case BTTV_TWINHAN_DST: | 508 | case BTTV_TWINHAN_DST: |
506 | card->fe = dst_attach(&dst_config, card->i2c_adapter, card->bt); | 509 | /* DST is not a frontend driver !!! */ |
510 | state = (struct dst_state *) kmalloc(sizeof (struct dst_state), GFP_KERNEL); | ||
511 | /* Setup the Card */ | ||
512 | state->config = &dst_config; | ||
513 | state->i2c = card->i2c_adapter; | ||
514 | state->bt = card->bt; | ||
515 | |||
516 | /* DST is not a frontend, attaching the ASIC */ | ||
517 | if ((dst_attach(state, &card->dvb_adapter)) == NULL) { | ||
518 | printk("%s: Could not find a Twinhan DST.\n", __FUNCTION__); | ||
519 | break; | ||
520 | } | ||
521 | card->fe = &state->frontend; | ||
522 | |||
523 | /* Attach other DST peripherals if any */ | ||
524 | /* Conditional Access device */ | ||
525 | if (state->dst_hw_cap & DST_TYPE_HAS_CA) { | ||
526 | ret = dst_ca_attach(state, &card->dvb_adapter); | ||
527 | } | ||
507 | if (card->fe != NULL) { | 528 | if (card->fe != NULL) { |
508 | break; | 529 | break; |
509 | } | 530 | } |
@@ -648,7 +669,7 @@ static int dvb_bt8xx_probe(struct device *dev) | |||
648 | case BTTV_PINNACLESAT: | 669 | case BTTV_PINNACLESAT: |
649 | card->gpio_mode = 0x0400c060; | 670 | card->gpio_mode = 0x0400c060; |
650 | /* should be: BT878_A_GAIN=0,BT878_A_PWRDN,BT878_DA_DPM,BT878_DA_SBR, | 671 | /* should be: BT878_A_GAIN=0,BT878_A_PWRDN,BT878_DA_DPM,BT878_DA_SBR, |
651 | BT878_DA_IOM=1,BT878_DA_APP to enable serial highspeed mode. */ | 672 | BT878_DA_IOM=1,BT878_DA_APP to enable serial highspeed mode. */ |
652 | card->op_sync_orin = 0; | 673 | card->op_sync_orin = 0; |
653 | card->irq_err_ignore = 0; | 674 | card->irq_err_ignore = 0; |
654 | break; | 675 | break; |