diff options
Diffstat (limited to 'drivers/mailbox/omap-mailbox.c')
-rw-r--r-- | drivers/mailbox/omap-mailbox.c | 444 |
1 files changed, 358 insertions, 86 deletions
diff --git a/drivers/mailbox/omap-mailbox.c b/drivers/mailbox/omap-mailbox.c index d79a646b9042..a27e00e63a8a 100644 --- a/drivers/mailbox/omap-mailbox.c +++ b/drivers/mailbox/omap-mailbox.c | |||
@@ -2,8 +2,10 @@ | |||
2 | * OMAP mailbox driver | 2 | * OMAP mailbox driver |
3 | * | 3 | * |
4 | * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. | 4 | * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. |
5 | * Copyright (C) 2013-2014 Texas Instruments Inc. | ||
5 | * | 6 | * |
6 | * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | 7 | * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> |
8 | * Suman Anna <s-anna@ti.com> | ||
7 | * | 9 | * |
8 | * This program is free software; you can redistribute it and/or | 10 | * This program is free software; you can redistribute it and/or |
9 | * modify it under the terms of the GNU General Public License | 11 | * modify it under the terms of the GNU General Public License |
@@ -24,70 +26,164 @@ | |||
24 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
25 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
26 | #include <linux/mutex.h> | 28 | #include <linux/mutex.h> |
27 | #include <linux/delay.h> | ||
28 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
29 | #include <linux/kfifo.h> | 30 | #include <linux/kfifo.h> |
30 | #include <linux/err.h> | 31 | #include <linux/err.h> |
31 | #include <linux/notifier.h> | 32 | #include <linux/notifier.h> |
32 | #include <linux/module.h> | 33 | #include <linux/module.h> |
33 | 34 | #include <linux/platform_device.h> | |
34 | #include "omap-mbox.h" | 35 | #include <linux/pm_runtime.h> |
35 | 36 | #include <linux/platform_data/mailbox-omap.h> | |
36 | static struct omap_mbox **mboxes; | 37 | #include <linux/omap-mailbox.h> |
37 | 38 | ||
38 | static int mbox_configured; | 39 | #define MAILBOX_REVISION 0x000 |
39 | static DEFINE_MUTEX(mbox_configured_lock); | 40 | #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) |
41 | #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) | ||
42 | #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m)) | ||
43 | |||
44 | #define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) | ||
45 | #define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) | ||
46 | |||
47 | #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u)) | ||
48 | #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u)) | ||
49 | #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u)) | ||
50 | |||
51 | #define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \ | ||
52 | OMAP2_MAILBOX_IRQSTATUS(u)) | ||
53 | #define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \ | ||
54 | OMAP2_MAILBOX_IRQENABLE(u)) | ||
55 | #define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \ | ||
56 | : OMAP2_MAILBOX_IRQENABLE(u)) | ||
57 | |||
58 | #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) | ||
59 | #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) | ||
60 | |||
61 | #define MBOX_REG_SIZE 0x120 | ||
62 | |||
63 | #define OMAP4_MBOX_REG_SIZE 0x130 | ||
64 | |||
65 | #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) | ||
66 | #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32)) | ||
67 | |||
68 | struct omap_mbox_fifo { | ||
69 | unsigned long msg; | ||
70 | unsigned long fifo_stat; | ||
71 | unsigned long msg_stat; | ||
72 | unsigned long irqenable; | ||
73 | unsigned long irqstatus; | ||
74 | unsigned long irqdisable; | ||
75 | u32 intr_bit; | ||
76 | }; | ||
77 | |||
78 | struct omap_mbox_queue { | ||
79 | spinlock_t lock; | ||
80 | struct kfifo fifo; | ||
81 | struct work_struct work; | ||
82 | struct tasklet_struct tasklet; | ||
83 | struct omap_mbox *mbox; | ||
84 | bool full; | ||
85 | }; | ||
86 | |||
87 | struct omap_mbox_device { | ||
88 | struct device *dev; | ||
89 | struct mutex cfg_lock; | ||
90 | void __iomem *mbox_base; | ||
91 | u32 num_users; | ||
92 | u32 num_fifos; | ||
93 | struct omap_mbox **mboxes; | ||
94 | struct list_head elem; | ||
95 | }; | ||
96 | |||
97 | struct omap_mbox { | ||
98 | const char *name; | ||
99 | int irq; | ||
100 | struct omap_mbox_queue *txq, *rxq; | ||
101 | struct device *dev; | ||
102 | struct omap_mbox_device *parent; | ||
103 | struct omap_mbox_fifo tx_fifo; | ||
104 | struct omap_mbox_fifo rx_fifo; | ||
105 | u32 ctx[OMAP4_MBOX_NR_REGS]; | ||
106 | u32 intr_type; | ||
107 | int use_count; | ||
108 | struct blocking_notifier_head notifier; | ||
109 | }; | ||
110 | |||
111 | /* global variables for the mailbox devices */ | ||
112 | static DEFINE_MUTEX(omap_mbox_devices_lock); | ||
113 | static LIST_HEAD(omap_mbox_devices); | ||
40 | 114 | ||
41 | static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE; | 115 | static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE; |
42 | module_param(mbox_kfifo_size, uint, S_IRUGO); | 116 | module_param(mbox_kfifo_size, uint, S_IRUGO); |
43 | MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)"); | 117 | MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)"); |
44 | 118 | ||
119 | static inline | ||
120 | unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs) | ||
121 | { | ||
122 | return __raw_readl(mdev->mbox_base + ofs); | ||
123 | } | ||
124 | |||
125 | static inline | ||
126 | void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs) | ||
127 | { | ||
128 | __raw_writel(val, mdev->mbox_base + ofs); | ||
129 | } | ||
130 | |||
45 | /* Mailbox FIFO handle functions */ | 131 | /* Mailbox FIFO handle functions */ |
46 | static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox) | 132 | static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox) |
47 | { | 133 | { |
48 | return mbox->ops->fifo_read(mbox); | 134 | struct omap_mbox_fifo *fifo = &mbox->rx_fifo; |
135 | return (mbox_msg_t) mbox_read_reg(mbox->parent, fifo->msg); | ||
49 | } | 136 | } |
50 | static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) | 137 | |
138 | static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) | ||
51 | { | 139 | { |
52 | mbox->ops->fifo_write(mbox, msg); | 140 | struct omap_mbox_fifo *fifo = &mbox->tx_fifo; |
141 | mbox_write_reg(mbox->parent, msg, fifo->msg); | ||
53 | } | 142 | } |
54 | static inline int mbox_fifo_empty(struct omap_mbox *mbox) | 143 | |
144 | static int mbox_fifo_empty(struct omap_mbox *mbox) | ||
55 | { | 145 | { |
56 | return mbox->ops->fifo_empty(mbox); | 146 | struct omap_mbox_fifo *fifo = &mbox->rx_fifo; |
147 | return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0); | ||
57 | } | 148 | } |
58 | static inline int mbox_fifo_full(struct omap_mbox *mbox) | 149 | |
150 | static int mbox_fifo_full(struct omap_mbox *mbox) | ||
59 | { | 151 | { |
60 | return mbox->ops->fifo_full(mbox); | 152 | struct omap_mbox_fifo *fifo = &mbox->tx_fifo; |
153 | return mbox_read_reg(mbox->parent, fifo->fifo_stat); | ||
61 | } | 154 | } |
62 | 155 | ||
63 | /* Mailbox IRQ handle functions */ | 156 | /* Mailbox IRQ handle functions */ |
64 | static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | 157 | static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
65 | { | 158 | { |
66 | if (mbox->ops->ack_irq) | 159 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
67 | mbox->ops->ack_irq(mbox, irq); | 160 | &mbox->tx_fifo : &mbox->rx_fifo; |
161 | u32 bit = fifo->intr_bit; | ||
162 | u32 irqstatus = fifo->irqstatus; | ||
163 | |||
164 | mbox_write_reg(mbox->parent, bit, irqstatus); | ||
165 | |||
166 | /* Flush posted write for irq status to avoid spurious interrupts */ | ||
167 | mbox_read_reg(mbox->parent, irqstatus); | ||
68 | } | 168 | } |
69 | static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | 169 | |
170 | static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | ||
70 | { | 171 | { |
71 | return mbox->ops->is_irq(mbox, irq); | 172 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
173 | &mbox->tx_fifo : &mbox->rx_fifo; | ||
174 | u32 bit = fifo->intr_bit; | ||
175 | u32 irqenable = fifo->irqenable; | ||
176 | u32 irqstatus = fifo->irqstatus; | ||
177 | |||
178 | u32 enable = mbox_read_reg(mbox->parent, irqenable); | ||
179 | u32 status = mbox_read_reg(mbox->parent, irqstatus); | ||
180 | |||
181 | return (int)(enable & status & bit); | ||
72 | } | 182 | } |
73 | 183 | ||
74 | /* | 184 | /* |
75 | * message sender | 185 | * message sender |
76 | */ | 186 | */ |
77 | static int __mbox_poll_for_space(struct omap_mbox *mbox) | ||
78 | { | ||
79 | int ret = 0, i = 1000; | ||
80 | |||
81 | while (mbox_fifo_full(mbox)) { | ||
82 | if (mbox->ops->type == OMAP_MBOX_TYPE2) | ||
83 | return -1; | ||
84 | if (--i == 0) | ||
85 | return -1; | ||
86 | udelay(1); | ||
87 | } | ||
88 | return ret; | ||
89 | } | ||
90 | |||
91 | int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg) | 187 | int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg) |
92 | { | 188 | { |
93 | struct omap_mbox_queue *mq = mbox->txq; | 189 | struct omap_mbox_queue *mq = mbox->txq; |
@@ -100,7 +196,7 @@ int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg) | |||
100 | goto out; | 196 | goto out; |
101 | } | 197 | } |
102 | 198 | ||
103 | if (kfifo_is_empty(&mq->fifo) && !__mbox_poll_for_space(mbox)) { | 199 | if (kfifo_is_empty(&mq->fifo) && !mbox_fifo_full(mbox)) { |
104 | mbox_fifo_write(mbox, msg); | 200 | mbox_fifo_write(mbox, msg); |
105 | goto out; | 201 | goto out; |
106 | } | 202 | } |
@@ -118,35 +214,69 @@ EXPORT_SYMBOL(omap_mbox_msg_send); | |||
118 | 214 | ||
119 | void omap_mbox_save_ctx(struct omap_mbox *mbox) | 215 | void omap_mbox_save_ctx(struct omap_mbox *mbox) |
120 | { | 216 | { |
121 | if (!mbox->ops->save_ctx) { | 217 | int i; |
122 | dev_err(mbox->dev, "%s:\tno save\n", __func__); | 218 | int nr_regs; |
123 | return; | 219 | |
124 | } | 220 | if (mbox->intr_type) |
221 | nr_regs = OMAP4_MBOX_NR_REGS; | ||
222 | else | ||
223 | nr_regs = MBOX_NR_REGS; | ||
224 | for (i = 0; i < nr_regs; i++) { | ||
225 | mbox->ctx[i] = mbox_read_reg(mbox->parent, i * sizeof(u32)); | ||
125 | 226 | ||
126 | mbox->ops->save_ctx(mbox); | 227 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
228 | i, mbox->ctx[i]); | ||
229 | } | ||
127 | } | 230 | } |
128 | EXPORT_SYMBOL(omap_mbox_save_ctx); | 231 | EXPORT_SYMBOL(omap_mbox_save_ctx); |
129 | 232 | ||
130 | void omap_mbox_restore_ctx(struct omap_mbox *mbox) | 233 | void omap_mbox_restore_ctx(struct omap_mbox *mbox) |
131 | { | 234 | { |
132 | if (!mbox->ops->restore_ctx) { | 235 | int i; |
133 | dev_err(mbox->dev, "%s:\tno restore\n", __func__); | 236 | int nr_regs; |
134 | return; | ||
135 | } | ||
136 | 237 | ||
137 | mbox->ops->restore_ctx(mbox); | 238 | if (mbox->intr_type) |
239 | nr_regs = OMAP4_MBOX_NR_REGS; | ||
240 | else | ||
241 | nr_regs = MBOX_NR_REGS; | ||
242 | for (i = 0; i < nr_regs; i++) { | ||
243 | mbox_write_reg(mbox->parent, mbox->ctx[i], i * sizeof(u32)); | ||
244 | |||
245 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, | ||
246 | i, mbox->ctx[i]); | ||
247 | } | ||
138 | } | 248 | } |
139 | EXPORT_SYMBOL(omap_mbox_restore_ctx); | 249 | EXPORT_SYMBOL(omap_mbox_restore_ctx); |
140 | 250 | ||
141 | void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | 251 | void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
142 | { | 252 | { |
143 | mbox->ops->enable_irq(mbox, irq); | 253 | u32 l; |
254 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? | ||
255 | &mbox->tx_fifo : &mbox->rx_fifo; | ||
256 | u32 bit = fifo->intr_bit; | ||
257 | u32 irqenable = fifo->irqenable; | ||
258 | |||
259 | l = mbox_read_reg(mbox->parent, irqenable); | ||
260 | l |= bit; | ||
261 | mbox_write_reg(mbox->parent, l, irqenable); | ||
144 | } | 262 | } |
145 | EXPORT_SYMBOL(omap_mbox_enable_irq); | 263 | EXPORT_SYMBOL(omap_mbox_enable_irq); |
146 | 264 | ||
147 | void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | 265 | void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
148 | { | 266 | { |
149 | mbox->ops->disable_irq(mbox, irq); | 267 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
268 | &mbox->tx_fifo : &mbox->rx_fifo; | ||
269 | u32 bit = fifo->intr_bit; | ||
270 | u32 irqdisable = fifo->irqdisable; | ||
271 | |||
272 | /* | ||
273 | * Read and update the interrupt configuration register for pre-OMAP4. | ||
274 | * OMAP4 and later SoCs have a dedicated interrupt disabling register. | ||
275 | */ | ||
276 | if (!mbox->intr_type) | ||
277 | bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit; | ||
278 | |||
279 | mbox_write_reg(mbox->parent, bit, irqdisable); | ||
150 | } | 280 | } |
151 | EXPORT_SYMBOL(omap_mbox_disable_irq); | 281 | EXPORT_SYMBOL(omap_mbox_disable_irq); |
152 | 282 | ||
@@ -158,7 +288,7 @@ static void mbox_tx_tasklet(unsigned long tx_data) | |||
158 | int ret; | 288 | int ret; |
159 | 289 | ||
160 | while (kfifo_len(&mq->fifo)) { | 290 | while (kfifo_len(&mq->fifo)) { |
161 | if (__mbox_poll_for_space(mbox)) { | 291 | if (mbox_fifo_full(mbox)) { |
162 | omap_mbox_enable_irq(mbox, IRQ_TX); | 292 | omap_mbox_enable_irq(mbox, IRQ_TX); |
163 | break; | 293 | break; |
164 | } | 294 | } |
@@ -223,9 +353,6 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox) | |||
223 | 353 | ||
224 | len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); | 354 | len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); |
225 | WARN_ON(len != sizeof(msg)); | 355 | WARN_ON(len != sizeof(msg)); |
226 | |||
227 | if (mbox->ops->type == OMAP_MBOX_TYPE1) | ||
228 | break; | ||
229 | } | 356 | } |
230 | 357 | ||
231 | /* no more messages in the fifo. clear IRQ source. */ | 358 | /* no more messages in the fifo. clear IRQ source. */ |
@@ -283,16 +410,12 @@ static int omap_mbox_startup(struct omap_mbox *mbox) | |||
283 | { | 410 | { |
284 | int ret = 0; | 411 | int ret = 0; |
285 | struct omap_mbox_queue *mq; | 412 | struct omap_mbox_queue *mq; |
413 | struct omap_mbox_device *mdev = mbox->parent; | ||
286 | 414 | ||
287 | mutex_lock(&mbox_configured_lock); | 415 | mutex_lock(&mdev->cfg_lock); |
288 | if (!mbox_configured++) { | 416 | ret = pm_runtime_get_sync(mdev->dev); |
289 | if (likely(mbox->ops->startup)) { | 417 | if (unlikely(ret < 0)) |
290 | ret = mbox->ops->startup(mbox); | 418 | goto fail_startup; |
291 | if (unlikely(ret)) | ||
292 | goto fail_startup; | ||
293 | } else | ||
294 | goto fail_startup; | ||
295 | } | ||
296 | 419 | ||
297 | if (!mbox->use_count++) { | 420 | if (!mbox->use_count++) { |
298 | mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet); | 421 | mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet); |
@@ -319,7 +442,7 @@ static int omap_mbox_startup(struct omap_mbox *mbox) | |||
319 | 442 | ||
320 | omap_mbox_enable_irq(mbox, IRQ_RX); | 443 | omap_mbox_enable_irq(mbox, IRQ_RX); |
321 | } | 444 | } |
322 | mutex_unlock(&mbox_configured_lock); | 445 | mutex_unlock(&mdev->cfg_lock); |
323 | return 0; | 446 | return 0; |
324 | 447 | ||
325 | fail_request_irq: | 448 | fail_request_irq: |
@@ -327,18 +450,18 @@ fail_request_irq: | |||
327 | fail_alloc_rxq: | 450 | fail_alloc_rxq: |
328 | mbox_queue_free(mbox->txq); | 451 | mbox_queue_free(mbox->txq); |
329 | fail_alloc_txq: | 452 | fail_alloc_txq: |
330 | if (mbox->ops->shutdown) | 453 | pm_runtime_put_sync(mdev->dev); |
331 | mbox->ops->shutdown(mbox); | ||
332 | mbox->use_count--; | 454 | mbox->use_count--; |
333 | fail_startup: | 455 | fail_startup: |
334 | mbox_configured--; | 456 | mutex_unlock(&mdev->cfg_lock); |
335 | mutex_unlock(&mbox_configured_lock); | ||
336 | return ret; | 457 | return ret; |
337 | } | 458 | } |
338 | 459 | ||
339 | static void omap_mbox_fini(struct omap_mbox *mbox) | 460 | static void omap_mbox_fini(struct omap_mbox *mbox) |
340 | { | 461 | { |
341 | mutex_lock(&mbox_configured_lock); | 462 | struct omap_mbox_device *mdev = mbox->parent; |
463 | |||
464 | mutex_lock(&mdev->cfg_lock); | ||
342 | 465 | ||
343 | if (!--mbox->use_count) { | 466 | if (!--mbox->use_count) { |
344 | omap_mbox_disable_irq(mbox, IRQ_RX); | 467 | omap_mbox_disable_irq(mbox, IRQ_RX); |
@@ -349,28 +472,43 @@ static void omap_mbox_fini(struct omap_mbox *mbox) | |||
349 | mbox_queue_free(mbox->rxq); | 472 | mbox_queue_free(mbox->rxq); |
350 | } | 473 | } |
351 | 474 | ||
352 | if (likely(mbox->ops->shutdown)) { | 475 | pm_runtime_put_sync(mdev->dev); |
353 | if (!--mbox_configured) | ||
354 | mbox->ops->shutdown(mbox); | ||
355 | } | ||
356 | 476 | ||
357 | mutex_unlock(&mbox_configured_lock); | 477 | mutex_unlock(&mdev->cfg_lock); |
358 | } | 478 | } |
359 | 479 | ||
360 | struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) | 480 | static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev, |
481 | const char *mbox_name) | ||
361 | { | 482 | { |
362 | struct omap_mbox *_mbox, *mbox = NULL; | 483 | struct omap_mbox *_mbox, *mbox = NULL; |
363 | int i, ret; | 484 | struct omap_mbox **mboxes = mdev->mboxes; |
485 | int i; | ||
364 | 486 | ||
365 | if (!mboxes) | 487 | if (!mboxes) |
366 | return ERR_PTR(-EINVAL); | 488 | return NULL; |
367 | 489 | ||
368 | for (i = 0; (_mbox = mboxes[i]); i++) { | 490 | for (i = 0; (_mbox = mboxes[i]); i++) { |
369 | if (!strcmp(_mbox->name, name)) { | 491 | if (!strcmp(_mbox->name, mbox_name)) { |
370 | mbox = _mbox; | 492 | mbox = _mbox; |
371 | break; | 493 | break; |
372 | } | 494 | } |
373 | } | 495 | } |
496 | return mbox; | ||
497 | } | ||
498 | |||
499 | struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) | ||
500 | { | ||
501 | struct omap_mbox *mbox = NULL; | ||
502 | struct omap_mbox_device *mdev; | ||
503 | int ret; | ||
504 | |||
505 | mutex_lock(&omap_mbox_devices_lock); | ||
506 | list_for_each_entry(mdev, &omap_mbox_devices, elem) { | ||
507 | mbox = omap_mbox_device_find(mdev, name); | ||
508 | if (mbox) | ||
509 | break; | ||
510 | } | ||
511 | mutex_unlock(&omap_mbox_devices_lock); | ||
374 | 512 | ||
375 | if (!mbox) | 513 | if (!mbox) |
376 | return ERR_PTR(-ENOENT); | 514 | return ERR_PTR(-ENOENT); |
@@ -397,19 +535,20 @@ EXPORT_SYMBOL(omap_mbox_put); | |||
397 | 535 | ||
398 | static struct class omap_mbox_class = { .name = "mbox", }; | 536 | static struct class omap_mbox_class = { .name = "mbox", }; |
399 | 537 | ||
400 | int omap_mbox_register(struct device *parent, struct omap_mbox **list) | 538 | static int omap_mbox_register(struct omap_mbox_device *mdev) |
401 | { | 539 | { |
402 | int ret; | 540 | int ret; |
403 | int i; | 541 | int i; |
542 | struct omap_mbox **mboxes; | ||
404 | 543 | ||
405 | mboxes = list; | 544 | if (!mdev || !mdev->mboxes) |
406 | if (!mboxes) | ||
407 | return -EINVAL; | 545 | return -EINVAL; |
408 | 546 | ||
547 | mboxes = mdev->mboxes; | ||
409 | for (i = 0; mboxes[i]; i++) { | 548 | for (i = 0; mboxes[i]; i++) { |
410 | struct omap_mbox *mbox = mboxes[i]; | 549 | struct omap_mbox *mbox = mboxes[i]; |
411 | mbox->dev = device_create(&omap_mbox_class, | 550 | mbox->dev = device_create(&omap_mbox_class, |
412 | parent, 0, mbox, "%s", mbox->name); | 551 | mdev->dev, 0, mbox, "%s", mbox->name); |
413 | if (IS_ERR(mbox->dev)) { | 552 | if (IS_ERR(mbox->dev)) { |
414 | ret = PTR_ERR(mbox->dev); | 553 | ret = PTR_ERR(mbox->dev); |
415 | goto err_out; | 554 | goto err_out; |
@@ -417,6 +556,11 @@ int omap_mbox_register(struct device *parent, struct omap_mbox **list) | |||
417 | 556 | ||
418 | BLOCKING_INIT_NOTIFIER_HEAD(&mbox->notifier); | 557 | BLOCKING_INIT_NOTIFIER_HEAD(&mbox->notifier); |
419 | } | 558 | } |
559 | |||
560 | mutex_lock(&omap_mbox_devices_lock); | ||
561 | list_add(&mdev->elem, &omap_mbox_devices); | ||
562 | mutex_unlock(&omap_mbox_devices_lock); | ||
563 | |||
420 | return 0; | 564 | return 0; |
421 | 565 | ||
422 | err_out: | 566 | err_out: |
@@ -424,21 +568,148 @@ err_out: | |||
424 | device_unregister(mboxes[i]->dev); | 568 | device_unregister(mboxes[i]->dev); |
425 | return ret; | 569 | return ret; |
426 | } | 570 | } |
427 | EXPORT_SYMBOL(omap_mbox_register); | ||
428 | 571 | ||
429 | int omap_mbox_unregister(void) | 572 | static int omap_mbox_unregister(struct omap_mbox_device *mdev) |
430 | { | 573 | { |
431 | int i; | 574 | int i; |
575 | struct omap_mbox **mboxes; | ||
432 | 576 | ||
433 | if (!mboxes) | 577 | if (!mdev || !mdev->mboxes) |
434 | return -EINVAL; | 578 | return -EINVAL; |
435 | 579 | ||
580 | mutex_lock(&omap_mbox_devices_lock); | ||
581 | list_del(&mdev->elem); | ||
582 | mutex_unlock(&omap_mbox_devices_lock); | ||
583 | |||
584 | mboxes = mdev->mboxes; | ||
436 | for (i = 0; mboxes[i]; i++) | 585 | for (i = 0; mboxes[i]; i++) |
437 | device_unregister(mboxes[i]->dev); | 586 | device_unregister(mboxes[i]->dev); |
438 | mboxes = NULL; | ||
439 | return 0; | 587 | return 0; |
440 | } | 588 | } |
441 | EXPORT_SYMBOL(omap_mbox_unregister); | 589 | |
590 | static int omap_mbox_probe(struct platform_device *pdev) | ||
591 | { | ||
592 | struct resource *mem; | ||
593 | int ret; | ||
594 | struct omap_mbox **list, *mbox, *mboxblk; | ||
595 | struct omap_mbox_pdata *pdata = pdev->dev.platform_data; | ||
596 | struct omap_mbox_dev_info *info; | ||
597 | struct omap_mbox_device *mdev; | ||
598 | struct omap_mbox_fifo *fifo; | ||
599 | u32 intr_type; | ||
600 | u32 l; | ||
601 | int i; | ||
602 | |||
603 | if (!pdata || !pdata->info_cnt || !pdata->info) { | ||
604 | pr_err("%s: platform not supported\n", __func__); | ||
605 | return -ENODEV; | ||
606 | } | ||
607 | |||
608 | mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL); | ||
609 | if (!mdev) | ||
610 | return -ENOMEM; | ||
611 | |||
612 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
613 | mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem); | ||
614 | if (IS_ERR(mdev->mbox_base)) | ||
615 | return PTR_ERR(mdev->mbox_base); | ||
616 | |||
617 | /* allocate one extra for marking end of list */ | ||
618 | list = devm_kzalloc(&pdev->dev, (pdata->info_cnt + 1) * sizeof(*list), | ||
619 | GFP_KERNEL); | ||
620 | if (!list) | ||
621 | return -ENOMEM; | ||
622 | |||
623 | mboxblk = devm_kzalloc(&pdev->dev, pdata->info_cnt * sizeof(*mbox), | ||
624 | GFP_KERNEL); | ||
625 | if (!mboxblk) | ||
626 | return -ENOMEM; | ||
627 | |||
628 | info = pdata->info; | ||
629 | intr_type = pdata->intr_type; | ||
630 | mbox = mboxblk; | ||
631 | for (i = 0; i < pdata->info_cnt; i++, info++) { | ||
632 | fifo = &mbox->tx_fifo; | ||
633 | fifo->msg = MAILBOX_MESSAGE(info->tx_id); | ||
634 | fifo->fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id); | ||
635 | fifo->intr_bit = MAILBOX_IRQ_NOTFULL(info->tx_id); | ||
636 | fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id); | ||
637 | fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id); | ||
638 | fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id); | ||
639 | |||
640 | fifo = &mbox->rx_fifo; | ||
641 | fifo->msg = MAILBOX_MESSAGE(info->rx_id); | ||
642 | fifo->msg_stat = MAILBOX_MSGSTATUS(info->rx_id); | ||
643 | fifo->intr_bit = MAILBOX_IRQ_NEWMSG(info->rx_id); | ||
644 | fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id); | ||
645 | fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id); | ||
646 | fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id); | ||
647 | |||
648 | mbox->intr_type = intr_type; | ||
649 | |||
650 | mbox->parent = mdev; | ||
651 | mbox->name = info->name; | ||
652 | mbox->irq = platform_get_irq(pdev, info->irq_id); | ||
653 | if (mbox->irq < 0) | ||
654 | return mbox->irq; | ||
655 | list[i] = mbox++; | ||
656 | } | ||
657 | |||
658 | mutex_init(&mdev->cfg_lock); | ||
659 | mdev->dev = &pdev->dev; | ||
660 | mdev->num_users = pdata->num_users; | ||
661 | mdev->num_fifos = pdata->num_fifos; | ||
662 | mdev->mboxes = list; | ||
663 | ret = omap_mbox_register(mdev); | ||
664 | if (ret) | ||
665 | return ret; | ||
666 | |||
667 | platform_set_drvdata(pdev, mdev); | ||
668 | pm_runtime_enable(mdev->dev); | ||
669 | |||
670 | ret = pm_runtime_get_sync(mdev->dev); | ||
671 | if (ret < 0) { | ||
672 | pm_runtime_put_noidle(mdev->dev); | ||
673 | goto unregister; | ||
674 | } | ||
675 | |||
676 | /* | ||
677 | * just print the raw revision register, the format is not | ||
678 | * uniform across all SoCs | ||
679 | */ | ||
680 | l = mbox_read_reg(mdev, MAILBOX_REVISION); | ||
681 | dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l); | ||
682 | |||
683 | ret = pm_runtime_put_sync(mdev->dev); | ||
684 | if (ret < 0) | ||
685 | goto unregister; | ||
686 | |||
687 | return 0; | ||
688 | |||
689 | unregister: | ||
690 | pm_runtime_disable(mdev->dev); | ||
691 | omap_mbox_unregister(mdev); | ||
692 | return ret; | ||
693 | } | ||
694 | |||
695 | static int omap_mbox_remove(struct platform_device *pdev) | ||
696 | { | ||
697 | struct omap_mbox_device *mdev = platform_get_drvdata(pdev); | ||
698 | |||
699 | pm_runtime_disable(mdev->dev); | ||
700 | omap_mbox_unregister(mdev); | ||
701 | |||
702 | return 0; | ||
703 | } | ||
704 | |||
705 | static struct platform_driver omap_mbox_driver = { | ||
706 | .probe = omap_mbox_probe, | ||
707 | .remove = omap_mbox_remove, | ||
708 | .driver = { | ||
709 | .name = "omap-mailbox", | ||
710 | .owner = THIS_MODULE, | ||
711 | }, | ||
712 | }; | ||
442 | 713 | ||
443 | static int __init omap_mbox_init(void) | 714 | static int __init omap_mbox_init(void) |
444 | { | 715 | { |
@@ -453,12 +724,13 @@ static int __init omap_mbox_init(void) | |||
453 | mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size, | 724 | mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size, |
454 | sizeof(mbox_msg_t)); | 725 | sizeof(mbox_msg_t)); |
455 | 726 | ||
456 | return 0; | 727 | return platform_driver_register(&omap_mbox_driver); |
457 | } | 728 | } |
458 | subsys_initcall(omap_mbox_init); | 729 | subsys_initcall(omap_mbox_init); |
459 | 730 | ||
460 | static void __exit omap_mbox_exit(void) | 731 | static void __exit omap_mbox_exit(void) |
461 | { | 732 | { |
733 | platform_driver_unregister(&omap_mbox_driver); | ||
462 | class_unregister(&omap_mbox_class); | 734 | class_unregister(&omap_mbox_class); |
463 | } | 735 | } |
464 | module_exit(omap_mbox_exit); | 736 | module_exit(omap_mbox_exit); |