aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/macintosh/smu.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/macintosh/smu.c')
-rw-r--r--drivers/macintosh/smu.c1032
1 files changed, 893 insertions, 139 deletions
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index fb535737d17d..9b38674fbf75 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -8,21 +8,15 @@
8 */ 8 */
9 9
10/* 10/*
11 * For now, this driver includes:
12 * - RTC get & set
13 * - reboot & shutdown commands
14 * all synchronous with IRQ disabled (ugh)
15 *
16 * TODO: 11 * TODO:
17 * rework in a way the PMU driver works, that is asynchronous 12 * - maybe add timeout to commands ?
18 * with a queue of commands. I'll do that as soon as I have an 13 * - blocking version of time functions
19 * SMU based machine at hand. Some more cleanup is needed too, 14 * - polling version of i2c commands (including timer that works with
20 * like maybe fitting it into a platform device, etc... 15 * interrutps off)
21 * Also check what's up with cache coherency, and if we really 16 * - maybe avoid some data copies with i2c by directly using the smu cmd
22 * can't do better than flushing the cache, maybe build a table 17 * buffer and a lower level internal interface
23 * of command len/reply len like the PMU driver to only flush 18 * - understand SMU -> CPU events and implement reception of them via
24 * what is actually necessary. 19 * the userland interface
25 * --BenH.
26 */ 20 */
27 21
28#include <linux/config.h> 22#include <linux/config.h>
@@ -36,6 +30,11 @@
36#include <linux/jiffies.h> 30#include <linux/jiffies.h>
37#include <linux/interrupt.h> 31#include <linux/interrupt.h>
38#include <linux/rtc.h> 32#include <linux/rtc.h>
33#include <linux/completion.h>
34#include <linux/miscdevice.h>
35#include <linux/delay.h>
36#include <linux/sysdev.h>
37#include <linux/poll.h>
39 38
40#include <asm/byteorder.h> 39#include <asm/byteorder.h>
41#include <asm/io.h> 40#include <asm/io.h>
@@ -45,8 +44,13 @@
45#include <asm/smu.h> 44#include <asm/smu.h>
46#include <asm/sections.h> 45#include <asm/sections.h>
47#include <asm/abs_addr.h> 46#include <asm/abs_addr.h>
47#include <asm/uaccess.h>
48#include <asm/of_device.h>
49
50#define VERSION "0.6"
51#define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
48 52
49#define DEBUG_SMU 1 53#undef DEBUG_SMU
50 54
51#ifdef DEBUG_SMU 55#ifdef DEBUG_SMU
52#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) 56#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
@@ -57,20 +61,30 @@
57/* 61/*
58 * This is the command buffer passed to the SMU hardware 62 * This is the command buffer passed to the SMU hardware
59 */ 63 */
64#define SMU_MAX_DATA 254
65
60struct smu_cmd_buf { 66struct smu_cmd_buf {
61 u8 cmd; 67 u8 cmd;
62 u8 length; 68 u8 length;
63 u8 data[0x0FFE]; 69 u8 data[SMU_MAX_DATA];
64}; 70};
65 71
66struct smu_device { 72struct smu_device {
67 spinlock_t lock; 73 spinlock_t lock;
68 struct device_node *of_node; 74 struct device_node *of_node;
69 int db_ack; /* doorbell ack GPIO */ 75 struct of_device *of_dev;
70 int db_req; /* doorbell req GPIO */ 76 int doorbell; /* doorbell gpio */
71 u32 __iomem *db_buf; /* doorbell buffer */ 77 u32 __iomem *db_buf; /* doorbell buffer */
78 int db_irq;
79 int msg;
80 int msg_irq;
72 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ 81 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
73 u32 cmd_buf_abs; /* command buffer absolute */ 82 u32 cmd_buf_abs; /* command buffer absolute */
83 struct list_head cmd_list;
84 struct smu_cmd *cmd_cur; /* pending command */
85 struct list_head cmd_i2c_list;
86 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
87 struct timer_list i2c_timer;
74}; 88};
75 89
76/* 90/*
@@ -79,113 +93,245 @@ struct smu_device {
79 */ 93 */
80static struct smu_device *smu; 94static struct smu_device *smu;
81 95
96
82/* 97/*
83 * SMU low level communication stuff 98 * SMU driver low level stuff
84 */ 99 */
85static inline int smu_cmd_stat(struct smu_cmd_buf *cmd_buf, u8 cmd_ack)
86{
87 rmb();
88 return cmd_buf->cmd == cmd_ack && cmd_buf->length != 0;
89}
90 100
91static inline u8 smu_save_ack_cmd(struct smu_cmd_buf *cmd_buf) 101static void smu_start_cmd(void)
92{ 102{
93 return (~cmd_buf->cmd) & 0xff; 103 unsigned long faddr, fend;
94} 104 struct smu_cmd *cmd;
95 105
96static void smu_send_cmd(struct smu_device *dev) 106 if (list_empty(&smu->cmd_list))
97{ 107 return;
98 /* SMU command buf is currently cacheable, we need a physical 108
99 * address. This isn't exactly a DMA mapping here, I suspect 109 /* Fetch first command in queue */
110 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
111 smu->cmd_cur = cmd;
112 list_del(&cmd->link);
113
114 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
115 cmd->data_len);
116 DPRINTK("SMU: data buffer: %02x %02x %02x %02x ...\n",
117 ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
118 ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3]);
119
120 /* Fill the SMU command buffer */
121 smu->cmd_buf->cmd = cmd->cmd;
122 smu->cmd_buf->length = cmd->data_len;
123 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
124
125 /* Flush command and data to RAM */
126 faddr = (unsigned long)smu->cmd_buf;
127 fend = faddr + smu->cmd_buf->length + 2;
128 flush_inval_dcache_range(faddr, fend);
129
130 /* This isn't exactly a DMA mapping here, I suspect
100 * the SMU is actually communicating with us via i2c to the 131 * the SMU is actually communicating with us via i2c to the
101 * northbridge or the CPU to access RAM. 132 * northbridge or the CPU to access RAM.
102 */ 133 */
103 writel(dev->cmd_buf_abs, dev->db_buf); 134 writel(smu->cmd_buf_abs, smu->db_buf);
104 135
105 /* Ring the SMU doorbell */ 136 /* Ring the SMU doorbell */
106 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, dev->db_req, 4); 137 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
107 pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, dev->db_req, 4);
108} 138}
109 139
110static int smu_cmd_done(struct smu_device *dev) 140
141static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs)
111{ 142{
112 unsigned long wait = 0; 143 unsigned long flags;
113 int gpio; 144 struct smu_cmd *cmd;
145 void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
146 void *misc = NULL;
147 u8 gpio;
148 int rc = 0;
114 149
115 /* Check the SMU doorbell */ 150 /* SMU completed the command, well, we hope, let's make sure
116 do { 151 * of it
117 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, 152 */
118 NULL, dev->db_ack); 153 spin_lock_irqsave(&smu->lock, flags);
119 if ((gpio & 7) == 7)
120 return 0;
121 udelay(100);
122 } while(++wait < 10000);
123 154
124 printk(KERN_ERR "SMU timeout !\n"); 155 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
125 return -ENXIO; 156 if ((gpio & 7) != 7) {
157 spin_unlock_irqrestore(&smu->lock, flags);
158 return IRQ_HANDLED;
159 }
160
161 cmd = smu->cmd_cur;
162 smu->cmd_cur = NULL;
163 if (cmd == NULL)
164 goto bail;
165
166 if (rc == 0) {
167 unsigned long faddr;
168 int reply_len;
169 u8 ack;
170
171 /* CPU might have brought back the cache line, so we need
172 * to flush again before peeking at the SMU response. We
173 * flush the entire buffer for now as we haven't read the
174 * reply lenght (it's only 2 cache lines anyway)
175 */
176 faddr = (unsigned long)smu->cmd_buf;
177 flush_inval_dcache_range(faddr, faddr + 256);
178
179 /* Now check ack */
180 ack = (~cmd->cmd) & 0xff;
181 if (ack != smu->cmd_buf->cmd) {
182 DPRINTK("SMU: incorrect ack, want %x got %x\n",
183 ack, smu->cmd_buf->cmd);
184 rc = -EIO;
185 }
186 reply_len = rc == 0 ? smu->cmd_buf->length : 0;
187 DPRINTK("SMU: reply len: %d\n", reply_len);
188 if (reply_len > cmd->reply_len) {
189 printk(KERN_WARNING "SMU: reply buffer too small,"
190 "got %d bytes for a %d bytes buffer\n",
191 reply_len, cmd->reply_len);
192 reply_len = cmd->reply_len;
193 }
194 cmd->reply_len = reply_len;
195 if (cmd->reply_buf && reply_len)
196 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
197 }
198
199 /* Now complete the command. Write status last in order as we lost
200 * ownership of the command structure as soon as it's no longer -1
201 */
202 done = cmd->done;
203 misc = cmd->misc;
204 mb();
205 cmd->status = rc;
206 bail:
207 /* Start next command if any */
208 smu_start_cmd();
209 spin_unlock_irqrestore(&smu->lock, flags);
210
211 /* Call command completion handler if any */
212 if (done)
213 done(cmd, misc);
214
215 /* It's an edge interrupt, nothing to do */
216 return IRQ_HANDLED;
126} 217}
127 218
128static int smu_do_cmd(struct smu_device *dev) 219
220static irqreturn_t smu_msg_intr(int irq, void *arg, struct pt_regs *regs)
129{ 221{
130 int rc; 222 /* I don't quite know what to do with this one, we seem to never
131 u8 cmd_ack; 223 * receive it, so I suspect we have to arm it someway in the SMU
224 * to start getting events that way.
225 */
132 226
133 DPRINTK("SMU do_cmd %02x len=%d %02x\n", 227 printk(KERN_INFO "SMU: message interrupt !\n");
134 dev->cmd_buf->cmd, dev->cmd_buf->length,
135 dev->cmd_buf->data[0]);
136 228
137 cmd_ack = smu_save_ack_cmd(dev->cmd_buf); 229 /* It's an edge interrupt, nothing to do */
230 return IRQ_HANDLED;
231}
138 232
139 /* Clear cmd_buf cache lines */
140 flush_inval_dcache_range((unsigned long)dev->cmd_buf,
141 ((unsigned long)dev->cmd_buf) +
142 sizeof(struct smu_cmd_buf));
143 smu_send_cmd(dev);
144 rc = smu_cmd_done(dev);
145 if (rc == 0)
146 rc = smu_cmd_stat(dev->cmd_buf, cmd_ack) ? 0 : -1;
147 233
148 DPRINTK("SMU do_cmd %02x len=%d %02x => %d (%02x)\n", 234/*
149 dev->cmd_buf->cmd, dev->cmd_buf->length, 235 * Queued command management.
150 dev->cmd_buf->data[0], rc, cmd_ack); 236 *
237 */
238
239int smu_queue_cmd(struct smu_cmd *cmd)
240{
241 unsigned long flags;
151 242
152 return rc; 243 if (smu == NULL)
244 return -ENODEV;
245 if (cmd->data_len > SMU_MAX_DATA ||
246 cmd->reply_len > SMU_MAX_DATA)
247 return -EINVAL;
248
249 cmd->status = 1;
250 spin_lock_irqsave(&smu->lock, flags);
251 list_add_tail(&cmd->link, &smu->cmd_list);
252 if (smu->cmd_cur == NULL)
253 smu_start_cmd();
254 spin_unlock_irqrestore(&smu->lock, flags);
255
256 return 0;
153} 257}
258EXPORT_SYMBOL(smu_queue_cmd);
154 259
155/* RTC low level commands */ 260
156static inline int bcd2hex (int n) 261int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
262 unsigned int data_len,
263 void (*done)(struct smu_cmd *cmd, void *misc),
264 void *misc, ...)
157{ 265{
158 return (((n & 0xf0) >> 4) * 10) + (n & 0xf); 266 struct smu_cmd *cmd = &scmd->cmd;
267 va_list list;
268 int i;
269
270 if (data_len > sizeof(scmd->buffer))
271 return -EINVAL;
272
273 memset(scmd, 0, sizeof(*scmd));
274 cmd->cmd = command;
275 cmd->data_len = data_len;
276 cmd->data_buf = scmd->buffer;
277 cmd->reply_len = sizeof(scmd->buffer);
278 cmd->reply_buf = scmd->buffer;
279 cmd->done = done;
280 cmd->misc = misc;
281
282 va_start(list, misc);
283 for (i = 0; i < data_len; ++i)
284 scmd->buffer[i] = (u8)va_arg(list, int);
285 va_end(list);
286
287 return smu_queue_cmd(cmd);
159} 288}
289EXPORT_SYMBOL(smu_queue_simple);
160 290
161static inline int hex2bcd (int n) 291
292void smu_poll(void)
162{ 293{
163 return ((n / 10) << 4) + (n % 10); 294 u8 gpio;
295
296 if (smu == NULL)
297 return;
298
299 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
300 if ((gpio & 7) == 7)
301 smu_db_intr(smu->db_irq, smu, NULL);
164} 302}
303EXPORT_SYMBOL(smu_poll);
165 304
166#if 0 305
167static inline void smu_fill_set_pwrup_timer_cmd(struct smu_cmd_buf *cmd_buf) 306void smu_done_complete(struct smu_cmd *cmd, void *misc)
168{ 307{
169 cmd_buf->cmd = 0x8e; 308 struct completion *comp = misc;
170 cmd_buf->length = 8; 309
171 cmd_buf->data[0] = 0x00; 310 complete(comp);
172 memset(cmd_buf->data + 1, 0, 7);
173} 311}
312EXPORT_SYMBOL(smu_done_complete);
313
174 314
175static inline void smu_fill_get_pwrup_timer_cmd(struct smu_cmd_buf *cmd_buf) 315void smu_spinwait_cmd(struct smu_cmd *cmd)
176{ 316{
177 cmd_buf->cmd = 0x8e; 317 while(cmd->status == 1)
178 cmd_buf->length = 1; 318 smu_poll();
179 cmd_buf->data[0] = 0x01;
180} 319}
320EXPORT_SYMBOL(smu_spinwait_cmd);
321
181 322
182static inline void smu_fill_dis_pwrup_timer_cmd(struct smu_cmd_buf *cmd_buf) 323/* RTC low level commands */
324static inline int bcd2hex (int n)
183{ 325{
184 cmd_buf->cmd = 0x8e; 326 return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
185 cmd_buf->length = 1;
186 cmd_buf->data[0] = 0x02;
187} 327}
188#endif 328
329
330static inline int hex2bcd (int n)
331{
332 return ((n / 10) << 4) + (n % 10);
333}
334
189 335
190static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, 336static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
191 struct rtc_time *time) 337 struct rtc_time *time)
@@ -202,100 +348,96 @@ static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
202 cmd_buf->data[7] = hex2bcd(time->tm_year - 100); 348 cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
203} 349}
204 350
205static inline void smu_fill_get_rtc_cmd(struct smu_cmd_buf *cmd_buf)
206{
207 cmd_buf->cmd = 0x8e;
208 cmd_buf->length = 1;
209 cmd_buf->data[0] = 0x81;
210}
211 351
212static void smu_parse_get_rtc_reply(struct smu_cmd_buf *cmd_buf, 352int smu_get_rtc_time(struct rtc_time *time, int spinwait)
213 struct rtc_time *time)
214{ 353{
215 time->tm_sec = bcd2hex(cmd_buf->data[0]); 354 struct smu_simple_cmd cmd;
216 time->tm_min = bcd2hex(cmd_buf->data[1]);
217 time->tm_hour = bcd2hex(cmd_buf->data[2]);
218 time->tm_wday = bcd2hex(cmd_buf->data[3]);
219 time->tm_mday = bcd2hex(cmd_buf->data[4]);
220 time->tm_mon = bcd2hex(cmd_buf->data[5]) - 1;
221 time->tm_year = bcd2hex(cmd_buf->data[6]) + 100;
222}
223
224int smu_get_rtc_time(struct rtc_time *time)
225{
226 unsigned long flags;
227 int rc; 355 int rc;
228 356
229 if (smu == NULL) 357 if (smu == NULL)
230 return -ENODEV; 358 return -ENODEV;
231 359
232 memset(time, 0, sizeof(struct rtc_time)); 360 memset(time, 0, sizeof(struct rtc_time));
233 spin_lock_irqsave(&smu->lock, flags); 361 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
234 smu_fill_get_rtc_cmd(smu->cmd_buf); 362 SMU_CMD_RTC_GET_DATETIME);
235 rc = smu_do_cmd(smu); 363 if (rc)
236 if (rc == 0) 364 return rc;
237 smu_parse_get_rtc_reply(smu->cmd_buf, time); 365 smu_spinwait_simple(&cmd);
238 spin_unlock_irqrestore(&smu->lock, flags);
239 366
240 return rc; 367 time->tm_sec = bcd2hex(cmd.buffer[0]);
368 time->tm_min = bcd2hex(cmd.buffer[1]);
369 time->tm_hour = bcd2hex(cmd.buffer[2]);
370 time->tm_wday = bcd2hex(cmd.buffer[3]);
371 time->tm_mday = bcd2hex(cmd.buffer[4]);
372 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
373 time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
374
375 return 0;
241} 376}
242 377
243int smu_set_rtc_time(struct rtc_time *time) 378
379int smu_set_rtc_time(struct rtc_time *time, int spinwait)
244{ 380{
245 unsigned long flags; 381 struct smu_simple_cmd cmd;
246 int rc; 382 int rc;
247 383
248 if (smu == NULL) 384 if (smu == NULL)
249 return -ENODEV; 385 return -ENODEV;
250 386
251 spin_lock_irqsave(&smu->lock, flags); 387 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
252 smu_fill_set_rtc_cmd(smu->cmd_buf, time); 388 SMU_CMD_RTC_SET_DATETIME,
253 rc = smu_do_cmd(smu); 389 hex2bcd(time->tm_sec),
254 spin_unlock_irqrestore(&smu->lock, flags); 390 hex2bcd(time->tm_min),
391 hex2bcd(time->tm_hour),
392 time->tm_wday,
393 hex2bcd(time->tm_mday),
394 hex2bcd(time->tm_mon) + 1,
395 hex2bcd(time->tm_year - 100));
396 if (rc)
397 return rc;
398 smu_spinwait_simple(&cmd);
255 399
256 return rc; 400 return 0;
257} 401}
258 402
403
259void smu_shutdown(void) 404void smu_shutdown(void)
260{ 405{
261 const unsigned char *command = "SHUTDOWN"; 406 struct smu_simple_cmd cmd;
262 unsigned long flags;
263 407
264 if (smu == NULL) 408 if (smu == NULL)
265 return; 409 return;
266 410
267 spin_lock_irqsave(&smu->lock, flags); 411 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
268 smu->cmd_buf->cmd = 0xaa; 412 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
269 smu->cmd_buf->length = strlen(command); 413 return;
270 strcpy(smu->cmd_buf->data, command); 414 smu_spinwait_simple(&cmd);
271 smu_do_cmd(smu);
272 for (;;) 415 for (;;)
273 ; 416 ;
274 spin_unlock_irqrestore(&smu->lock, flags);
275} 417}
276 418
419
277void smu_restart(void) 420void smu_restart(void)
278{ 421{
279 const unsigned char *command = "RESTART"; 422 struct smu_simple_cmd cmd;
280 unsigned long flags;
281 423
282 if (smu == NULL) 424 if (smu == NULL)
283 return; 425 return;
284 426
285 spin_lock_irqsave(&smu->lock, flags); 427 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
286 smu->cmd_buf->cmd = 0xaa; 428 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
287 smu->cmd_buf->length = strlen(command); 429 return;
288 strcpy(smu->cmd_buf->data, command); 430 smu_spinwait_simple(&cmd);
289 smu_do_cmd(smu);
290 for (;;) 431 for (;;)
291 ; 432 ;
292 spin_unlock_irqrestore(&smu->lock, flags);
293} 433}
294 434
435
295int smu_present(void) 436int smu_present(void)
296{ 437{
297 return smu != NULL; 438 return smu != NULL;
298} 439}
440EXPORT_SYMBOL(smu_present);
299 441
300 442
301int smu_init (void) 443int smu_init (void)
@@ -307,6 +449,8 @@ int smu_init (void)
307 if (np == NULL) 449 if (np == NULL)
308 return -ENODEV; 450 return -ENODEV;
309 451
452 printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR);
453
310 if (smu_cmdbuf_abs == 0) { 454 if (smu_cmdbuf_abs == 0) {
311 printk(KERN_ERR "SMU: Command buffer not allocated !\n"); 455 printk(KERN_ERR "SMU: Command buffer not allocated !\n");
312 return -EINVAL; 456 return -EINVAL;
@@ -318,7 +462,13 @@ int smu_init (void)
318 memset(smu, 0, sizeof(*smu)); 462 memset(smu, 0, sizeof(*smu));
319 463
320 spin_lock_init(&smu->lock); 464 spin_lock_init(&smu->lock);
465 INIT_LIST_HEAD(&smu->cmd_list);
466 INIT_LIST_HEAD(&smu->cmd_i2c_list);
321 smu->of_node = np; 467 smu->of_node = np;
468 smu->db_irq = NO_IRQ;
469 smu->msg_irq = NO_IRQ;
470 init_timer(&smu->i2c_timer);
471
322 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a 472 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
323 * 32 bits value safely 473 * 32 bits value safely
324 */ 474 */
@@ -331,8 +481,8 @@ int smu_init (void)
331 goto fail; 481 goto fail;
332 } 482 }
333 data = (u32 *)get_property(np, "reg", NULL); 483 data = (u32 *)get_property(np, "reg", NULL);
334 of_node_put(np);
335 if (data == NULL) { 484 if (data == NULL) {
485 of_node_put(np);
336 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); 486 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
337 goto fail; 487 goto fail;
338 } 488 }
@@ -341,8 +491,31 @@ int smu_init (void)
341 * and ack. GPIOs are at 0x50, best would be to find that out 491 * and ack. GPIOs are at 0x50, best would be to find that out
342 * in the device-tree though. 492 * in the device-tree though.
343 */ 493 */
344 smu->db_req = 0x50 + *data; 494 smu->doorbell = *data;
345 smu->db_ack = 0x50 + *data; 495 if (smu->doorbell < 0x50)
496 smu->doorbell += 0x50;
497 if (np->n_intrs > 0)
498 smu->db_irq = np->intrs[0].line;
499
500 of_node_put(np);
501
502 /* Now look for the smu-interrupt GPIO */
503 do {
504 np = of_find_node_by_name(NULL, "smu-interrupt");
505 if (np == NULL)
506 break;
507 data = (u32 *)get_property(np, "reg", NULL);
508 if (data == NULL) {
509 of_node_put(np);
510 break;
511 }
512 smu->msg = *data;
513 if (smu->msg < 0x50)
514 smu->msg += 0x50;
515 if (np->n_intrs > 0)
516 smu->msg_irq = np->intrs[0].line;
517 of_node_put(np);
518 } while(0);
346 519
347 /* Doorbell buffer is currently hard-coded, I didn't find a proper 520 /* Doorbell buffer is currently hard-coded, I didn't find a proper
348 * device-tree entry giving the address. Best would probably to use 521 * device-tree entry giving the address. Best would probably to use
@@ -362,3 +535,584 @@ int smu_init (void)
362 return -ENXIO; 535 return -ENXIO;
363 536
364} 537}
538
539
540static int smu_late_init(void)
541{
542 if (!smu)
543 return 0;
544
545 /*
546 * Try to request the interrupts
547 */
548
549 if (smu->db_irq != NO_IRQ) {
550 if (request_irq(smu->db_irq, smu_db_intr,
551 SA_SHIRQ, "SMU doorbell", smu) < 0) {
552 printk(KERN_WARNING "SMU: can't "
553 "request interrupt %d\n",
554 smu->db_irq);
555 smu->db_irq = NO_IRQ;
556 }
557 }
558
559 if (smu->msg_irq != NO_IRQ) {
560 if (request_irq(smu->msg_irq, smu_msg_intr,
561 SA_SHIRQ, "SMU message", smu) < 0) {
562 printk(KERN_WARNING "SMU: can't "
563 "request interrupt %d\n",
564 smu->msg_irq);
565 smu->msg_irq = NO_IRQ;
566 }
567 }
568
569 return 0;
570}
571arch_initcall(smu_late_init);
572
573/*
574 * sysfs visibility
575 */
576
577static void smu_expose_childs(void *unused)
578{
579 struct device_node *np;
580
581 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) {
582 if (device_is_compatible(np, "smu-i2c")) {
583 char name[32];
584 u32 *reg = (u32 *)get_property(np, "reg", NULL);
585
586 if (reg == NULL)
587 continue;
588 sprintf(name, "smu-i2c-%02x", *reg);
589 of_platform_device_create(np, name, &smu->of_dev->dev);
590 }
591 }
592
593}
594
595static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL);
596
597static int smu_platform_probe(struct of_device* dev,
598 const struct of_device_id *match)
599{
600 if (!smu)
601 return -ENODEV;
602 smu->of_dev = dev;
603
604 /*
605 * Ok, we are matched, now expose all i2c busses. We have to defer
606 * that unfortunately or it would deadlock inside the device model
607 */
608 schedule_work(&smu_expose_childs_work);
609
610 return 0;
611}
612
613static struct of_device_id smu_platform_match[] =
614{
615 {
616 .type = "smu",
617 },
618 {},
619};
620
621static struct of_platform_driver smu_of_platform_driver =
622{
623 .name = "smu",
624 .match_table = smu_platform_match,
625 .probe = smu_platform_probe,
626};
627
628static int __init smu_init_sysfs(void)
629{
630 int rc;
631
632 /*
633 * Due to sysfs bogosity, a sysdev is not a real device, so
634 * we should in fact create both if we want sysdev semantics
635 * for power management.
636 * For now, we don't power manage machines with an SMU chip,
637 * I'm a bit too far from figuring out how that works with those
638 * new chipsets, but that will come back and bite us
639 */
640 rc = of_register_driver(&smu_of_platform_driver);
641 return 0;
642}
643
644device_initcall(smu_init_sysfs);
645
646struct of_device *smu_get_ofdev(void)
647{
648 if (!smu)
649 return NULL;
650 return smu->of_dev;
651}
652
653EXPORT_SYMBOL_GPL(smu_get_ofdev);
654
655/*
656 * i2c interface
657 */
658
659static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
660{
661 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
662 void *misc = cmd->misc;
663 unsigned long flags;
664
665 /* Check for read case */
666 if (!fail && cmd->read) {
667 if (cmd->pdata[0] < 1)
668 fail = 1;
669 else
670 memcpy(cmd->info.data, &cmd->pdata[1],
671 cmd->info.datalen);
672 }
673
674 DPRINTK("SMU: completing, success: %d\n", !fail);
675
676 /* Update status and mark no pending i2c command with lock
677 * held so nobody comes in while we dequeue an eventual
678 * pending next i2c command
679 */
680 spin_lock_irqsave(&smu->lock, flags);
681 smu->cmd_i2c_cur = NULL;
682 wmb();
683 cmd->status = fail ? -EIO : 0;
684
685 /* Is there another i2c command waiting ? */
686 if (!list_empty(&smu->cmd_i2c_list)) {
687 struct smu_i2c_cmd *newcmd;
688
689 /* Fetch it, new current, remove from list */
690 newcmd = list_entry(smu->cmd_i2c_list.next,
691 struct smu_i2c_cmd, link);
692 smu->cmd_i2c_cur = newcmd;
693 list_del(&cmd->link);
694
695 /* Queue with low level smu */
696 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
697 if (smu->cmd_cur == NULL)
698 smu_start_cmd();
699 }
700 spin_unlock_irqrestore(&smu->lock, flags);
701
702 /* Call command completion handler if any */
703 if (done)
704 done(cmd, misc);
705
706}
707
708
709static void smu_i2c_retry(unsigned long data)
710{
711 struct smu_i2c_cmd *cmd = (struct smu_i2c_cmd *)data;
712
713 DPRINTK("SMU: i2c failure, requeuing...\n");
714
715 /* requeue command simply by resetting reply_len */
716 cmd->pdata[0] = 0xff;
717 cmd->scmd.reply_len = 0x10;
718 smu_queue_cmd(&cmd->scmd);
719}
720
721
722static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
723{
724 struct smu_i2c_cmd *cmd = misc;
725 int fail = 0;
726
727 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
728 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
729
730 /* Check for possible status */
731 if (scmd->status < 0)
732 fail = 1;
733 else if (cmd->read) {
734 if (cmd->stage == 0)
735 fail = cmd->pdata[0] != 0;
736 else
737 fail = cmd->pdata[0] >= 0x80;
738 } else {
739 fail = cmd->pdata[0] != 0;
740 }
741
742 /* Handle failures by requeuing command, after 5ms interval
743 */
744 if (fail && --cmd->retries > 0) {
745 DPRINTK("SMU: i2c failure, starting timer...\n");
746 smu->i2c_timer.function = smu_i2c_retry;
747 smu->i2c_timer.data = (unsigned long)cmd;
748 smu->i2c_timer.expires = jiffies + msecs_to_jiffies(5);
749 add_timer(&smu->i2c_timer);
750 return;
751 }
752
753 /* If failure or stage 1, command is complete */
754 if (fail || cmd->stage != 0) {
755 smu_i2c_complete_command(cmd, fail);
756 return;
757 }
758
759 DPRINTK("SMU: going to stage 1\n");
760
761 /* Ok, initial command complete, now poll status */
762 scmd->reply_buf = cmd->pdata;
763 scmd->reply_len = 0x10;
764 scmd->data_buf = cmd->pdata;
765 scmd->data_len = 1;
766 cmd->pdata[0] = 0;
767 cmd->stage = 1;
768 cmd->retries = 20;
769 smu_queue_cmd(scmd);
770}
771
772
773int smu_queue_i2c(struct smu_i2c_cmd *cmd)
774{
775 unsigned long flags;
776
777 if (smu == NULL)
778 return -ENODEV;
779
780 /* Fill most fields of scmd */
781 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
782 cmd->scmd.done = smu_i2c_low_completion;
783 cmd->scmd.misc = cmd;
784 cmd->scmd.reply_buf = cmd->pdata;
785 cmd->scmd.reply_len = 0x10;
786 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
787 cmd->scmd.status = 1;
788 cmd->stage = 0;
789 cmd->pdata[0] = 0xff;
790 cmd->retries = 20;
791 cmd->status = 1;
792
793 /* Check transfer type, sanitize some "info" fields
794 * based on transfer type and do more checking
795 */
796 cmd->info.caddr = cmd->info.devaddr;
797 cmd->read = cmd->info.devaddr & 0x01;
798 switch(cmd->info.type) {
799 case SMU_I2C_TRANSFER_SIMPLE:
800 memset(&cmd->info.sublen, 0, 4);
801 break;
802 case SMU_I2C_TRANSFER_COMBINED:
803 cmd->info.devaddr &= 0xfe;
804 case SMU_I2C_TRANSFER_STDSUB:
805 if (cmd->info.sublen > 3)
806 return -EINVAL;
807 break;
808 default:
809 return -EINVAL;
810 }
811
812 /* Finish setting up command based on transfer direction
813 */
814 if (cmd->read) {
815 if (cmd->info.datalen > SMU_I2C_READ_MAX)
816 return -EINVAL;
817 memset(cmd->info.data, 0xff, cmd->info.datalen);
818 cmd->scmd.data_len = 9;
819 } else {
820 if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
821 return -EINVAL;
822 cmd->scmd.data_len = 9 + cmd->info.datalen;
823 }
824
825 DPRINTK("SMU: i2c enqueuing command\n");
826 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
827 cmd->read ? "read" : "write", cmd->info.datalen,
828 cmd->info.bus, cmd->info.caddr,
829 cmd->info.subaddr[0], cmd->info.type);
830
831
832 /* Enqueue command in i2c list, and if empty, enqueue also in
833 * main command list
834 */
835 spin_lock_irqsave(&smu->lock, flags);
836 if (smu->cmd_i2c_cur == NULL) {
837 smu->cmd_i2c_cur = cmd;
838 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
839 if (smu->cmd_cur == NULL)
840 smu_start_cmd();
841 } else
842 list_add_tail(&cmd->link, &smu->cmd_i2c_list);
843 spin_unlock_irqrestore(&smu->lock, flags);
844
845 return 0;
846}
847
848
849
850/*
851 * Userland driver interface
852 */
853
854
855static LIST_HEAD(smu_clist);
856static DEFINE_SPINLOCK(smu_clist_lock);
857
858enum smu_file_mode {
859 smu_file_commands,
860 smu_file_events,
861 smu_file_closing
862};
863
864struct smu_private
865{
866 struct list_head list;
867 enum smu_file_mode mode;
868 int busy;
869 struct smu_cmd cmd;
870 spinlock_t lock;
871 wait_queue_head_t wait;
872 u8 buffer[SMU_MAX_DATA];
873};
874
875
876static int smu_open(struct inode *inode, struct file *file)
877{
878 struct smu_private *pp;
879 unsigned long flags;
880
881 pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL);
882 if (pp == 0)
883 return -ENOMEM;
884 memset(pp, 0, sizeof(struct smu_private));
885 spin_lock_init(&pp->lock);
886 pp->mode = smu_file_commands;
887 init_waitqueue_head(&pp->wait);
888
889 spin_lock_irqsave(&smu_clist_lock, flags);
890 list_add(&pp->list, &smu_clist);
891 spin_unlock_irqrestore(&smu_clist_lock, flags);
892 file->private_data = pp;
893
894 return 0;
895}
896
897
898static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
899{
900 struct smu_private *pp = misc;
901
902 wake_up_all(&pp->wait);
903}
904
905
906static ssize_t smu_write(struct file *file, const char __user *buf,
907 size_t count, loff_t *ppos)
908{
909 struct smu_private *pp = file->private_data;
910 unsigned long flags;
911 struct smu_user_cmd_hdr hdr;
912 int rc = 0;
913
914 if (pp->busy)
915 return -EBUSY;
916 else if (copy_from_user(&hdr, buf, sizeof(hdr)))
917 return -EFAULT;
918 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
919 pp->mode = smu_file_events;
920 return 0;
921 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
922 return -EINVAL;
923 else if (pp->mode != smu_file_commands)
924 return -EBADFD;
925 else if (hdr.data_len > SMU_MAX_DATA)
926 return -EINVAL;
927
928 spin_lock_irqsave(&pp->lock, flags);
929 if (pp->busy) {
930 spin_unlock_irqrestore(&pp->lock, flags);
931 return -EBUSY;
932 }
933 pp->busy = 1;
934 pp->cmd.status = 1;
935 spin_unlock_irqrestore(&pp->lock, flags);
936
937 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
938 pp->busy = 0;
939 return -EFAULT;
940 }
941
942 pp->cmd.cmd = hdr.cmd;
943 pp->cmd.data_len = hdr.data_len;
944 pp->cmd.reply_len = SMU_MAX_DATA;
945 pp->cmd.data_buf = pp->buffer;
946 pp->cmd.reply_buf = pp->buffer;
947 pp->cmd.done = smu_user_cmd_done;
948 pp->cmd.misc = pp;
949 rc = smu_queue_cmd(&pp->cmd);
950 if (rc < 0)
951 return rc;
952 return count;
953}
954
955
956static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
957 char __user *buf, size_t count)
958{
959 DECLARE_WAITQUEUE(wait, current);
960 struct smu_user_reply_hdr hdr;
961 unsigned long flags;
962 int size, rc = 0;
963
964 if (!pp->busy)
965 return 0;
966 if (count < sizeof(struct smu_user_reply_hdr))
967 return -EOVERFLOW;
968 spin_lock_irqsave(&pp->lock, flags);
969 if (pp->cmd.status == 1) {
970 if (file->f_flags & O_NONBLOCK)
971 return -EAGAIN;
972 add_wait_queue(&pp->wait, &wait);
973 for (;;) {
974 set_current_state(TASK_INTERRUPTIBLE);
975 rc = 0;
976 if (pp->cmd.status != 1)
977 break;
978 rc = -ERESTARTSYS;
979 if (signal_pending(current))
980 break;
981 spin_unlock_irqrestore(&pp->lock, flags);
982 schedule();
983 spin_lock_irqsave(&pp->lock, flags);
984 }
985 set_current_state(TASK_RUNNING);
986 remove_wait_queue(&pp->wait, &wait);
987 }
988 spin_unlock_irqrestore(&pp->lock, flags);
989 if (rc)
990 return rc;
991 if (pp->cmd.status != 0)
992 pp->cmd.reply_len = 0;
993 size = sizeof(hdr) + pp->cmd.reply_len;
994 if (count < size)
995 size = count;
996 rc = size;
997 hdr.status = pp->cmd.status;
998 hdr.reply_len = pp->cmd.reply_len;
999 if (copy_to_user(buf, &hdr, sizeof(hdr)))
1000 return -EFAULT;
1001 size -= sizeof(hdr);
1002 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1003 return -EFAULT;
1004 pp->busy = 0;
1005
1006 return rc;
1007}
1008
1009
1010static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1011 char __user *buf, size_t count)
1012{
1013 /* Not implemented */
1014 msleep_interruptible(1000);
1015 return 0;
1016}
1017
1018
1019static ssize_t smu_read(struct file *file, char __user *buf,
1020 size_t count, loff_t *ppos)
1021{
1022 struct smu_private *pp = file->private_data;
1023
1024 if (pp->mode == smu_file_commands)
1025 return smu_read_command(file, pp, buf, count);
1026 if (pp->mode == smu_file_events)
1027 return smu_read_events(file, pp, buf, count);
1028
1029 return -EBADFD;
1030}
1031
1032static unsigned int smu_fpoll(struct file *file, poll_table *wait)
1033{
1034 struct smu_private *pp = file->private_data;
1035 unsigned int mask = 0;
1036 unsigned long flags;
1037
1038 if (pp == 0)
1039 return 0;
1040
1041 if (pp->mode == smu_file_commands) {
1042 poll_wait(file, &pp->wait, wait);
1043
1044 spin_lock_irqsave(&pp->lock, flags);
1045 if (pp->busy && pp->cmd.status != 1)
1046 mask |= POLLIN;
1047 spin_unlock_irqrestore(&pp->lock, flags);
1048 } if (pp->mode == smu_file_events) {
1049 /* Not yet implemented */
1050 }
1051 return mask;
1052}
1053
1054static int smu_release(struct inode *inode, struct file *file)
1055{
1056 struct smu_private *pp = file->private_data;
1057 unsigned long flags;
1058 unsigned int busy;
1059
1060 if (pp == 0)
1061 return 0;
1062
1063 file->private_data = NULL;
1064
1065 /* Mark file as closing to avoid races with new request */
1066 spin_lock_irqsave(&pp->lock, flags);
1067 pp->mode = smu_file_closing;
1068 busy = pp->busy;
1069
1070 /* Wait for any pending request to complete */
1071 if (busy && pp->cmd.status == 1) {
1072 DECLARE_WAITQUEUE(wait, current);
1073
1074 add_wait_queue(&pp->wait, &wait);
1075 for (;;) {
1076 set_current_state(TASK_UNINTERRUPTIBLE);
1077 if (pp->cmd.status != 1)
1078 break;
1079 spin_lock_irqsave(&pp->lock, flags);
1080 schedule();
1081 spin_unlock_irqrestore(&pp->lock, flags);
1082 }
1083 set_current_state(TASK_RUNNING);
1084 remove_wait_queue(&pp->wait, &wait);
1085 }
1086 spin_unlock_irqrestore(&pp->lock, flags);
1087
1088 spin_lock_irqsave(&smu_clist_lock, flags);
1089 list_del(&pp->list);
1090 spin_unlock_irqrestore(&smu_clist_lock, flags);
1091 kfree(pp);
1092
1093 return 0;
1094}
1095
1096
1097static struct file_operations smu_device_fops __pmacdata = {
1098 .llseek = no_llseek,
1099 .read = smu_read,
1100 .write = smu_write,
1101 .poll = smu_fpoll,
1102 .open = smu_open,
1103 .release = smu_release,
1104};
1105
1106static struct miscdevice pmu_device __pmacdata = {
1107 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1108};
1109
1110static int smu_device_init(void)
1111{
1112 if (!smu)
1113 return -ENODEV;
1114 if (misc_register(&pmu_device) < 0)
1115 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1116 return 0;
1117}
1118device_initcall(smu_device_init);