diff options
Diffstat (limited to 'drivers/kvm/vmx.h')
-rw-r--r-- | drivers/kvm/vmx.h | 73 |
1 files changed, 43 insertions, 30 deletions
diff --git a/drivers/kvm/vmx.h b/drivers/kvm/vmx.h index d0dc93df411b..fd4e14666088 100644 --- a/drivers/kvm/vmx.h +++ b/drivers/kvm/vmx.h | |||
@@ -25,29 +25,36 @@ | |||
25 | * | 25 | * |
26 | */ | 26 | */ |
27 | 27 | ||
28 | #define CPU_BASED_VIRTUAL_INTR_PENDING 0x00000004 | 28 | #define CPU_BASED_VIRTUAL_INTR_PENDING 0x00000004 |
29 | #define CPU_BASED_USE_TSC_OFFSETING 0x00000008 | 29 | #define CPU_BASED_USE_TSC_OFFSETING 0x00000008 |
30 | #define CPU_BASED_HLT_EXITING 0x00000080 | 30 | #define CPU_BASED_HLT_EXITING 0x00000080 |
31 | #define CPU_BASED_INVDPG_EXITING 0x00000200 | 31 | #define CPU_BASED_INVLPG_EXITING 0x00000200 |
32 | #define CPU_BASED_MWAIT_EXITING 0x00000400 | 32 | #define CPU_BASED_MWAIT_EXITING 0x00000400 |
33 | #define CPU_BASED_RDPMC_EXITING 0x00000800 | 33 | #define CPU_BASED_RDPMC_EXITING 0x00000800 |
34 | #define CPU_BASED_RDTSC_EXITING 0x00001000 | 34 | #define CPU_BASED_RDTSC_EXITING 0x00001000 |
35 | #define CPU_BASED_CR8_LOAD_EXITING 0x00080000 | 35 | #define CPU_BASED_CR8_LOAD_EXITING 0x00080000 |
36 | #define CPU_BASED_CR8_STORE_EXITING 0x00100000 | 36 | #define CPU_BASED_CR8_STORE_EXITING 0x00100000 |
37 | #define CPU_BASED_TPR_SHADOW 0x00200000 | 37 | #define CPU_BASED_TPR_SHADOW 0x00200000 |
38 | #define CPU_BASED_MOV_DR_EXITING 0x00800000 | 38 | #define CPU_BASED_MOV_DR_EXITING 0x00800000 |
39 | #define CPU_BASED_UNCOND_IO_EXITING 0x01000000 | 39 | #define CPU_BASED_UNCOND_IO_EXITING 0x01000000 |
40 | #define CPU_BASED_ACTIVATE_IO_BITMAP 0x02000000 | 40 | #define CPU_BASED_USE_IO_BITMAPS 0x02000000 |
41 | #define CPU_BASED_MSR_BITMAPS 0x10000000 | 41 | #define CPU_BASED_USE_MSR_BITMAPS 0x10000000 |
42 | #define CPU_BASED_MONITOR_EXITING 0x20000000 | 42 | #define CPU_BASED_MONITOR_EXITING 0x20000000 |
43 | #define CPU_BASED_PAUSE_EXITING 0x40000000 | 43 | #define CPU_BASED_PAUSE_EXITING 0x40000000 |
44 | #define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000 | ||
44 | 45 | ||
45 | #define PIN_BASED_EXT_INTR_MASK 0x1 | 46 | #define PIN_BASED_EXT_INTR_MASK 0x00000001 |
46 | #define PIN_BASED_NMI_EXITING 0x8 | 47 | #define PIN_BASED_NMI_EXITING 0x00000008 |
48 | #define PIN_BASED_VIRTUAL_NMIS 0x00000020 | ||
47 | 49 | ||
48 | #define VM_EXIT_ACK_INTR_ON_EXIT 0x00008000 | 50 | #define VM_EXIT_HOST_ADDR_SPACE_SIZE 0x00000200 |
49 | #define VM_EXIT_HOST_ADD_SPACE_SIZE 0x00000200 | 51 | #define VM_EXIT_ACK_INTR_ON_EXIT 0x00008000 |
50 | 52 | ||
53 | #define VM_ENTRY_IA32E_MODE 0x00000200 | ||
54 | #define VM_ENTRY_SMM 0x00000400 | ||
55 | #define VM_ENTRY_DEACT_DUAL_MONITOR 0x00000800 | ||
56 | |||
57 | #define SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001 | ||
51 | 58 | ||
52 | /* VMCS Encodings */ | 59 | /* VMCS Encodings */ |
53 | enum vmcs_field { | 60 | enum vmcs_field { |
@@ -206,6 +213,7 @@ enum vmcs_field { | |||
206 | #define EXIT_REASON_MSR_READ 31 | 213 | #define EXIT_REASON_MSR_READ 31 |
207 | #define EXIT_REASON_MSR_WRITE 32 | 214 | #define EXIT_REASON_MSR_WRITE 32 |
208 | #define EXIT_REASON_MWAIT_INSTRUCTION 36 | 215 | #define EXIT_REASON_MWAIT_INSTRUCTION 36 |
216 | #define EXIT_REASON_TPR_BELOW_THRESHOLD 43 | ||
209 | 217 | ||
210 | /* | 218 | /* |
211 | * Interruption-information format | 219 | * Interruption-information format |
@@ -261,9 +269,6 @@ enum vmcs_field { | |||
261 | /* segment AR */ | 269 | /* segment AR */ |
262 | #define SEGMENT_AR_L_MASK (1 << 13) | 270 | #define SEGMENT_AR_L_MASK (1 << 13) |
263 | 271 | ||
264 | /* entry controls */ | ||
265 | #define VM_ENTRY_CONTROLS_IA32E_MASK (1 << 9) | ||
266 | |||
267 | #define AR_TYPE_ACCESSES_MASK 1 | 272 | #define AR_TYPE_ACCESSES_MASK 1 |
268 | #define AR_TYPE_READABLE_MASK (1 << 1) | 273 | #define AR_TYPE_READABLE_MASK (1 << 1) |
269 | #define AR_TYPE_WRITEABLE_MASK (1 << 2) | 274 | #define AR_TYPE_WRITEABLE_MASK (1 << 2) |
@@ -285,13 +290,21 @@ enum vmcs_field { | |||
285 | 290 | ||
286 | #define AR_RESERVD_MASK 0xfffe0f00 | 291 | #define AR_RESERVD_MASK 0xfffe0f00 |
287 | 292 | ||
288 | #define CR4_VMXE 0x2000 | 293 | #define MSR_IA32_VMX_BASIC 0x480 |
294 | #define MSR_IA32_VMX_PINBASED_CTLS 0x481 | ||
295 | #define MSR_IA32_VMX_PROCBASED_CTLS 0x482 | ||
296 | #define MSR_IA32_VMX_EXIT_CTLS 0x483 | ||
297 | #define MSR_IA32_VMX_ENTRY_CTLS 0x484 | ||
298 | #define MSR_IA32_VMX_MISC 0x485 | ||
299 | #define MSR_IA32_VMX_CR0_FIXED0 0x486 | ||
300 | #define MSR_IA32_VMX_CR0_FIXED1 0x487 | ||
301 | #define MSR_IA32_VMX_CR4_FIXED0 0x488 | ||
302 | #define MSR_IA32_VMX_CR4_FIXED1 0x489 | ||
303 | #define MSR_IA32_VMX_VMCS_ENUM 0x48a | ||
304 | #define MSR_IA32_VMX_PROCBASED_CTLS2 0x48b | ||
289 | 305 | ||
290 | #define MSR_IA32_VMX_BASIC 0x480 | 306 | #define MSR_IA32_FEATURE_CONTROL 0x3a |
291 | #define MSR_IA32_FEATURE_CONTROL 0x03a | 307 | #define MSR_IA32_FEATURE_CONTROL_LOCKED 0x1 |
292 | #define MSR_IA32_VMX_PINBASED_CTLS 0x481 | 308 | #define MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED 0x4 |
293 | #define MSR_IA32_VMX_PROCBASED_CTLS 0x482 | ||
294 | #define MSR_IA32_VMX_EXIT_CTLS 0x483 | ||
295 | #define MSR_IA32_VMX_ENTRY_CTLS 0x484 | ||
296 | 309 | ||
297 | #endif | 310 | #endif |