diff options
Diffstat (limited to 'drivers/kvm/lapic.c')
-rw-r--r-- | drivers/kvm/lapic.c | 91 |
1 files changed, 46 insertions, 45 deletions
diff --git a/drivers/kvm/lapic.c b/drivers/kvm/lapic.c index 466c37f02e85..5c9f46784c26 100644 --- a/drivers/kvm/lapic.c +++ b/drivers/kvm/lapic.c | |||
@@ -58,6 +58,7 @@ | |||
58 | 58 | ||
59 | #define VEC_POS(v) ((v) & (32 - 1)) | 59 | #define VEC_POS(v) ((v) & (32 - 1)) |
60 | #define REG_POS(v) (((v) >> 5) << 4) | 60 | #define REG_POS(v) (((v) >> 5) << 4) |
61 | |||
61 | static inline u32 apic_get_reg(struct kvm_lapic *apic, int reg_off) | 62 | static inline u32 apic_get_reg(struct kvm_lapic *apic, int reg_off) |
62 | { | 63 | { |
63 | return *((u32 *) (apic->regs + reg_off)); | 64 | return *((u32 *) (apic->regs + reg_off)); |
@@ -90,7 +91,7 @@ static inline void apic_clear_vector(int vec, void *bitmap) | |||
90 | 91 | ||
91 | static inline int apic_hw_enabled(struct kvm_lapic *apic) | 92 | static inline int apic_hw_enabled(struct kvm_lapic *apic) |
92 | { | 93 | { |
93 | return (apic)->vcpu->apic_base & MSR_IA32_APICBASE_ENABLE; | 94 | return (apic)->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; |
94 | } | 95 | } |
95 | 96 | ||
96 | static inline int apic_sw_enabled(struct kvm_lapic *apic) | 97 | static inline int apic_sw_enabled(struct kvm_lapic *apic) |
@@ -174,7 +175,7 @@ static inline int apic_find_highest_irr(struct kvm_lapic *apic) | |||
174 | 175 | ||
175 | int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu) | 176 | int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu) |
176 | { | 177 | { |
177 | struct kvm_lapic *apic = vcpu->apic; | 178 | struct kvm_lapic *apic = vcpu->arch.apic; |
178 | int highest_irr; | 179 | int highest_irr; |
179 | 180 | ||
180 | if (!apic) | 181 | if (!apic) |
@@ -187,7 +188,7 @@ EXPORT_SYMBOL_GPL(kvm_lapic_find_highest_irr); | |||
187 | 188 | ||
188 | int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig) | 189 | int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig) |
189 | { | 190 | { |
190 | struct kvm_lapic *apic = vcpu->apic; | 191 | struct kvm_lapic *apic = vcpu->arch.apic; |
191 | 192 | ||
192 | if (!apic_test_and_set_irr(vec, apic)) { | 193 | if (!apic_test_and_set_irr(vec, apic)) { |
193 | /* a new pending irq is set in IRR */ | 194 | /* a new pending irq is set in IRR */ |
@@ -272,7 +273,7 @@ static int apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source, | |||
272 | int short_hand, int dest, int dest_mode) | 273 | int short_hand, int dest, int dest_mode) |
273 | { | 274 | { |
274 | int result = 0; | 275 | int result = 0; |
275 | struct kvm_lapic *target = vcpu->apic; | 276 | struct kvm_lapic *target = vcpu->arch.apic; |
276 | 277 | ||
277 | apic_debug("target %p, source %p, dest 0x%x, " | 278 | apic_debug("target %p, source %p, dest 0x%x, " |
278 | "dest_mode 0x%x, short_hand 0x%x", | 279 | "dest_mode 0x%x, short_hand 0x%x", |
@@ -339,10 +340,10 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, | |||
339 | } else | 340 | } else |
340 | apic_clear_vector(vector, apic->regs + APIC_TMR); | 341 | apic_clear_vector(vector, apic->regs + APIC_TMR); |
341 | 342 | ||
342 | if (vcpu->mp_state == VCPU_MP_STATE_RUNNABLE) | 343 | if (vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE) |
343 | kvm_vcpu_kick(vcpu); | 344 | kvm_vcpu_kick(vcpu); |
344 | else if (vcpu->mp_state == VCPU_MP_STATE_HALTED) { | 345 | else if (vcpu->arch.mp_state == VCPU_MP_STATE_HALTED) { |
345 | vcpu->mp_state = VCPU_MP_STATE_RUNNABLE; | 346 | vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE; |
346 | if (waitqueue_active(&vcpu->wq)) | 347 | if (waitqueue_active(&vcpu->wq)) |
347 | wake_up_interruptible(&vcpu->wq); | 348 | wake_up_interruptible(&vcpu->wq); |
348 | } | 349 | } |
@@ -363,11 +364,11 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, | |||
363 | 364 | ||
364 | case APIC_DM_INIT: | 365 | case APIC_DM_INIT: |
365 | if (level) { | 366 | if (level) { |
366 | if (vcpu->mp_state == VCPU_MP_STATE_RUNNABLE) | 367 | if (vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE) |
367 | printk(KERN_DEBUG | 368 | printk(KERN_DEBUG |
368 | "INIT on a runnable vcpu %d\n", | 369 | "INIT on a runnable vcpu %d\n", |
369 | vcpu->vcpu_id); | 370 | vcpu->vcpu_id); |
370 | vcpu->mp_state = VCPU_MP_STATE_INIT_RECEIVED; | 371 | vcpu->arch.mp_state = VCPU_MP_STATE_INIT_RECEIVED; |
371 | kvm_vcpu_kick(vcpu); | 372 | kvm_vcpu_kick(vcpu); |
372 | } else { | 373 | } else { |
373 | printk(KERN_DEBUG | 374 | printk(KERN_DEBUG |
@@ -380,9 +381,9 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, | |||
380 | case APIC_DM_STARTUP: | 381 | case APIC_DM_STARTUP: |
381 | printk(KERN_DEBUG "SIPI to vcpu %d vector 0x%02x\n", | 382 | printk(KERN_DEBUG "SIPI to vcpu %d vector 0x%02x\n", |
382 | vcpu->vcpu_id, vector); | 383 | vcpu->vcpu_id, vector); |
383 | if (vcpu->mp_state == VCPU_MP_STATE_INIT_RECEIVED) { | 384 | if (vcpu->arch.mp_state == VCPU_MP_STATE_INIT_RECEIVED) { |
384 | vcpu->sipi_vector = vector; | 385 | vcpu->arch.sipi_vector = vector; |
385 | vcpu->mp_state = VCPU_MP_STATE_SIPI_RECEIVED; | 386 | vcpu->arch.mp_state = VCPU_MP_STATE_SIPI_RECEIVED; |
386 | if (waitqueue_active(&vcpu->wq)) | 387 | if (waitqueue_active(&vcpu->wq)) |
387 | wake_up_interruptible(&vcpu->wq); | 388 | wake_up_interruptible(&vcpu->wq); |
388 | } | 389 | } |
@@ -411,7 +412,7 @@ static struct kvm_lapic *kvm_apic_round_robin(struct kvm *kvm, u8 vector, | |||
411 | next = 0; | 412 | next = 0; |
412 | if (kvm->vcpus[next] == NULL || !test_bit(next, &bitmap)) | 413 | if (kvm->vcpus[next] == NULL || !test_bit(next, &bitmap)) |
413 | continue; | 414 | continue; |
414 | apic = kvm->vcpus[next]->apic; | 415 | apic = kvm->vcpus[next]->arch.apic; |
415 | if (apic && apic_enabled(apic)) | 416 | if (apic && apic_enabled(apic)) |
416 | break; | 417 | break; |
417 | apic = NULL; | 418 | apic = NULL; |
@@ -482,12 +483,12 @@ static void apic_send_ipi(struct kvm_lapic *apic) | |||
482 | if (!vcpu) | 483 | if (!vcpu) |
483 | continue; | 484 | continue; |
484 | 485 | ||
485 | if (vcpu->apic && | 486 | if (vcpu->arch.apic && |
486 | apic_match_dest(vcpu, apic, short_hand, dest, dest_mode)) { | 487 | apic_match_dest(vcpu, apic, short_hand, dest, dest_mode)) { |
487 | if (delivery_mode == APIC_DM_LOWEST) | 488 | if (delivery_mode == APIC_DM_LOWEST) |
488 | set_bit(vcpu->vcpu_id, &lpr_map); | 489 | set_bit(vcpu->vcpu_id, &lpr_map); |
489 | else | 490 | else |
490 | __apic_accept_irq(vcpu->apic, delivery_mode, | 491 | __apic_accept_irq(vcpu->arch.apic, delivery_mode, |
491 | vector, level, trig_mode); | 492 | vector, level, trig_mode); |
492 | } | 493 | } |
493 | } | 494 | } |
@@ -495,7 +496,7 @@ static void apic_send_ipi(struct kvm_lapic *apic) | |||
495 | if (delivery_mode == APIC_DM_LOWEST) { | 496 | if (delivery_mode == APIC_DM_LOWEST) { |
496 | target = kvm_get_lowest_prio_vcpu(vcpu->kvm, vector, lpr_map); | 497 | target = kvm_get_lowest_prio_vcpu(vcpu->kvm, vector, lpr_map); |
497 | if (target != NULL) | 498 | if (target != NULL) |
498 | __apic_accept_irq(target->apic, delivery_mode, | 499 | __apic_accept_irq(target->arch.apic, delivery_mode, |
499 | vector, level, trig_mode); | 500 | vector, level, trig_mode); |
500 | } | 501 | } |
501 | } | 502 | } |
@@ -772,15 +773,15 @@ static int apic_mmio_range(struct kvm_io_device *this, gpa_t addr) | |||
772 | 773 | ||
773 | void kvm_free_lapic(struct kvm_vcpu *vcpu) | 774 | void kvm_free_lapic(struct kvm_vcpu *vcpu) |
774 | { | 775 | { |
775 | if (!vcpu->apic) | 776 | if (!vcpu->arch.apic) |
776 | return; | 777 | return; |
777 | 778 | ||
778 | hrtimer_cancel(&vcpu->apic->timer.dev); | 779 | hrtimer_cancel(&vcpu->arch.apic->timer.dev); |
779 | 780 | ||
780 | if (vcpu->apic->regs_page) | 781 | if (vcpu->arch.apic->regs_page) |
781 | __free_page(vcpu->apic->regs_page); | 782 | __free_page(vcpu->arch.apic->regs_page); |
782 | 783 | ||
783 | kfree(vcpu->apic); | 784 | kfree(vcpu->arch.apic); |
784 | } | 785 | } |
785 | 786 | ||
786 | /* | 787 | /* |
@@ -791,7 +792,7 @@ void kvm_free_lapic(struct kvm_vcpu *vcpu) | |||
791 | 792 | ||
792 | void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8) | 793 | void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8) |
793 | { | 794 | { |
794 | struct kvm_lapic *apic = vcpu->apic; | 795 | struct kvm_lapic *apic = vcpu->arch.apic; |
795 | 796 | ||
796 | if (!apic) | 797 | if (!apic) |
797 | return; | 798 | return; |
@@ -800,7 +801,7 @@ void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8) | |||
800 | 801 | ||
801 | u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu) | 802 | u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu) |
802 | { | 803 | { |
803 | struct kvm_lapic *apic = vcpu->apic; | 804 | struct kvm_lapic *apic = vcpu->arch.apic; |
804 | u64 tpr; | 805 | u64 tpr; |
805 | 806 | ||
806 | if (!apic) | 807 | if (!apic) |
@@ -813,29 +814,29 @@ EXPORT_SYMBOL_GPL(kvm_lapic_get_cr8); | |||
813 | 814 | ||
814 | void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value) | 815 | void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value) |
815 | { | 816 | { |
816 | struct kvm_lapic *apic = vcpu->apic; | 817 | struct kvm_lapic *apic = vcpu->arch.apic; |
817 | 818 | ||
818 | if (!apic) { | 819 | if (!apic) { |
819 | value |= MSR_IA32_APICBASE_BSP; | 820 | value |= MSR_IA32_APICBASE_BSP; |
820 | vcpu->apic_base = value; | 821 | vcpu->arch.apic_base = value; |
821 | return; | 822 | return; |
822 | } | 823 | } |
823 | if (apic->vcpu->vcpu_id) | 824 | if (apic->vcpu->vcpu_id) |
824 | value &= ~MSR_IA32_APICBASE_BSP; | 825 | value &= ~MSR_IA32_APICBASE_BSP; |
825 | 826 | ||
826 | vcpu->apic_base = value; | 827 | vcpu->arch.apic_base = value; |
827 | apic->base_address = apic->vcpu->apic_base & | 828 | apic->base_address = apic->vcpu->arch.apic_base & |
828 | MSR_IA32_APICBASE_BASE; | 829 | MSR_IA32_APICBASE_BASE; |
829 | 830 | ||
830 | /* with FSB delivery interrupt, we can restart APIC functionality */ | 831 | /* with FSB delivery interrupt, we can restart APIC functionality */ |
831 | apic_debug("apic base msr is 0x%016" PRIx64 ", and base address is " | 832 | apic_debug("apic base msr is 0x%016" PRIx64 ", and base address is " |
832 | "0x%lx.\n", apic->vcpu->apic_base, apic->base_address); | 833 | "0x%lx.\n", apic->vcpu->arch.apic_base, apic->base_address); |
833 | 834 | ||
834 | } | 835 | } |
835 | 836 | ||
836 | u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu) | 837 | u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu) |
837 | { | 838 | { |
838 | return vcpu->apic_base; | 839 | return vcpu->arch.apic_base; |
839 | } | 840 | } |
840 | EXPORT_SYMBOL_GPL(kvm_lapic_get_base); | 841 | EXPORT_SYMBOL_GPL(kvm_lapic_get_base); |
841 | 842 | ||
@@ -847,7 +848,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu) | |||
847 | apic_debug("%s\n", __FUNCTION__); | 848 | apic_debug("%s\n", __FUNCTION__); |
848 | 849 | ||
849 | ASSERT(vcpu); | 850 | ASSERT(vcpu); |
850 | apic = vcpu->apic; | 851 | apic = vcpu->arch.apic; |
851 | ASSERT(apic != NULL); | 852 | ASSERT(apic != NULL); |
852 | 853 | ||
853 | /* Stop the timer in case it's a reset to an active apic */ | 854 | /* Stop the timer in case it's a reset to an active apic */ |
@@ -878,19 +879,19 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu) | |||
878 | update_divide_count(apic); | 879 | update_divide_count(apic); |
879 | atomic_set(&apic->timer.pending, 0); | 880 | atomic_set(&apic->timer.pending, 0); |
880 | if (vcpu->vcpu_id == 0) | 881 | if (vcpu->vcpu_id == 0) |
881 | vcpu->apic_base |= MSR_IA32_APICBASE_BSP; | 882 | vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP; |
882 | apic_update_ppr(apic); | 883 | apic_update_ppr(apic); |
883 | 884 | ||
884 | apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr=" | 885 | apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr=" |
885 | "0x%016" PRIx64 ", base_address=0x%0lx.\n", __FUNCTION__, | 886 | "0x%016" PRIx64 ", base_address=0x%0lx.\n", __FUNCTION__, |
886 | vcpu, kvm_apic_id(apic), | 887 | vcpu, kvm_apic_id(apic), |
887 | vcpu->apic_base, apic->base_address); | 888 | vcpu->arch.apic_base, apic->base_address); |
888 | } | 889 | } |
889 | EXPORT_SYMBOL_GPL(kvm_lapic_reset); | 890 | EXPORT_SYMBOL_GPL(kvm_lapic_reset); |
890 | 891 | ||
891 | int kvm_lapic_enabled(struct kvm_vcpu *vcpu) | 892 | int kvm_lapic_enabled(struct kvm_vcpu *vcpu) |
892 | { | 893 | { |
893 | struct kvm_lapic *apic = vcpu->apic; | 894 | struct kvm_lapic *apic = vcpu->arch.apic; |
894 | int ret = 0; | 895 | int ret = 0; |
895 | 896 | ||
896 | if (!apic) | 897 | if (!apic) |
@@ -915,7 +916,7 @@ static int __apic_timer_fn(struct kvm_lapic *apic) | |||
915 | 916 | ||
916 | atomic_inc(&apic->timer.pending); | 917 | atomic_inc(&apic->timer.pending); |
917 | if (waitqueue_active(q)) { | 918 | if (waitqueue_active(q)) { |
918 | apic->vcpu->mp_state = VCPU_MP_STATE_RUNNABLE; | 919 | apic->vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE; |
919 | wake_up_interruptible(q); | 920 | wake_up_interruptible(q); |
920 | } | 921 | } |
921 | if (apic_lvtt_period(apic)) { | 922 | if (apic_lvtt_period(apic)) { |
@@ -961,7 +962,7 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu) | |||
961 | if (!apic) | 962 | if (!apic) |
962 | goto nomem; | 963 | goto nomem; |
963 | 964 | ||
964 | vcpu->apic = apic; | 965 | vcpu->arch.apic = apic; |
965 | 966 | ||
966 | apic->regs_page = alloc_page(GFP_KERNEL); | 967 | apic->regs_page = alloc_page(GFP_KERNEL); |
967 | if (apic->regs_page == NULL) { | 968 | if (apic->regs_page == NULL) { |
@@ -976,7 +977,7 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu) | |||
976 | hrtimer_init(&apic->timer.dev, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | 977 | hrtimer_init(&apic->timer.dev, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); |
977 | apic->timer.dev.function = apic_timer_fn; | 978 | apic->timer.dev.function = apic_timer_fn; |
978 | apic->base_address = APIC_DEFAULT_PHYS_BASE; | 979 | apic->base_address = APIC_DEFAULT_PHYS_BASE; |
979 | vcpu->apic_base = APIC_DEFAULT_PHYS_BASE; | 980 | vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE; |
980 | 981 | ||
981 | kvm_lapic_reset(vcpu); | 982 | kvm_lapic_reset(vcpu); |
982 | apic->dev.read = apic_mmio_read; | 983 | apic->dev.read = apic_mmio_read; |
@@ -994,7 +995,7 @@ EXPORT_SYMBOL_GPL(kvm_create_lapic); | |||
994 | 995 | ||
995 | int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu) | 996 | int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu) |
996 | { | 997 | { |
997 | struct kvm_lapic *apic = vcpu->apic; | 998 | struct kvm_lapic *apic = vcpu->arch.apic; |
998 | int highest_irr; | 999 | int highest_irr; |
999 | 1000 | ||
1000 | if (!apic || !apic_enabled(apic)) | 1001 | if (!apic || !apic_enabled(apic)) |
@@ -1010,11 +1011,11 @@ int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu) | |||
1010 | 1011 | ||
1011 | int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu) | 1012 | int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu) |
1012 | { | 1013 | { |
1013 | u32 lvt0 = apic_get_reg(vcpu->apic, APIC_LVT0); | 1014 | u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0); |
1014 | int r = 0; | 1015 | int r = 0; |
1015 | 1016 | ||
1016 | if (vcpu->vcpu_id == 0) { | 1017 | if (vcpu->vcpu_id == 0) { |
1017 | if (!apic_hw_enabled(vcpu->apic)) | 1018 | if (!apic_hw_enabled(vcpu->arch.apic)) |
1018 | r = 1; | 1019 | r = 1; |
1019 | if ((lvt0 & APIC_LVT_MASKED) == 0 && | 1020 | if ((lvt0 & APIC_LVT_MASKED) == 0 && |
1020 | GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) | 1021 | GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) |
@@ -1025,7 +1026,7 @@ int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu) | |||
1025 | 1026 | ||
1026 | void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu) | 1027 | void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu) |
1027 | { | 1028 | { |
1028 | struct kvm_lapic *apic = vcpu->apic; | 1029 | struct kvm_lapic *apic = vcpu->arch.apic; |
1029 | 1030 | ||
1030 | if (apic && apic_lvt_enabled(apic, APIC_LVTT) && | 1031 | if (apic && apic_lvt_enabled(apic, APIC_LVTT) && |
1031 | atomic_read(&apic->timer.pending) > 0) { | 1032 | atomic_read(&apic->timer.pending) > 0) { |
@@ -1036,7 +1037,7 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu) | |||
1036 | 1037 | ||
1037 | void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec) | 1038 | void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec) |
1038 | { | 1039 | { |
1039 | struct kvm_lapic *apic = vcpu->apic; | 1040 | struct kvm_lapic *apic = vcpu->arch.apic; |
1040 | 1041 | ||
1041 | if (apic && apic_lvt_vector(apic, APIC_LVTT) == vec) | 1042 | if (apic && apic_lvt_vector(apic, APIC_LVTT) == vec) |
1042 | apic->timer.last_update = ktime_add_ns( | 1043 | apic->timer.last_update = ktime_add_ns( |
@@ -1047,7 +1048,7 @@ void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec) | |||
1047 | int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu) | 1048 | int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu) |
1048 | { | 1049 | { |
1049 | int vector = kvm_apic_has_interrupt(vcpu); | 1050 | int vector = kvm_apic_has_interrupt(vcpu); |
1050 | struct kvm_lapic *apic = vcpu->apic; | 1051 | struct kvm_lapic *apic = vcpu->arch.apic; |
1051 | 1052 | ||
1052 | if (vector == -1) | 1053 | if (vector == -1) |
1053 | return -1; | 1054 | return -1; |
@@ -1060,9 +1061,9 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu) | |||
1060 | 1061 | ||
1061 | void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu) | 1062 | void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu) |
1062 | { | 1063 | { |
1063 | struct kvm_lapic *apic = vcpu->apic; | 1064 | struct kvm_lapic *apic = vcpu->arch.apic; |
1064 | 1065 | ||
1065 | apic->base_address = vcpu->apic_base & | 1066 | apic->base_address = vcpu->arch.apic_base & |
1066 | MSR_IA32_APICBASE_BASE; | 1067 | MSR_IA32_APICBASE_BASE; |
1067 | apic_set_reg(apic, APIC_LVR, APIC_VERSION); | 1068 | apic_set_reg(apic, APIC_LVR, APIC_VERSION); |
1068 | apic_update_ppr(apic); | 1069 | apic_update_ppr(apic); |
@@ -1073,7 +1074,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu) | |||
1073 | 1074 | ||
1074 | void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu) | 1075 | void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu) |
1075 | { | 1076 | { |
1076 | struct kvm_lapic *apic = vcpu->apic; | 1077 | struct kvm_lapic *apic = vcpu->arch.apic; |
1077 | struct hrtimer *timer; | 1078 | struct hrtimer *timer; |
1078 | 1079 | ||
1079 | if (!apic) | 1080 | if (!apic) |