diff options
Diffstat (limited to 'drivers/isdn/hysdn/boardergo.h')
-rw-r--r-- | drivers/isdn/hysdn/boardergo.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/isdn/hysdn/boardergo.h b/drivers/isdn/hysdn/boardergo.h index c59422aa8c3f..e99bd81c4034 100644 --- a/drivers/isdn/hysdn/boardergo.h +++ b/drivers/isdn/hysdn/boardergo.h | |||
@@ -23,8 +23,8 @@ | |||
23 | 23 | ||
24 | /* following DPRAM layout copied from OS2-driver boarderg.h */ | 24 | /* following DPRAM layout copied from OS2-driver boarderg.h */ |
25 | typedef struct ErgDpram_tag { | 25 | typedef struct ErgDpram_tag { |
26 | /*0000 */ unsigned char ToHyBuf[ERG_TO_HY_BUF_SIZE]; | 26 | /*0000 */ unsigned char ToHyBuf[ERG_TO_HY_BUF_SIZE]; |
27 | /*0E00 */ unsigned char ToPcBuf[ERG_TO_PC_BUF_SIZE]; | 27 | /*0E00 */ unsigned char ToPcBuf[ERG_TO_PC_BUF_SIZE]; |
28 | 28 | ||
29 | /*1C00 */ unsigned char bSoftUart[SIZE_RSV_SOFT_UART]; | 29 | /*1C00 */ unsigned char bSoftUart[SIZE_RSV_SOFT_UART]; |
30 | /* size 0x1B0 */ | 30 | /* size 0x1B0 */ |
@@ -37,22 +37,22 @@ typedef struct ErgDpram_tag { | |||
37 | /*1DB9 unsigned long ucText[ERRLOG_TEXT_SIZE]; *//* ASCIIZ of len ucTextSize-1 */ | 37 | /*1DB9 unsigned long ucText[ERRLOG_TEXT_SIZE]; *//* ASCIIZ of len ucTextSize-1 */ |
38 | /*1DF0 */ | 38 | /*1DF0 */ |
39 | 39 | ||
40 | /*1DF0 */ unsigned short volatile ToHyChannel; | 40 | /*1DF0 */ unsigned short volatile ToHyChannel; |
41 | /*1DF2 */ unsigned short volatile ToHySize; | 41 | /*1DF2 */ unsigned short volatile ToHySize; |
42 | /*1DF4 */ unsigned char volatile ToHyFlag; | 42 | /*1DF4 */ unsigned char volatile ToHyFlag; |
43 | /* !=0: msg for Hy waiting */ | 43 | /* !=0: msg for Hy waiting */ |
44 | /*1DF5 */ unsigned char volatile ToPcFlag; | 44 | /*1DF5 */ unsigned char volatile ToPcFlag; |
45 | /* !=0: msg for PC waiting */ | 45 | /* !=0: msg for PC waiting */ |
46 | /*1DF6 */ unsigned short volatile ToPcChannel; | 46 | /*1DF6 */ unsigned short volatile ToPcChannel; |
47 | /*1DF8 */ unsigned short volatile ToPcSize; | 47 | /*1DF8 */ unsigned short volatile ToPcSize; |
48 | /*1DFA */ unsigned char bRes1DBA[0x1E00 - 0x1DFA]; | 48 | /*1DFA */ unsigned char bRes1DBA[0x1E00 - 0x1DFA]; |
49 | /* 6 bytes */ | 49 | /* 6 bytes */ |
50 | 50 | ||
51 | /*1E00 */ unsigned char bRestOfEntryTbl[0x1F00 - 0x1E00]; | 51 | /*1E00 */ unsigned char bRestOfEntryTbl[0x1F00 - 0x1E00]; |
52 | /*1F00 */ unsigned long TrapTable[62]; | 52 | /*1F00 */ unsigned long TrapTable[62]; |
53 | /*1FF8 */ unsigned char bRes1FF8[0x1FFB - 0x1FF8]; | 53 | /*1FF8 */ unsigned char bRes1FF8[0x1FFB - 0x1FF8]; |
54 | /* low part of reset vetor */ | 54 | /* low part of reset vetor */ |
55 | /*1FFB */ unsigned char ToPcIntMetro; | 55 | /*1FFB */ unsigned char ToPcIntMetro; |
56 | /* notes: | 56 | /* notes: |
57 | * - metro has 32-bit boot ram - accessing | 57 | * - metro has 32-bit boot ram - accessing |
58 | * ToPcInt and ToHyInt would be the same; | 58 | * ToPcInt and ToHyInt would be the same; |
@@ -65,13 +65,13 @@ typedef struct ErgDpram_tag { | |||
65 | * so E1 side should NOT change this byte | 65 | * so E1 side should NOT change this byte |
66 | * when writing! | 66 | * when writing! |
67 | */ | 67 | */ |
68 | /*1FFC */ unsigned char volatile ToHyNoDpramErrLog; | 68 | /*1FFC */ unsigned char volatile ToHyNoDpramErrLog; |
69 | /* note: ToHyNoDpramErrLog is used to inform | 69 | /* note: ToHyNoDpramErrLog is used to inform |
70 | * boot loader, not to use DPRAM based | 70 | * boot loader, not to use DPRAM based |
71 | * ErrLog; when DOS driver is rewritten | 71 | * ErrLog; when DOS driver is rewritten |
72 | * this becomes obsolete | 72 | * this becomes obsolete |
73 | */ | 73 | */ |
74 | /*1FFD */ unsigned char bRes1FFD; | 74 | /*1FFD */ unsigned char bRes1FFD; |
75 | /*1FFE */ unsigned char ToPcInt; | 75 | /*1FFE */ unsigned char ToPcInt; |
76 | /* E1_intclear; on CHAMP2: E1_intset */ | 76 | /* E1_intclear; on CHAMP2: E1_intset */ |
77 | /*1FFF */ unsigned char ToHyInt; | 77 | /*1FFF */ unsigned char ToHyInt; |
@@ -85,16 +85,16 @@ typedef struct ErgDpram_tag { | |||
85 | #define PCI9050_INTR_REG 0x4C /* Interrupt register */ | 85 | #define PCI9050_INTR_REG 0x4C /* Interrupt register */ |
86 | #define PCI9050_USER_IO 0x51 /* User I/O register */ | 86 | #define PCI9050_USER_IO 0x51 /* User I/O register */ |
87 | 87 | ||
88 | /* bitmask for PCI9050_INTR_REG: */ | 88 | /* bitmask for PCI9050_INTR_REG: */ |
89 | #define PCI9050_INTR_REG_EN1 0x01 /* 1= enable (def.), 0= disable */ | 89 | #define PCI9050_INTR_REG_EN1 0x01 /* 1= enable (def.), 0= disable */ |
90 | #define PCI9050_INTR_REG_POL1 0x02 /* 1= active high (def.), 0= active low */ | 90 | #define PCI9050_INTR_REG_POL1 0x02 /* 1= active high (def.), 0= active low */ |
91 | #define PCI9050_INTR_REG_STAT1 0x04 /* 1= intr. active, 0= intr. not active (def.) */ | 91 | #define PCI9050_INTR_REG_STAT1 0x04 /* 1= intr. active, 0= intr. not active (def.) */ |
92 | #define PCI9050_INTR_REG_ENPCI 0x40 /* 1= PCI interrupts enable (def.) */ | 92 | #define PCI9050_INTR_REG_ENPCI 0x40 /* 1= PCI interrupts enable (def.) */ |
93 | 93 | ||
94 | /* bitmask for PCI9050_USER_IO: */ | 94 | /* bitmask for PCI9050_USER_IO: */ |
95 | #define PCI9050_USER_IO_EN3 0x02 /* 1= disable , 0= enable (def.) */ | 95 | #define PCI9050_USER_IO_EN3 0x02 /* 1= disable , 0= enable (def.) */ |
96 | #define PCI9050_USER_IO_DIR3 0x04 /* 1= output (def.), 0= input */ | 96 | #define PCI9050_USER_IO_DIR3 0x04 /* 1= output (def.), 0= input */ |
97 | #define PCI9050_USER_IO_DAT3 0x08 /* 1= high (def.) , 0= low */ | 97 | #define PCI9050_USER_IO_DAT3 0x08 /* 1= high (def.) , 0= low */ |
98 | 98 | ||
99 | #define PCI9050_E1_RESET ( PCI9050_USER_IO_DIR3) /* 0x04 */ | 99 | #define PCI9050_E1_RESET (PCI9050_USER_IO_DIR3) /* 0x04 */ |
100 | #define PCI9050_E1_RUN (PCI9050_USER_IO_DAT3|PCI9050_USER_IO_DIR3) /* 0x0C */ | 100 | #define PCI9050_E1_RUN (PCI9050_USER_IO_DAT3 | PCI9050_USER_IO_DIR3) /* 0x0C */ |