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Diffstat (limited to 'drivers/isdn/hisax/hfc4s8s_l1.c')
-rw-r--r--drivers/isdn/hisax/hfc4s8s_l1.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/drivers/isdn/hisax/hfc4s8s_l1.c b/drivers/isdn/hisax/hfc4s8s_l1.c
index a2fa4ecb8c88..ab98e135bcbb 100644
--- a/drivers/isdn/hisax/hfc4s8s_l1.c
+++ b/drivers/isdn/hisax/hfc4s8s_l1.c
@@ -199,7 +199,7 @@ typedef struct _hfc4s8s_hw {
199/***************************/ 199/***************************/
200/* inline function defines */ 200/* inline function defines */
201/***************************/ 201/***************************/
202#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM /* inline functions mempry mapped */ 202#ifdef HISAX_HFC4S8S_PCIMEM /* inline functions memory mapped */
203 203
204/* memory write and dummy IO read to avoid PCI byte merge problems */ 204/* memory write and dummy IO read to avoid PCI byte merge problems */
205#define Write_hfc8(a,b,c) {(*((volatile u_char *)(a->membase+b)) = c); inb(a->iobase+4);} 205#define Write_hfc8(a,b,c) {(*((volatile u_char *)(a->membase+b)) = c); inb(a->iobase+4);}
@@ -305,7 +305,7 @@ wait_busy(hfc4s8s_hw * a)
305 305
306#define PCI_ENA_REGIO 0x01 306#define PCI_ENA_REGIO 0x01
307 307
308#endif /* CONFIG_HISAX_HFC4S8S_PCIMEM */ 308#endif /* HISAX_HFC4S8S_PCIMEM */
309 309
310/******************************************************/ 310/******************************************************/
311/* function to read critical counter registers that */ 311/* function to read critical counter registers that */
@@ -724,12 +724,12 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
724 } else { 724 } else {
725 /* read errornous D frame */ 725 /* read errornous D frame */
726 726
727#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 727#ifndef HISAX_HFC4S8S_PCIMEM
728 SetRegAddr(l1p->hw, A_FIFO_DATA0); 728 SetRegAddr(l1p->hw, A_FIFO_DATA0);
729#endif 729#endif
730 730
731 while (z1 >= 4) { 731 while (z1 >= 4) {
732#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 732#ifdef HISAX_HFC4S8S_PCIMEM
733 Read_hfc32(l1p->hw, A_FIFO_DATA0); 733 Read_hfc32(l1p->hw, A_FIFO_DATA0);
734#else 734#else
735 fRead_hfc32(l1p->hw); 735 fRead_hfc32(l1p->hw);
@@ -738,7 +738,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
738 } 738 }
739 739
740 while (z1--) 740 while (z1--)
741#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 741#ifdef HISAX_HFC4S8S_PCIMEM
742 Read_hfc8(l1p->hw, A_FIFO_DATA0); 742 Read_hfc8(l1p->hw, A_FIFO_DATA0);
743#else 743#else
744 fRead_hfc8(l1p->hw); 744 fRead_hfc8(l1p->hw);
@@ -752,12 +752,12 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
752 752
753 cp = skb->data; 753 cp = skb->data;
754 754
755#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 755#ifndef HISAX_HFC4S8S_PCIMEM
756 SetRegAddr(l1p->hw, A_FIFO_DATA0); 756 SetRegAddr(l1p->hw, A_FIFO_DATA0);
757#endif 757#endif
758 758
759 while (z1 >= 4) { 759 while (z1 >= 4) {
760#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 760#ifdef HISAX_HFC4S8S_PCIMEM
761 *((unsigned long *) cp) = 761 *((unsigned long *) cp) =
762 Read_hfc32(l1p->hw, A_FIFO_DATA0); 762 Read_hfc32(l1p->hw, A_FIFO_DATA0);
763#else 763#else
@@ -768,7 +768,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
768 } 768 }
769 769
770 while (z1--) 770 while (z1--)
771#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 771#ifdef HISAX_HFC4S8S_PCIMEM
772 *cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0); 772 *cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0);
773#else 773#else
774 *cp++ = fRead_hfc8(l1p->hw); 774 *cp++ = fRead_hfc8(l1p->hw);
@@ -858,12 +858,12 @@ rx_b_frame(struct hfc4s8s_btype *bch)
858 wait_busy(l1->hw); 858 wait_busy(l1->hw);
859 return; 859 return;
860 } 860 }
861#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 861#ifndef HISAX_HFC4S8S_PCIMEM
862 SetRegAddr(l1->hw, A_FIFO_DATA0); 862 SetRegAddr(l1->hw, A_FIFO_DATA0);
863#endif 863#endif
864 864
865 while (z1 >= 4) { 865 while (z1 >= 4) {
866#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 866#ifdef HISAX_HFC4S8S_PCIMEM
867 *((unsigned long *) bch->rx_ptr) = 867 *((unsigned long *) bch->rx_ptr) =
868 Read_hfc32(l1->hw, A_FIFO_DATA0); 868 Read_hfc32(l1->hw, A_FIFO_DATA0);
869#else 869#else
@@ -875,7 +875,7 @@ rx_b_frame(struct hfc4s8s_btype *bch)
875 } 875 }
876 876
877 while (z1--) 877 while (z1--)
878#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 878#ifdef HISAX_HFC4S8S_PCIMEM
879 *(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0); 879 *(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0);
880#else 880#else
881 *(bch->rx_ptr++) = fRead_hfc8(l1->hw); 881 *(bch->rx_ptr++) = fRead_hfc8(l1->hw);
@@ -939,12 +939,12 @@ tx_d_frame(struct hfc4s8s_l1 *l1p)
939 if ((skb = skb_dequeue(&l1p->d_tx_queue))) { 939 if ((skb = skb_dequeue(&l1p->d_tx_queue))) {
940 cp = skb->data; 940 cp = skb->data;
941 cnt = skb->len; 941 cnt = skb->len;
942#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 942#ifndef HISAX_HFC4S8S_PCIMEM
943 SetRegAddr(l1p->hw, A_FIFO_DATA0); 943 SetRegAddr(l1p->hw, A_FIFO_DATA0);
944#endif 944#endif
945 945
946 while (cnt >= 4) { 946 while (cnt >= 4) {
947#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 947#ifdef HISAX_HFC4S8S_PCIMEM
948 fWrite_hfc32(l1p->hw, A_FIFO_DATA0, 948 fWrite_hfc32(l1p->hw, A_FIFO_DATA0,
949 *(unsigned long *) cp); 949 *(unsigned long *) cp);
950#else 950#else
@@ -955,7 +955,7 @@ tx_d_frame(struct hfc4s8s_l1 *l1p)
955 cnt -= 4; 955 cnt -= 4;
956 } 956 }
957 957
958#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 958#ifdef HISAX_HFC4S8S_PCIMEM
959 while (cnt--) 959 while (cnt--)
960 fWrite_hfc8(l1p->hw, A_FIFO_DATA0, *cp++); 960 fWrite_hfc8(l1p->hw, A_FIFO_DATA0, *cp++);
961#else 961#else
@@ -1036,11 +1036,11 @@ tx_b_frame(struct hfc4s8s_btype *bch)
1036 cp = skb->data + bch->tx_cnt; 1036 cp = skb->data + bch->tx_cnt;
1037 bch->tx_cnt += cnt; 1037 bch->tx_cnt += cnt;
1038 1038
1039#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 1039#ifndef HISAX_HFC4S8S_PCIMEM
1040 SetRegAddr(l1->hw, A_FIFO_DATA0); 1040 SetRegAddr(l1->hw, A_FIFO_DATA0);
1041#endif 1041#endif
1042 while (cnt >= 4) { 1042 while (cnt >= 4) {
1043#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 1043#ifdef HISAX_HFC4S8S_PCIMEM
1044 fWrite_hfc32(l1->hw, A_FIFO_DATA0, 1044 fWrite_hfc32(l1->hw, A_FIFO_DATA0,
1045 *(unsigned long *) cp); 1045 *(unsigned long *) cp);
1046#else 1046#else
@@ -1051,7 +1051,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
1051 } 1051 }
1052 1052
1053 while (cnt--) 1053 while (cnt--)
1054#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 1054#ifdef HISAX_HFC4S8S_PCIMEM
1055 fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++); 1055 fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++);
1056#else 1056#else
1057 fWrite_hfc8(l1->hw, *cp++); 1057 fWrite_hfc8(l1->hw, *cp++);
@@ -1280,7 +1280,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
1280 if (!hw || !(hw->mr.r_irq_ctrl & M_GLOB_IRQ_EN)) 1280 if (!hw || !(hw->mr.r_irq_ctrl & M_GLOB_IRQ_EN))
1281 return IRQ_NONE; 1281 return IRQ_NONE;
1282 1282
1283#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 1283#ifndef HISAX_HFC4S8S_PCIMEM
1284 /* read current selected regsister */ 1284 /* read current selected regsister */
1285 old_ioreg = GetRegAddr(hw); 1285 old_ioreg = GetRegAddr(hw);
1286#endif 1286#endif
@@ -1291,7 +1291,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
1291 if (! 1291 if (!
1292 (b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA))) 1292 (b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA)))
1293&& !hw->mr.r_irq_statech) { 1293&& !hw->mr.r_irq_statech) {
1294#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 1294#ifndef HISAX_HFC4S8S_PCIMEM
1295 SetRegAddr(hw, old_ioreg); 1295 SetRegAddr(hw, old_ioreg);
1296#endif 1296#endif
1297 return IRQ_NONE; 1297 return IRQ_NONE;
@@ -1321,7 +1321,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
1321 /* queue the request to allow other cards to interrupt */ 1321 /* queue the request to allow other cards to interrupt */
1322 schedule_work(&hw->tqueue); 1322 schedule_work(&hw->tqueue);
1323 1323
1324#ifndef CONFIG_HISAX_HFC4S8S_PCIMEM 1324#ifndef HISAX_HFC4S8S_PCIMEM
1325 SetRegAddr(hw, old_ioreg); 1325 SetRegAddr(hw, old_ioreg);
1326#endif 1326#endif
1327 return IRQ_HANDLED; 1327 return IRQ_HANDLED;
@@ -1470,7 +1470,7 @@ static void
1470release_pci_ports(hfc4s8s_hw * hw) 1470release_pci_ports(hfc4s8s_hw * hw)
1471{ 1471{
1472 pci_write_config_word(hw->pdev, PCI_COMMAND, 0); 1472 pci_write_config_word(hw->pdev, PCI_COMMAND, 0);
1473#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 1473#ifdef HISAX_HFC4S8S_PCIMEM
1474 if (hw->membase) 1474 if (hw->membase)
1475 iounmap((void *) hw->membase); 1475 iounmap((void *) hw->membase);
1476#else 1476#else
@@ -1485,7 +1485,7 @@ release_pci_ports(hfc4s8s_hw * hw)
1485static void 1485static void
1486enable_pci_ports(hfc4s8s_hw * hw) 1486enable_pci_ports(hfc4s8s_hw * hw)
1487{ 1487{
1488#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 1488#ifdef HISAX_HFC4S8S_PCIMEM
1489 pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO); 1489 pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO);
1490#else 1490#else
1491 pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_REGIO); 1491 pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_REGIO);
@@ -1560,7 +1560,7 @@ setup_instance(hfc4s8s_hw * hw)
1560 hw->irq); 1560 hw->irq);
1561 goto out; 1561 goto out;
1562 } 1562 }
1563#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 1563#ifdef HISAX_HFC4S8S_PCIMEM
1564 printk(KERN_INFO 1564 printk(KERN_INFO
1565 "HFC-4S/8S: found PCI card at membase 0x%p, irq %d\n", 1565 "HFC-4S/8S: found PCI card at membase 0x%p, irq %d\n",
1566 hw->hw_membase, hw->irq); 1566 hw->hw_membase, hw->irq);
@@ -1613,7 +1613,7 @@ hfc4s8s_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1613 hw->irq = pdev->irq; 1613 hw->irq = pdev->irq;
1614 hw->iobase = pci_resource_start(pdev, 0); 1614 hw->iobase = pci_resource_start(pdev, 0);
1615 1615
1616#ifdef CONFIG_HISAX_HFC4S8S_PCIMEM 1616#ifdef HISAX_HFC4S8S_PCIMEM
1617 hw->hw_membase = (u_char *) pci_resource_start(pdev, 1); 1617 hw->hw_membase = (u_char *) pci_resource_start(pdev, 1);
1618 hw->membase = ioremap((ulong) hw->hw_membase, 256); 1618 hw->membase = ioremap((ulong) hw->hw_membase, 256);
1619#else 1619#else