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path: root/drivers/isdn/hisax/enternow_pci.c
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Diffstat (limited to 'drivers/isdn/hisax/enternow_pci.c')
-rw-r--r--drivers/isdn/hisax/enternow_pci.c91
1 files changed, 52 insertions, 39 deletions
diff --git a/drivers/isdn/hisax/enternow_pci.c b/drivers/isdn/hisax/enternow_pci.c
index 1cc4d11e007a..3341cf155531 100644
--- a/drivers/isdn/hisax/enternow_pci.c
+++ b/drivers/isdn/hisax/enternow_pci.c
@@ -65,7 +65,6 @@
65#include "isac.h" 65#include "isac.h"
66#include "isdnl1.h" 66#include "isdnl1.h"
67#include "amd7930_fn.h" 67#include "amd7930_fn.h"
68#include "enternow.h"
69#include <linux/interrupt.h> 68#include <linux/interrupt.h>
70#include <linux/ppp_defs.h> 69#include <linux/ppp_defs.h>
71#include <linux/pci.h> 70#include <linux/pci.h>
@@ -74,58 +73,72 @@
74 73
75 74
76 75
77const char *enternow_pci_rev = "$Revision: 1.1.4.5 $"; 76static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
77
78
79/* für PowerISDN PCI */
80#define TJ_AMD_IRQ 0x20
81#define TJ_LED1 0x40
82#define TJ_LED2 0x80
83
84
85/* Das Fenster zum AMD...
86 * Ab Adresse hw.njet.base + TJ_AMD_PORT werden vom AMD jeweils 8 Bit in
87 * den TigerJet i/o-Raum gemappt
88 * -> 0x01 des AMD bei hw.njet.base + 0C4 */
89#define TJ_AMD_PORT 0xC0
90
78 91
79 92
80/* *************************** I/O-Interface functions ************************************* */ 93/* *************************** I/O-Interface functions ************************************* */
81 94
82 95
83/* cs->readisac, macro rByteAMD */ 96/* cs->readisac, macro rByteAMD */
84BYTE 97static unsigned char
85ReadByteAmd7930(struct IsdnCardState *cs, BYTE offset) 98ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
86{ 99{
87 /* direktes Register */ 100 /* direktes Register */
88 if(offset < 8) 101 if(offset < 8)
89 return (InByte(cs->hw.njet.isac + 4*offset)); 102 return (inb(cs->hw.njet.isac + 4*offset));
90 103
91 /* indirektes Register */ 104 /* indirektes Register */
92 else { 105 else {
93 OutByte(cs->hw.njet.isac + 4*AMD_CR, offset); 106 outb(offset, cs->hw.njet.isac + 4*AMD_CR);
94 return(InByte(cs->hw.njet.isac + 4*AMD_DR)); 107 return(inb(cs->hw.njet.isac + 4*AMD_DR));
95 } 108 }
96} 109}
97 110
98/* cs->writeisac, macro wByteAMD */ 111/* cs->writeisac, macro wByteAMD */
99void 112static void
100WriteByteAmd7930(struct IsdnCardState *cs, BYTE offset, BYTE value) 113WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
101{ 114{
102 /* direktes Register */ 115 /* direktes Register */
103 if(offset < 8) 116 if(offset < 8)
104 OutByte(cs->hw.njet.isac + 4*offset, value); 117 outb(value, cs->hw.njet.isac + 4*offset);
105 118
106 /* indirektes Register */ 119 /* indirektes Register */
107 else { 120 else {
108 OutByte(cs->hw.njet.isac + 4*AMD_CR, offset); 121 outb(offset, cs->hw.njet.isac + 4*AMD_CR);
109 OutByte(cs->hw.njet.isac + 4*AMD_DR, value); 122 outb(value, cs->hw.njet.isac + 4*AMD_DR);
110 } 123 }
111} 124}
112 125
113 126
114void 127static void
115enpci_setIrqMask(struct IsdnCardState *cs, BYTE val) { 128enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
116 if (!val) 129 if (!val)
117 OutByte(cs->hw.njet.base+NETJET_IRQMASK1, 0x00); 130 outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
118 else 131 else
119 OutByte(cs->hw.njet.base+NETJET_IRQMASK1, TJ_AMD_IRQ); 132 outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
120} 133}
121 134
122 135
123static BYTE dummyrr(struct IsdnCardState *cs, int chan, BYTE off) 136static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
124{ 137{
125 return(5); 138 return(5);
126} 139}
127 140
128static void dummywr(struct IsdnCardState *cs, int chan, BYTE off, BYTE value) 141static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
129{ 142{
130 143
131} 144}
@@ -142,18 +155,18 @@ reset_enpci(struct IsdnCardState *cs)
142 155
143 /* Reset on, (also for AMD) */ 156 /* Reset on, (also for AMD) */
144 cs->hw.njet.ctrl_reg = 0x07; 157 cs->hw.njet.ctrl_reg = 0x07;
145 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); 158 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
146 mdelay(20); 159 mdelay(20);
147 /* Reset off */ 160 /* Reset off */
148 cs->hw.njet.ctrl_reg = 0x30; 161 cs->hw.njet.ctrl_reg = 0x30;
149 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); 162 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
150 /* 20ms delay */ 163 /* 20ms delay */
151 mdelay(20); 164 mdelay(20);
152 cs->hw.njet.auxd = 0; // LED-status 165 cs->hw.njet.auxd = 0; // LED-status
153 cs->hw.njet.dmactrl = 0; 166 cs->hw.njet.dmactrl = 0;
154 OutByte(cs->hw.njet.base + NETJET_AUXCTRL, ~TJ_AMD_IRQ); 167 outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
155 OutByte(cs->hw.njet.base + NETJET_IRQMASK1, TJ_AMD_IRQ); 168 outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
156 OutByte(cs->hw.njet.auxa, cs->hw.njet.auxd); // LED off 169 outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
157} 170}
158 171
159 172
@@ -161,7 +174,7 @@ static int
161enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg) 174enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
162{ 175{
163 u_long flags; 176 u_long flags;
164 BYTE *chan; 177 unsigned char *chan;
165 178
166 if (cs->debug & L1_DEB_ISAC) 179 if (cs->debug & L1_DEB_ISAC)
167 debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt); 180 debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
@@ -187,16 +200,16 @@ enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
187 case MDL_ASSIGN: 200 case MDL_ASSIGN:
188 /* TEI assigned, LED1 on */ 201 /* TEI assigned, LED1 on */
189 cs->hw.njet.auxd = TJ_AMD_IRQ << 1; 202 cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
190 OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd); 203 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
191 break; 204 break;
192 case MDL_REMOVE: 205 case MDL_REMOVE:
193 /* TEI removed, LEDs off */ 206 /* TEI removed, LEDs off */
194 cs->hw.njet.auxd = 0; 207 cs->hw.njet.auxd = 0;
195 OutByte(cs->hw.njet.base + NETJET_AUXDATA, 0x00); 208 outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
196 break; 209 break;
197 case MDL_BC_ASSIGN: 210 case MDL_BC_ASSIGN:
198 /* activate B-channel */ 211 /* activate B-channel */
199 chan = (BYTE *)arg; 212 chan = (unsigned char *)arg;
200 213
201 if (cs->debug & L1_DEB_ISAC) 214 if (cs->debug & L1_DEB_ISAC)
202 debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan); 215 debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
@@ -204,11 +217,11 @@ enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
204 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN"); 217 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
205 /* at least one b-channel in use, LED 2 on */ 218 /* at least one b-channel in use, LED 2 on */
206 cs->hw.njet.auxd |= TJ_AMD_IRQ << 2; 219 cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
207 OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd); 220 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
208 break; 221 break;
209 case MDL_BC_RELEASE: 222 case MDL_BC_RELEASE:
210 /* deactivate B-channel */ 223 /* deactivate B-channel */
211 chan = (BYTE *)arg; 224 chan = (unsigned char *)arg;
212 225
213 if (cs->debug & L1_DEB_ISAC) 226 if (cs->debug & L1_DEB_ISAC)
214 debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan); 227 debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
@@ -217,7 +230,7 @@ enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
217 /* no b-channel active -> LED2 off */ 230 /* no b-channel active -> LED2 off */
218 if (!(cs->dc.amd7930.lmr1 & 3)) { 231 if (!(cs->dc.amd7930.lmr1 & 3)) {
219 cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2); 232 cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
220 OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd); 233 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
221 } 234 }
222 break; 235 break;
223 default: 236 default:
@@ -231,11 +244,11 @@ static irqreturn_t
231enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs) 244enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
232{ 245{
233 struct IsdnCardState *cs = dev_id; 246 struct IsdnCardState *cs = dev_id;
234 BYTE s0val, s1val, ir; 247 unsigned char s0val, s1val, ir;
235 u_long flags; 248 u_long flags;
236 249
237 spin_lock_irqsave(&cs->lock, flags); 250 spin_lock_irqsave(&cs->lock, flags);
238 s1val = InByte(cs->hw.njet.base + NETJET_IRQSTAT1); 251 s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
239 252
240 /* AMD threw an interrupt */ 253 /* AMD threw an interrupt */
241 if (!(s1val & TJ_AMD_IRQ)) { 254 if (!(s1val & TJ_AMD_IRQ)) {
@@ -245,13 +258,13 @@ enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
245 s1val = 1; 258 s1val = 1;
246 } else 259 } else
247 s1val = 0; 260 s1val = 0;
248 s0val = InByte(cs->hw.njet.base + NETJET_IRQSTAT0); 261 s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
249 if ((s0val | s1val)==0) { // shared IRQ 262 if ((s0val | s1val)==0) { // shared IRQ
250 spin_unlock_irqrestore(&cs->lock, flags); 263 spin_unlock_irqrestore(&cs->lock, flags);
251 return IRQ_NONE; 264 return IRQ_NONE;
252 } 265 }
253 if (s0val) 266 if (s0val)
254 OutByte(cs->hw.njet.base + NETJET_IRQSTAT0, s0val); 267 outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
255 268
256 /* DMA-Interrupt: B-channel-stuff */ 269 /* DMA-Interrupt: B-channel-stuff */
257 /* set bits in sval to indicate which page is free */ 270 /* set bits in sval to indicate which page is free */
@@ -342,20 +355,20 @@ setup_enternow_pci(struct IsdnCard *card)
342 355
343 /* Reset an */ 356 /* Reset an */
344 cs->hw.njet.ctrl_reg = 0x07; // geändert von 0xff 357 cs->hw.njet.ctrl_reg = 0x07; // geändert von 0xff
345 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); 358 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
346 /* 20 ms Pause */ 359 /* 20 ms Pause */
347 mdelay(20); 360 mdelay(20);
348 361
349 cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */ 362 cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */
350 OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); 363 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
351 mdelay(10); 364 mdelay(10);
352 365
353 cs->hw.njet.auxd = 0x00; // war 0xc0 366 cs->hw.njet.auxd = 0x00; // war 0xc0
354 cs->hw.njet.dmactrl = 0; 367 cs->hw.njet.dmactrl = 0;
355 368
356 OutByte(cs->hw.njet.base + NETJET_AUXCTRL, ~TJ_AMD_IRQ); 369 outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
357 OutByte(cs->hw.njet.base + NETJET_IRQMASK1, TJ_AMD_IRQ); 370 outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
358 OutByte(cs->hw.njet.auxa, cs->hw.njet.auxd); 371 outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
359 372
360 break; 373 break;
361 } 374 }