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path: root/drivers/isdn/hisax/bkm_a8.c
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Diffstat (limited to 'drivers/isdn/hisax/bkm_a8.c')
-rw-r--r--drivers/isdn/hisax/bkm_a8.c184
1 files changed, 92 insertions, 92 deletions
diff --git a/drivers/isdn/hisax/bkm_a8.c b/drivers/isdn/hisax/bkm_a8.c
index e775706c60e3..c9c98f071af6 100644
--- a/drivers/isdn/hisax/bkm_a8.c
+++ b/drivers/isdn/hisax/bkm_a8.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -34,7 +34,7 @@ static const char *sct_quadro_subtypes[] =
34}; 34};
35 35
36 36
37#define wordout(addr,val) outw(val,addr) 37#define wordout(addr, val) outw(val, addr)
38#define wordin(addr) inw(addr) 38#define wordin(addr) inw(addr)
39 39
40static inline u_char 40static inline u_char
@@ -47,7 +47,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
47} 47}
48 48
49static inline void 49static inline void
50readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 50readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
51{ 51{
52 int i; 52 int i;
53 wordout(ale, off); 53 wordout(ale, off);
@@ -64,7 +64,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
64} 64}
65 65
66static inline void 66static inline void
67writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 67writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
68{ 68{
69 int i; 69 int i;
70 wordout(ale, off); 70 wordout(ale, off);
@@ -87,13 +87,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
87} 87}
88 88
89static void 89static void
90ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 90ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
91{ 91{
92 readfifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size); 92 readfifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
93} 93}
94 94
95static void 95static void
96WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 96WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
97{ 97{
98 writefifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size); 98 writefifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
99} 99}
@@ -117,21 +117,21 @@ set_ipac_active(struct IsdnCardState *cs, u_int active)
117{ 117{
118 /* set irq mask */ 118 /* set irq mask */
119 writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK, 119 writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK,
120 active ? 0xc0 : 0xff); 120 active ? 0xc0 : 0xff);
121} 121}
122 122
123/* 123/*
124 * fast interrupt HSCX stuff goes here 124 * fast interrupt HSCX stuff goes here
125 */ 125 */
126 126
127#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \ 127#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \
128 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0)) 128 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0))
129#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \ 129#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \
130 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data) 130 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data)
131#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \ 131#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \
132 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt) 132 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
133#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \ 133#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \
134 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt) 134 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
135 135
136#include "hscx_irq.c" 136#include "hscx_irq.c"
137 137
@@ -148,7 +148,7 @@ bkm_interrupt_ipac(int intno, void *dev_id)
148 spin_unlock_irqrestore(&cs->lock, flags); 148 spin_unlock_irqrestore(&cs->lock, flags);
149 return IRQ_NONE; 149 return IRQ_NONE;
150 } 150 }
151 Start_IPAC: 151Start_IPAC:
152 if (cs->debug & L1_DEB_IPAC) 152 if (cs->debug & L1_DEB_IPAC)
153 debugl1(cs, "IPAC ISTA %02X", ista); 153 debugl1(cs, "IPAC ISTA %02X", ista);
154 if (ista & 0x0f) { 154 if (ista & 0x0f) {
@@ -224,33 +224,33 @@ BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
224 u_long flags; 224 u_long flags;
225 225
226 switch (mt) { 226 switch (mt) {
227 case CARD_RESET: 227 case CARD_RESET:
228 spin_lock_irqsave(&cs->lock, flags); 228 spin_lock_irqsave(&cs->lock, flags);
229 /* Disable ints */ 229 /* Disable ints */
230 set_ipac_active(cs, 0); 230 set_ipac_active(cs, 0);
231 enable_bkm_int(cs, 0); 231 enable_bkm_int(cs, 0);
232 reset_bkm(cs); 232 reset_bkm(cs);
233 spin_unlock_irqrestore(&cs->lock, flags); 233 spin_unlock_irqrestore(&cs->lock, flags);
234 return (0); 234 return (0);
235 case CARD_RELEASE: 235 case CARD_RELEASE:
236 /* Sanity */ 236 /* Sanity */
237 spin_lock_irqsave(&cs->lock, flags); 237 spin_lock_irqsave(&cs->lock, flags);
238 set_ipac_active(cs, 0); 238 set_ipac_active(cs, 0);
239 enable_bkm_int(cs, 0); 239 enable_bkm_int(cs, 0);
240 spin_unlock_irqrestore(&cs->lock, flags); 240 spin_unlock_irqrestore(&cs->lock, flags);
241 release_io_sct_quadro(cs); 241 release_io_sct_quadro(cs);
242 return (0); 242 return (0);
243 case CARD_INIT: 243 case CARD_INIT:
244 spin_lock_irqsave(&cs->lock, flags); 244 spin_lock_irqsave(&cs->lock, flags);
245 cs->debug |= L1_DEB_IPAC; 245 cs->debug |= L1_DEB_IPAC;
246 set_ipac_active(cs, 1); 246 set_ipac_active(cs, 1);
247 inithscxisac(cs, 3); 247 inithscxisac(cs, 3);
248 /* Enable ints */ 248 /* Enable ints */
249 enable_bkm_int(cs, 1); 249 enable_bkm_int(cs, 1);
250 spin_unlock_irqrestore(&cs->lock, flags); 250 spin_unlock_irqrestore(&cs->lock, flags);
251 return (0); 251 return (0);
252 case CARD_TEST: 252 case CARD_TEST:
253 return (0); 253 return (0);
254 } 254 }
255 return (0); 255 return (0);
256} 256}
@@ -260,11 +260,11 @@ sct_alloc_io(u_int adr, u_int len)
260{ 260{
261 if (!request_region(adr, len, "scitel")) { 261 if (!request_region(adr, len, "scitel")) {
262 printk(KERN_WARNING 262 printk(KERN_WARNING
263 "HiSax: Scitel port %#x-%#x already in use\n", 263 "HiSax: Scitel port %#x-%#x already in use\n",
264 adr, adr + len); 264 adr, adr + len);
265 return (1); 265 return (1);
266 } 266 }
267 return(0); 267 return (0);
268} 268}
269 269
270static struct pci_dev *dev_a8 __devinitdata = NULL; 270static struct pci_dev *dev_a8 __devinitdata = NULL;
@@ -298,18 +298,18 @@ setup_sct_quadro(struct IsdnCard *card)
298 return (0); 298 return (0);
299 } 299 }
300 if ((cs->subtyp != SCT_1) && ((sub_sys_id != PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) || 300 if ((cs->subtyp != SCT_1) && ((sub_sys_id != PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) ||
301 (sub_vendor_id != PCI_VENDOR_ID_BERKOM))) 301 (sub_vendor_id != PCI_VENDOR_ID_BERKOM)))
302 return (0); 302 return (0);
303 if (cs->subtyp == SCT_1) { 303 if (cs->subtyp == SCT_1) {
304 while ((dev_a8 = hisax_find_pci_device(PCI_VENDOR_ID_PLX, 304 while ((dev_a8 = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
305 PCI_DEVICE_ID_PLX_9050, dev_a8))) { 305 PCI_DEVICE_ID_PLX_9050, dev_a8))) {
306 306
307 sub_vendor_id = dev_a8->subsystem_vendor; 307 sub_vendor_id = dev_a8->subsystem_vendor;
308 sub_sys_id = dev_a8->subsystem_device; 308 sub_sys_id = dev_a8->subsystem_device;
309 if ((sub_sys_id == PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) && 309 if ((sub_sys_id == PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) &&
310 (sub_vendor_id == PCI_VENDOR_ID_BERKOM)) { 310 (sub_vendor_id == PCI_VENDOR_ID_BERKOM)) {
311 if (pci_enable_device(dev_a8)) 311 if (pci_enable_device(dev_a8))
312 return(0); 312 return (0);
313 pci_ioaddr1 = pci_resource_start(dev_a8, 1); 313 pci_ioaddr1 = pci_resource_start(dev_a8, 1);
314 pci_irq = dev_a8->irq; 314 pci_irq = dev_a8->irq;
315 pci_bus = dev_a8->bus->number; 315 pci_bus = dev_a8->bus->number;
@@ -320,23 +320,23 @@ setup_sct_quadro(struct IsdnCard *card)
320 } 320 }
321 if (!found) { 321 if (!found) {
322 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): " 322 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): "
323 "Card not found\n", 323 "Card not found\n",
324 sct_quadro_subtypes[cs->subtyp]); 324 sct_quadro_subtypes[cs->subtyp]);
325 return (0); 325 return (0);
326 } 326 }
327#ifdef ATTEMPT_PCI_REMAPPING 327#ifdef ATTEMPT_PCI_REMAPPING
328/* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */ 328/* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */
329 if ((pci_ioaddr1 & 0x80) && (dev_a8->revision == 1)) { 329 if ((pci_ioaddr1 & 0x80) && (dev_a8->revision == 1)) {
330 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): " 330 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): "
331 "PLX rev 1, remapping required!\n", 331 "PLX rev 1, remapping required!\n",
332 sct_quadro_subtypes[cs->subtyp]); 332 sct_quadro_subtypes[cs->subtyp]);
333 /* Restart PCI negotiation */ 333 /* Restart PCI negotiation */
334 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int) - 1); 334 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int)-1);
335 /* Move up by 0x80 byte */ 335 /* Move up by 0x80 byte */
336 pci_ioaddr1 += 0x80; 336 pci_ioaddr1 += 0x80;
337 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK; 337 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK;
338 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, pci_ioaddr1); 338 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, pci_ioaddr1);
339 dev_a8->resource[ 1].start = pci_ioaddr1; 339 dev_a8->resource[1].start = pci_ioaddr1;
340 } 340 }
341#endif /* End HACK */ 341#endif /* End HACK */
342 } 342 }
@@ -371,39 +371,39 @@ setup_sct_quadro(struct IsdnCard *card)
371 /* pci_ioaddr5 is for the first subdevice only */ 371 /* pci_ioaddr5 is for the first subdevice only */
372 cs->hw.ax.plx_adr = pci_ioaddr1; 372 cs->hw.ax.plx_adr = pci_ioaddr1;
373 /* Enter all ipac_base addresses */ 373 /* Enter all ipac_base addresses */
374 switch(cs->subtyp) { 374 switch (cs->subtyp) {
375 case 1: 375 case 1:
376 cs->hw.ax.base = pci_ioaddr5 + 0x00; 376 cs->hw.ax.base = pci_ioaddr5 + 0x00;
377 if (sct_alloc_io(pci_ioaddr1, 128)) 377 if (sct_alloc_io(pci_ioaddr1, 128))
378 return(0); 378 return (0);
379 if (sct_alloc_io(pci_ioaddr5, 64)) 379 if (sct_alloc_io(pci_ioaddr5, 64))
380 return(0); 380 return (0);
381 /* disable all IPAC */ 381 /* disable all IPAC */
382 writereg(pci_ioaddr5, pci_ioaddr5 + 4, 382 writereg(pci_ioaddr5, pci_ioaddr5 + 4,
383 IPAC_MASK, 0xFF); 383 IPAC_MASK, 0xFF);
384 writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c, 384 writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c,
385 IPAC_MASK, 0xFF); 385 IPAC_MASK, 0xFF);
386 writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14, 386 writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14,
387 IPAC_MASK, 0xFF); 387 IPAC_MASK, 0xFF);
388 writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24, 388 writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24,
389 IPAC_MASK, 0xFF); 389 IPAC_MASK, 0xFF);
390 break; 390 break;
391 case 2: 391 case 2:
392 cs->hw.ax.base = pci_ioaddr4 + 0x08; 392 cs->hw.ax.base = pci_ioaddr4 + 0x08;
393 if (sct_alloc_io(pci_ioaddr4, 64)) 393 if (sct_alloc_io(pci_ioaddr4, 64))
394 return(0); 394 return (0);
395 break; 395 break;
396 case 3: 396 case 3:
397 cs->hw.ax.base = pci_ioaddr3 + 0x10; 397 cs->hw.ax.base = pci_ioaddr3 + 0x10;
398 if (sct_alloc_io(pci_ioaddr3, 64)) 398 if (sct_alloc_io(pci_ioaddr3, 64))
399 return(0); 399 return (0);
400 break; 400 break;
401 case 4: 401 case 4:
402 cs->hw.ax.base = pci_ioaddr2 + 0x20; 402 cs->hw.ax.base = pci_ioaddr2 + 0x20;
403 if (sct_alloc_io(pci_ioaddr2, 64)) 403 if (sct_alloc_io(pci_ioaddr2, 64))
404 return(0); 404 return (0);
405 break; 405 break;
406 } 406 }
407 /* For isac and hscx data path */ 407 /* For isac and hscx data path */
408 cs->hw.ax.data_adr = cs->hw.ax.base + 4; 408 cs->hw.ax.data_adr = cs->hw.ax.base + 4;
409 409
@@ -429,7 +429,7 @@ setup_sct_quadro(struct IsdnCard *card)
429 cs->irq_func = &bkm_interrupt_ipac; 429 cs->irq_func = &bkm_interrupt_ipac;
430 430
431 printk(KERN_INFO "HiSax: Scitel Quadro (%s): IPAC Version %d\n", 431 printk(KERN_INFO "HiSax: Scitel Quadro (%s): IPAC Version %d\n",
432 sct_quadro_subtypes[cs->subtyp], 432 sct_quadro_subtypes[cs->subtyp],
433 readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID)); 433 readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID));
434 return (1); 434 return (1);
435} 435}