1 files changed, 17 insertions, 6 deletions

diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 2f01073d6201..6a2e168c3ab0 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -43,6 +43,7 @@
 #define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS     (0x34)
 #define ARMADA_370_XP_INT_SOURCE_CTL(irq)       (0x100 + irq*4)
 #define ARMADA_370_XP_INT_SOURCE_CPU_MASK       0xF
+#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)   ((BIT(0) | BIT(8)) << cpuid)
 
 #define ARMADA_370_XP_CPU_INTACK_OFFS           (0x44)
 #define ARMADA_375_PPI_CAUSE                    (0x10)
@@ -406,19 +407,29 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq,
                                                   struct irq_desc *desc)
 {
         struct irq_chip *chip = irq_get_chip(irq);
-        unsigned long irqmap, irqn;
+        unsigned long irqmap, irqn, irqsrc, cpuid;
         unsigned int cascade_irq;
 
         chained_irq_enter(chip, desc);
 
         irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);
-
-        if (irqmap & BIT(1)) {
-                armada_370_xp_handle_msi_irq(NULL, true);
-                irqmap &= ~BIT(1);
-        }
+        cpuid = cpu_logical_map(smp_processor_id());
 
         for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {
+                irqsrc = readl_relaxed(main_int_base +
+                                       ARMADA_370_XP_INT_SOURCE_CTL(irqn));
+
+                /* Check if the interrupt is not masked on current CPU.
+                 * Test IRQ (0-1) and FIQ (8-9) mask bits.
+                 */
+                if (!(irqsrc & ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)))
+                        continue;
+
+                if (irqn == 1) {
+                        armada_370_xp_handle_msi_irq(NULL, true);
+                        continue;
+                }
+
                 cascade_irq = irq_find_mapping(armada_370_xp_mpic_domain, irqn);
                 generic_handle_irq(cascade_irq);
         }