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-rw-r--r--drivers/iommu/amd_iommu.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index a3b7072e86e2..341573821864 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -41,6 +41,24 @@
41 41
42#define LOOP_TIMEOUT 100000 42#define LOOP_TIMEOUT 100000
43 43
44/*
45 * This bitmap is used to advertise the page sizes our hardware support
46 * to the IOMMU core, which will then use this information to split
47 * physically contiguous memory regions it is mapping into page sizes
48 * that we support.
49 *
50 * Traditionally the IOMMU core just handed us the mappings directly,
51 * after making sure the size is an order of a 4KiB page and that the
52 * mapping has natural alignment.
53 *
54 * To retain this behavior, we currently advertise that we support
55 * all page sizes that are an order of 4KiB.
56 *
57 * If at some point we'd like to utilize the IOMMU core's new behavior,
58 * we could change this to advertise the real page sizes we support.
59 */
60#define AMD_IOMMU_PGSIZES (~0xFFFUL)
61
44static DEFINE_RWLOCK(amd_iommu_devtable_lock); 62static DEFINE_RWLOCK(amd_iommu_devtable_lock);
45 63
46/* A list of preallocated protection domains */ 64/* A list of preallocated protection domains */
@@ -2779,6 +2797,7 @@ static struct iommu_ops amd_iommu_ops = {
2779 .unmap = amd_iommu_unmap, 2797 .unmap = amd_iommu_unmap,
2780 .iova_to_phys = amd_iommu_iova_to_phys, 2798 .iova_to_phys = amd_iommu_iova_to_phys,
2781 .domain_has_cap = amd_iommu_domain_has_cap, 2799 .domain_has_cap = amd_iommu_domain_has_cap,
2800 .pgsize_bitmap = AMD_IOMMU_PGSIZES,
2782}; 2801};
2783 2802
2784/***************************************************************************** 2803/*****************************************************************************