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path: root/drivers/input/touchscreen/ucb1400_ts.c
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-rw-r--r--drivers/input/touchscreen/ucb1400_ts.c382
1 files changed, 134 insertions, 248 deletions
diff --git a/drivers/input/touchscreen/ucb1400_ts.c b/drivers/input/touchscreen/ucb1400_ts.c
index bce018e45bce..54986627def0 100644
--- a/drivers/input/touchscreen/ucb1400_ts.c
+++ b/drivers/input/touchscreen/ucb1400_ts.c
@@ -5,6 +5,10 @@
5 * Created: September 25, 2006 5 * Created: September 25, 2006
6 * Copyright: MontaVista Software, Inc. 6 * Copyright: MontaVista Software, Inc.
7 * 7 *
8 * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
9 * If something doesnt work and it worked before spliting, e-mail me,
10 * dont bother Nicolas please ;-)
11 *
8 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
@@ -25,124 +29,16 @@
25#include <linux/slab.h> 29#include <linux/slab.h>
26#include <linux/kthread.h> 30#include <linux/kthread.h>
27#include <linux/freezer.h> 31#include <linux/freezer.h>
28 32#include <linux/ucb1400.h>
29#include <sound/core.h>
30#include <sound/ac97_codec.h>
31
32
33/*
34 * Interesting UCB1400 AC-link registers
35 */
36
37#define UCB_IE_RIS 0x5e
38#define UCB_IE_FAL 0x60
39#define UCB_IE_STATUS 0x62
40#define UCB_IE_CLEAR 0x62
41#define UCB_IE_ADC (1 << 11)
42#define UCB_IE_TSPX (1 << 12)
43
44#define UCB_TS_CR 0x64
45#define UCB_TS_CR_TSMX_POW (1 << 0)
46#define UCB_TS_CR_TSPX_POW (1 << 1)
47#define UCB_TS_CR_TSMY_POW (1 << 2)
48#define UCB_TS_CR_TSPY_POW (1 << 3)
49#define UCB_TS_CR_TSMX_GND (1 << 4)
50#define UCB_TS_CR_TSPX_GND (1 << 5)
51#define UCB_TS_CR_TSMY_GND (1 << 6)
52#define UCB_TS_CR_TSPY_GND (1 << 7)
53#define UCB_TS_CR_MODE_INT (0 << 8)
54#define UCB_TS_CR_MODE_PRES (1 << 8)
55#define UCB_TS_CR_MODE_POS (2 << 8)
56#define UCB_TS_CR_BIAS_ENA (1 << 11)
57#define UCB_TS_CR_TSPX_LOW (1 << 12)
58#define UCB_TS_CR_TSMX_LOW (1 << 13)
59
60#define UCB_ADC_CR 0x66
61#define UCB_ADC_SYNC_ENA (1 << 0)
62#define UCB_ADC_VREFBYP_CON (1 << 1)
63#define UCB_ADC_INP_TSPX (0 << 2)
64#define UCB_ADC_INP_TSMX (1 << 2)
65#define UCB_ADC_INP_TSPY (2 << 2)
66#define UCB_ADC_INP_TSMY (3 << 2)
67#define UCB_ADC_INP_AD0 (4 << 2)
68#define UCB_ADC_INP_AD1 (5 << 2)
69#define UCB_ADC_INP_AD2 (6 << 2)
70#define UCB_ADC_INP_AD3 (7 << 2)
71#define UCB_ADC_EXT_REF (1 << 5)
72#define UCB_ADC_START (1 << 7)
73#define UCB_ADC_ENA (1 << 15)
74
75#define UCB_ADC_DATA 0x68
76#define UCB_ADC_DAT_VALID (1 << 15)
77#define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
78
79#define UCB_ID 0x7e
80#define UCB_ID_1400 0x4304
81
82
83struct ucb1400 {
84 struct snd_ac97 *ac97;
85 struct input_dev *ts_idev;
86
87 int irq;
88
89 wait_queue_head_t ts_wait;
90 struct task_struct *ts_task;
91
92 unsigned int irq_pending; /* not bit field shared */
93 unsigned int ts_restart:1;
94 unsigned int adcsync:1;
95};
96 33
97static int adcsync; 34static int adcsync;
98static int ts_delay = 55; /* us */ 35static int ts_delay = 55; /* us */
99static int ts_delay_pressure; /* us */ 36static int ts_delay_pressure; /* us */
100 37
101static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
102{
103 return ucb->ac97->bus->ops->read(ucb->ac97, reg);
104}
105
106static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
107{
108 ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
109}
110
111static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
112{
113 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
114}
115
116static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
117{
118 unsigned int val;
119
120 if (ucb->adcsync)
121 adc_channel |= UCB_ADC_SYNC_ENA;
122
123 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
124 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);
125
126 for (;;) {
127 val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
128 if (val & UCB_ADC_DAT_VALID)
129 break;
130 /* yield to other processes */
131 schedule_timeout_uninterruptible(1);
132 }
133
134 return UCB_ADC_DAT_VALUE(val);
135}
136
137static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
138{
139 ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
140}
141
142/* Switch to interrupt mode. */ 38/* Switch to interrupt mode. */
143static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb) 39static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97)
144{ 40{
145 ucb1400_reg_write(ucb, UCB_TS_CR, 41 ucb1400_reg_write(ac97, UCB_TS_CR,
146 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | 42 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
147 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | 43 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
148 UCB_TS_CR_MODE_INT); 44 UCB_TS_CR_MODE_INT);
@@ -152,14 +48,14 @@ static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
152 * Switch to pressure mode, and read pressure. We don't need to wait 48 * Switch to pressure mode, and read pressure. We don't need to wait
153 * here, since both plates are being driven. 49 * here, since both plates are being driven.
154 */ 50 */
155static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb) 51static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb)
156{ 52{
157 ucb1400_reg_write(ucb, UCB_TS_CR, 53 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
158 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | 54 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
159 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | 55 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
160 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 56 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
161 udelay(ts_delay_pressure); 57 udelay(ts_delay_pressure);
162 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); 58 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
163} 59}
164 60
165/* 61/*
@@ -168,21 +64,21 @@ static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
168 * gives a faster response time. Even so, we need to wait about 55us 64 * gives a faster response time. Even so, we need to wait about 55us
169 * for things to stabilise. 65 * for things to stabilise.
170 */ 66 */
171static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb) 67static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb)
172{ 68{
173 ucb1400_reg_write(ucb, UCB_TS_CR, 69 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
174 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 70 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
175 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 71 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
176 ucb1400_reg_write(ucb, UCB_TS_CR, 72 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
177 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 73 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
178 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 74 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
179 ucb1400_reg_write(ucb, UCB_TS_CR, 75 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
180 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 76 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
181 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); 77 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
182 78
183 udelay(ts_delay); 79 udelay(ts_delay);
184 80
185 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); 81 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
186} 82}
187 83
188/* 84/*
@@ -191,63 +87,63 @@ static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
191 * gives a faster response time. Even so, we need to wait about 55us 87 * gives a faster response time. Even so, we need to wait about 55us
192 * for things to stabilise. 88 * for things to stabilise.
193 */ 89 */
194static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb) 90static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb)
195{ 91{
196 ucb1400_reg_write(ucb, UCB_TS_CR, 92 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
197 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 93 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
198 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 94 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
199 ucb1400_reg_write(ucb, UCB_TS_CR, 95 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
200 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 96 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
201 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 97 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
202 ucb1400_reg_write(ucb, UCB_TS_CR, 98 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
203 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 99 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
204 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); 100 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
205 101
206 udelay(ts_delay); 102 udelay(ts_delay);
207 103
208 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX); 104 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync);
209} 105}
210 106
211/* 107/*
212 * Switch to X plate resistance mode. Set MX to ground, PX to 108 * Switch to X plate resistance mode. Set MX to ground, PX to
213 * supply. Measure current. 109 * supply. Measure current.
214 */ 110 */
215static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb) 111static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb)
216{ 112{
217 ucb1400_reg_write(ucb, UCB_TS_CR, 113 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
218 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 114 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
219 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 115 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
220 return ucb1400_adc_read(ucb, 0); 116 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
221} 117}
222 118
223/* 119/*
224 * Switch to Y plate resistance mode. Set MY to ground, PY to 120 * Switch to Y plate resistance mode. Set MY to ground, PY to
225 * supply. Measure current. 121 * supply. Measure current.
226 */ 122 */
227static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb) 123static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb)
228{ 124{
229 ucb1400_reg_write(ucb, UCB_TS_CR, 125 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
230 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 126 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
231 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 127 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
232 return ucb1400_adc_read(ucb, 0); 128 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
233} 129}
234 130
235static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb) 131static inline int ucb1400_ts_pen_down(struct snd_ac97 *ac97)
236{ 132{
237 unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR); 133 unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR);
238 return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)); 134 return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW);
239} 135}
240 136
241static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb) 137static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97)
242{ 138{
243 ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX); 139 ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX);
244 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 140 ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0);
245 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX); 141 ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX);
246} 142}
247 143
248static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb) 144static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97)
249{ 145{
250 ucb1400_reg_write(ucb, UCB_IE_FAL, 0); 146 ucb1400_reg_write(ac97, UCB_IE_FAL, 0);
251} 147}
252 148
253static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) 149static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
@@ -264,25 +160,24 @@ static void ucb1400_ts_event_release(struct input_dev *idev)
264 input_sync(idev); 160 input_sync(idev);
265} 161}
266 162
267static void ucb1400_handle_pending_irq(struct ucb1400 *ucb) 163static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb)
268{ 164{
269 unsigned int isr; 165 unsigned int isr;
270 166
271 isr = ucb1400_reg_read(ucb, UCB_IE_STATUS); 167 isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS);
272 ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr); 168 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr);
273 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 169 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
274 170
275 if (isr & UCB_IE_TSPX) 171 if (isr & UCB_IE_TSPX) {
276 ucb1400_ts_irq_disable(ucb); 172 ucb1400_ts_irq_disable(ucb->ac97);
277 else 173 enable_irq(ucb->irq);
174 } else
278 printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr); 175 printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
279
280 enable_irq(ucb->irq);
281} 176}
282 177
283static int ucb1400_ts_thread(void *_ucb) 178static int ucb1400_ts_thread(void *_ucb)
284{ 179{
285 struct ucb1400 *ucb = _ucb; 180 struct ucb1400_ts *ucb = _ucb;
286 struct task_struct *tsk = current; 181 struct task_struct *tsk = current;
287 int valid = 0; 182 int valid = 0;
288 struct sched_param param = { .sched_priority = 1 }; 183 struct sched_param param = { .sched_priority = 1 };
@@ -301,19 +196,19 @@ static int ucb1400_ts_thread(void *_ucb)
301 ucb1400_handle_pending_irq(ucb); 196 ucb1400_handle_pending_irq(ucb);
302 } 197 }
303 198
304 ucb1400_adc_enable(ucb); 199 ucb1400_adc_enable(ucb->ac97);
305 x = ucb1400_ts_read_xpos(ucb); 200 x = ucb1400_ts_read_xpos(ucb);
306 y = ucb1400_ts_read_ypos(ucb); 201 y = ucb1400_ts_read_ypos(ucb);
307 p = ucb1400_ts_read_pressure(ucb); 202 p = ucb1400_ts_read_pressure(ucb);
308 ucb1400_adc_disable(ucb); 203 ucb1400_adc_disable(ucb->ac97);
309 204
310 /* Switch back to interrupt mode. */ 205 /* Switch back to interrupt mode. */
311 ucb1400_ts_mode_int(ucb); 206 ucb1400_ts_mode_int(ucb->ac97);
312 207
313 msleep(10); 208 msleep(10);
314 209
315 if (ucb1400_ts_pen_down(ucb)) { 210 if (ucb1400_ts_pen_down(ucb->ac97)) {
316 ucb1400_ts_irq_enable(ucb); 211 ucb1400_ts_irq_enable(ucb->ac97);
317 212
318 /* 213 /*
319 * If we spat out a valid sample set last time, 214 * If we spat out a valid sample set last time,
@@ -332,8 +227,8 @@ static int ucb1400_ts_thread(void *_ucb)
332 } 227 }
333 228
334 wait_event_freezable_timeout(ucb->ts_wait, 229 wait_event_freezable_timeout(ucb->ts_wait,
335 ucb->irq_pending || ucb->ts_restart || kthread_should_stop(), 230 ucb->irq_pending || ucb->ts_restart ||
336 timeout); 231 kthread_should_stop(), timeout);
337 } 232 }
338 233
339 /* Send the "pen off" if we are stopping with the pen still active */ 234 /* Send the "pen off" if we are stopping with the pen still active */
@@ -356,7 +251,7 @@ static int ucb1400_ts_thread(void *_ucb)
356 */ 251 */
357static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) 252static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
358{ 253{
359 struct ucb1400 *ucb = devid; 254 struct ucb1400_ts *ucb = devid;
360 255
361 if (irqnr == ucb->irq) { 256 if (irqnr == ucb->irq) {
362 disable_irq(ucb->irq); 257 disable_irq(ucb->irq);
@@ -369,7 +264,7 @@ static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
369 264
370static int ucb1400_ts_open(struct input_dev *idev) 265static int ucb1400_ts_open(struct input_dev *idev)
371{ 266{
372 struct ucb1400 *ucb = input_get_drvdata(idev); 267 struct ucb1400_ts *ucb = input_get_drvdata(idev);
373 int ret = 0; 268 int ret = 0;
374 269
375 BUG_ON(ucb->ts_task); 270 BUG_ON(ucb->ts_task);
@@ -385,34 +280,14 @@ static int ucb1400_ts_open(struct input_dev *idev)
385 280
386static void ucb1400_ts_close(struct input_dev *idev) 281static void ucb1400_ts_close(struct input_dev *idev)
387{ 282{
388 struct ucb1400 *ucb = input_get_drvdata(idev); 283 struct ucb1400_ts *ucb = input_get_drvdata(idev);
389 284
390 if (ucb->ts_task) 285 if (ucb->ts_task)
391 kthread_stop(ucb->ts_task); 286 kthread_stop(ucb->ts_task);
392 287
393 ucb1400_ts_irq_disable(ucb); 288 ucb1400_ts_irq_disable(ucb->ac97);
394 ucb1400_reg_write(ucb, UCB_TS_CR, 0); 289 ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0);
395}
396
397#ifdef CONFIG_PM
398static int ucb1400_ts_resume(struct device *dev)
399{
400 struct ucb1400 *ucb = dev_get_drvdata(dev);
401
402 if (ucb->ts_task) {
403 /*
404 * Restart the TS thread to ensure the
405 * TS interrupt mode is set up again
406 * after sleep.
407 */
408 ucb->ts_restart = 1;
409 wake_up(&ucb->ts_wait);
410 }
411 return 0;
412} 290}
413#else
414#define ucb1400_ts_resume NULL
415#endif
416 291
417#ifndef NO_IRQ 292#ifndef NO_IRQ
418#define NO_IRQ 0 293#define NO_IRQ 0
@@ -422,25 +297,26 @@ static int ucb1400_ts_resume(struct device *dev)
422 * Try to probe our interrupt, rather than relying on lots of 297 * Try to probe our interrupt, rather than relying on lots of
423 * hard-coded machine dependencies. 298 * hard-coded machine dependencies.
424 */ 299 */
425static int ucb1400_detect_irq(struct ucb1400 *ucb) 300static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb)
426{ 301{
427 unsigned long mask, timeout; 302 unsigned long mask, timeout;
428 303
429 mask = probe_irq_on(); 304 mask = probe_irq_on();
430 305
431 /* Enable the ADC interrupt. */ 306 /* Enable the ADC interrupt. */
432 ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC); 307 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC);
433 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC); 308 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC);
434 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); 309 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
435 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 310 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
436 311
437 /* Cause an ADC interrupt. */ 312 /* Cause an ADC interrupt. */
438 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); 313 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA);
439 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); 314 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
440 315
441 /* Wait for the conversion to complete. */ 316 /* Wait for the conversion to complete. */
442 timeout = jiffies + HZ/2; 317 timeout = jiffies + HZ/2;
443 while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) { 318 while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) &
319 UCB_ADC_DAT_VALID)) {
444 cpu_relax(); 320 cpu_relax();
445 if (time_after(jiffies, timeout)) { 321 if (time_after(jiffies, timeout)) {
446 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); 322 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
@@ -448,13 +324,13 @@ static int ucb1400_detect_irq(struct ucb1400 *ucb)
448 return -ENODEV; 324 return -ENODEV;
449 } 325 }
450 } 326 }
451 ucb1400_reg_write(ucb, UCB_ADC_CR, 0); 327 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0);
452 328
453 /* Disable and clear interrupt. */ 329 /* Disable and clear interrupt. */
454 ucb1400_reg_write(ucb, UCB_IE_RIS, 0); 330 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0);
455 ucb1400_reg_write(ucb, UCB_IE_FAL, 0); 331 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
456 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); 332 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
457 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 333 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
458 334
459 /* Read triggered interrupt. */ 335 /* Read triggered interrupt. */
460 ucb->irq = probe_irq_off(mask); 336 ucb->irq = probe_irq_off(mask);
@@ -464,36 +340,25 @@ static int ucb1400_detect_irq(struct ucb1400 *ucb)
464 return 0; 340 return 0;
465} 341}
466 342
467static int ucb1400_ts_probe(struct device *dev) 343static int ucb1400_ts_probe(struct platform_device *dev)
468{ 344{
469 struct ucb1400 *ucb; 345 int error, x_res, y_res;
470 struct input_dev *idev; 346 struct ucb1400_ts *ucb = dev->dev.platform_data;
471 int error, id, x_res, y_res;
472 347
473 ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL); 348 ucb->ts_idev = input_allocate_device();
474 idev = input_allocate_device(); 349 if (!ucb->ts_idev) {
475 if (!ucb || !idev) {
476 error = -ENOMEM; 350 error = -ENOMEM;
477 goto err_free_devs; 351 goto err;
478 } 352 }
479 353
480 ucb->ts_idev = idev; 354 error = ucb1400_ts_detect_irq(ucb);
481 ucb->adcsync = adcsync;
482 ucb->ac97 = to_ac97_t(dev);
483 init_waitqueue_head(&ucb->ts_wait);
484
485 id = ucb1400_reg_read(ucb, UCB_ID);
486 if (id != UCB_ID_1400) {
487 error = -ENODEV;
488 goto err_free_devs;
489 }
490
491 error = ucb1400_detect_irq(ucb);
492 if (error) { 355 if (error) {
493 printk(KERN_ERR "UCB1400: IRQ probe failed\n"); 356 printk(KERN_ERR "UCB1400: IRQ probe failed\n");
494 goto err_free_devs; 357 goto err_free_devs;
495 } 358 }
496 359
360 init_waitqueue_head(&ucb->ts_wait);
361
497 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, 362 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
498 "UCB1400", ucb); 363 "UCB1400", ucb);
499 if (error) { 364 if (error) {
@@ -503,80 +368,101 @@ static int ucb1400_ts_probe(struct device *dev)
503 } 368 }
504 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); 369 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
505 370
506 input_set_drvdata(idev, ucb); 371 input_set_drvdata(ucb->ts_idev, ucb);
507 372
508 idev->dev.parent = dev; 373 ucb->ts_idev->dev.parent = &dev->dev;
509 idev->name = "UCB1400 touchscreen interface"; 374 ucb->ts_idev->name = "UCB1400 touchscreen interface";
510 idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1); 375 ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97,
511 idev->id.product = id; 376 AC97_VENDOR_ID1);
512 idev->open = ucb1400_ts_open; 377 ucb->ts_idev->id.product = ucb->id;
513 idev->close = ucb1400_ts_close; 378 ucb->ts_idev->open = ucb1400_ts_open;
514 idev->evbit[0] = BIT_MASK(EV_ABS); 379 ucb->ts_idev->close = ucb1400_ts_close;
380 ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS);
515 381
516 ucb1400_adc_enable(ucb); 382 ucb1400_adc_enable(ucb->ac97);
517 x_res = ucb1400_ts_read_xres(ucb); 383 x_res = ucb1400_ts_read_xres(ucb);
518 y_res = ucb1400_ts_read_yres(ucb); 384 y_res = ucb1400_ts_read_yres(ucb);
519 ucb1400_adc_disable(ucb); 385 ucb1400_adc_disable(ucb->ac97);
520 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); 386 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
521 387
522 input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0); 388 input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0);
523 input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0); 389 input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0);
524 input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0); 390 input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0);
525 391
526 error = input_register_device(idev); 392 error = input_register_device(ucb->ts_idev);
527 if (error) 393 if (error)
528 goto err_free_irq; 394 goto err_free_irq;
529 395
530 dev_set_drvdata(dev, ucb);
531 return 0; 396 return 0;
532 397
533 err_free_irq: 398err_free_irq:
534 free_irq(ucb->irq, ucb); 399 free_irq(ucb->irq, ucb);
535 err_free_devs: 400err_free_devs:
536 input_free_device(idev); 401 input_free_device(ucb->ts_idev);
537 kfree(ucb); 402err:
538 return error; 403 return error;
404
539} 405}
540 406
541static int ucb1400_ts_remove(struct device *dev) 407static int ucb1400_ts_remove(struct platform_device *dev)
542{ 408{
543 struct ucb1400 *ucb = dev_get_drvdata(dev); 409 struct ucb1400_ts *ucb = dev->dev.platform_data;
544 410
545 free_irq(ucb->irq, ucb); 411 free_irq(ucb->irq, ucb);
546 input_unregister_device(ucb->ts_idev); 412 input_unregister_device(ucb->ts_idev);
547 dev_set_drvdata(dev, NULL);
548 kfree(ucb);
549 return 0; 413 return 0;
550} 414}
551 415
552static struct device_driver ucb1400_ts_driver = { 416#ifdef CONFIG_PM
553 .name = "ucb1400_ts", 417static int ucb1400_ts_resume(struct platform_device *dev)
554 .owner = THIS_MODULE, 418{
555 .bus = &ac97_bus_type, 419 struct ucb1400_ts *ucb = platform_get_drvdata(dev);
556 .probe = ucb1400_ts_probe, 420
557 .remove = ucb1400_ts_remove, 421 if (ucb->ts_task) {
558 .resume = ucb1400_ts_resume, 422 /*
423 * Restart the TS thread to ensure the
424 * TS interrupt mode is set up again
425 * after sleep.
426 */
427 ucb->ts_restart = 1;
428 wake_up(&ucb->ts_wait);
429 }
430 return 0;
431}
432#else
433#define ucb1400_ts_resume NULL
434#endif
435
436static struct platform_driver ucb1400_ts_driver = {
437 .probe = ucb1400_ts_probe,
438 .remove = ucb1400_ts_remove,
439 .resume = ucb1400_ts_resume,
440 .driver = {
441 .name = "ucb1400_ts",
442 },
559}; 443};
560 444
561static int __init ucb1400_ts_init(void) 445static int __init ucb1400_ts_init(void)
562{ 446{
563 return driver_register(&ucb1400_ts_driver); 447 return platform_driver_register(&ucb1400_ts_driver);
564} 448}
565 449
566static void __exit ucb1400_ts_exit(void) 450static void __exit ucb1400_ts_exit(void)
567{ 451{
568 driver_unregister(&ucb1400_ts_driver); 452 platform_driver_unregister(&ucb1400_ts_driver);
569} 453}
570 454
571module_param(adcsync, bool, 0444); 455module_param(adcsync, bool, 0444);
572MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); 456MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
573 457
574module_param(ts_delay, int, 0444); 458module_param(ts_delay, int, 0444);
575MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us."); 459MODULE_PARM_DESC(ts_delay, "Delay between panel setup and"
460 " position read. Default = 55us.");
576 461
577module_param(ts_delay_pressure, int, 0444); 462module_param(ts_delay_pressure, int, 0444);
578MODULE_PARM_DESC(ts_delay_pressure, 463MODULE_PARM_DESC(ts_delay_pressure,
579 "delay between panel setup and pressure read. Default = 0us."); 464 "delay between panel setup and pressure read."
465 " Default = 0us.");
580 466
581module_init(ucb1400_ts_init); 467module_init(ucb1400_ts_init);
582module_exit(ucb1400_ts_exit); 468module_exit(ucb1400_ts_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 23:50:21 -0500