diff options
Diffstat (limited to 'drivers/input/serio')
-rw-r--r-- | drivers/input/serio/i8042-ppcio.h | 75 | ||||
-rw-r--r-- | drivers/input/serio/i8042.c | 65 |
2 files changed, 41 insertions, 99 deletions
diff --git a/drivers/input/serio/i8042-ppcio.h b/drivers/input/serio/i8042-ppcio.h index 2906e1b60c04..f708c75d16f1 100644 --- a/drivers/input/serio/i8042-ppcio.h +++ b/drivers/input/serio/i8042-ppcio.h | |||
@@ -52,81 +52,6 @@ static inline void i8042_platform_exit(void) | |||
52 | { | 52 | { |
53 | } | 53 | } |
54 | 54 | ||
55 | #elif defined(CONFIG_SPRUCE) | ||
56 | |||
57 | #define I8042_KBD_IRQ 22 | ||
58 | #define I8042_AUX_IRQ 21 | ||
59 | |||
60 | #define I8042_KBD_PHYS_DESC "spruceps2/serio0" | ||
61 | #define I8042_AUX_PHYS_DESC "spruceps2/serio1" | ||
62 | #define I8042_MUX_PHYS_DESC "spruceps2/serio%d" | ||
63 | |||
64 | #define I8042_COMMAND_REG 0xff810000 | ||
65 | #define I8042_DATA_REG 0xff810001 | ||
66 | |||
67 | static inline int i8042_read_data(void) | ||
68 | { | ||
69 | unsigned long kbd_data; | ||
70 | |||
71 | __raw_writel(0x00000088, 0xff500008); | ||
72 | eieio(); | ||
73 | |||
74 | __raw_writel(0x03000000, 0xff50000c); | ||
75 | eieio(); | ||
76 | |||
77 | asm volatile("lis 7,0xff88 \n\ | ||
78 | lswi 6,7,0x8 \n\ | ||
79 | mr %0,6" | ||
80 | : "=r" (kbd_data) :: "6", "7"); | ||
81 | |||
82 | __raw_writel(0x00000000, 0xff50000c); | ||
83 | eieio(); | ||
84 | |||
85 | return (unsigned char)(kbd_data >> 24); | ||
86 | } | ||
87 | |||
88 | static inline int i8042_read_status(void) | ||
89 | { | ||
90 | unsigned long kbd_status; | ||
91 | |||
92 | __raw_writel(0x00000088, 0xff500008); | ||
93 | eieio(); | ||
94 | |||
95 | __raw_writel(0x03000000, 0xff50000c); | ||
96 | eieio(); | ||
97 | |||
98 | asm volatile("lis 7,0xff88 \n\ | ||
99 | ori 7,7,0x8 \n\ | ||
100 | lswi 6,7,0x8 \n\ | ||
101 | mr %0,6" | ||
102 | : "=r" (kbd_status) :: "6", "7"); | ||
103 | |||
104 | __raw_writel(0x00000000, 0xff50000c); | ||
105 | eieio(); | ||
106 | |||
107 | return (unsigned char)(kbd_status >> 24); | ||
108 | } | ||
109 | |||
110 | static inline void i8042_write_data(int val) | ||
111 | { | ||
112 | *((unsigned char *)0xff810000) = (char)val; | ||
113 | } | ||
114 | |||
115 | static inline void i8042_write_command(int val) | ||
116 | { | ||
117 | *((unsigned char *)0xff810001) = (char)val; | ||
118 | } | ||
119 | |||
120 | static inline int i8042_platform_init(void) | ||
121 | { | ||
122 | i8042_reset = 1; | ||
123 | return 0; | ||
124 | } | ||
125 | |||
126 | static inline void i8042_platform_exit(void) | ||
127 | { | ||
128 | } | ||
129 | |||
130 | #else | 55 | #else |
131 | 56 | ||
132 | #include "i8042-io.h" | 57 | #include "i8042-io.h" |
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 6440a8f55686..258b98b9d7c2 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c | |||
@@ -861,9 +861,6 @@ static int i8042_controller_selftest(void) | |||
861 | unsigned char param; | 861 | unsigned char param; |
862 | int i = 0; | 862 | int i = 0; |
863 | 863 | ||
864 | if (!i8042_reset) | ||
865 | return 0; | ||
866 | |||
867 | /* | 864 | /* |
868 | * We try this 5 times; on some really fragile systems this does not | 865 | * We try this 5 times; on some really fragile systems this does not |
869 | * take the first time... | 866 | * take the first time... |
@@ -1020,7 +1017,8 @@ static void i8042_controller_reset(void) | |||
1020 | * Reset the controller if requested. | 1017 | * Reset the controller if requested. |
1021 | */ | 1018 | */ |
1022 | 1019 | ||
1023 | i8042_controller_selftest(); | 1020 | if (i8042_reset) |
1021 | i8042_controller_selftest(); | ||
1024 | 1022 | ||
1025 | /* | 1023 | /* |
1026 | * Restore the original control register setting. | 1024 | * Restore the original control register setting. |
@@ -1094,23 +1092,11 @@ static void i8042_dritek_enable(void) | |||
1094 | #ifdef CONFIG_PM | 1092 | #ifdef CONFIG_PM |
1095 | 1093 | ||
1096 | /* | 1094 | /* |
1097 | * Here we try to restore the original BIOS settings to avoid | ||
1098 | * upsetting it. | ||
1099 | */ | ||
1100 | |||
1101 | static int i8042_pm_reset(struct device *dev) | ||
1102 | { | ||
1103 | i8042_controller_reset(); | ||
1104 | |||
1105 | return 0; | ||
1106 | } | ||
1107 | |||
1108 | /* | ||
1109 | * Here we try to reset everything back to a state we had | 1095 | * Here we try to reset everything back to a state we had |
1110 | * before suspending. | 1096 | * before suspending. |
1111 | */ | 1097 | */ |
1112 | 1098 | ||
1113 | static int i8042_pm_restore(struct device *dev) | 1099 | static int i8042_controller_resume(bool force_reset) |
1114 | { | 1100 | { |
1115 | int error; | 1101 | int error; |
1116 | 1102 | ||
@@ -1118,9 +1104,11 @@ static int i8042_pm_restore(struct device *dev) | |||
1118 | if (error) | 1104 | if (error) |
1119 | return error; | 1105 | return error; |
1120 | 1106 | ||
1121 | error = i8042_controller_selftest(); | 1107 | if (i8042_reset || force_reset) { |
1122 | if (error) | 1108 | error = i8042_controller_selftest(); |
1123 | return error; | 1109 | if (error) |
1110 | return error; | ||
1111 | } | ||
1124 | 1112 | ||
1125 | /* | 1113 | /* |
1126 | * Restore original CTR value and disable all ports | 1114 | * Restore original CTR value and disable all ports |
@@ -1162,6 +1150,28 @@ static int i8042_pm_restore(struct device *dev) | |||
1162 | return 0; | 1150 | return 0; |
1163 | } | 1151 | } |
1164 | 1152 | ||
1153 | /* | ||
1154 | * Here we try to restore the original BIOS settings to avoid | ||
1155 | * upsetting it. | ||
1156 | */ | ||
1157 | |||
1158 | static int i8042_pm_reset(struct device *dev) | ||
1159 | { | ||
1160 | i8042_controller_reset(); | ||
1161 | |||
1162 | return 0; | ||
1163 | } | ||
1164 | |||
1165 | static int i8042_pm_resume(struct device *dev) | ||
1166 | { | ||
1167 | /* | ||
1168 | * On resume from S2R we always try to reset the controller | ||
1169 | * to bring it in a sane state. (In case of S2D we expect | ||
1170 | * BIOS to reset the controller for us.) | ||
1171 | */ | ||
1172 | return i8042_controller_resume(true); | ||
1173 | } | ||
1174 | |||
1165 | static int i8042_pm_thaw(struct device *dev) | 1175 | static int i8042_pm_thaw(struct device *dev) |
1166 | { | 1176 | { |
1167 | i8042_interrupt(0, NULL); | 1177 | i8042_interrupt(0, NULL); |
@@ -1169,9 +1179,14 @@ static int i8042_pm_thaw(struct device *dev) | |||
1169 | return 0; | 1179 | return 0; |
1170 | } | 1180 | } |
1171 | 1181 | ||
1182 | static int i8042_pm_restore(struct device *dev) | ||
1183 | { | ||
1184 | return i8042_controller_resume(false); | ||
1185 | } | ||
1186 | |||
1172 | static const struct dev_pm_ops i8042_pm_ops = { | 1187 | static const struct dev_pm_ops i8042_pm_ops = { |
1173 | .suspend = i8042_pm_reset, | 1188 | .suspend = i8042_pm_reset, |
1174 | .resume = i8042_pm_restore, | 1189 | .resume = i8042_pm_resume, |
1175 | .thaw = i8042_pm_thaw, | 1190 | .thaw = i8042_pm_thaw, |
1176 | .poweroff = i8042_pm_reset, | 1191 | .poweroff = i8042_pm_reset, |
1177 | .restore = i8042_pm_restore, | 1192 | .restore = i8042_pm_restore, |
@@ -1389,9 +1404,11 @@ static int __init i8042_probe(struct platform_device *dev) | |||
1389 | 1404 | ||
1390 | i8042_platform_device = dev; | 1405 | i8042_platform_device = dev; |
1391 | 1406 | ||
1392 | error = i8042_controller_selftest(); | 1407 | if (i8042_reset) { |
1393 | if (error) | 1408 | error = i8042_controller_selftest(); |
1394 | return error; | 1409 | if (error) |
1410 | return error; | ||
1411 | } | ||
1395 | 1412 | ||
1396 | error = i8042_controller_init(); | 1413 | error = i8042_controller_init(); |
1397 | if (error) | 1414 | if (error) |