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path: root/drivers/input/keyboard/sh_keysc.c
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Diffstat (limited to 'drivers/input/keyboard/sh_keysc.c')
-rw-r--r--drivers/input/keyboard/sh_keysc.c145
1 files changed, 91 insertions, 54 deletions
diff --git a/drivers/input/keyboard/sh_keysc.c b/drivers/input/keyboard/sh_keysc.c
index 8e9380bfed40..854e2035cd6e 100644
--- a/drivers/input/keyboard/sh_keysc.c
+++ b/drivers/input/keyboard/sh_keysc.c
@@ -19,101 +19,141 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/input/sh_keysc.h> 21#include <linux/input/sh_keysc.h>
22#include <linux/bitmap.h>
22#include <linux/clk.h> 23#include <linux/clk.h>
23#include <linux/io.h> 24#include <linux/io.h>
24 25
25#define KYCR1_OFFS 0x00
26#define KYCR2_OFFS 0x04
27#define KYINDR_OFFS 0x08
28#define KYOUTDR_OFFS 0x0c
29
30#define KYCR2_IRQ_LEVEL 0x10
31#define KYCR2_IRQ_DISABLED 0x00
32
33static const struct { 26static const struct {
34 unsigned char kymd, keyout, keyin; 27 unsigned char kymd, keyout, keyin;
35} sh_keysc_mode[] = { 28} sh_keysc_mode[] = {
36 [SH_KEYSC_MODE_1] = { 0, 6, 5 }, 29 [SH_KEYSC_MODE_1] = { 0, 6, 5 },
37 [SH_KEYSC_MODE_2] = { 1, 5, 6 }, 30 [SH_KEYSC_MODE_2] = { 1, 5, 6 },
38 [SH_KEYSC_MODE_3] = { 2, 4, 7 }, 31 [SH_KEYSC_MODE_3] = { 2, 4, 7 },
32 [SH_KEYSC_MODE_4] = { 3, 6, 6 },
33 [SH_KEYSC_MODE_5] = { 4, 6, 7 },
34 [SH_KEYSC_MODE_6] = { 5, 7, 7 },
39}; 35};
40 36
41struct sh_keysc_priv { 37struct sh_keysc_priv {
42 void __iomem *iomem_base; 38 void __iomem *iomem_base;
43 struct clk *clk; 39 struct clk *clk;
44 unsigned long last_keys; 40 DECLARE_BITMAP(last_keys, SH_KEYSC_MAXKEYS);
45 struct input_dev *input; 41 struct input_dev *input;
46 struct sh_keysc_info pdata; 42 struct sh_keysc_info pdata;
47}; 43};
48 44
45#define KYCR1 0
46#define KYCR2 1
47#define KYINDR 2
48#define KYOUTDR 3
49
50#define KYCR2_IRQ_LEVEL 0x10
51#define KYCR2_IRQ_DISABLED 0x00
52
53static unsigned long sh_keysc_read(struct sh_keysc_priv *p, int reg_nr)
54{
55 return ioread16(p->iomem_base + (reg_nr << 2));
56}
57
58static void sh_keysc_write(struct sh_keysc_priv *p, int reg_nr,
59 unsigned long value)
60{
61 iowrite16(value, p->iomem_base + (reg_nr << 2));
62}
63
64static void sh_keysc_level_mode(struct sh_keysc_priv *p,
65 unsigned long keys_set)
66{
67 struct sh_keysc_info *pdata = &p->pdata;
68
69 sh_keysc_write(p, KYOUTDR, 0);
70 sh_keysc_write(p, KYCR2, KYCR2_IRQ_LEVEL | (keys_set << 8));
71
72 if (pdata->kycr2_delay)
73 udelay(pdata->kycr2_delay);
74}
75
76static void sh_keysc_map_dbg(struct device *dev, unsigned long *map,
77 const char *str)
78{
79 int k;
80
81 for (k = 0; k < BITS_TO_LONGS(SH_KEYSC_MAXKEYS); k++)
82 dev_dbg(dev, "%s[%d] 0x%lx\n", str, k, map[k]);
83}
84
49static irqreturn_t sh_keysc_isr(int irq, void *dev_id) 85static irqreturn_t sh_keysc_isr(int irq, void *dev_id)
50{ 86{
51 struct platform_device *pdev = dev_id; 87 struct platform_device *pdev = dev_id;
52 struct sh_keysc_priv *priv = platform_get_drvdata(pdev); 88 struct sh_keysc_priv *priv = platform_get_drvdata(pdev);
53 struct sh_keysc_info *pdata = &priv->pdata; 89 struct sh_keysc_info *pdata = &priv->pdata;
54 unsigned long keys, keys1, keys0, mask; 90 int keyout_nr = sh_keysc_mode[pdata->mode].keyout;
91 int keyin_nr = sh_keysc_mode[pdata->mode].keyin;
92 DECLARE_BITMAP(keys, SH_KEYSC_MAXKEYS);
93 DECLARE_BITMAP(keys0, SH_KEYSC_MAXKEYS);
94 DECLARE_BITMAP(keys1, SH_KEYSC_MAXKEYS);
55 unsigned char keyin_set, tmp; 95 unsigned char keyin_set, tmp;
56 int i, k; 96 int i, k, n;
57 97
58 dev_dbg(&pdev->dev, "isr!\n"); 98 dev_dbg(&pdev->dev, "isr!\n");
59 99
60 keys1 = ~0; 100 bitmap_fill(keys1, SH_KEYSC_MAXKEYS);
61 keys0 = 0; 101 bitmap_zero(keys0, SH_KEYSC_MAXKEYS);
62 102
63 do { 103 do {
64 keys = 0; 104 bitmap_zero(keys, SH_KEYSC_MAXKEYS);
65 keyin_set = 0; 105 keyin_set = 0;
66 106
67 iowrite16(KYCR2_IRQ_DISABLED, priv->iomem_base + KYCR2_OFFS); 107 sh_keysc_write(priv, KYCR2, KYCR2_IRQ_DISABLED);
108
109 for (i = 0; i < keyout_nr; i++) {
110 n = keyin_nr * i;
68 111
69 for (i = 0; i < sh_keysc_mode[pdata->mode].keyout; i++) { 112 /* drive one KEYOUT pin low, read KEYIN pins */
70 iowrite16(0xfff ^ (3 << (i * 2)), 113 sh_keysc_write(priv, KYOUTDR, 0xffff ^ (3 << (i * 2)));
71 priv->iomem_base + KYOUTDR_OFFS);
72 udelay(pdata->delay); 114 udelay(pdata->delay);
73 tmp = ioread16(priv->iomem_base + KYINDR_OFFS); 115 tmp = sh_keysc_read(priv, KYINDR);
74 keys |= tmp << (sh_keysc_mode[pdata->mode].keyin * i);
75 tmp ^= (1 << sh_keysc_mode[pdata->mode].keyin) - 1;
76 keyin_set |= tmp;
77 }
78 116
79 iowrite16(0, priv->iomem_base + KYOUTDR_OFFS); 117 /* set bit if key press has been detected */
80 iowrite16(KYCR2_IRQ_LEVEL | (keyin_set << 8), 118 for (k = 0; k < keyin_nr; k++) {
81 priv->iomem_base + KYCR2_OFFS); 119 if (tmp & (1 << k))
120 __set_bit(n + k, keys);
121 }
82 122
83 if (pdata->kycr2_delay) 123 /* keep track of which KEYIN bits that have been set */
84 udelay(pdata->kycr2_delay); 124 keyin_set |= tmp ^ ((1 << keyin_nr) - 1);
125 }
85 126
86 keys ^= ~0; 127 sh_keysc_level_mode(priv, keyin_set);
87 keys &= (1 << (sh_keysc_mode[pdata->mode].keyin *
88 sh_keysc_mode[pdata->mode].keyout)) - 1;
89 keys1 &= keys;
90 keys0 |= keys;
91 128
92 dev_dbg(&pdev->dev, "keys 0x%08lx\n", keys); 129 bitmap_complement(keys, keys, SH_KEYSC_MAXKEYS);
130 bitmap_and(keys1, keys1, keys, SH_KEYSC_MAXKEYS);
131 bitmap_or(keys0, keys0, keys, SH_KEYSC_MAXKEYS);
93 132
94 } while (ioread16(priv->iomem_base + KYCR2_OFFS) & 0x01); 133 sh_keysc_map_dbg(&pdev->dev, keys, "keys");
95 134
96 dev_dbg(&pdev->dev, "last_keys 0x%08lx keys0 0x%08lx keys1 0x%08lx\n", 135 } while (sh_keysc_read(priv, KYCR2) & 0x01);
97 priv->last_keys, keys0, keys1); 136
137 sh_keysc_map_dbg(&pdev->dev, priv->last_keys, "last_keys");
138 sh_keysc_map_dbg(&pdev->dev, keys0, "keys0");
139 sh_keysc_map_dbg(&pdev->dev, keys1, "keys1");
98 140
99 for (i = 0; i < SH_KEYSC_MAXKEYS; i++) { 141 for (i = 0; i < SH_KEYSC_MAXKEYS; i++) {
100 k = pdata->keycodes[i]; 142 k = pdata->keycodes[i];
101 if (!k) 143 if (!k)
102 continue; 144 continue;
103 145
104 mask = 1 << i; 146 if (test_bit(i, keys0) == test_bit(i, priv->last_keys))
105
106 if (!((priv->last_keys ^ keys0) & mask))
107 continue; 147 continue;
108 148
109 if ((keys1 | keys0) & mask) { 149 if (test_bit(i, keys1) || test_bit(i, keys0)) {
110 input_event(priv->input, EV_KEY, k, 1); 150 input_event(priv->input, EV_KEY, k, 1);
111 priv->last_keys |= mask; 151 __set_bit(i, priv->last_keys);
112 } 152 }
113 153
114 if (!(keys1 & mask)) { 154 if (!test_bit(i, keys1)) {
115 input_event(priv->input, EV_KEY, k, 0); 155 input_event(priv->input, EV_KEY, k, 0);
116 priv->last_keys &= ~mask; 156 __clear_bit(i, priv->last_keys);
117 } 157 }
118 158
119 } 159 }
@@ -122,8 +162,6 @@ static irqreturn_t sh_keysc_isr(int irq, void *dev_id)
122 return IRQ_HANDLED; 162 return IRQ_HANDLED;
123} 163}
124 164
125#define res_size(res) ((res)->end - (res)->start + 1)
126
127static int __devinit sh_keysc_probe(struct platform_device *pdev) 165static int __devinit sh_keysc_probe(struct platform_device *pdev)
128{ 166{
129 struct sh_keysc_priv *priv; 167 struct sh_keysc_priv *priv;
@@ -164,7 +202,7 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev)
164 memcpy(&priv->pdata, pdev->dev.platform_data, sizeof(priv->pdata)); 202 memcpy(&priv->pdata, pdev->dev.platform_data, sizeof(priv->pdata));
165 pdata = &priv->pdata; 203 pdata = &priv->pdata;
166 204
167 priv->iomem_base = ioremap_nocache(res->start, res_size(res)); 205 priv->iomem_base = ioremap_nocache(res->start, resource_size(res));
168 if (priv->iomem_base == NULL) { 206 if (priv->iomem_base == NULL) {
169 dev_err(&pdev->dev, "failed to remap I/O memory\n"); 207 dev_err(&pdev->dev, "failed to remap I/O memory\n");
170 error = -ENXIO; 208 error = -ENXIO;
@@ -220,10 +258,9 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev)
220 258
221 clk_enable(priv->clk); 259 clk_enable(priv->clk);
222 260
223 iowrite16((sh_keysc_mode[pdata->mode].kymd << 8) | 261 sh_keysc_write(priv, KYCR1, (sh_keysc_mode[pdata->mode].kymd << 8) |
224 pdata->scan_timing, priv->iomem_base + KYCR1_OFFS); 262 pdata->scan_timing);
225 iowrite16(0, priv->iomem_base + KYOUTDR_OFFS); 263 sh_keysc_level_mode(priv, 0);
226 iowrite16(KYCR2_IRQ_LEVEL, priv->iomem_base + KYCR2_OFFS);
227 264
228 device_init_wakeup(&pdev->dev, 1); 265 device_init_wakeup(&pdev->dev, 1);
229 266
@@ -248,7 +285,7 @@ static int __devexit sh_keysc_remove(struct platform_device *pdev)
248{ 285{
249 struct sh_keysc_priv *priv = platform_get_drvdata(pdev); 286 struct sh_keysc_priv *priv = platform_get_drvdata(pdev);
250 287
251 iowrite16(KYCR2_IRQ_DISABLED, priv->iomem_base + KYCR2_OFFS); 288 sh_keysc_write(priv, KYCR2, KYCR2_IRQ_DISABLED);
252 289
253 input_unregister_device(priv->input); 290 input_unregister_device(priv->input);
254 free_irq(platform_get_irq(pdev, 0), pdev); 291 free_irq(platform_get_irq(pdev, 0), pdev);
@@ -270,7 +307,7 @@ static int sh_keysc_suspend(struct device *dev)
270 int irq = platform_get_irq(pdev, 0); 307 int irq = platform_get_irq(pdev, 0);
271 unsigned short value; 308 unsigned short value;
272 309
273 value = ioread16(priv->iomem_base + KYCR1_OFFS); 310 value = sh_keysc_read(priv, KYCR1);
274 311
275 if (device_may_wakeup(dev)) { 312 if (device_may_wakeup(dev)) {
276 value |= 0x80; 313 value |= 0x80;
@@ -279,7 +316,7 @@ static int sh_keysc_suspend(struct device *dev)
279 value &= ~0x80; 316 value &= ~0x80;
280 } 317 }
281 318
282 iowrite16(value, priv->iomem_base + KYCR1_OFFS); 319 sh_keysc_write(priv, KYCR1, value);
283 320
284 return 0; 321 return 0;
285} 322}