diff options
Diffstat (limited to 'drivers/infiniband')
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/cm.c | 12 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/cq.c | 31 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/iw_cxgb4.h | 2 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/mem.c | 4 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/qp.c | 12 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/t4.h | 6 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/Makefile | 2 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib.h | 1 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_7220.h | 7 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_7322_regs.h | 48 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_diag.c | 19 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_iba6120.c | 3 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_iba7322.c | 43 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_init.c | 21 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_pcie.c | 2 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_sd7220.c | 56 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_sd7220_img.c | 1081 | ||||
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_tx.c | 6 | ||||
| -rw-r--r-- | drivers/infiniband/ulp/ipoib/ipoib_main.c | 4 |
19 files changed, 194 insertions, 1166 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index 30ce0a8eca09..855ee44fdb52 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c | |||
| @@ -969,7 +969,8 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) | |||
| 969 | goto err; | 969 | goto err; |
| 970 | goto out; | 970 | goto out; |
| 971 | err: | 971 | err: |
| 972 | abort_connection(ep, skb, GFP_KERNEL); | 972 | state_set(&ep->com, ABORTING); |
| 973 | send_abort(ep, skb, GFP_KERNEL); | ||
| 973 | out: | 974 | out: |
| 974 | connect_reply_upcall(ep, err); | 975 | connect_reply_upcall(ep, err); |
| 975 | return; | 976 | return; |
| @@ -1372,7 +1373,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb) | |||
| 1372 | pdev, 0); | 1373 | pdev, 0); |
| 1373 | mtu = pdev->mtu; | 1374 | mtu = pdev->mtu; |
| 1374 | tx_chan = cxgb4_port_chan(pdev); | 1375 | tx_chan = cxgb4_port_chan(pdev); |
| 1375 | smac_idx = tx_chan << 1; | 1376 | smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1; |
| 1376 | step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; | 1377 | step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; |
| 1377 | txq_idx = cxgb4_port_idx(pdev) * step; | 1378 | txq_idx = cxgb4_port_idx(pdev) * step; |
| 1378 | step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; | 1379 | step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; |
| @@ -1383,7 +1384,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb) | |||
| 1383 | dst->neighbour->dev, 0); | 1384 | dst->neighbour->dev, 0); |
| 1384 | mtu = dst_mtu(dst); | 1385 | mtu = dst_mtu(dst); |
| 1385 | tx_chan = cxgb4_port_chan(dst->neighbour->dev); | 1386 | tx_chan = cxgb4_port_chan(dst->neighbour->dev); |
| 1386 | smac_idx = tx_chan << 1; | 1387 | smac_idx = (cxgb4_port_viid(dst->neighbour->dev) & 0x7F) << 1; |
| 1387 | step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; | 1388 | step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; |
| 1388 | txq_idx = cxgb4_port_idx(dst->neighbour->dev) * step; | 1389 | txq_idx = cxgb4_port_idx(dst->neighbour->dev) * step; |
| 1389 | step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; | 1390 | step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; |
| @@ -1950,7 +1951,7 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) | |||
| 1950 | pdev, 0); | 1951 | pdev, 0); |
| 1951 | ep->mtu = pdev->mtu; | 1952 | ep->mtu = pdev->mtu; |
| 1952 | ep->tx_chan = cxgb4_port_chan(pdev); | 1953 | ep->tx_chan = cxgb4_port_chan(pdev); |
| 1953 | ep->smac_idx = ep->tx_chan << 1; | 1954 | ep->smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1; |
| 1954 | step = ep->com.dev->rdev.lldi.ntxq / | 1955 | step = ep->com.dev->rdev.lldi.ntxq / |
| 1955 | ep->com.dev->rdev.lldi.nchan; | 1956 | ep->com.dev->rdev.lldi.nchan; |
| 1956 | ep->txq_idx = cxgb4_port_idx(pdev) * step; | 1957 | ep->txq_idx = cxgb4_port_idx(pdev) * step; |
| @@ -1965,7 +1966,8 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) | |||
| 1965 | ep->dst->neighbour->dev, 0); | 1966 | ep->dst->neighbour->dev, 0); |
| 1966 | ep->mtu = dst_mtu(ep->dst); | 1967 | ep->mtu = dst_mtu(ep->dst); |
| 1967 | ep->tx_chan = cxgb4_port_chan(ep->dst->neighbour->dev); | 1968 | ep->tx_chan = cxgb4_port_chan(ep->dst->neighbour->dev); |
| 1968 | ep->smac_idx = ep->tx_chan << 1; | 1969 | ep->smac_idx = (cxgb4_port_viid(ep->dst->neighbour->dev) & |
| 1970 | 0x7F) << 1; | ||
| 1969 | step = ep->com.dev->rdev.lldi.ntxq / | 1971 | step = ep->com.dev->rdev.lldi.ntxq / |
| 1970 | ep->com.dev->rdev.lldi.nchan; | 1972 | ep->com.dev->rdev.lldi.nchan; |
| 1971 | ep->txq_idx = cxgb4_port_idx(ep->dst->neighbour->dev) * step; | 1973 | ep->txq_idx = cxgb4_port_idx(ep->dst->neighbour->dev) * step; |
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index 2447f5295482..fac5c6e68011 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
| @@ -77,7 +77,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
| 77 | kfree(cq->sw_queue); | 77 | kfree(cq->sw_queue); |
| 78 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 78 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
| 79 | cq->memsize, cq->queue, | 79 | cq->memsize, cq->queue, |
| 80 | pci_unmap_addr(cq, mapping)); | 80 | dma_unmap_addr(cq, mapping)); |
| 81 | c4iw_put_cqid(rdev, cq->cqid, uctx); | 81 | c4iw_put_cqid(rdev, cq->cqid, uctx); |
| 82 | return ret; | 82 | return ret; |
| 83 | } | 83 | } |
| @@ -112,7 +112,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
| 112 | ret = -ENOMEM; | 112 | ret = -ENOMEM; |
| 113 | goto err3; | 113 | goto err3; |
| 114 | } | 114 | } |
| 115 | pci_unmap_addr_set(cq, mapping, cq->dma_addr); | 115 | dma_unmap_addr_set(cq, mapping, cq->dma_addr); |
| 116 | memset(cq->queue, 0, cq->memsize); | 116 | memset(cq->queue, 0, cq->memsize); |
| 117 | 117 | ||
| 118 | /* build fw_ri_res_wr */ | 118 | /* build fw_ri_res_wr */ |
| @@ -179,7 +179,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
| 179 | return 0; | 179 | return 0; |
| 180 | err4: | 180 | err4: |
| 181 | dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue, | 181 | dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue, |
| 182 | pci_unmap_addr(cq, mapping)); | 182 | dma_unmap_addr(cq, mapping)); |
| 183 | err3: | 183 | err3: |
| 184 | kfree(cq->sw_queue); | 184 | kfree(cq->sw_queue); |
| 185 | err2: | 185 | err2: |
| @@ -764,7 +764,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
| 764 | struct c4iw_create_cq_resp uresp; | 764 | struct c4iw_create_cq_resp uresp; |
| 765 | struct c4iw_ucontext *ucontext = NULL; | 765 | struct c4iw_ucontext *ucontext = NULL; |
| 766 | int ret; | 766 | int ret; |
| 767 | size_t memsize; | 767 | size_t memsize, hwentries; |
| 768 | struct c4iw_mm_entry *mm, *mm2; | 768 | struct c4iw_mm_entry *mm, *mm2; |
| 769 | 769 | ||
| 770 | PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); | 770 | PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); |
| @@ -788,14 +788,29 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
| 788 | * entries must be multiple of 16 for HW. | 788 | * entries must be multiple of 16 for HW. |
| 789 | */ | 789 | */ |
| 790 | entries = roundup(entries, 16); | 790 | entries = roundup(entries, 16); |
| 791 | memsize = entries * sizeof *chp->cq.queue; | 791 | |
| 792 | /* | ||
| 793 | * Make actual HW queue 2x to avoid cdix_inc overflows. | ||
| 794 | */ | ||
| 795 | hwentries = entries * 2; | ||
| 796 | |||
| 797 | /* | ||
| 798 | * Make HW queue at least 64 entries so GTS updates aren't too | ||
| 799 | * frequent. | ||
| 800 | */ | ||
| 801 | if (hwentries < 64) | ||
| 802 | hwentries = 64; | ||
| 803 | |||
| 804 | memsize = hwentries * sizeof *chp->cq.queue; | ||
| 792 | 805 | ||
| 793 | /* | 806 | /* |
| 794 | * memsize must be a multiple of the page size if its a user cq. | 807 | * memsize must be a multiple of the page size if its a user cq. |
| 795 | */ | 808 | */ |
| 796 | if (ucontext) | 809 | if (ucontext) { |
| 797 | memsize = roundup(memsize, PAGE_SIZE); | 810 | memsize = roundup(memsize, PAGE_SIZE); |
| 798 | chp->cq.size = entries; | 811 | hwentries = memsize / sizeof *chp->cq.queue; |
| 812 | } | ||
| 813 | chp->cq.size = hwentries; | ||
| 799 | chp->cq.memsize = memsize; | 814 | chp->cq.memsize = memsize; |
| 800 | 815 | ||
| 801 | ret = create_cq(&rhp->rdev, &chp->cq, | 816 | ret = create_cq(&rhp->rdev, &chp->cq, |
| @@ -805,7 +820,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
| 805 | 820 | ||
| 806 | chp->rhp = rhp; | 821 | chp->rhp = rhp; |
| 807 | chp->cq.size--; /* status page */ | 822 | chp->cq.size--; /* status page */ |
| 808 | chp->ibcq.cqe = chp->cq.size - 1; | 823 | chp->ibcq.cqe = entries - 2; |
| 809 | spin_lock_init(&chp->lock); | 824 | spin_lock_init(&chp->lock); |
| 810 | atomic_set(&chp->refcnt, 1); | 825 | atomic_set(&chp->refcnt, 1); |
| 811 | init_waitqueue_head(&chp->wait); | 826 | init_waitqueue_head(&chp->wait); |
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h index 277ab589b44d..d33e1a668811 100644 --- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h | |||
| @@ -261,7 +261,7 @@ static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw) | |||
| 261 | 261 | ||
| 262 | struct c4iw_fr_page_list { | 262 | struct c4iw_fr_page_list { |
| 263 | struct ib_fast_reg_page_list ibpl; | 263 | struct ib_fast_reg_page_list ibpl; |
| 264 | DECLARE_PCI_UNMAP_ADDR(mapping); | 264 | DEFINE_DMA_UNMAP_ADDR(mapping); |
| 265 | dma_addr_t dma_addr; | 265 | dma_addr_t dma_addr; |
| 266 | struct c4iw_dev *dev; | 266 | struct c4iw_dev *dev; |
| 267 | int size; | 267 | int size; |
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c index 7f94da1a2437..82b5703b8947 100644 --- a/drivers/infiniband/hw/cxgb4/mem.c +++ b/drivers/infiniband/hw/cxgb4/mem.c | |||
| @@ -764,7 +764,7 @@ struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(struct ib_device *device, | |||
| 764 | if (!c4pl) | 764 | if (!c4pl) |
| 765 | return ERR_PTR(-ENOMEM); | 765 | return ERR_PTR(-ENOMEM); |
| 766 | 766 | ||
| 767 | pci_unmap_addr_set(c4pl, mapping, dma_addr); | 767 | dma_unmap_addr_set(c4pl, mapping, dma_addr); |
| 768 | c4pl->dma_addr = dma_addr; | 768 | c4pl->dma_addr = dma_addr; |
| 769 | c4pl->dev = dev; | 769 | c4pl->dev = dev; |
| 770 | c4pl->size = size; | 770 | c4pl->size = size; |
| @@ -779,7 +779,7 @@ void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list *ibpl) | |||
| 779 | struct c4iw_fr_page_list *c4pl = to_c4iw_fr_page_list(ibpl); | 779 | struct c4iw_fr_page_list *c4pl = to_c4iw_fr_page_list(ibpl); |
| 780 | 780 | ||
| 781 | dma_free_coherent(&c4pl->dev->rdev.lldi.pdev->dev, c4pl->size, | 781 | dma_free_coherent(&c4pl->dev->rdev.lldi.pdev->dev, c4pl->size, |
| 782 | c4pl, pci_unmap_addr(c4pl, mapping)); | 782 | c4pl, dma_unmap_addr(c4pl, mapping)); |
| 783 | } | 783 | } |
| 784 | 784 | ||
| 785 | int c4iw_dereg_mr(struct ib_mr *ib_mr) | 785 | int c4iw_dereg_mr(struct ib_mr *ib_mr) |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 0c28ed1eafa6..7065cb310553 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
| @@ -40,10 +40,10 @@ static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
| 40 | */ | 40 | */ |
| 41 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 41 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
| 42 | wq->rq.memsize, wq->rq.queue, | 42 | wq->rq.memsize, wq->rq.queue, |
| 43 | pci_unmap_addr(&wq->rq, mapping)); | 43 | dma_unmap_addr(&wq->rq, mapping)); |
| 44 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 44 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
| 45 | wq->sq.memsize, wq->sq.queue, | 45 | wq->sq.memsize, wq->sq.queue, |
| 46 | pci_unmap_addr(&wq->sq, mapping)); | 46 | dma_unmap_addr(&wq->sq, mapping)); |
| 47 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); | 47 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); |
| 48 | kfree(wq->rq.sw_rq); | 48 | kfree(wq->rq.sw_rq); |
| 49 | kfree(wq->sq.sw_sq); | 49 | kfree(wq->sq.sw_sq); |
| @@ -99,7 +99,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
| 99 | if (!wq->sq.queue) | 99 | if (!wq->sq.queue) |
| 100 | goto err5; | 100 | goto err5; |
| 101 | memset(wq->sq.queue, 0, wq->sq.memsize); | 101 | memset(wq->sq.queue, 0, wq->sq.memsize); |
| 102 | pci_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); | 102 | dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); |
| 103 | 103 | ||
| 104 | wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), | 104 | wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), |
| 105 | wq->rq.memsize, &(wq->rq.dma_addr), | 105 | wq->rq.memsize, &(wq->rq.dma_addr), |
| @@ -112,7 +112,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
| 112 | wq->rq.queue, | 112 | wq->rq.queue, |
| 113 | (unsigned long long)virt_to_phys(wq->rq.queue)); | 113 | (unsigned long long)virt_to_phys(wq->rq.queue)); |
| 114 | memset(wq->rq.queue, 0, wq->rq.memsize); | 114 | memset(wq->rq.queue, 0, wq->rq.memsize); |
| 115 | pci_unmap_addr_set(&wq->rq, mapping, wq->rq.dma_addr); | 115 | dma_unmap_addr_set(&wq->rq, mapping, wq->rq.dma_addr); |
| 116 | 116 | ||
| 117 | wq->db = rdev->lldi.db_reg; | 117 | wq->db = rdev->lldi.db_reg; |
| 118 | wq->gts = rdev->lldi.gts_reg; | 118 | wq->gts = rdev->lldi.gts_reg; |
| @@ -217,11 +217,11 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
| 217 | err7: | 217 | err7: |
| 218 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 218 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
| 219 | wq->rq.memsize, wq->rq.queue, | 219 | wq->rq.memsize, wq->rq.queue, |
| 220 | pci_unmap_addr(&wq->rq, mapping)); | 220 | dma_unmap_addr(&wq->rq, mapping)); |
| 221 | err6: | 221 | err6: |
| 222 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 222 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
| 223 | wq->sq.memsize, wq->sq.queue, | 223 | wq->sq.memsize, wq->sq.queue, |
| 224 | pci_unmap_addr(&wq->sq, mapping)); | 224 | dma_unmap_addr(&wq->sq, mapping)); |
| 225 | err5: | 225 | err5: |
| 226 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); | 226 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); |
| 227 | err4: | 227 | err4: |
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h index 1057cb96302e..9cf8d85bfcff 100644 --- a/drivers/infiniband/hw/cxgb4/t4.h +++ b/drivers/infiniband/hw/cxgb4/t4.h | |||
| @@ -279,7 +279,7 @@ struct t4_swsqe { | |||
| 279 | struct t4_sq { | 279 | struct t4_sq { |
| 280 | union t4_wr *queue; | 280 | union t4_wr *queue; |
| 281 | dma_addr_t dma_addr; | 281 | dma_addr_t dma_addr; |
| 282 | DECLARE_PCI_UNMAP_ADDR(mapping); | 282 | DEFINE_DMA_UNMAP_ADDR(mapping); |
| 283 | struct t4_swsqe *sw_sq; | 283 | struct t4_swsqe *sw_sq; |
| 284 | struct t4_swsqe *oldest_read; | 284 | struct t4_swsqe *oldest_read; |
| 285 | u64 udb; | 285 | u64 udb; |
| @@ -298,7 +298,7 @@ struct t4_swrqe { | |||
| 298 | struct t4_rq { | 298 | struct t4_rq { |
| 299 | union t4_recv_wr *queue; | 299 | union t4_recv_wr *queue; |
| 300 | dma_addr_t dma_addr; | 300 | dma_addr_t dma_addr; |
| 301 | DECLARE_PCI_UNMAP_ADDR(mapping); | 301 | DEFINE_DMA_UNMAP_ADDR(mapping); |
| 302 | struct t4_swrqe *sw_rq; | 302 | struct t4_swrqe *sw_rq; |
| 303 | u64 udb; | 303 | u64 udb; |
| 304 | size_t memsize; | 304 | size_t memsize; |
| @@ -429,7 +429,7 @@ static inline int t4_wq_db_enabled(struct t4_wq *wq) | |||
| 429 | struct t4_cq { | 429 | struct t4_cq { |
| 430 | struct t4_cqe *queue; | 430 | struct t4_cqe *queue; |
| 431 | dma_addr_t dma_addr; | 431 | dma_addr_t dma_addr; |
| 432 | DECLARE_PCI_UNMAP_ADDR(mapping); | 432 | DEFINE_DMA_UNMAP_ADDR(mapping); |
| 433 | struct t4_cqe *sw_queue; | 433 | struct t4_cqe *sw_queue; |
| 434 | void __iomem *gts; | 434 | void __iomem *gts; |
| 435 | struct c4iw_rdev *rdev; | 435 | struct c4iw_rdev *rdev; |
diff --git a/drivers/infiniband/hw/qib/Makefile b/drivers/infiniband/hw/qib/Makefile index c6515a1b9a6a..f12d7bb8b39f 100644 --- a/drivers/infiniband/hw/qib/Makefile +++ b/drivers/infiniband/hw/qib/Makefile | |||
| @@ -6,7 +6,7 @@ ib_qib-y := qib_cq.o qib_diag.o qib_dma.o qib_driver.o qib_eeprom.o \ | |||
| 6 | qib_qp.o qib_qsfp.o qib_rc.o qib_ruc.o qib_sdma.o qib_srq.o \ | 6 | qib_qp.o qib_qsfp.o qib_rc.o qib_ruc.o qib_sdma.o qib_srq.o \ |
| 7 | qib_sysfs.o qib_twsi.o qib_tx.o qib_uc.o qib_ud.o \ | 7 | qib_sysfs.o qib_twsi.o qib_tx.o qib_uc.o qib_ud.o \ |
| 8 | qib_user_pages.o qib_user_sdma.o qib_verbs_mcast.o qib_iba7220.o \ | 8 | qib_user_pages.o qib_user_sdma.o qib_verbs_mcast.o qib_iba7220.o \ |
| 9 | qib_sd7220.o qib_sd7220_img.o qib_iba7322.o qib_verbs.o | 9 | qib_sd7220.o qib_iba7322.o qib_verbs.o |
| 10 | 10 | ||
| 11 | # 6120 has no fallback if no MSI interrupts, others can do INTx | 11 | # 6120 has no fallback if no MSI interrupts, others can do INTx |
| 12 | ib_qib-$(CONFIG_PCI_MSI) += qib_iba6120.o | 12 | ib_qib-$(CONFIG_PCI_MSI) += qib_iba6120.o |
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h index 32d9208efcff..3593983df7ba 100644 --- a/drivers/infiniband/hw/qib/qib.h +++ b/drivers/infiniband/hw/qib/qib.h | |||
| @@ -686,6 +686,7 @@ struct qib_devdata { | |||
| 686 | void __iomem *piobase; | 686 | void __iomem *piobase; |
| 687 | /* mem-mapped pointer to base of user chip regs (if using WC PAT) */ | 687 | /* mem-mapped pointer to base of user chip regs (if using WC PAT) */ |
| 688 | u64 __iomem *userbase; | 688 | u64 __iomem *userbase; |
| 689 | void __iomem *piovl15base; /* base of VL15 buffers, if not WC */ | ||
| 689 | /* | 690 | /* |
| 690 | * points to area where PIOavail registers will be DMA'ed. | 691 | * points to area where PIOavail registers will be DMA'ed. |
| 691 | * Has to be on a page of it's own, because the page will be | 692 | * Has to be on a page of it's own, because the page will be |
diff --git a/drivers/infiniband/hw/qib/qib_7220.h b/drivers/infiniband/hw/qib/qib_7220.h index ea0bfd896f92..21f374aa0631 100644 --- a/drivers/infiniband/hw/qib/qib_7220.h +++ b/drivers/infiniband/hw/qib/qib_7220.h | |||
| @@ -109,10 +109,6 @@ struct qib_chippport_specific { | |||
| 109 | */ | 109 | */ |
| 110 | int qib_sd7220_presets(struct qib_devdata *dd); | 110 | int qib_sd7220_presets(struct qib_devdata *dd); |
| 111 | int qib_sd7220_init(struct qib_devdata *dd); | 111 | int qib_sd7220_init(struct qib_devdata *dd); |
| 112 | int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, u8 *img, | ||
| 113 | int len, int offset); | ||
| 114 | int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, const u8 *img, | ||
| 115 | int len, int offset); | ||
| 116 | void qib_sd7220_clr_ibpar(struct qib_devdata *); | 112 | void qib_sd7220_clr_ibpar(struct qib_devdata *); |
| 117 | /* | 113 | /* |
| 118 | * Below used for sdnum parameter, selecting one of the two sections | 114 | * Below used for sdnum parameter, selecting one of the two sections |
| @@ -121,9 +117,6 @@ void qib_sd7220_clr_ibpar(struct qib_devdata *); | |||
| 121 | */ | 117 | */ |
| 122 | #define IB_7220_SERDES 2 | 118 | #define IB_7220_SERDES 2 |
| 123 | 119 | ||
| 124 | int qib_sd7220_ib_load(struct qib_devdata *dd); | ||
| 125 | int qib_sd7220_ib_vfy(struct qib_devdata *dd); | ||
| 126 | |||
| 127 | static inline u32 qib_read_kreg32(const struct qib_devdata *dd, | 120 | static inline u32 qib_read_kreg32(const struct qib_devdata *dd, |
| 128 | const u16 regno) | 121 | const u16 regno) |
| 129 | { | 122 | { |
diff --git a/drivers/infiniband/hw/qib/qib_7322_regs.h b/drivers/infiniband/hw/qib/qib_7322_regs.h index a97440ba924c..32dc81ff8d4a 100644 --- a/drivers/infiniband/hw/qib/qib_7322_regs.h +++ b/drivers/infiniband/hw/qib/qib_7322_regs.h | |||
| @@ -742,15 +742,15 @@ | |||
| 742 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB 0xF | 742 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB 0xF |
| 743 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB 0xF | 743 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB 0xF |
| 744 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK 0x1 | 744 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK 0x1 |
| 745 | #define QIB_7322_HwErrMask_statusValidNoEopMask_1_LSB 0xE | 745 | #define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_LSB 0xE |
| 746 | #define QIB_7322_HwErrMask_statusValidNoEopMask_1_MSB 0xE | 746 | #define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_MSB 0xE |
| 747 | #define QIB_7322_HwErrMask_statusValidNoEopMask_1_RMASK 0x1 | 747 | #define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_RMASK 0x1 |
| 748 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB 0xD | 748 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB 0xD |
| 749 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB 0xD | 749 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB 0xD |
| 750 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK 0x1 | 750 | #define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK 0x1 |
| 751 | #define QIB_7322_HwErrMask_statusValidNoEopMask_0_LSB 0xC | 751 | #define QIB_7322_HwErrMask_statusValidNoEopMask_LSB 0xC |
| 752 | #define QIB_7322_HwErrMask_statusValidNoEopMask_0_MSB 0xC | 752 | #define QIB_7322_HwErrMask_statusValidNoEopMask_MSB 0xC |
| 753 | #define QIB_7322_HwErrMask_statusValidNoEopMask_0_RMASK 0x1 | 753 | #define QIB_7322_HwErrMask_statusValidNoEopMask_RMASK 0x1 |
| 754 | #define QIB_7322_HwErrMask_LATriggeredMask_LSB 0xB | 754 | #define QIB_7322_HwErrMask_LATriggeredMask_LSB 0xB |
| 755 | #define QIB_7322_HwErrMask_LATriggeredMask_MSB 0xB | 755 | #define QIB_7322_HwErrMask_LATriggeredMask_MSB 0xB |
| 756 | #define QIB_7322_HwErrMask_LATriggeredMask_RMASK 0x1 | 756 | #define QIB_7322_HwErrMask_LATriggeredMask_RMASK 0x1 |
| @@ -796,15 +796,15 @@ | |||
| 796 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB 0xF | 796 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB 0xF |
| 797 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB 0xF | 797 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB 0xF |
| 798 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK 0x1 | 798 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK 0x1 |
| 799 | #define QIB_7322_HwErrStatus_statusValidNoEop_1_LSB 0xE | 799 | #define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_LSB 0xE |
| 800 | #define QIB_7322_HwErrStatus_statusValidNoEop_1_MSB 0xE | 800 | #define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_MSB 0xE |
| 801 | #define QIB_7322_HwErrStatus_statusValidNoEop_1_RMASK 0x1 | 801 | #define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_RMASK 0x1 |
| 802 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB 0xD | 802 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB 0xD |
| 803 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB 0xD | 803 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB 0xD |
| 804 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK 0x1 | 804 | #define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK 0x1 |
| 805 | #define QIB_7322_HwErrStatus_statusValidNoEop_0_LSB 0xC | 805 | #define QIB_7322_HwErrStatus_statusValidNoEop_LSB 0xC |
| 806 | #define QIB_7322_HwErrStatus_statusValidNoEop_0_MSB 0xC | 806 | #define QIB_7322_HwErrStatus_statusValidNoEop_MSB 0xC |
| 807 | #define QIB_7322_HwErrStatus_statusValidNoEop_0_RMASK 0x1 | 807 | #define QIB_7322_HwErrStatus_statusValidNoEop_RMASK 0x1 |
| 808 | #define QIB_7322_HwErrStatus_LATriggered_LSB 0xB | 808 | #define QIB_7322_HwErrStatus_LATriggered_LSB 0xB |
| 809 | #define QIB_7322_HwErrStatus_LATriggered_MSB 0xB | 809 | #define QIB_7322_HwErrStatus_LATriggered_MSB 0xB |
| 810 | #define QIB_7322_HwErrStatus_LATriggered_RMASK 0x1 | 810 | #define QIB_7322_HwErrStatus_LATriggered_RMASK 0x1 |
| @@ -850,15 +850,15 @@ | |||
| 850 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB 0xF | 850 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB 0xF |
| 851 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB 0xF | 851 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB 0xF |
| 852 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK 0x1 | 852 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK 0x1 |
| 853 | #define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_LSB 0xE | 853 | #define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_LSB 0xE |
| 854 | #define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_MSB 0xE | 854 | #define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_MSB 0xE |
| 855 | #define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_RMASK 0x1 | 855 | #define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_RMASK 0x1 |
| 856 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB 0xD | 856 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB 0xD |
| 857 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB 0xD | 857 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB 0xD |
| 858 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK 0x1 | 858 | #define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK 0x1 |
| 859 | #define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_LSB 0xC | 859 | #define QIB_7322_HwErrClear_statusValidNoEopClear_LSB 0xC |
| 860 | #define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_MSB 0xC | 860 | #define QIB_7322_HwErrClear_statusValidNoEopClear_MSB 0xC |
| 861 | #define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_RMASK 0x1 | 861 | #define QIB_7322_HwErrClear_statusValidNoEopClear_RMASK 0x1 |
| 862 | #define QIB_7322_HwErrClear_LATriggeredClear_LSB 0xB | 862 | #define QIB_7322_HwErrClear_LATriggeredClear_LSB 0xB |
| 863 | #define QIB_7322_HwErrClear_LATriggeredClear_MSB 0xB | 863 | #define QIB_7322_HwErrClear_LATriggeredClear_MSB 0xB |
| 864 | #define QIB_7322_HwErrClear_LATriggeredClear_RMASK 0x1 | 864 | #define QIB_7322_HwErrClear_LATriggeredClear_RMASK 0x1 |
| @@ -880,15 +880,15 @@ | |||
| 880 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB 0xF | 880 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB 0xF |
| 881 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB 0xF | 881 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB 0xF |
| 882 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK 0x1 | 882 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK 0x1 |
| 883 | #define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_LSB 0xE | 883 | #define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_LSB 0xE |
| 884 | #define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_MSB 0xE | 884 | #define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_MSB 0xE |
| 885 | #define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_RMASK 0x1 | 885 | #define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_RMASK 0x1 |
| 886 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB 0xD | 886 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB 0xD |
| 887 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB 0xD | 887 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB 0xD |
| 888 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK 0x1 | 888 | #define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK 0x1 |
| 889 | #define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_LSB 0xC | 889 | #define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_LSB 0xC |
| 890 | #define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_MSB 0xC | 890 | #define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_MSB 0xC |
| 891 | #define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_RMASK 0x1 | 891 | #define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_RMASK 0x1 |
| 892 | 892 | ||
| 893 | #define QIB_7322_EXTStatus_OFFS 0xC0 | 893 | #define QIB_7322_EXTStatus_OFFS 0xC0 |
| 894 | #define QIB_7322_EXTStatus_DEF 0x000000000000X000 | 894 | #define QIB_7322_EXTStatus_DEF 0x000000000000X000 |
diff --git a/drivers/infiniband/hw/qib/qib_diag.c b/drivers/infiniband/hw/qib/qib_diag.c index ca98dd523752..05dcf0d9a7d3 100644 --- a/drivers/infiniband/hw/qib/qib_diag.c +++ b/drivers/infiniband/hw/qib/qib_diag.c | |||
| @@ -233,6 +233,7 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
| 233 | u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase; | 233 | u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase; |
| 234 | u32 __iomem *map = NULL; | 234 | u32 __iomem *map = NULL; |
| 235 | u32 cnt = 0; | 235 | u32 cnt = 0; |
| 236 | u32 tot4k, offs4k; | ||
| 236 | 237 | ||
| 237 | /* First, simplest case, offset is within the first map. */ | 238 | /* First, simplest case, offset is within the first map. */ |
| 238 | kreglen = (dd->kregend - dd->kregbase) * sizeof(u64); | 239 | kreglen = (dd->kregend - dd->kregbase) * sizeof(u64); |
| @@ -250,7 +251,8 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
| 250 | if (dd->userbase) { | 251 | if (dd->userbase) { |
| 251 | /* If user regs mapped, they are after send, so set limit. */ | 252 | /* If user regs mapped, they are after send, so set limit. */ |
| 252 | u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; | 253 | u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; |
| 253 | snd_lim = dd->uregbase; | 254 | if (!dd->piovl15base) |
| 255 | snd_lim = dd->uregbase; | ||
| 254 | krb32 = (u32 __iomem *)dd->userbase; | 256 | krb32 = (u32 __iomem *)dd->userbase; |
| 255 | if (offset >= dd->uregbase && offset < ulim) { | 257 | if (offset >= dd->uregbase && offset < ulim) { |
| 256 | map = krb32 + (offset - dd->uregbase) / sizeof(u32); | 258 | map = krb32 + (offset - dd->uregbase) / sizeof(u32); |
| @@ -277,14 +279,14 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
| 277 | /* If 4k buffers exist, account for them by bumping | 279 | /* If 4k buffers exist, account for them by bumping |
| 278 | * appropriate limit. | 280 | * appropriate limit. |
| 279 | */ | 281 | */ |
| 282 | tot4k = dd->piobcnt4k * dd->align4k; | ||
| 283 | offs4k = dd->piobufbase >> 32; | ||
| 280 | if (dd->piobcnt4k) { | 284 | if (dd->piobcnt4k) { |
| 281 | u32 tot4k = dd->piobcnt4k * dd->align4k; | ||
| 282 | u32 offs4k = dd->piobufbase >> 32; | ||
| 283 | if (snd_bottom > offs4k) | 285 | if (snd_bottom > offs4k) |
| 284 | snd_bottom = offs4k; | 286 | snd_bottom = offs4k; |
| 285 | else { | 287 | else { |
| 286 | /* 4k above 2k. Bump snd_lim, if needed*/ | 288 | /* 4k above 2k. Bump snd_lim, if needed*/ |
| 287 | if (!dd->userbase) | 289 | if (!dd->userbase || dd->piovl15base) |
| 288 | snd_lim = offs4k + tot4k; | 290 | snd_lim = offs4k + tot4k; |
| 289 | } | 291 | } |
| 290 | } | 292 | } |
| @@ -298,6 +300,15 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset, | |||
| 298 | cnt = snd_lim - offset; | 300 | cnt = snd_lim - offset; |
| 299 | } | 301 | } |
| 300 | 302 | ||
| 303 | if (!map && offs4k && dd->piovl15base) { | ||
| 304 | snd_lim = offs4k + tot4k + 2 * dd->align4k; | ||
| 305 | if (offset >= (offs4k + tot4k) && offset < snd_lim) { | ||
| 306 | map = (u32 __iomem *)dd->piovl15base + | ||
| 307 | ((offset - (offs4k + tot4k)) / sizeof(u32)); | ||
| 308 | cnt = snd_lim - offset; | ||
| 309 | } | ||
| 310 | } | ||
| 311 | |||
| 301 | mapped: | 312 | mapped: |
| 302 | if (cntp) | 313 | if (cntp) |
| 303 | *cntp = cnt; | 314 | *cntp = cnt; |
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c index 1eadadc13da8..a5e29dbb9537 100644 --- a/drivers/infiniband/hw/qib/qib_iba6120.c +++ b/drivers/infiniband/hw/qib/qib_iba6120.c | |||
| @@ -1355,8 +1355,7 @@ static int qib_6120_bringup_serdes(struct qib_pportdata *ppd) | |||
| 1355 | hwstat = qib_read_kreg64(dd, kr_hwerrstatus); | 1355 | hwstat = qib_read_kreg64(dd, kr_hwerrstatus); |
| 1356 | if (hwstat) { | 1356 | if (hwstat) { |
| 1357 | /* should just have PLL, clear all set, in an case */ | 1357 | /* should just have PLL, clear all set, in an case */ |
| 1358 | if (hwstat & ~QLOGIC_IB_HWE_SERDESPLLFAILED) | 1358 | qib_write_kreg(dd, kr_hwerrclear, hwstat); |
| 1359 | qib_write_kreg(dd, kr_hwerrclear, hwstat); | ||
| 1360 | qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr)); | 1359 | qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr)); |
| 1361 | } | 1360 | } |
| 1362 | 1361 | ||
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c index 503992d9c5ce..5eedf83e2c3b 100644 --- a/drivers/infiniband/hw/qib/qib_iba7322.c +++ b/drivers/infiniband/hw/qib/qib_iba7322.c | |||
| @@ -543,7 +543,7 @@ struct vendor_txdds_ent { | |||
| 543 | static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); | 543 | static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); |
| 544 | 544 | ||
| 545 | #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ | 545 | #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ |
| 546 | #define TXDDS_EXTRA_SZ 11 /* number of extra tx settings entries */ | 546 | #define TXDDS_EXTRA_SZ 13 /* number of extra tx settings entries */ |
| 547 | #define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ | 547 | #define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ |
| 548 | 548 | ||
| 549 | #define H1_FORCE_VAL 8 | 549 | #define H1_FORCE_VAL 8 |
| @@ -1100,9 +1100,9 @@ static const struct qib_hwerror_msgs qib_7322_hwerror_msgs[] = { | |||
| 1100 | HWE_AUTO_P(SDmaMemReadErr, 1), | 1100 | HWE_AUTO_P(SDmaMemReadErr, 1), |
| 1101 | HWE_AUTO_P(SDmaMemReadErr, 0), | 1101 | HWE_AUTO_P(SDmaMemReadErr, 0), |
| 1102 | HWE_AUTO_P(IBCBusFromSPCParityErr, 1), | 1102 | HWE_AUTO_P(IBCBusFromSPCParityErr, 1), |
| 1103 | HWE_AUTO_P(IBCBusToSPCParityErr, 1), | ||
| 1103 | HWE_AUTO_P(IBCBusFromSPCParityErr, 0), | 1104 | HWE_AUTO_P(IBCBusFromSPCParityErr, 0), |
| 1104 | HWE_AUTO_P(statusValidNoEop, 1), | 1105 | HWE_AUTO(statusValidNoEop), |
| 1105 | HWE_AUTO_P(statusValidNoEop, 0), | ||
| 1106 | HWE_AUTO(LATriggered), | 1106 | HWE_AUTO(LATriggered), |
| 1107 | { .mask = 0 } | 1107 | { .mask = 0 } |
| 1108 | }; | 1108 | }; |
| @@ -4763,6 +4763,8 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd) | |||
| 4763 | SYM_MASK(IBPCSConfig_0, tx_rx_reset); | 4763 | SYM_MASK(IBPCSConfig_0, tx_rx_reset); |
| 4764 | 4764 | ||
| 4765 | val = qib_read_kreg_port(ppd, krp_ib_pcsconfig); | 4765 | val = qib_read_kreg_port(ppd, krp_ib_pcsconfig); |
| 4766 | qib_write_kreg(dd, kr_hwerrmask, | ||
| 4767 | dd->cspec->hwerrmask & ~HWE_MASK(statusValidNoEop)); | ||
| 4766 | qib_write_kreg_port(ppd, krp_ibcctrl_a, | 4768 | qib_write_kreg_port(ppd, krp_ibcctrl_a, |
| 4767 | ppd->cpspec->ibcctrl_a & | 4769 | ppd->cpspec->ibcctrl_a & |
| 4768 | ~SYM_MASK(IBCCtrlA_0, IBLinkEn)); | 4770 | ~SYM_MASK(IBCCtrlA_0, IBLinkEn)); |
| @@ -4772,6 +4774,9 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd) | |||
| 4772 | qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits); | 4774 | qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits); |
| 4773 | qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a); | 4775 | qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a); |
| 4774 | qib_write_kreg(dd, kr_scratch, 0ULL); | 4776 | qib_write_kreg(dd, kr_scratch, 0ULL); |
| 4777 | qib_write_kreg(dd, kr_hwerrclear, | ||
| 4778 | SYM_MASK(HwErrClear, statusValidNoEopClear)); | ||
| 4779 | qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); | ||
| 4775 | } | 4780 | } |
| 4776 | 4781 | ||
| 4777 | /* | 4782 | /* |
| @@ -5624,6 +5629,8 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change) | |||
| 5624 | if (ppd->port != port || !ppd->link_speed_supported) | 5629 | if (ppd->port != port || !ppd->link_speed_supported) |
| 5625 | continue; | 5630 | continue; |
| 5626 | ppd->cpspec->no_eep = val; | 5631 | ppd->cpspec->no_eep = val; |
| 5632 | if (seth1) | ||
| 5633 | ppd->cpspec->h1_val = h1; | ||
| 5627 | /* now change the IBC and serdes, overriding generic */ | 5634 | /* now change the IBC and serdes, overriding generic */ |
| 5628 | init_txdds_table(ppd, 1); | 5635 | init_txdds_table(ppd, 1); |
| 5629 | any++; | 5636 | any++; |
| @@ -6064,9 +6071,9 @@ static int qib_init_7322_variables(struct qib_devdata *dd) | |||
| 6064 | * the "cable info" setup here. Can be overridden | 6071 | * the "cable info" setup here. Can be overridden |
| 6065 | * in adapter-specific routines. | 6072 | * in adapter-specific routines. |
| 6066 | */ | 6073 | */ |
| 6067 | if (!(ppd->dd->flags & QIB_HAS_QSFP)) { | 6074 | if (!(dd->flags & QIB_HAS_QSFP)) { |
| 6068 | if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd)) | 6075 | if (!IS_QMH(dd) && !IS_QME(dd)) |
| 6069 | qib_devinfo(ppd->dd->pcidev, "IB%u:%u: " | 6076 | qib_devinfo(dd->pcidev, "IB%u:%u: " |
| 6070 | "Unknown mezzanine card type\n", | 6077 | "Unknown mezzanine card type\n", |
| 6071 | dd->unit, ppd->port); | 6078 | dd->unit, ppd->port); |
| 6072 | cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME; | 6079 | cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME; |
| @@ -6119,9 +6126,25 @@ static int qib_init_7322_variables(struct qib_devdata *dd) | |||
| 6119 | qib_set_ctxtcnt(dd); | 6126 | qib_set_ctxtcnt(dd); |
| 6120 | 6127 | ||
| 6121 | if (qib_wc_pat) { | 6128 | if (qib_wc_pat) { |
| 6122 | ret = init_chip_wc_pat(dd, NUM_VL15_BUFS * dd->align4k); | 6129 | resource_size_t vl15off; |
| 6130 | /* | ||
| 6131 | * We do not set WC on the VL15 buffers to avoid | ||
| 6132 | * a rare problem with unaligned writes from | ||
| 6133 | * interrupt-flushed store buffers, so we need | ||
| 6134 | * to map those separately here. We can't solve | ||
| 6135 | * this for the rarely used mtrr case. | ||
| 6136 | */ | ||
| 6137 | ret = init_chip_wc_pat(dd, 0); | ||
| 6123 | if (ret) | 6138 | if (ret) |
| 6124 | goto bail; | 6139 | goto bail; |
| 6140 | |||
| 6141 | /* vl15 buffers start just after the 4k buffers */ | ||
| 6142 | vl15off = dd->physaddr + (dd->piobufbase >> 32) + | ||
| 6143 | dd->piobcnt4k * dd->align4k; | ||
| 6144 | dd->piovl15base = ioremap_nocache(vl15off, | ||
| 6145 | NUM_VL15_BUFS * dd->align4k); | ||
| 6146 | if (!dd->piovl15base) | ||
| 6147 | goto bail; | ||
| 6125 | } | 6148 | } |
| 6126 | qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ | 6149 | qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ |
| 6127 | 6150 | ||
| @@ -6932,6 +6955,8 @@ static const struct txdds_ent txdds_extra_sdr[TXDDS_EXTRA_SZ] = { | |||
| 6932 | { 0, 0, 0, 11 }, /* QME7342 backplane settings */ | 6955 | { 0, 0, 0, 11 }, /* QME7342 backplane settings */ |
| 6933 | { 0, 0, 0, 11 }, /* QME7342 backplane settings */ | 6956 | { 0, 0, 0, 11 }, /* QME7342 backplane settings */ |
| 6934 | { 0, 0, 0, 11 }, /* QME7342 backplane settings */ | 6957 | { 0, 0, 0, 11 }, /* QME7342 backplane settings */ |
| 6958 | { 0, 0, 0, 3 }, /* QMH7342 backplane settings */ | ||
| 6959 | { 0, 0, 0, 4 }, /* QMH7342 backplane settings */ | ||
| 6935 | }; | 6960 | }; |
| 6936 | 6961 | ||
| 6937 | static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = { | 6962 | static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = { |
| @@ -6947,6 +6972,8 @@ static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = { | |||
| 6947 | { 0, 0, 0, 13 }, /* QME7342 backplane settings */ | 6972 | { 0, 0, 0, 13 }, /* QME7342 backplane settings */ |
| 6948 | { 0, 0, 0, 13 }, /* QME7342 backplane settings */ | 6973 | { 0, 0, 0, 13 }, /* QME7342 backplane settings */ |
| 6949 | { 0, 0, 0, 13 }, /* QME7342 backplane settings */ | 6974 | { 0, 0, 0, 13 }, /* QME7342 backplane settings */ |
| 6975 | { 0, 0, 0, 9 }, /* QMH7342 backplane settings */ | ||
| 6976 | { 0, 0, 0, 10 }, /* QMH7342 backplane settings */ | ||
| 6950 | }; | 6977 | }; |
| 6951 | 6978 | ||
| 6952 | static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { | 6979 | static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { |
| @@ -6962,6 +6989,8 @@ static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { | |||
| 6962 | { 0, 1, 12, 6 }, /* QME7342 backplane setting */ | 6989 | { 0, 1, 12, 6 }, /* QME7342 backplane setting */ |
| 6963 | { 0, 1, 12, 7 }, /* QME7342 backplane setting */ | 6990 | { 0, 1, 12, 7 }, /* QME7342 backplane setting */ |
| 6964 | { 0, 1, 12, 8 }, /* QME7342 backplane setting */ | 6991 | { 0, 1, 12, 8 }, /* QME7342 backplane setting */ |
| 6992 | { 0, 1, 0, 10 }, /* QMH7342 backplane settings */ | ||
| 6993 | { 0, 1, 0, 12 }, /* QMH7342 backplane settings */ | ||
| 6965 | }; | 6994 | }; |
| 6966 | 6995 | ||
| 6967 | static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, | 6996 | static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, |
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c index 9b40f345ac3f..a873dd596e81 100644 --- a/drivers/infiniband/hw/qib/qib_init.c +++ b/drivers/infiniband/hw/qib/qib_init.c | |||
| @@ -1059,7 +1059,7 @@ static int __init qlogic_ib_init(void) | |||
| 1059 | goto bail_dev; | 1059 | goto bail_dev; |
| 1060 | } | 1060 | } |
| 1061 | 1061 | ||
| 1062 | qib_cq_wq = create_workqueue("qib_cq"); | 1062 | qib_cq_wq = create_singlethread_workqueue("qib_cq"); |
| 1063 | if (!qib_cq_wq) { | 1063 | if (!qib_cq_wq) { |
| 1064 | ret = -ENOMEM; | 1064 | ret = -ENOMEM; |
| 1065 | goto bail_wq; | 1065 | goto bail_wq; |
| @@ -1289,8 +1289,18 @@ static int __devinit qib_init_one(struct pci_dev *pdev, | |||
| 1289 | 1289 | ||
| 1290 | if (qib_mini_init || initfail || ret) { | 1290 | if (qib_mini_init || initfail || ret) { |
| 1291 | qib_stop_timers(dd); | 1291 | qib_stop_timers(dd); |
| 1292 | flush_scheduled_work(); | ||
| 1292 | for (pidx = 0; pidx < dd->num_pports; ++pidx) | 1293 | for (pidx = 0; pidx < dd->num_pports; ++pidx) |
| 1293 | dd->f_quiet_serdes(dd->pport + pidx); | 1294 | dd->f_quiet_serdes(dd->pport + pidx); |
| 1295 | if (qib_mini_init) | ||
| 1296 | goto bail; | ||
| 1297 | if (!j) { | ||
| 1298 | (void) qibfs_remove(dd); | ||
| 1299 | qib_device_remove(dd); | ||
| 1300 | } | ||
| 1301 | if (!ret) | ||
| 1302 | qib_unregister_ib_device(dd); | ||
| 1303 | qib_postinit_cleanup(dd); | ||
| 1294 | if (initfail) | 1304 | if (initfail) |
| 1295 | ret = initfail; | 1305 | ret = initfail; |
| 1296 | goto bail; | 1306 | goto bail; |
| @@ -1472,6 +1482,9 @@ int qib_setup_eagerbufs(struct qib_ctxtdata *rcd) | |||
| 1472 | dma_addr_t pa = rcd->rcvegrbuf_phys[chunk]; | 1482 | dma_addr_t pa = rcd->rcvegrbuf_phys[chunk]; |
| 1473 | unsigned i; | 1483 | unsigned i; |
| 1474 | 1484 | ||
| 1485 | /* clear for security and sanity on each use */ | ||
| 1486 | memset(rcd->rcvegrbuf[chunk], 0, size); | ||
| 1487 | |||
| 1475 | for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) { | 1488 | for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) { |
| 1476 | dd->f_put_tid(dd, e + egroff + | 1489 | dd->f_put_tid(dd, e + egroff + |
| 1477 | (u64 __iomem *) | 1490 | (u64 __iomem *) |
| @@ -1499,6 +1512,12 @@ bail: | |||
| 1499 | return -ENOMEM; | 1512 | return -ENOMEM; |
| 1500 | } | 1513 | } |
| 1501 | 1514 | ||
| 1515 | /* | ||
| 1516 | * Note: Changes to this routine should be mirrored | ||
| 1517 | * for the diagnostics routine qib_remap_ioaddr32(). | ||
| 1518 | * There is also related code for VL15 buffers in qib_init_7322_variables(). | ||
| 1519 | * The teardown code that unmaps is in qib_pcie_ddcleanup() | ||
| 1520 | */ | ||
| 1502 | int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) | 1521 | int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) |
| 1503 | { | 1522 | { |
| 1504 | u64 __iomem *qib_kregbase = NULL; | 1523 | u64 __iomem *qib_kregbase = NULL; |
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index c926bf4541df..7fa6e5592630 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c | |||
| @@ -179,6 +179,8 @@ void qib_pcie_ddcleanup(struct qib_devdata *dd) | |||
| 179 | iounmap(dd->piobase); | 179 | iounmap(dd->piobase); |
| 180 | if (dd->userbase) | 180 | if (dd->userbase) |
| 181 | iounmap(dd->userbase); | 181 | iounmap(dd->userbase); |
| 182 | if (dd->piovl15base) | ||
| 183 | iounmap(dd->piovl15base); | ||
| 182 | 184 | ||
| 183 | pci_disable_device(dd->pcidev); | 185 | pci_disable_device(dd->pcidev); |
| 184 | pci_release_regions(dd->pcidev); | 186 | pci_release_regions(dd->pcidev); |
diff --git a/drivers/infiniband/hw/qib/qib_sd7220.c b/drivers/infiniband/hw/qib/qib_sd7220.c index 0aeed0e74cb6..e9f9f8bc3204 100644 --- a/drivers/infiniband/hw/qib/qib_sd7220.c +++ b/drivers/infiniband/hw/qib/qib_sd7220.c | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. | 2 | * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation. |
| 3 | * All rights reserved. | ||
| 3 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. | 4 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
| 4 | * | 5 | * |
| 5 | * This software is available to you under a choice of one of two | 6 | * This software is available to you under a choice of one of two |
| @@ -37,10 +38,14 @@ | |||
| 37 | 38 | ||
| 38 | #include <linux/pci.h> | 39 | #include <linux/pci.h> |
| 39 | #include <linux/delay.h> | 40 | #include <linux/delay.h> |
| 41 | #include <linux/firmware.h> | ||
| 40 | 42 | ||
| 41 | #include "qib.h" | 43 | #include "qib.h" |
| 42 | #include "qib_7220.h" | 44 | #include "qib_7220.h" |
| 43 | 45 | ||
| 46 | #define SD7220_FW_NAME "qlogic/sd7220.fw" | ||
| 47 | MODULE_FIRMWARE(SD7220_FW_NAME); | ||
| 48 | |||
| 44 | /* | 49 | /* |
| 45 | * Same as in qib_iba7220.c, but just the registers needed here. | 50 | * Same as in qib_iba7220.c, but just the registers needed here. |
| 46 | * Could move whole set to qib_7220.h, but decided better to keep | 51 | * Could move whole set to qib_7220.h, but decided better to keep |
| @@ -102,6 +107,10 @@ static int qib_internal_presets(struct qib_devdata *dd); | |||
| 102 | /* Tweak the register (CMUCTRL5) that contains the TRIMSELF controls */ | 107 | /* Tweak the register (CMUCTRL5) that contains the TRIMSELF controls */ |
| 103 | static int qib_sd_trimself(struct qib_devdata *dd, int val); | 108 | static int qib_sd_trimself(struct qib_devdata *dd, int val); |
| 104 | static int epb_access(struct qib_devdata *dd, int sdnum, int claim); | 109 | static int epb_access(struct qib_devdata *dd, int sdnum, int claim); |
| 110 | static int qib_sd7220_ib_load(struct qib_devdata *dd, | ||
| 111 | const struct firmware *fw); | ||
| 112 | static int qib_sd7220_ib_vfy(struct qib_devdata *dd, | ||
| 113 | const struct firmware *fw); | ||
| 105 | 114 | ||
| 106 | /* | 115 | /* |
| 107 | * Below keeps track of whether the "once per power-on" initialization has | 116 | * Below keeps track of whether the "once per power-on" initialization has |
| @@ -110,10 +119,13 @@ static int epb_access(struct qib_devdata *dd, int sdnum, int claim); | |||
| 110 | * state of the reset "pin", is no longer valid. Instead, we check for the | 119 | * state of the reset "pin", is no longer valid. Instead, we check for the |
| 111 | * actual uC code having been loaded. | 120 | * actual uC code having been loaded. |
| 112 | */ | 121 | */ |
| 113 | static int qib_ibsd_ucode_loaded(struct qib_pportdata *ppd) | 122 | static int qib_ibsd_ucode_loaded(struct qib_pportdata *ppd, |
| 123 | const struct firmware *fw) | ||
| 114 | { | 124 | { |
| 115 | struct qib_devdata *dd = ppd->dd; | 125 | struct qib_devdata *dd = ppd->dd; |
| 116 | if (!dd->cspec->serdes_first_init_done && (qib_sd7220_ib_vfy(dd) > 0)) | 126 | |
| 127 | if (!dd->cspec->serdes_first_init_done && | ||
| 128 | qib_sd7220_ib_vfy(dd, fw) > 0) | ||
| 117 | dd->cspec->serdes_first_init_done = 1; | 129 | dd->cspec->serdes_first_init_done = 1; |
| 118 | return dd->cspec->serdes_first_init_done; | 130 | return dd->cspec->serdes_first_init_done; |
| 119 | } | 131 | } |
| @@ -377,6 +389,7 @@ static void qib_sd_trimdone_monitor(struct qib_devdata *dd, | |||
| 377 | */ | 389 | */ |
| 378 | int qib_sd7220_init(struct qib_devdata *dd) | 390 | int qib_sd7220_init(struct qib_devdata *dd) |
| 379 | { | 391 | { |
| 392 | const struct firmware *fw; | ||
| 380 | int ret = 1; /* default to failure */ | 393 | int ret = 1; /* default to failure */ |
| 381 | int first_reset, was_reset; | 394 | int first_reset, was_reset; |
| 382 | 395 | ||
| @@ -387,8 +400,15 @@ int qib_sd7220_init(struct qib_devdata *dd) | |||
| 387 | qib_ibsd_reset(dd, 1); | 400 | qib_ibsd_reset(dd, 1); |
| 388 | qib_sd_trimdone_monitor(dd, "Driver-reload"); | 401 | qib_sd_trimdone_monitor(dd, "Driver-reload"); |
| 389 | } | 402 | } |
| 403 | |||
| 404 | ret = request_firmware(&fw, SD7220_FW_NAME, &dd->pcidev->dev); | ||
| 405 | if (ret) { | ||
| 406 | qib_dev_err(dd, "Failed to load IB SERDES image\n"); | ||
| 407 | goto done; | ||
| 408 | } | ||
| 409 | |||
| 390 | /* Substitute our deduced value for was_reset */ | 410 | /* Substitute our deduced value for was_reset */ |
| 391 | ret = qib_ibsd_ucode_loaded(dd->pport); | 411 | ret = qib_ibsd_ucode_loaded(dd->pport, fw); |
| 392 | if (ret < 0) | 412 | if (ret < 0) |
| 393 | goto bail; | 413 | goto bail; |
| 394 | 414 | ||
| @@ -437,13 +457,13 @@ int qib_sd7220_init(struct qib_devdata *dd) | |||
| 437 | int vfy; | 457 | int vfy; |
| 438 | int trim_done; | 458 | int trim_done; |
| 439 | 459 | ||
| 440 | ret = qib_sd7220_ib_load(dd); | 460 | ret = qib_sd7220_ib_load(dd, fw); |
| 441 | if (ret < 0) { | 461 | if (ret < 0) { |
| 442 | qib_dev_err(dd, "Failed to load IB SERDES image\n"); | 462 | qib_dev_err(dd, "Failed to load IB SERDES image\n"); |
| 443 | goto bail; | 463 | goto bail; |
| 444 | } else { | 464 | } else { |
| 445 | /* Loaded image, try to verify */ | 465 | /* Loaded image, try to verify */ |
| 446 | vfy = qib_sd7220_ib_vfy(dd); | 466 | vfy = qib_sd7220_ib_vfy(dd, fw); |
| 447 | if (vfy != ret) { | 467 | if (vfy != ret) { |
| 448 | qib_dev_err(dd, "SERDES PRAM VFY failed\n"); | 468 | qib_dev_err(dd, "SERDES PRAM VFY failed\n"); |
| 449 | goto bail; | 469 | goto bail; |
| @@ -506,6 +526,8 @@ bail: | |||
| 506 | done: | 526 | done: |
| 507 | /* start relock timer regardless, but start at 1 second */ | 527 | /* start relock timer regardless, but start at 1 second */ |
| 508 | set_7220_relock_poll(dd, -1); | 528 | set_7220_relock_poll(dd, -1); |
| 529 | |||
| 530 | release_firmware(fw); | ||
| 509 | return ret; | 531 | return ret; |
| 510 | } | 532 | } |
| 511 | 533 | ||
| @@ -829,8 +851,8 @@ static int qib_sd7220_ram_xfer(struct qib_devdata *dd, int sdnum, u32 loc, | |||
| 829 | 851 | ||
| 830 | #define PROG_CHUNK 64 | 852 | #define PROG_CHUNK 64 |
| 831 | 853 | ||
| 832 | int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, | 854 | static int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, |
| 833 | u8 *img, int len, int offset) | 855 | const u8 *img, int len, int offset) |
| 834 | { | 856 | { |
| 835 | int cnt, sofar, req; | 857 | int cnt, sofar, req; |
| 836 | 858 | ||
| @@ -840,7 +862,7 @@ int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, | |||
| 840 | if (req > PROG_CHUNK) | 862 | if (req > PROG_CHUNK) |
| 841 | req = PROG_CHUNK; | 863 | req = PROG_CHUNK; |
| 842 | cnt = qib_sd7220_ram_xfer(dd, sdnum, offset + sofar, | 864 | cnt = qib_sd7220_ram_xfer(dd, sdnum, offset + sofar, |
| 843 | img + sofar, req, 0); | 865 | (u8 *)img + sofar, req, 0); |
| 844 | if (cnt < req) { | 866 | if (cnt < req) { |
| 845 | sofar = -1; | 867 | sofar = -1; |
| 846 | break; | 868 | break; |
| @@ -853,8 +875,8 @@ int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, | |||
| 853 | #define VFY_CHUNK 64 | 875 | #define VFY_CHUNK 64 |
| 854 | #define SD_PRAM_ERROR_LIMIT 42 | 876 | #define SD_PRAM_ERROR_LIMIT 42 |
| 855 | 877 | ||
| 856 | int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, | 878 | static int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, |
| 857 | const u8 *img, int len, int offset) | 879 | const u8 *img, int len, int offset) |
| 858 | { | 880 | { |
| 859 | int cnt, sofar, req, idx, errors; | 881 | int cnt, sofar, req, idx, errors; |
| 860 | unsigned char readback[VFY_CHUNK]; | 882 | unsigned char readback[VFY_CHUNK]; |
| @@ -881,6 +903,18 @@ int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, | |||
| 881 | return errors ? -errors : sofar; | 903 | return errors ? -errors : sofar; |
| 882 | } | 904 | } |
| 883 | 905 | ||
| 906 | static int | ||
| 907 | qib_sd7220_ib_load(struct qib_devdata *dd, const struct firmware *fw) | ||
| 908 | { | ||
| 909 | return qib_sd7220_prog_ld(dd, IB_7220_SERDES, fw->data, fw->size, 0); | ||
| 910 | } | ||
| 911 | |||
| 912 | static int | ||
| 913 | qib_sd7220_ib_vfy(struct qib_devdata *dd, const struct firmware *fw) | ||
| 914 | { | ||
| 915 | return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, fw->data, fw->size, 0); | ||
| 916 | } | ||
| 917 | |||
| 884 | /* | 918 | /* |
| 885 | * IRQ not set up at this point in init, so we poll. | 919 | * IRQ not set up at this point in init, so we poll. |
| 886 | */ | 920 | */ |
diff --git a/drivers/infiniband/hw/qib/qib_sd7220_img.c b/drivers/infiniband/hw/qib/qib_sd7220_img.c deleted file mode 100644 index a1118fbd2370..000000000000 --- a/drivers/infiniband/hw/qib/qib_sd7220_img.c +++ /dev/null | |||
| @@ -1,1081 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2007, 2008 QLogic Corporation. All rights reserved. | ||
| 3 | * | ||
| 4 | * This software is available to you under a choice of one of two | ||
| 5 | * licenses. You may choose to be licensed under the terms of the GNU | ||
| 6 | * General Public License (GPL) Version 2, available from the file | ||
| 7 | * COPYING in the main directory of this source tree, or the | ||
| 8 | * OpenIB.org BSD license below: | ||
| 9 | * | ||
| 10 | * Redistribution and use in source and binary forms, with or | ||
| 11 | * without modification, are permitted provided that the following | ||
| 12 | * conditions are met: | ||
| 13 | * | ||
| 14 | * - Redistributions of source code must retain the above | ||
| 15 | * copyright notice, this list of conditions and the following | ||
| 16 | * disclaimer. | ||
| 17 | * | ||
| 18 | * - Redistributions in binary form must reproduce the above | ||
| 19 | * copyright notice, this list of conditions and the following | ||
| 20 | * disclaimer in the documentation and/or other materials | ||
| 21 | * provided with the distribution. | ||
| 22 | * | ||
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
| 30 | * SOFTWARE. | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* | ||
| 34 | * This file contains the memory image from the vendor, to be copied into | ||
| 35 | * the IB SERDES of the IBA7220 during initialization. | ||
| 36 | * The file also includes the two functions which use this image. | ||
| 37 | */ | ||
| 38 | #include <linux/pci.h> | ||
| 39 | #include <linux/delay.h> | ||
| 40 | |||
| 41 | #include "qib.h" | ||
| 42 | #include "qib_7220.h" | ||
| 43 | |||
| 44 | static unsigned char qib_sd7220_ib_img[] = { | ||
| 45 | /*0000*/0x02, 0x0A, 0x29, 0x02, 0x0A, 0x87, 0xE5, 0xE6, | ||
| 46 | 0x30, 0xE6, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, | ||
| 47 | /*0010*/0x00, 0xE5, 0xE2, 0x30, 0xE4, 0x04, 0x7E, 0x01, | ||
| 48 | 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x08, | ||
| 49 | /*0020*/0x53, 0xF9, 0xF7, 0xE4, 0xF5, 0xFE, 0x80, 0x08, | ||
| 50 | 0x7F, 0x0A, 0x12, 0x17, 0x31, 0x12, 0x0E, 0xA2, | ||
| 51 | /*0030*/0x75, 0xFC, 0x08, 0xE4, 0xF5, 0xFD, 0xE5, 0xE7, | ||
| 52 | 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0x22, 0x00, | ||
| 53 | /*0040*/0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x75, | ||
| 54 | 0x51, 0x01, 0xE4, 0xF5, 0x52, 0xF5, 0x53, 0xF5, | ||
| 55 | /*0050*/0x52, 0xF5, 0x7E, 0x7F, 0x04, 0x02, 0x04, 0x38, | ||
| 56 | 0xC2, 0x36, 0x05, 0x52, 0xE5, 0x52, 0xD3, 0x94, | ||
| 57 | /*0060*/0x0C, 0x40, 0x05, 0x75, 0x52, 0x01, 0xD2, 0x36, | ||
| 58 | 0x90, 0x07, 0x0C, 0x74, 0x07, 0xF0, 0xA3, 0x74, | ||
| 59 | /*0070*/0xFF, 0xF0, 0xE4, 0xF5, 0x0C, 0xA3, 0xF0, 0x90, | ||
| 60 | 0x07, 0x14, 0xF0, 0xA3, 0xF0, 0x75, 0x0B, 0x20, | ||
| 61 | /*0080*/0xF5, 0x09, 0xE4, 0xF5, 0x08, 0xE5, 0x08, 0xD3, | ||
| 62 | 0x94, 0x30, 0x40, 0x03, 0x02, 0x04, 0x04, 0x12, | ||
| 63 | /*0090*/0x00, 0x06, 0x15, 0x0B, 0xE5, 0x08, 0x70, 0x04, | ||
| 64 | 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x09, | ||
| 65 | /*00A0*/0x70, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, | ||
| 66 | 0xEE, 0x5F, 0x60, 0x05, 0x12, 0x18, 0x71, 0xD2, | ||
| 67 | /*00B0*/0x35, 0x53, 0xE1, 0xF7, 0xE5, 0x08, 0x45, 0x09, | ||
| 68 | 0xFF, 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24, | ||
| 69 | /*00C0*/0x83, 0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, | ||
| 70 | 0xEF, 0xF0, 0x85, 0xE2, 0x20, 0xE5, 0x52, 0xD3, | ||
| 71 | /*00D0*/0x94, 0x01, 0x40, 0x0D, 0x12, 0x19, 0xF3, 0xE0, | ||
| 72 | 0x54, 0xA0, 0x64, 0x40, 0x70, 0x03, 0x02, 0x03, | ||
| 73 | /*00E0*/0xFB, 0x53, 0xF9, 0xF8, 0x90, 0x94, 0x70, 0xE4, | ||
| 74 | 0xF0, 0xE0, 0xF5, 0x10, 0xAF, 0x09, 0x12, 0x1E, | ||
| 75 | /*00F0*/0xB3, 0xAF, 0x08, 0xEF, 0x44, 0x08, 0xF5, 0x82, | ||
| 76 | 0x75, 0x83, 0x80, 0xE0, 0xF5, 0x29, 0xEF, 0x44, | ||
| 77 | /*0100*/0x07, 0x12, 0x1A, 0x3C, 0xF5, 0x22, 0x54, 0x40, | ||
| 78 | 0xD3, 0x94, 0x00, 0x40, 0x1E, 0xE5, 0x29, 0x54, | ||
| 79 | /*0110*/0xF0, 0x70, 0x21, 0x12, 0x19, 0xF3, 0xE0, 0x44, | ||
| 80 | 0x80, 0xF0, 0xE5, 0x22, 0x54, 0x30, 0x65, 0x08, | ||
| 81 | /*0120*/0x70, 0x09, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xBF, | ||
| 82 | 0xF0, 0x80, 0x09, 0x12, 0x19, 0xF3, 0x74, 0x40, | ||
| 83 | /*0130*/0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12, 0x75, | ||
| 84 | 0x83, 0xAE, 0x74, 0xFF, 0xF0, 0xAF, 0x08, 0x7E, | ||
| 85 | /*0140*/0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0xE0, 0xFD, | ||
| 86 | 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x81, | ||
| 87 | /*0150*/0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, 0xED, | ||
| 88 | 0xF0, 0x90, 0x07, 0x0E, 0xE0, 0x04, 0xF0, 0xEF, | ||
| 89 | /*0160*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0x98, 0xE0, | ||
| 90 | 0xF5, 0x28, 0x12, 0x1A, 0x23, 0x40, 0x0C, 0x12, | ||
| 91 | /*0170*/0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12, 0x1A, 0x32, | ||
| 92 | 0x02, 0x03, 0xF6, 0xAF, 0x08, 0x7E, 0x00, 0x74, | ||
| 93 | /*0180*/0x80, 0xCD, 0xEF, 0xCD, 0x8D, 0x82, 0xF5, 0x83, | ||
| 94 | 0xE0, 0x30, 0xE0, 0x0A, 0x12, 0x19, 0xF3, 0xE0, | ||
| 95 | /*0190*/0x44, 0x20, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x19, | ||
| 96 | 0xF3, 0xE0, 0x54, 0xDF, 0xF0, 0xEE, 0x44, 0xAE, | ||
| 97 | /*01A0*/0x12, 0x1A, 0x43, 0x30, 0xE4, 0x03, 0x02, 0x03, | ||
| 98 | 0xFB, 0x74, 0x9E, 0x12, 0x1A, 0x05, 0x20, 0xE0, | ||
| 99 | /*01B0*/0x03, 0x02, 0x03, 0xFB, 0x8F, 0x82, 0x8E, 0x83, | ||
| 100 | 0xE0, 0x20, 0xE0, 0x03, 0x02, 0x03, 0xFB, 0x12, | ||
| 101 | /*01C0*/0x19, 0xF3, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0xE3, | ||
| 102 | 0x20, 0xE7, 0x08, 0xE5, 0x08, 0x12, 0x1A, 0x3A, | ||
| 103 | /*01D0*/0x44, 0x04, 0xF0, 0xAF, 0x08, 0x7E, 0x00, 0xEF, | ||
| 104 | 0x12, 0x1A, 0x3A, 0x20, 0xE2, 0x34, 0x12, 0x19, | ||
| 105 | /*01E0*/0xF3, 0xE0, 0x44, 0x08, 0xF0, 0xE5, 0xE4, 0x30, | ||
| 106 | 0xE6, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, | ||
| 107 | /*01F0*/0xE5, 0x7E, 0xC3, 0x94, 0x04, 0x50, 0x04, 0x7C, | ||
| 108 | 0x01, 0x80, 0x02, 0x7C, 0x00, 0xEC, 0x4D, 0x60, | ||
| 109 | /*0200*/0x05, 0xC2, 0x35, 0x02, 0x03, 0xFB, 0xEE, 0x44, | ||
| 110 | 0xD2, 0x12, 0x1A, 0x43, 0x44, 0x40, 0xF0, 0x02, | ||
| 111 | /*0210*/0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xF7, | ||
| 112 | 0xF0, 0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0, | ||
| 113 | /*0220*/0x54, 0xBF, 0xF0, 0x90, 0x07, 0x14, 0xE0, 0x04, | ||
| 114 | 0xF0, 0xE5, 0x7E, 0x70, 0x03, 0x75, 0x7E, 0x01, | ||
| 115 | /*0230*/0xAF, 0x08, 0x7E, 0x00, 0x12, 0x1A, 0x23, 0x40, | ||
| 116 | 0x12, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12, | ||
| 117 | /*0240*/0x19, 0xF2, 0xE0, 0x54, 0x02, 0x12, 0x1A, 0x32, | ||
| 118 | 0x02, 0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x44, | ||
| 119 | /*0250*/0x02, 0x12, 0x19, 0xF2, 0xE0, 0x54, 0xFE, 0xF0, | ||
| 120 | 0xC2, 0x35, 0xEE, 0x44, 0x8A, 0x8F, 0x82, 0xF5, | ||
| 121 | /*0260*/0x83, 0xE0, 0xF5, 0x17, 0x54, 0x8F, 0x44, 0x40, | ||
| 122 | 0xF0, 0x74, 0x90, 0xFC, 0xE5, 0x08, 0x44, 0x07, | ||
| 123 | /*0270*/0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0x54, 0x3F, | ||
| 124 | 0x90, 0x07, 0x02, 0xF0, 0xE0, 0x54, 0xC0, 0x8D, | ||
| 125 | /*0280*/0x82, 0x8C, 0x83, 0xF0, 0x74, 0x92, 0x12, 0x1A, | ||
| 126 | 0x05, 0x90, 0x07, 0x03, 0x12, 0x1A, 0x19, 0x74, | ||
| 127 | /*0290*/0x82, 0x12, 0x1A, 0x05, 0x90, 0x07, 0x04, 0x12, | ||
| 128 | 0x1A, 0x19, 0x74, 0xB4, 0x12, 0x1A, 0x05, 0x90, | ||
| 129 | /*02A0*/0x07, 0x05, 0x12, 0x1A, 0x19, 0x74, 0x94, 0xFE, | ||
| 130 | 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A, 0xF5, | ||
| 131 | /*02B0*/0x10, 0x30, 0xE0, 0x04, 0xD2, 0x37, 0x80, 0x02, | ||
| 132 | 0xC2, 0x37, 0xE5, 0x10, 0x54, 0x7F, 0x8F, 0x82, | ||
| 133 | /*02C0*/0x8E, 0x83, 0xF0, 0x30, 0x44, 0x30, 0x12, 0x1A, | ||
| 134 | 0x03, 0x54, 0x80, 0xD3, 0x94, 0x00, 0x40, 0x04, | ||
| 135 | /*02D0*/0xD2, 0x39, 0x80, 0x02, 0xC2, 0x39, 0x8F, 0x82, | ||
| 136 | 0x8E, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x12, 0x1A, | ||
| 137 | /*02E0*/0x03, 0x54, 0x40, 0xD3, 0x94, 0x00, 0x40, 0x04, | ||
| 138 | 0xD2, 0x3A, 0x80, 0x02, 0xC2, 0x3A, 0x8F, 0x82, | ||
| 139 | /*02F0*/0x8E, 0x83, 0xE0, 0x44, 0x40, 0xF0, 0x74, 0x92, | ||
| 140 | 0xFE, 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A, | ||
| 141 | /*0300*/0x30, 0xE7, 0x04, 0xD2, 0x38, 0x80, 0x02, 0xC2, | ||
| 142 | 0x38, 0x8F, 0x82, 0x8E, 0x83, 0xE0, 0x54, 0x7F, | ||
| 143 | /*0310*/0xF0, 0x12, 0x1E, 0x46, 0xE4, 0xF5, 0x0A, 0x20, | ||
| 144 | 0x03, 0x02, 0x80, 0x03, 0x30, 0x43, 0x03, 0x12, | ||
| 145 | /*0320*/0x19, 0x95, 0x20, 0x02, 0x02, 0x80, 0x03, 0x30, | ||
| 146 | 0x42, 0x03, 0x12, 0x0C, 0x8F, 0x30, 0x30, 0x06, | ||
| 147 | /*0330*/0x12, 0x19, 0x95, 0x12, 0x0C, 0x8F, 0x12, 0x0D, | ||
| 148 | 0x47, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xFB, 0xF0, | ||
| 149 | /*0340*/0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40, 0x46, 0x43, | ||
| 150 | 0xE1, 0x08, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x04, | ||
| 151 | /*0350*/0xF0, 0xE5, 0xE4, 0x20, 0xE7, 0x2A, 0x12, 0x1A, | ||
| 152 | 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3, | ||
| 153 | /*0360*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, | ||
| 154 | 0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40, | ||
| 155 | /*0370*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF, | ||
| 156 | 0x5E, 0x60, 0x05, 0x12, 0x1D, 0xD7, 0x80, 0x17, | ||
| 157 | /*0380*/0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x44, | ||
| 158 | 0x08, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12, | ||
| 159 | /*0390*/0x75, 0x83, 0xD2, 0xE0, 0x54, 0xF7, 0xF0, 0x12, | ||
| 160 | 0x1E, 0x46, 0x7F, 0x08, 0x12, 0x17, 0x31, 0x74, | ||
| 161 | /*03A0*/0x8E, 0xFE, 0x12, 0x1A, 0x12, 0x8E, 0x83, 0xE0, | ||
| 162 | 0xF5, 0x10, 0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44, | ||
| 163 | /*03B0*/0x01, 0xFF, 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07, | ||
| 164 | 0xF5, 0x82, 0xEF, 0xF0, 0xE5, 0x10, 0x54, 0xFE, | ||
| 165 | /*03C0*/0xFF, 0xED, 0x44, 0x07, 0xF5, 0x82, 0xEF, 0x12, | ||
| 166 | 0x1A, 0x11, 0x75, 0x83, 0x86, 0xE0, 0x44, 0x10, | ||
| 167 | /*03D0*/0x12, 0x1A, 0x11, 0xE0, 0x44, 0x10, 0xF0, 0x12, | ||
| 168 | 0x19, 0xF3, 0xE0, 0x54, 0xFD, 0x44, 0x01, 0xFF, | ||
| 169 | /*03E0*/0x12, 0x19, 0xF3, 0xEF, 0x12, 0x1A, 0x32, 0x30, | ||
| 170 | 0x32, 0x0C, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82, | ||
| 171 | /*03F0*/0x75, 0x83, 0x82, 0x74, 0x05, 0xF0, 0xAF, 0x0B, | ||
| 172 | 0x12, 0x18, 0xD7, 0x74, 0x10, 0x25, 0x08, 0xF5, | ||
| 173 | /*0400*/0x08, 0x02, 0x00, 0x85, 0x05, 0x09, 0xE5, 0x09, | ||
| 174 | 0xD3, 0x94, 0x07, 0x50, 0x03, 0x02, 0x00, 0x82, | ||
| 175 | /*0410*/0xE5, 0x7E, 0xD3, 0x94, 0x00, 0x40, 0x04, 0x7F, | ||
| 176 | 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x7E, 0xC3, | ||
| 177 | /*0420*/0x94, 0xFA, 0x50, 0x04, 0x7E, 0x01, 0x80, 0x02, | ||
| 178 | 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x02, 0x05, 0x7E, | ||
| 179 | /*0430*/0x30, 0x35, 0x0B, 0x43, 0xE1, 0x01, 0x7F, 0x09, | ||
| 180 | 0x12, 0x17, 0x31, 0x02, 0x00, 0x58, 0x53, 0xE1, | ||
| 181 | /*0440*/0xFE, 0x02, 0x00, 0x58, 0x8E, 0x6A, 0x8F, 0x6B, | ||
| 182 | 0x8C, 0x6C, 0x8D, 0x6D, 0x75, 0x6E, 0x01, 0x75, | ||
| 183 | /*0450*/0x6F, 0x01, 0x75, 0x70, 0x01, 0xE4, 0xF5, 0x73, | ||
| 184 | 0xF5, 0x74, 0xF5, 0x75, 0x90, 0x07, 0x2F, 0xF0, | ||
| 185 | /*0460*/0xF5, 0x3C, 0xF5, 0x3E, 0xF5, 0x46, 0xF5, 0x47, | ||
| 186 | 0xF5, 0x3D, 0xF5, 0x3F, 0xF5, 0x6F, 0xE5, 0x6F, | ||
| 187 | /*0470*/0x70, 0x0F, 0xE5, 0x6B, 0x45, 0x6A, 0x12, 0x07, | ||
| 188 | 0x2A, 0x75, 0x83, 0x80, 0x74, 0x3A, 0xF0, 0x80, | ||
| 189 | /*0480*/0x09, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74, | ||
| 190 | 0x1A, 0xF0, 0xE4, 0xF5, 0x6E, 0xC3, 0x74, 0x3F, | ||
| 191 | /*0490*/0x95, 0x6E, 0xFF, 0x12, 0x08, 0x65, 0x75, 0x83, | ||
| 192 | 0x82, 0xEF, 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x08, | ||
| 193 | /*04A0*/0xC6, 0xE5, 0x33, 0xF0, 0x12, 0x08, 0xFA, 0x12, | ||
| 194 | 0x08, 0xB1, 0x40, 0xE1, 0xE5, 0x6F, 0x70, 0x0B, | ||
| 195 | /*04B0*/0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74, 0x36, | ||
| 196 | 0xF0, 0x80, 0x09, 0x12, 0x07, 0x2A, 0x75, 0x83, | ||
| 197 | /*04C0*/0x80, 0x74, 0x16, 0xF0, 0x75, 0x6E, 0x01, 0x12, | ||
| 198 | 0x07, 0x2A, 0x75, 0x83, 0xB4, 0xE5, 0x6E, 0xF0, | ||
| 199 | /*04D0*/0x12, 0x1A, 0x4D, 0x74, 0x3F, 0x25, 0x6E, 0xF5, | ||
| 200 | 0x82, 0xE4, 0x34, 0x00, 0xF5, 0x83, 0xE5, 0x33, | ||
| 201 | /*04E0*/0xF0, 0x74, 0xBF, 0x25, 0x6E, 0xF5, 0x82, 0xE4, | ||
| 202 | 0x34, 0x00, 0x12, 0x08, 0xB1, 0x40, 0xD8, 0xE4, | ||
| 203 | /*04F0*/0xF5, 0x70, 0xF5, 0x46, 0xF5, 0x47, 0xF5, 0x6E, | ||
| 204 | 0x12, 0x08, 0xFA, 0xF5, 0x83, 0xE0, 0xFE, 0x12, | ||
| 205 | /*0500*/0x08, 0xC6, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, | ||
| 206 | 0xEC, 0x3E, 0xFE, 0xAD, 0x3B, 0xD3, 0xEF, 0x9D, | ||
| 207 | /*0510*/0xEE, 0x9C, 0x50, 0x04, 0x7B, 0x01, 0x80, 0x02, | ||
| 208 | 0x7B, 0x00, 0xE5, 0x70, 0x70, 0x04, 0x7A, 0x01, | ||
| 209 | /*0520*/0x80, 0x02, 0x7A, 0x00, 0xEB, 0x5A, 0x60, 0x06, | ||
| 210 | 0x85, 0x6E, 0x46, 0x75, 0x70, 0x01, 0xD3, 0xEF, | ||
| 211 | /*0530*/0x9D, 0xEE, 0x9C, 0x50, 0x04, 0x7F, 0x01, 0x80, | ||
| 212 | 0x02, 0x7F, 0x00, 0xE5, 0x70, 0xB4, 0x01, 0x04, | ||
| 213 | /*0540*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF, 0x5E, | ||
| 214 | 0x60, 0x03, 0x85, 0x6E, 0x47, 0x05, 0x6E, 0xE5, | ||
| 215 | /*0550*/0x6E, 0x64, 0x7F, 0x70, 0xA3, 0xE5, 0x46, 0x60, | ||
| 216 | 0x05, 0xE5, 0x47, 0xB4, 0x7E, 0x03, 0x85, 0x46, | ||
| 217 | /*0560*/0x47, 0xE5, 0x6F, 0x70, 0x08, 0x85, 0x46, 0x76, | ||
| 218 | 0x85, 0x47, 0x77, 0x80, 0x0E, 0xC3, 0x74, 0x7F, | ||
| 219 | /*0570*/0x95, 0x46, 0xF5, 0x78, 0xC3, 0x74, 0x7F, 0x95, | ||
| 220 | 0x47, 0xF5, 0x79, 0xE5, 0x6F, 0x70, 0x37, 0xE5, | ||
| 221 | /*0580*/0x46, 0x65, 0x47, 0x70, 0x0C, 0x75, 0x73, 0x01, | ||
| 222 | 0x75, 0x74, 0x01, 0xF5, 0x3C, 0xF5, 0x3D, 0x80, | ||
| 223 | /*0590*/0x35, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5, 0x47, 0x95, | ||
| 224 | 0x46, 0xF5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25, | ||
| 225 | /*05A0*/0x46, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05, | ||
| 226 | 0xE4, 0xF5, 0x3D, 0x80, 0x40, 0xC3, 0x74, 0x3F, | ||
| 227 | /*05B0*/0x95, 0x72, 0xF5, 0x3D, 0x80, 0x37, 0xE5, 0x46, | ||
| 228 | 0x65, 0x47, 0x70, 0x0F, 0x75, 0x73, 0x01, 0x75, | ||
| 229 | /*05C0*/0x75, 0x01, 0xF5, 0x3E, 0xF5, 0x3F, 0x75, 0x4E, | ||
| 230 | 0x01, 0x80, 0x22, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5, | ||
| 231 | /*05D0*/0x47, 0x95, 0x46, 0xF5, 0x3E, 0xC3, 0x13, 0xF5, | ||
| 232 | 0x71, 0x25, 0x46, 0xF5, 0x72, 0xD3, 0x94, 0x3F, | ||
| 233 | /*05E0*/0x50, 0x05, 0xE4, 0xF5, 0x3F, 0x80, 0x06, 0xE5, | ||
| 234 | 0x72, 0x24, 0xC1, 0xF5, 0x3F, 0x05, 0x6F, 0xE5, | ||
| 235 | /*05F0*/0x6F, 0xC3, 0x94, 0x02, 0x50, 0x03, 0x02, 0x04, | ||
| 236 | 0x6E, 0xE5, 0x6D, 0x45, 0x6C, 0x70, 0x02, 0x80, | ||
| 237 | /*0600*/0x04, 0xE5, 0x74, 0x45, 0x75, 0x90, 0x07, 0x2F, | ||
| 238 | 0xF0, 0x7F, 0x01, 0xE5, 0x3E, 0x60, 0x04, 0xE5, | ||
| 239 | /*0610*/0x3C, 0x70, 0x14, 0xE4, 0xF5, 0x3C, 0xF5, 0x3D, | ||
| 240 | 0xF5, 0x3E, 0xF5, 0x3F, 0x12, 0x08, 0xD2, 0x70, | ||
| 241 | /*0620*/0x04, 0xF0, 0x02, 0x06, 0xA4, 0x80, 0x7A, 0xE5, | ||
| 242 | 0x3C, 0xC3, 0x95, 0x3E, 0x40, 0x07, 0xE5, 0x3C, | ||
| 243 | /*0630*/0x95, 0x3E, 0xFF, 0x80, 0x06, 0xC3, 0xE5, 0x3E, | ||
| 244 | 0x95, 0x3C, 0xFF, 0xE5, 0x76, 0xD3, 0x95, 0x79, | ||
| 245 | /*0640*/0x40, 0x05, 0x85, 0x76, 0x7A, 0x80, 0x03, 0x85, | ||
| 246 | 0x79, 0x7A, 0xE5, 0x77, 0xC3, 0x95, 0x78, 0x50, | ||
| 247 | /*0650*/0x05, 0x85, 0x77, 0x7B, 0x80, 0x03, 0x85, 0x78, | ||
| 248 | 0x7B, 0xE5, 0x7B, 0xD3, 0x95, 0x7A, 0x40, 0x30, | ||
| 249 | /*0660*/0xE5, 0x7B, 0x95, 0x7A, 0xF5, 0x3C, 0xF5, 0x3E, | ||
| 250 | 0xC3, 0xE5, 0x7B, 0x95, 0x7A, 0x90, 0x07, 0x19, | ||
| 251 | /*0670*/0xF0, 0xE5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25, | ||
| 252 | 0x7A, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05, | ||
| 253 | /*0680*/0xE4, 0xF5, 0x3D, 0x80, 0x1F, 0xC3, 0x74, 0x3F, | ||
| 254 | 0x95, 0x72, 0xF5, 0x3D, 0xF5, 0x3F, 0x80, 0x14, | ||
| 255 | /*0690*/0xE4, 0xF5, 0x3C, 0xF5, 0x3E, 0x90, 0x07, 0x19, | ||
| 256 | 0xF0, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80, | ||
| 257 | /*06A0*/0x03, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x65, 0x75, | ||
| 258 | 0x83, 0xD0, 0xE0, 0x54, 0x0F, 0xFE, 0xAD, 0x3C, | ||
| 259 | /*06B0*/0x70, 0x02, 0x7E, 0x07, 0xBE, 0x0F, 0x02, 0x7E, | ||
| 260 | 0x80, 0xEE, 0xFB, 0xEF, 0xD3, 0x9B, 0x74, 0x80, | ||
| 261 | /*06C0*/0xF8, 0x98, 0x40, 0x1F, 0xE4, 0xF5, 0x3C, 0xF5, | ||
| 262 | 0x3E, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80, | ||
| 263 | /*06D0*/0x12, 0x74, 0x01, 0xF0, 0xE5, 0x08, 0xFB, 0xEB, | ||
| 264 | 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xD2, 0xE0, | ||
| 265 | /*06E0*/0x44, 0x10, 0xF0, 0xE5, 0x08, 0xFB, 0xEB, 0x44, | ||
| 266 | 0x09, 0xF5, 0x82, 0x75, 0x83, 0x9E, 0xED, 0xF0, | ||
| 267 | /*06F0*/0xEB, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xCA, | ||
| 268 | 0xED, 0xF0, 0x12, 0x08, 0x65, 0x75, 0x83, 0xCC, | ||
| 269 | /*0700*/0xEF, 0xF0, 0x22, 0xE5, 0x08, 0x44, 0x07, 0xF5, | ||
| 270 | 0x82, 0x75, 0x83, 0xBC, 0xE0, 0x54, 0xF0, 0xF0, | ||
| 271 | /*0710*/0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, | ||
| 272 | 0xBE, 0xE0, 0x54, 0xF0, 0xF0, 0xE5, 0x08, 0x44, | ||
| 273 | /*0720*/0x07, 0xF5, 0x82, 0x75, 0x83, 0xC0, 0xE0, 0x54, | ||
| 274 | 0xF0, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82, | ||
| 275 | /*0730*/0x22, 0xF0, 0x90, 0x07, 0x28, 0xE0, 0xFE, 0xA3, | ||
| 276 | 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22, 0x85, 0x42, | ||
| 277 | /*0740*/0x42, 0x85, 0x41, 0x41, 0x85, 0x40, 0x40, 0x74, | ||
| 278 | 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E, 0xF5, | ||
| 279 | /*0750*/0x83, 0xE5, 0x42, 0xF0, 0x74, 0xE0, 0x2F, 0xF5, | ||
| 280 | 0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xE5, | ||
| 281 | /*0760*/0x42, 0x29, 0xFD, 0xE4, 0x33, 0xFC, 0xE5, 0x3C, | ||
| 282 | 0xC3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, | ||
| 283 | /*0770*/0x98, 0x22, 0xF5, 0x83, 0xE0, 0x90, 0x07, 0x22, | ||
| 284 | 0x54, 0x1F, 0xFD, 0xE0, 0xFA, 0xA3, 0xE0, 0xF5, | ||
| 285 | /*0780*/0x82, 0x8A, 0x83, 0xED, 0xF0, 0x22, 0x90, 0x07, | ||
| 286 | 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C, | ||
| 287 | /*0790*/0x83, 0x22, 0x90, 0x07, 0x24, 0xFF, 0xED, 0x44, | ||
| 288 | 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x85, | ||
| 289 | /*07A0*/0x38, 0x38, 0x85, 0x39, 0x39, 0x85, 0x3A, 0x3A, | ||
| 290 | 0x74, 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E, | ||
| 291 | /*07B0*/0xF5, 0x83, 0x22, 0x90, 0x07, 0x26, 0xFF, 0xED, | ||
| 292 | 0x44, 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, | ||
| 293 | /*07C0*/0xF0, 0x74, 0xA0, 0x2F, 0xF5, 0x82, 0x74, 0x02, | ||
| 294 | 0x3E, 0xF5, 0x83, 0x22, 0x74, 0xC0, 0x25, 0x11, | ||
| 295 | /*07D0*/0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0x22, | ||
| 296 | 0x74, 0x00, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34, | ||
| 297 | /*07E0*/0x02, 0xF5, 0x83, 0x22, 0x74, 0x60, 0x25, 0x11, | ||
| 298 | 0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22, | ||
| 299 | /*07F0*/0x74, 0x80, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34, | ||
| 300 | 0x03, 0xF5, 0x83, 0x22, 0x74, 0xE0, 0x25, 0x11, | ||
| 301 | /*0800*/0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22, | ||
| 302 | 0x74, 0x40, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34, | ||
| 303 | /*0810*/0x06, 0xF5, 0x83, 0x22, 0x74, 0x80, 0x2F, 0xF5, | ||
| 304 | 0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xAF, | ||
| 305 | /*0820*/0x08, 0x7E, 0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82, | ||
| 306 | 0x22, 0xF5, 0x83, 0xE5, 0x82, 0x44, 0x07, 0xF5, | ||
| 307 | /*0830*/0x82, 0xE5, 0x40, 0xF0, 0x22, 0x74, 0x40, 0x25, | ||
| 308 | 0x11, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, | ||
| 309 | /*0840*/0x22, 0x74, 0xC0, 0x25, 0x11, 0xF5, 0x82, 0xE4, | ||
| 310 | 0x34, 0x03, 0xF5, 0x83, 0x22, 0x74, 0x00, 0x25, | ||
| 311 | /*0850*/0x11, 0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83, | ||
| 312 | 0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4, | ||
| 313 | /*0860*/0x34, 0x06, 0xF5, 0x83, 0x22, 0xE5, 0x08, 0xFD, | ||
| 314 | 0xED, 0x44, 0x07, 0xF5, 0x82, 0x22, 0xE5, 0x41, | ||
| 315 | /*0870*/0xF0, 0xE5, 0x65, 0x64, 0x01, 0x45, 0x64, 0x22, | ||
| 316 | 0x7E, 0x00, 0xFB, 0x7A, 0x00, 0xFD, 0x7C, 0x00, | ||
| 317 | /*0880*/0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4, | ||
| 318 | 0x34, 0x02, 0x22, 0x74, 0xA0, 0x25, 0x11, 0xF5, | ||
| 319 | /*0890*/0x82, 0xE4, 0x34, 0x03, 0x22, 0x85, 0x3E, 0x42, | ||
| 320 | 0x85, 0x3F, 0x41, 0x8F, 0x40, 0x22, 0x85, 0x3C, | ||
| 321 | /*08A0*/0x42, 0x85, 0x3D, 0x41, 0x8F, 0x40, 0x22, 0x75, | ||
| 322 | 0x45, 0x3F, 0x90, 0x07, 0x20, 0xE4, 0xF0, 0xA3, | ||
| 323 | /*08B0*/0x22, 0xF5, 0x83, 0xE5, 0x32, 0xF0, 0x05, 0x6E, | ||
| 324 | 0xE5, 0x6E, 0xC3, 0x94, 0x40, 0x22, 0xF0, 0xE5, | ||
| 325 | /*08C0*/0x08, 0x44, 0x06, 0xF5, 0x82, 0x22, 0x74, 0x00, | ||
| 326 | 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x00, 0xF5, | ||
| 327 | /*08D0*/0x83, 0x22, 0xE5, 0x6D, 0x45, 0x6C, 0x90, 0x07, | ||
| 328 | 0x2F, 0x22, 0xE4, 0xF9, 0xE5, 0x3C, 0xD3, 0x95, | ||
| 329 | /*08E0*/0x3E, 0x22, 0x74, 0x80, 0x2E, 0xF5, 0x82, 0xE4, | ||
| 330 | 0x34, 0x02, 0xF5, 0x83, 0xE0, 0x22, 0x74, 0xA0, | ||
| 331 | /*08F0*/0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, | ||
| 332 | 0xE0, 0x22, 0x74, 0x80, 0x25, 0x6E, 0xF5, 0x82, | ||
| 333 | /*0900*/0xE4, 0x34, 0x00, 0x22, 0x25, 0x42, 0xFD, 0xE4, | ||
| 334 | 0x33, 0xFC, 0x22, 0x85, 0x42, 0x42, 0x85, 0x41, | ||
| 335 | /*0910*/0x41, 0x85, 0x40, 0x40, 0x22, 0xED, 0x4C, 0x60, | ||
| 336 | 0x03, 0x02, 0x09, 0xE5, 0xEF, 0x4E, 0x70, 0x37, | ||
| 337 | /*0920*/0x90, 0x07, 0x26, 0x12, 0x07, 0x89, 0xE0, 0xFD, | ||
| 338 | 0x12, 0x07, 0xCC, 0xED, 0xF0, 0x90, 0x07, 0x28, | ||
| 339 | /*0930*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xD8, | ||
| 340 | 0xED, 0xF0, 0x12, 0x07, 0x86, 0xE0, 0x54, 0x1F, | ||
| 341 | /*0940*/0xFD, 0x12, 0x08, 0x81, 0xF5, 0x83, 0xED, 0xF0, | ||
| 342 | 0x90, 0x07, 0x24, 0x12, 0x07, 0x89, 0xE0, 0x54, | ||
| 343 | /*0950*/0x1F, 0xFD, 0x12, 0x08, 0x35, 0xED, 0xF0, 0xEF, | ||
| 344 | 0x64, 0x04, 0x4E, 0x70, 0x37, 0x90, 0x07, 0x26, | ||
| 345 | /*0960*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xE4, | ||
| 346 | 0xED, 0xF0, 0x90, 0x07, 0x28, 0x12, 0x07, 0x89, | ||
| 347 | /*0970*/0xE0, 0xFD, 0x12, 0x07, 0xF0, 0xED, 0xF0, 0x12, | ||
| 348 | 0x07, 0x86, 0xE0, 0x54, 0x1F, 0xFD, 0x12, 0x08, | ||
| 349 | /*0980*/0x8B, 0xF5, 0x83, 0xED, 0xF0, 0x90, 0x07, 0x24, | ||
| 350 | 0x12, 0x07, 0x89, 0xE0, 0x54, 0x1F, 0xFD, 0x12, | ||
| 351 | /*0990*/0x08, 0x41, 0xED, 0xF0, 0xEF, 0x64, 0x01, 0x4E, | ||
| 352 | 0x70, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, | ||
| 353 | /*09A0*/0xEF, 0x64, 0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01, | ||
| 354 | 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x78, | ||
| 355 | /*09B0*/0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE0, 0xFF, | ||
| 356 | 0x12, 0x07, 0xFC, 0xEF, 0x12, 0x07, 0x31, 0xE0, | ||
| 357 | /*09C0*/0xFF, 0x12, 0x08, 0x08, 0xEF, 0xF0, 0x90, 0x07, | ||
| 358 | 0x22, 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF, | ||
| 359 | /*09D0*/0x12, 0x08, 0x4D, 0xEF, 0xF0, 0x90, 0x07, 0x24, | ||
| 360 | 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF, 0x12, | ||
| 361 | /*09E0*/0x08, 0x59, 0xEF, 0xF0, 0x22, 0x12, 0x07, 0xCC, | ||
| 362 | 0xE4, 0xF0, 0x12, 0x07, 0xD8, 0xE4, 0xF0, 0x12, | ||
| 363 | /*09F0*/0x08, 0x81, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08, | ||
| 364 | 0x35, 0x74, 0x14, 0xF0, 0x12, 0x07, 0xE4, 0xE4, | ||
| 365 | /*0A00*/0xF0, 0x12, 0x07, 0xF0, 0xE4, 0xF0, 0x12, 0x08, | ||
| 366 | 0x8B, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08, 0x41, | ||
| 367 | /*0A10*/0x74, 0x14, 0xF0, 0x12, 0x07, 0xFC, 0xE4, 0xF0, | ||
| 368 | 0x12, 0x08, 0x08, 0xE4, 0xF0, 0x12, 0x08, 0x4D, | ||
| 369 | /*0A20*/0xE4, 0xF0, 0x12, 0x08, 0x59, 0x74, 0x14, 0xF0, | ||
| 370 | 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFC, 0x10, 0xE4, | ||
| 371 | /*0A30*/0xF5, 0xFD, 0x75, 0xFE, 0x30, 0xF5, 0xFF, 0xE5, | ||
| 372 | 0xE7, 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0xE5, | ||
| 373 | /*0A40*/0xE6, 0x20, 0xE7, 0x0B, 0x78, 0xFF, 0xE4, 0xF6, | ||
| 374 | 0xD8, 0xFD, 0x53, 0xE6, 0xFE, 0x80, 0x09, 0x78, | ||
| 375 | /*0A50*/0x08, 0xE4, 0xF6, 0xD8, 0xFD, 0x53, 0xE6, 0xFE, | ||
| 376 | 0x75, 0x81, 0x80, 0xE4, 0xF5, 0xA8, 0xD2, 0xA8, | ||
| 377 | /*0A60*/0xC2, 0xA9, 0xD2, 0xAF, 0xE5, 0xE2, 0x20, 0xE5, | ||
| 378 | 0x05, 0x20, 0xE6, 0x02, 0x80, 0x03, 0x43, 0xE1, | ||
| 379 | /*0A70*/0x02, 0xE5, 0xE2, 0x20, 0xE0, 0x0E, 0x90, 0x00, | ||
| 380 | 0x00, 0x7F, 0x00, 0x7E, 0x08, 0xE4, 0xF0, 0xA3, | ||
| 381 | /*0A80*/0xDF, 0xFC, 0xDE, 0xFA, 0x02, 0x0A, 0xDB, 0x43, | ||
| 382 | 0xFA, 0x01, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, | ||
| 383 | /*0A90*/0xC0, 0x82, 0xC0, 0xD0, 0x12, 0x1C, 0xE7, 0xD0, | ||
| 384 | 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, | ||
| 385 | /*0AA0*/0xE0, 0x53, 0xFA, 0xFE, 0x32, 0x02, 0x1B, 0x55, | ||
| 386 | 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xF6, | ||
| 387 | /*0AB0*/0x08, 0xDF, 0xF9, 0x80, 0x29, 0xE4, 0x93, 0xA3, | ||
| 388 | 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, | ||
| 389 | /*0AC0*/0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, | ||
| 390 | 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, | ||
| 391 | /*0AD0*/0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, | ||
| 392 | 0x20, 0x40, 0x80, 0x90, 0x00, 0x3F, 0xE4, 0x7E, | ||
| 393 | /*0AE0*/0x01, 0x93, 0x60, 0xC1, 0xA3, 0xFF, 0x54, 0x3F, | ||
| 394 | 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, | ||
| 395 | /*0AF0*/0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, | ||
| 396 | 0xE0, 0x60, 0xAD, 0x40, 0xB8, 0x80, 0xFE, 0x8C, | ||
| 397 | /*0B00*/0x64, 0x8D, 0x65, 0x8A, 0x66, 0x8B, 0x67, 0xE4, | ||
| 398 | 0xF5, 0x69, 0xEF, 0x4E, 0x70, 0x03, 0x02, 0x1D, | ||
| 399 | /*0B10*/0x55, 0xE4, 0xF5, 0x68, 0xE5, 0x67, 0x45, 0x66, | ||
| 400 | 0x70, 0x32, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90, | ||
| 401 | /*0B20*/0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE4, | ||
| 402 | 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4, 0x12, | ||
| 403 | /*0B30*/0x08, 0x70, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75, | ||
| 404 | 0x83, 0x92, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 405 | /*0B40*/0xC6, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8, | ||
| 406 | 0xE4, 0xF0, 0x80, 0x11, 0x90, 0x07, 0x26, 0x12, | ||
| 407 | /*0B50*/0x07, 0x35, 0xE4, 0x12, 0x08, 0x70, 0x70, 0x05, | ||
| 408 | 0x12, 0x07, 0x32, 0xE4, 0xF0, 0x12, 0x1D, 0x55, | ||
| 409 | /*0B60*/0x12, 0x1E, 0xBF, 0xE5, 0x67, 0x45, 0x66, 0x70, | ||
| 410 | 0x33, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90, 0xE5, | ||
| 411 | /*0B70*/0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5, | ||
| 412 | 0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x12, | ||
| 413 | /*0B80*/0x08, 0x6E, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75, | ||
| 414 | 0x83, 0x92, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75, | ||
| 415 | /*0B90*/0x83, 0xC6, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75, | ||
| 416 | 0x83, 0xC8, 0x80, 0x0E, 0x90, 0x07, 0x26, 0x12, | ||
| 417 | /*0BA0*/0x07, 0x35, 0x12, 0x08, 0x6E, 0x70, 0x06, 0x12, | ||
| 418 | 0x07, 0x32, 0xE5, 0x40, 0xF0, 0xAF, 0x69, 0x7E, | ||
| 419 | /*0BB0*/0x00, 0xAD, 0x67, 0xAC, 0x66, 0x12, 0x04, 0x44, | ||
| 420 | 0x12, 0x07, 0x2A, 0x75, 0x83, 0xCA, 0xE0, 0xD3, | ||
| 421 | /*0BC0*/0x94, 0x00, 0x50, 0x0C, 0x05, 0x68, 0xE5, 0x68, | ||
| 422 | 0xC3, 0x94, 0x05, 0x50, 0x03, 0x02, 0x0B, 0x14, | ||
| 423 | /*0BD0*/0x22, 0x8C, 0x60, 0x8D, 0x61, 0x12, 0x08, 0xDA, | ||
| 424 | 0x74, 0x20, 0x40, 0x0D, 0x2F, 0xF5, 0x82, 0x74, | ||
| 425 | /*0BE0*/0x03, 0x3E, 0xF5, 0x83, 0xE5, 0x3E, 0xF0, 0x80, | ||
| 426 | 0x0B, 0x2F, 0xF5, 0x82, 0x74, 0x03, 0x3E, 0xF5, | ||
| 427 | /*0BF0*/0x83, 0xE5, 0x3C, 0xF0, 0xE5, 0x3C, 0xD3, 0x95, | ||
| 428 | 0x3E, 0x40, 0x3C, 0xE5, 0x61, 0x45, 0x60, 0x70, | ||
| 429 | /*0C00*/0x10, 0xE9, 0x12, 0x09, 0x04, 0xE5, 0x3E, 0x12, | ||
| 430 | 0x07, 0x68, 0x40, 0x3B, 0x12, 0x08, 0x95, 0x80, | ||
| 431 | /*0C10*/0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40, 0x1D, | ||
| 432 | 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05, 0x85, | ||
| 433 | /*0C20*/0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F, | ||
| 434 | 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x3E, 0x12, 0x07, | ||
| 435 | /*0C30*/0xC0, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x43, 0xE5, | ||
| 436 | 0x61, 0x45, 0x60, 0x70, 0x19, 0x12, 0x07, 0x5F, | ||
| 437 | /*0C40*/0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x27, 0x12, | ||
| 438 | 0x09, 0x0B, 0x12, 0x08, 0x14, 0xE5, 0x42, 0x12, | ||
| 439 | /*0C50*/0x07, 0xC0, 0xE5, 0x41, 0xF0, 0x22, 0xE5, 0x3C, | ||
| 440 | 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C, 0x38, | ||
| 441 | /*0C60*/0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39, 0x80, | ||
| 442 | 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x08, | ||
| 443 | /*0C70*/0x14, 0xE5, 0x3C, 0x12, 0x07, 0xC0, 0xE5, 0x3D, | ||
| 444 | 0xF0, 0x22, 0x85, 0x38, 0x38, 0x85, 0x39, 0x39, | ||
| 445 | /*0C80*/0x85, 0x3A, 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x38, | ||
| 446 | 0x12, 0x07, 0xC0, 0xE5, 0x39, 0xF0, 0x22, 0x7F, | ||
| 447 | /*0C90*/0x06, 0x12, 0x17, 0x31, 0x12, 0x1D, 0x23, 0x12, | ||
| 448 | 0x0E, 0x04, 0x12, 0x0E, 0x33, 0xE0, 0x44, 0x0A, | ||
| 449 | /*0CA0*/0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E, 0x04, 0x12, | ||
| 450 | 0x0E, 0x0B, 0xEF, 0xF0, 0xE5, 0x28, 0x30, 0xE5, | ||
| 451 | /*0CB0*/0x03, 0xD3, 0x80, 0x01, 0xC3, 0x40, 0x05, 0x75, | ||
| 452 | 0x14, 0x20, 0x80, 0x03, 0x75, 0x14, 0x08, 0x12, | ||
| 453 | /*0CC0*/0x0E, 0x04, 0x75, 0x83, 0x8A, 0xE5, 0x14, 0xF0, | ||
| 454 | 0xB4, 0xFF, 0x05, 0x75, 0x12, 0x80, 0x80, 0x06, | ||
| 455 | /*0CD0*/0xE5, 0x14, 0xC3, 0x13, 0xF5, 0x12, 0xE4, 0xF5, | ||
| 456 | 0x16, 0xF5, 0x7F, 0x12, 0x19, 0x36, 0x12, 0x13, | ||
| 457 | /*0CE0*/0xA3, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x50, 0x09, | ||
| 458 | 0x05, 0x16, 0xE5, 0x16, 0xC3, 0x94, 0x14, 0x40, | ||
| 459 | /*0CF0*/0xEA, 0xE5, 0xE4, 0x20, 0xE7, 0x28, 0x12, 0x0E, | ||
| 460 | 0x04, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3, | ||
| 461 | /*0D00*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, | ||
| 462 | 0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40, | ||
| 463 | /*0D10*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF, | ||
| 464 | 0x5E, 0x60, 0x03, 0x12, 0x1D, 0xD7, 0xE5, 0x7F, | ||
| 465 | /*0D20*/0xC3, 0x94, 0x11, 0x40, 0x14, 0x12, 0x0E, 0x04, | ||
| 466 | 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x80, 0xF0, 0xE5, | ||
| 467 | /*0D30*/0xE4, 0x20, 0xE7, 0x0F, 0x12, 0x1D, 0xD7, 0x80, | ||
| 468 | 0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0xD2, 0xE0, | ||
| 469 | /*0D40*/0x54, 0x7F, 0xF0, 0x12, 0x1D, 0x23, 0x22, 0x74, | ||
| 470 | 0x8A, 0x85, 0x08, 0x82, 0xF5, 0x83, 0xE5, 0x17, | ||
| 471 | /*0D50*/0xF0, 0x12, 0x0E, 0x3A, 0xE4, 0xF0, 0x90, 0x07, | ||
| 472 | 0x02, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x90, | ||
| 473 | /*0D60*/0xEF, 0xF0, 0x74, 0x92, 0xFE, 0xE5, 0x08, 0x44, | ||
| 474 | 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x54, | ||
| 475 | /*0D70*/0xC0, 0xFD, 0x90, 0x07, 0x03, 0xE0, 0x54, 0x3F, | ||
| 476 | 0x4D, 0x8F, 0x82, 0x8E, 0x83, 0xF0, 0x90, 0x07, | ||
| 477 | /*0D80*/0x04, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x82, | ||
| 478 | 0xEF, 0xF0, 0x90, 0x07, 0x05, 0xE0, 0xFF, 0xED, | ||
| 479 | /*0D90*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xB4, 0xEF, | ||
| 480 | 0x12, 0x0E, 0x03, 0x75, 0x83, 0x80, 0xE0, 0x54, | ||
| 481 | /*0DA0*/0xBF, 0xF0, 0x30, 0x37, 0x0A, 0x12, 0x0E, 0x91, | ||
| 482 | 0x75, 0x83, 0x94, 0xE0, 0x44, 0x80, 0xF0, 0x30, | ||
| 483 | /*0DB0*/0x38, 0x0A, 0x12, 0x0E, 0x91, 0x75, 0x83, 0x92, | ||
| 484 | 0xE0, 0x44, 0x80, 0xF0, 0xE5, 0x28, 0x30, 0xE4, | ||
| 485 | /*0DC0*/0x1A, 0x20, 0x39, 0x0A, 0x12, 0x0E, 0x04, 0x75, | ||
| 486 | 0x83, 0x88, 0xE0, 0x54, 0x7F, 0xF0, 0x20, 0x3A, | ||
| 487 | /*0DD0*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x88, 0xE0, | ||
| 488 | 0x54, 0xBF, 0xF0, 0x74, 0x8C, 0xFE, 0x12, 0x0E, | ||
| 489 | /*0DE0*/0x04, 0x8E, 0x83, 0xE0, 0x54, 0x0F, 0x12, 0x0E, | ||
| 490 | 0x03, 0x75, 0x83, 0x86, 0xE0, 0x54, 0xBF, 0xF0, | ||
| 491 | /*0DF0*/0xE5, 0x08, 0x44, 0x06, 0x12, 0x0D, 0xFD, 0x75, | ||
| 492 | 0x83, 0x8A, 0xE4, 0xF0, 0x22, 0xF5, 0x82, 0x75, | ||
| 493 | /*0E00*/0x83, 0x82, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07, | ||
| 494 | 0xF5, 0x82, 0x22, 0x8E, 0x83, 0xE0, 0xF5, 0x10, | ||
| 495 | /*0E10*/0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44, 0x01, 0xFF, | ||
| 496 | 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07, 0xF5, 0x82, | ||
| 497 | /*0E20*/0x22, 0xE5, 0x15, 0xC4, 0x54, 0x07, 0xFF, 0xE5, | ||
| 498 | 0x08, 0xFD, 0xED, 0x44, 0x08, 0xF5, 0x82, 0x75, | ||
| 499 | /*0E30*/0x83, 0x82, 0x22, 0x75, 0x83, 0x80, 0xE0, 0x44, | ||
| 500 | 0x40, 0xF0, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82, | ||
| 501 | /*0E40*/0x75, 0x83, 0x8A, 0x22, 0xE5, 0x16, 0x25, 0xE0, | ||
| 502 | 0x25, 0xE0, 0x24, 0xAF, 0xF5, 0x82, 0xE4, 0x34, | ||
| 503 | /*0E50*/0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0D, 0x22, | ||
| 504 | 0x43, 0xE1, 0x10, 0x43, 0xE1, 0x80, 0x53, 0xE1, | ||
| 505 | /*0E60*/0xFD, 0x85, 0xE1, 0x10, 0x22, 0xE5, 0x16, 0x25, | ||
| 506 | 0xE0, 0x25, 0xE0, 0x24, 0xB2, 0xF5, 0x82, 0xE4, | ||
| 507 | /*0E70*/0x34, 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0x85, | ||
| 508 | 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15, 0xF0, | ||
| 509 | /*0E80*/0x22, 0xE5, 0xE2, 0x54, 0x20, 0xD3, 0x94, 0x00, | ||
| 510 | 0x22, 0xE5, 0xE2, 0x54, 0x40, 0xD3, 0x94, 0x00, | ||
| 511 | /*0E90*/0x22, 0xE5, 0x08, 0x44, 0x06, 0xF5, 0x82, 0x22, | ||
| 512 | 0xFD, 0xE5, 0x08, 0xFB, 0xEB, 0x44, 0x07, 0xF5, | ||
| 513 | /*0EA0*/0x82, 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFE, 0x30, | ||
| 514 | 0x22, 0xEF, 0x4E, 0x70, 0x26, 0x12, 0x07, 0xCC, | ||
| 515 | /*0EB0*/0xE0, 0xFD, 0x90, 0x07, 0x26, 0x12, 0x07, 0x7B, | ||
| 516 | 0x12, 0x07, 0xD8, 0xE0, 0xFD, 0x90, 0x07, 0x28, | ||
| 517 | /*0EC0*/0x12, 0x07, 0x7B, 0x12, 0x08, 0x81, 0x12, 0x07, | ||
| 518 | 0x72, 0x12, 0x08, 0x35, 0xE0, 0x90, 0x07, 0x24, | ||
| 519 | /*0ED0*/0x12, 0x07, 0x78, 0xEF, 0x64, 0x04, 0x4E, 0x70, | ||
| 520 | 0x29, 0x12, 0x07, 0xE4, 0xE0, 0xFD, 0x90, 0x07, | ||
| 521 | /*0EE0*/0x26, 0x12, 0x07, 0x7B, 0x12, 0x07, 0xF0, 0xE0, | ||
| 522 | 0xFD, 0x90, 0x07, 0x28, 0x12, 0x07, 0x7B, 0x12, | ||
| 523 | /*0EF0*/0x08, 0x8B, 0x12, 0x07, 0x72, 0x12, 0x08, 0x41, | ||
| 524 | 0xE0, 0x54, 0x1F, 0xFD, 0x90, 0x07, 0x24, 0x12, | ||
| 525 | /*0F00*/0x07, 0x7B, 0xEF, 0x64, 0x01, 0x4E, 0x70, 0x04, | ||
| 526 | 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0xEF, 0x64, | ||
| 527 | /*0F10*/0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02, | ||
| 528 | 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x35, 0x12, 0x07, | ||
| 529 | /*0F20*/0xFC, 0xE0, 0xFF, 0x90, 0x07, 0x26, 0x12, 0x07, | ||
| 530 | 0x89, 0xEF, 0xF0, 0x12, 0x08, 0x08, 0xE0, 0xFF, | ||
| 531 | /*0F30*/0x90, 0x07, 0x28, 0x12, 0x07, 0x89, 0xEF, 0xF0, | ||
| 532 | 0x12, 0x08, 0x4D, 0xE0, 0x54, 0x1F, 0xFF, 0x12, | ||
| 533 | /*0F40*/0x07, 0x86, 0xEF, 0xF0, 0x12, 0x08, 0x59, 0xE0, | ||
| 534 | 0x54, 0x1F, 0xFF, 0x90, 0x07, 0x24, 0x12, 0x07, | ||
| 535 | /*0F50*/0x89, 0xEF, 0xF0, 0x22, 0xE4, 0xF5, 0x53, 0x12, | ||
| 536 | 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, | ||
| 537 | /*0F60*/0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40, 0x04, 0x7E, | ||
| 538 | 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x70, | ||
| 539 | /*0F70*/0x03, 0x02, 0x0F, 0xF6, 0x85, 0xE1, 0x10, 0x43, | ||
| 540 | 0xE1, 0x02, 0x53, 0xE1, 0x0F, 0x85, 0xE1, 0x10, | ||
| 541 | /*0F80*/0xE4, 0xF5, 0x51, 0xE5, 0xE3, 0x54, 0x3F, 0xF5, | ||
| 542 | 0x52, 0x12, 0x0E, 0x89, 0x40, 0x1D, 0xAD, 0x52, | ||
| 543 | /*0F90*/0xAF, 0x51, 0x12, 0x11, 0x18, 0xEF, 0x60, 0x08, | ||
| 544 | 0x85, 0xE1, 0x10, 0x43, 0xE1, 0x40, 0x80, 0x0B, | ||
| 545 | /*0FA0*/0x53, 0xE1, 0xBF, 0x12, 0x0E, 0x58, 0x12, 0x00, | ||
| 546 | 0x06, 0x80, 0xFB, 0xE5, 0xE3, 0x54, 0x3F, 0xF5, | ||
| 547 | /*0FB0*/0x51, 0xE5, 0xE4, 0x54, 0x3F, 0xF5, 0x52, 0x12, | ||
| 548 | 0x0E, 0x81, 0x40, 0x1D, 0xAD, 0x52, 0xAF, 0x51, | ||
| 549 | /*0FC0*/0x12, 0x11, 0x18, 0xEF, 0x60, 0x08, 0x85, 0xE1, | ||
| 550 | 0x10, 0x43, 0xE1, 0x20, 0x80, 0x0B, 0x53, 0xE1, | ||
| 551 | /*0FD0*/0xDF, 0x12, 0x0E, 0x58, 0x12, 0x00, 0x06, 0x80, | ||
| 552 | 0xFB, 0x12, 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01, | ||
| 553 | /*0FE0*/0x80, 0x02, 0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40, | ||
| 554 | 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, | ||
| 555 | /*0FF0*/0x4F, 0x60, 0x03, 0x12, 0x0E, 0x5B, 0x22, 0x12, | ||
| 556 | 0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x22, | ||
| 557 | /*1000*/0x02, 0x11, 0x00, 0x02, 0x10, 0x40, 0x02, 0x10, | ||
| 558 | 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 559 | /*1010*/0x01, 0x20, 0x01, 0x20, 0xE4, 0xF5, 0x57, 0x12, | ||
| 560 | 0x16, 0xBD, 0x12, 0x16, 0x44, 0xE4, 0x12, 0x10, | ||
| 561 | /*1020*/0x56, 0x12, 0x14, 0xB7, 0x90, 0x07, 0x26, 0x12, | ||
| 562 | 0x07, 0x35, 0xE4, 0x12, 0x07, 0x31, 0xE4, 0xF0, | ||
| 563 | /*1030*/0x12, 0x10, 0x56, 0x12, 0x14, 0xB7, 0x90, 0x07, | ||
| 564 | 0x26, 0x12, 0x07, 0x35, 0xE5, 0x41, 0x12, 0x07, | ||
| 565 | /*1040*/0x31, 0xE5, 0x40, 0xF0, 0xAF, 0x57, 0x7E, 0x00, | ||
| 566 | 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF, | ||
| 567 | /*1050*/0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xFF, 0x90, | ||
| 568 | 0x07, 0x20, 0xA3, 0xE0, 0xFD, 0xE4, 0xF5, 0x56, | ||
| 569 | /*1060*/0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x12, | ||
| 570 | 0x11, 0x51, 0x7F, 0x0F, 0x7D, 0x18, 0xE4, 0xF5, | ||
| 571 | /*1070*/0x56, 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, | ||
| 572 | 0x12, 0x15, 0x41, 0xAF, 0x56, 0x7E, 0x00, 0x12, | ||
| 573 | /*1080*/0x1A, 0xFF, 0xE4, 0xFF, 0xF5, 0x56, 0x7D, 0x1F, | ||
| 574 | 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x22, | ||
| 575 | /*1090*/0x22, 0xE4, 0xF5, 0x55, 0xE5, 0x08, 0xFD, 0x74, | ||
| 576 | 0xA0, 0xF5, 0x56, 0xED, 0x44, 0x07, 0xF5, 0x57, | ||
| 577 | /*10A0*/0xE5, 0x28, 0x30, 0xE5, 0x03, 0xD3, 0x80, 0x01, | ||
| 578 | 0xC3, 0x40, 0x05, 0x7F, 0x28, 0xEF, 0x80, 0x04, | ||
| 579 | /*10B0*/0x7F, 0x14, 0xEF, 0xC3, 0x13, 0xF5, 0x54, 0xE4, | ||
| 580 | 0xF9, 0x12, 0x0E, 0x18, 0x75, 0x83, 0x8E, 0xE0, | ||
| 581 | /*10C0*/0xF5, 0x10, 0xCE, 0xEF, 0xCE, 0xEE, 0xD3, 0x94, | ||
| 582 | 0x00, 0x40, 0x26, 0xE5, 0x10, 0x54, 0xFE, 0x12, | ||
| 583 | /*10D0*/0x0E, 0x98, 0x75, 0x83, 0x8E, 0xED, 0xF0, 0xE5, | ||
| 584 | 0x10, 0x44, 0x01, 0xFD, 0xEB, 0x44, 0x07, 0xF5, | ||
| 585 | /*10E0*/0x82, 0xED, 0xF0, 0x85, 0x57, 0x82, 0x85, 0x56, | ||
| 586 | 0x83, 0xE0, 0x30, 0xE3, 0x01, 0x09, 0x1E, 0x80, | ||
| 587 | /*10F0*/0xD4, 0xC2, 0x34, 0xE9, 0xC3, 0x95, 0x54, 0x40, | ||
| 588 | 0x02, 0xD2, 0x34, 0x22, 0x02, 0x00, 0x06, 0x22, | ||
| 589 | /*1100*/0x30, 0x30, 0x11, 0x90, 0x10, 0x00, 0xE4, 0x93, | ||
| 590 | 0xF5, 0x10, 0x90, 0x10, 0x10, 0xE4, 0x93, 0xF5, | ||
| 591 | /*1110*/0x10, 0x12, 0x10, 0x90, 0x12, 0x11, 0x50, 0x22, | ||
| 592 | 0xE4, 0xFC, 0xC3, 0xED, 0x9F, 0xFA, 0xEF, 0xF5, | ||
| 593 | /*1120*/0x83, 0x75, 0x82, 0x00, 0x79, 0xFF, 0xE4, 0x93, | ||
| 594 | 0xCC, 0x6C, 0xCC, 0xA3, 0xD9, 0xF8, 0xDA, 0xF6, | ||
| 595 | /*1130*/0xE5, 0xE2, 0x30, 0xE4, 0x02, 0x8C, 0xE5, 0xED, | ||
| 596 | 0x24, 0xFF, 0xFF, 0xEF, 0x75, 0x82, 0xFF, 0xF5, | ||
| 597 | /*1140*/0x83, 0xE4, 0x93, 0x6C, 0x70, 0x03, 0x7F, 0x01, | ||
| 598 | 0x22, 0x7F, 0x00, 0x22, 0x22, 0x11, 0x00, 0x00, | ||
| 599 | /*1150*/0x22, 0x8E, 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D, | ||
| 600 | 0x5B, 0x8A, 0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01, | ||
| 601 | /*1160*/0xE4, 0xF5, 0x5F, 0xF5, 0x60, 0xF5, 0x62, 0x12, | ||
| 602 | 0x07, 0x2A, 0x75, 0x83, 0xD0, 0xE0, 0xFF, 0xC4, | ||
| 603 | /*1170*/0x54, 0x0F, 0xF5, 0x61, 0x12, 0x1E, 0xA5, 0x85, | ||
| 604 | 0x59, 0x5E, 0xD3, 0xE5, 0x5E, 0x95, 0x5B, 0xE5, | ||
| 605 | /*1180*/0x5A, 0x12, 0x07, 0x6B, 0x50, 0x4B, 0x12, 0x07, | ||
| 606 | 0x03, 0x75, 0x83, 0xBC, 0xE0, 0x45, 0x5E, 0x12, | ||
| 607 | /*1190*/0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x45, 0x5E, | ||
| 608 | 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0, 0x45, | ||
| 609 | /*11A0*/0x5E, 0xF0, 0xAF, 0x5F, 0xE5, 0x60, 0x12, 0x08, | ||
| 610 | 0x78, 0x12, 0x0A, 0xFF, 0xAF, 0x62, 0x7E, 0x00, | ||
| 611 | /*11B0*/0xAD, 0x5D, 0xAC, 0x5C, 0x12, 0x04, 0x44, 0xE5, | ||
| 612 | 0x61, 0xAF, 0x5E, 0x7E, 0x00, 0xB4, 0x03, 0x05, | ||
| 613 | /*11C0*/0x12, 0x1E, 0x21, 0x80, 0x07, 0xAD, 0x5D, 0xAC, | ||
| 614 | 0x5C, 0x12, 0x13, 0x17, 0x05, 0x5E, 0x02, 0x11, | ||
| 615 | /*11D0*/0x7A, 0x12, 0x07, 0x03, 0x75, 0x83, 0xBC, 0xE0, | ||
| 616 | 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBE, | ||
| 617 | /*11E0*/0xE0, 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 618 | 0xC0, 0xE0, 0x45, 0x40, 0xF0, 0x22, 0x8E, 0x58, | ||
| 619 | /*11F0*/0x8F, 0x59, 0x75, 0x5A, 0x01, 0x79, 0x01, 0x75, | ||
| 620 | 0x5B, 0x01, 0xE4, 0xFB, 0x12, 0x07, 0x2A, 0x75, | ||
| 621 | /*1200*/0x83, 0xAE, 0xE0, 0x54, 0x1A, 0xFF, 0x12, 0x08, | ||
| 622 | 0x65, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFE, 0xEF, | ||
| 623 | /*1210*/0x70, 0x0C, 0xEE, 0x65, 0x35, 0x70, 0x07, 0x90, | ||
| 624 | 0x07, 0x2F, 0xE0, 0xB4, 0x01, 0x0D, 0xAF, 0x35, | ||
| 625 | /*1220*/0x7E, 0x00, 0x12, 0x0E, 0xA9, 0xCF, 0xEB, 0xCF, | ||
| 626 | 0x02, 0x1E, 0x60, 0xE5, 0x59, 0x64, 0x02, 0x45, | ||
| 627 | /*1230*/0x58, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, | ||
| 628 | 0x00, 0xE5, 0x59, 0x45, 0x58, 0x70, 0x04, 0x7E, | ||
| 629 | /*1240*/0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60, | ||
| 630 | 0x23, 0x85, 0x41, 0x49, 0x85, 0x40, 0x4B, 0xE5, | ||
| 631 | /*1250*/0x59, 0x45, 0x58, 0x70, 0x2C, 0xAF, 0x5A, 0xFE, | ||
| 632 | 0xCD, 0xE9, 0xCD, 0xFC, 0xAB, 0x59, 0xAA, 0x58, | ||
| 633 | /*1260*/0x12, 0x0A, 0xFF, 0xAF, 0x5B, 0x7E, 0x00, 0x12, | ||
| 634 | 0x1E, 0x60, 0x80, 0x15, 0xAF, 0x5B, 0x7E, 0x00, | ||
| 635 | /*1270*/0x12, 0x1E, 0x60, 0x90, 0x07, 0x26, 0x12, 0x07, | ||
| 636 | 0x35, 0xE5, 0x49, 0x12, 0x07, 0x31, 0xE5, 0x4B, | ||
| 637 | /*1280*/0xF0, 0xE4, 0xFD, 0xAF, 0x35, 0xFE, 0xFC, 0x12, | ||
| 638 | 0x09, 0x15, 0x22, 0x8C, 0x64, 0x8D, 0x65, 0x12, | ||
| 639 | /*1290*/0x08, 0xDA, 0x40, 0x3C, 0xE5, 0x65, 0x45, 0x64, | ||
| 640 | 0x70, 0x10, 0x12, 0x09, 0x04, 0xC3, 0xE5, 0x3E, | ||
| 641 | /*12A0*/0x12, 0x07, 0x69, 0x40, 0x3B, 0x12, 0x08, 0x95, | ||
| 642 | 0x80, 0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40, | ||
| 643 | /*12B0*/0x1D, 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05, | ||
| 644 | 0x85, 0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39, | ||
| 645 | /*12C0*/0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3E, 0x12, | ||
| 646 | 0x07, 0x53, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x3B, | ||
| 647 | /*12D0*/0xE5, 0x65, 0x45, 0x64, 0x70, 0x11, 0x12, 0x07, | ||
| 648 | 0x5F, 0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x1F, | ||
| 649 | /*12E0*/0x12, 0x07, 0x3E, 0xE5, 0x41, 0xF0, 0x22, 0xE5, | ||
| 650 | 0x3C, 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C, | ||
| 651 | /*12F0*/0x38, 0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39, | ||
| 652 | 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, | ||
| 653 | /*1300*/0x07, 0xA8, 0xE5, 0x3C, 0x12, 0x07, 0x53, 0xE5, | ||
| 654 | 0x3D, 0xF0, 0x22, 0x12, 0x07, 0x9F, 0xE5, 0x38, | ||
| 655 | /*1310*/0x12, 0x07, 0x53, 0xE5, 0x39, 0xF0, 0x22, 0x8C, | ||
| 656 | 0x63, 0x8D, 0x64, 0x12, 0x08, 0xDA, 0x40, 0x3C, | ||
| 657 | /*1320*/0xE5, 0x64, 0x45, 0x63, 0x70, 0x10, 0x12, 0x09, | ||
| 658 | 0x04, 0xC3, 0xE5, 0x3E, 0x12, 0x07, 0x69, 0x40, | ||
| 659 | /*1330*/0x3B, 0x12, 0x08, 0x95, 0x80, 0x18, 0xE5, 0x3E, | ||
| 660 | 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3E, 0x38, | ||
| 661 | /*1340*/0xE5, 0x3E, 0x60, 0x05, 0x85, 0x3F, 0x39, 0x80, | ||
| 662 | 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x07, | ||
| 663 | /*1350*/0xA8, 0xE5, 0x3E, 0x12, 0x07, 0x53, 0xE5, 0x3F, | ||
| 664 | 0xF0, 0x22, 0x80, 0x3B, 0xE5, 0x64, 0x45, 0x63, | ||
| 665 | /*1360*/0x70, 0x11, 0x12, 0x07, 0x5F, 0x40, 0x05, 0x12, | ||
| 666 | 0x08, 0x9E, 0x80, 0x1F, 0x12, 0x07, 0x3E, 0xE5, | ||
| 667 | /*1370*/0x41, 0xF0, 0x22, 0xE5, 0x3C, 0xC3, 0x95, 0x38, | ||
| 668 | 0x40, 0x1D, 0x85, 0x3C, 0x38, 0xE5, 0x3C, 0x60, | ||
| 669 | /*1380*/0x05, 0x85, 0x3D, 0x39, 0x80, 0x03, 0x85, 0x39, | ||
| 670 | 0x39, 0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3C, | ||
| 671 | /*1390*/0x12, 0x07, 0x53, 0xE5, 0x3D, 0xF0, 0x22, 0x12, | ||
| 672 | 0x07, 0x9F, 0xE5, 0x38, 0x12, 0x07, 0x53, 0xE5, | ||
| 673 | /*13A0*/0x39, 0xF0, 0x22, 0xE5, 0x0D, 0xFE, 0xE5, 0x08, | ||
| 674 | 0x8E, 0x54, 0x44, 0x05, 0xF5, 0x55, 0x75, 0x15, | ||
| 675 | /*13B0*/0x0F, 0xF5, 0x82, 0x12, 0x0E, 0x7A, 0x12, 0x17, | ||
| 676 | 0xA3, 0x20, 0x31, 0x05, 0x75, 0x15, 0x03, 0x80, | ||
| 677 | /*13C0*/0x03, 0x75, 0x15, 0x0B, 0xE5, 0x0A, 0xC3, 0x94, | ||
| 678 | 0x01, 0x50, 0x38, 0x12, 0x14, 0x20, 0x20, 0x31, | ||
| 679 | /*13D0*/0x06, 0x05, 0x15, 0x05, 0x15, 0x80, 0x04, 0x15, | ||
| 680 | 0x15, 0x15, 0x15, 0xE5, 0x0A, 0xC3, 0x94, 0x01, | ||
| 681 | /*13E0*/0x50, 0x21, 0x12, 0x14, 0x20, 0x20, 0x31, 0x04, | ||
| 682 | 0x05, 0x15, 0x80, 0x02, 0x15, 0x15, 0xE5, 0x0A, | ||
| 683 | /*13F0*/0xC3, 0x94, 0x01, 0x50, 0x0E, 0x12, 0x0E, 0x77, | ||
| 684 | 0x12, 0x17, 0xA3, 0x20, 0x31, 0x05, 0x05, 0x15, | ||
| 685 | /*1400*/0x12, 0x0E, 0x77, 0xE5, 0x15, 0xB4, 0x08, 0x04, | ||
| 686 | 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x15, | ||
| 687 | /*1410*/0xB4, 0x07, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, | ||
| 688 | 0x00, 0xEE, 0x4F, 0x60, 0x02, 0x05, 0x7F, 0x22, | ||
| 689 | /*1420*/0x85, 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15, | ||
| 690 | 0xF0, 0x12, 0x17, 0xA3, 0x22, 0x12, 0x07, 0x2A, | ||
| 691 | /*1430*/0x75, 0x83, 0xAE, 0x74, 0xFF, 0x12, 0x07, 0x29, | ||
| 692 | 0xE0, 0x54, 0x1A, 0xF5, 0x34, 0xE0, 0xC4, 0x13, | ||
| 693 | /*1440*/0x54, 0x07, 0xF5, 0x35, 0x24, 0xFE, 0x60, 0x24, | ||
| 694 | 0x24, 0xFE, 0x60, 0x3C, 0x24, 0x04, 0x70, 0x63, | ||
| 695 | /*1450*/0x75, 0x31, 0x2D, 0xE5, 0x08, 0xFD, 0x74, 0xB6, | ||
| 696 | 0x12, 0x07, 0x92, 0x74, 0xBC, 0x90, 0x07, 0x22, | ||
| 697 | /*1460*/0x12, 0x07, 0x95, 0x74, 0x90, 0x12, 0x07, 0xB3, | ||
| 698 | 0x74, 0x92, 0x80, 0x3C, 0x75, 0x31, 0x3A, 0xE5, | ||
| 699 | /*1470*/0x08, 0xFD, 0x74, 0xBA, 0x12, 0x07, 0x92, 0x74, | ||
| 700 | 0xC0, 0x90, 0x07, 0x22, 0x12, 0x07, 0xB6, 0x74, | ||
| 701 | /*1480*/0xC4, 0x12, 0x07, 0xB3, 0x74, 0xC8, 0x80, 0x20, | ||
| 702 | 0x75, 0x31, 0x35, 0xE5, 0x08, 0xFD, 0x74, 0xB8, | ||
| 703 | /*1490*/0x12, 0x07, 0x92, 0x74, 0xBE, 0xFF, 0xED, 0x44, | ||
| 704 | 0x07, 0x90, 0x07, 0x22, 0xCF, 0xF0, 0xA3, 0xEF, | ||
| 705 | /*14A0*/0xF0, 0x74, 0xC2, 0x12, 0x07, 0xB3, 0x74, 0xC6, | ||
| 706 | 0xFF, 0xED, 0x44, 0x07, 0xA3, 0xCF, 0xF0, 0xA3, | ||
| 707 | /*14B0*/0xEF, 0xF0, 0x22, 0x75, 0x34, 0x01, 0x22, 0x8E, | ||
| 708 | 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D, 0x5B, 0x8A, | ||
| 709 | /*14C0*/0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01, 0xE4, 0xF5, | ||
| 710 | 0x5F, 0x12, 0x1E, 0xA5, 0x85, 0x59, 0x5E, 0xD3, | ||
| 711 | /*14D0*/0xE5, 0x5E, 0x95, 0x5B, 0xE5, 0x5A, 0x12, 0x07, | ||
| 712 | 0x6B, 0x50, 0x57, 0xE5, 0x5D, 0x45, 0x5C, 0x70, | ||
| 713 | /*14E0*/0x30, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x92, 0xE5, | ||
| 714 | 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE5, | ||
| 715 | /*14F0*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8, 0xE5, | ||
| 716 | 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0x90, 0xE5, | ||
| 717 | /*1500*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5, | ||
| 718 | 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x80, | ||
| 719 | /*1510*/0x03, 0x12, 0x07, 0x32, 0xE5, 0x5E, 0xF0, 0xAF, | ||
| 720 | 0x5F, 0x7E, 0x00, 0xAD, 0x5D, 0xAC, 0x5C, 0x12, | ||
| 721 | /*1520*/0x04, 0x44, 0xAF, 0x5E, 0x7E, 0x00, 0xAD, 0x5D, | ||
| 722 | 0xAC, 0x5C, 0x12, 0x0B, 0xD1, 0x05, 0x5E, 0x02, | ||
| 723 | /*1530*/0x14, 0xCF, 0xAB, 0x5D, 0xAA, 0x5C, 0xAD, 0x5B, | ||
| 724 | 0xAC, 0x5A, 0xAF, 0x59, 0xAE, 0x58, 0x02, 0x1B, | ||
| 725 | /*1540*/0xFB, 0x8C, 0x5C, 0x8D, 0x5D, 0x8A, 0x5E, 0x8B, | ||
| 726 | 0x5F, 0x75, 0x60, 0x01, 0xE4, 0xF5, 0x61, 0xF5, | ||
| 727 | /*1550*/0x62, 0xF5, 0x63, 0x12, 0x1E, 0xA5, 0x8F, 0x60, | ||
| 728 | 0xD3, 0xE5, 0x60, 0x95, 0x5D, 0xE5, 0x5C, 0x12, | ||
| 729 | /*1560*/0x07, 0x6B, 0x50, 0x61, 0xE5, 0x5F, 0x45, 0x5E, | ||
| 730 | 0x70, 0x27, 0x12, 0x07, 0x2A, 0x75, 0x83, 0xB6, | ||
| 731 | /*1570*/0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xB8, | ||
| 732 | 0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBA, | ||
| 733 | /*1580*/0xE5, 0x60, 0xF0, 0xAF, 0x61, 0x7E, 0x00, 0xE5, | ||
| 734 | 0x62, 0x12, 0x08, 0x7A, 0x12, 0x0A, 0xFF, 0x80, | ||
| 735 | /*1590*/0x19, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE5, | ||
| 736 | 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0x8E, 0xE4, | ||
| 737 | /*15A0*/0x12, 0x07, 0x29, 0x74, 0x01, 0x12, 0x07, 0x29, | ||
| 738 | 0xE4, 0xF0, 0xAF, 0x63, 0x7E, 0x00, 0xAD, 0x5F, | ||
| 739 | /*15B0*/0xAC, 0x5E, 0x12, 0x04, 0x44, 0xAF, 0x60, 0x7E, | ||
| 740 | 0x00, 0xAD, 0x5F, 0xAC, 0x5E, 0x12, 0x12, 0x8B, | ||
| 741 | /*15C0*/0x05, 0x60, 0x02, 0x15, 0x58, 0x22, 0x90, 0x11, | ||
| 742 | 0x4D, 0xE4, 0x93, 0x90, 0x07, 0x2E, 0xF0, 0x12, | ||
| 743 | /*15D0*/0x08, 0x1F, 0x75, 0x83, 0xAE, 0xE0, 0x54, 0x1A, | ||
| 744 | 0xF5, 0x34, 0x70, 0x67, 0xEF, 0x44, 0x07, 0xF5, | ||
| 745 | /*15E0*/0x82, 0x75, 0x83, 0xCE, 0xE0, 0xFF, 0x13, 0x13, | ||
| 746 | 0x13, 0x54, 0x07, 0xF5, 0x36, 0x54, 0x0F, 0xD3, | ||
| 747 | /*15F0*/0x94, 0x00, 0x40, 0x06, 0x12, 0x14, 0x2D, 0x12, | ||
| 748 | 0x1B, 0xA9, 0xE5, 0x36, 0x54, 0x0F, 0x24, 0xFE, | ||
| 749 | /*1600*/0x60, 0x0C, 0x14, 0x60, 0x0C, 0x14, 0x60, 0x19, | ||
| 750 | 0x24, 0x03, 0x70, 0x37, 0x80, 0x10, 0x02, 0x1E, | ||
| 751 | /*1610*/0x91, 0x12, 0x1E, 0x91, 0x12, 0x07, 0x2A, 0x75, | ||
| 752 | 0x83, 0xCE, 0xE0, 0x54, 0xEF, 0xF0, 0x02, 0x1D, | ||
| 753 | /*1620*/0xAE, 0x12, 0x10, 0x14, 0xE4, 0xF5, 0x55, 0x12, | ||
| 754 | 0x1D, 0x85, 0x05, 0x55, 0xE5, 0x55, 0xC3, 0x94, | ||
| 755 | /*1630*/0x05, 0x40, 0xF4, 0x12, 0x07, 0x2A, 0x75, 0x83, | ||
| 756 | 0xCE, 0xE0, 0x54, 0xC7, 0x12, 0x07, 0x29, 0xE0, | ||
| 757 | /*1640*/0x44, 0x08, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5, | ||
| 758 | 0x59, 0xAF, 0x08, 0xEF, 0x44, 0x07, 0xF5, 0x82, | ||
| 759 | /*1650*/0x75, 0x83, 0xD0, 0xE0, 0xFD, 0xC4, 0x54, 0x0F, | ||
| 760 | 0xF5, 0x5A, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0x75, | ||
| 761 | /*1660*/0x83, 0x80, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x21, | ||
| 762 | 0x75, 0x83, 0x82, 0xE5, 0x45, 0xF0, 0xEF, 0x44, | ||
| 763 | /*1670*/0x07, 0xF5, 0x82, 0x75, 0x83, 0x8A, 0x74, 0xFF, | ||
| 764 | 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x07, 0x2A, 0x75, | ||
| 765 | /*1680*/0x83, 0xBC, 0xE0, 0x54, 0xEF, 0x12, 0x07, 0x29, | ||
| 766 | 0x75, 0x83, 0xBE, 0xE0, 0x54, 0xEF, 0x12, 0x07, | ||
| 767 | /*1690*/0x29, 0x75, 0x83, 0xC0, 0xE0, 0x54, 0xEF, 0x12, | ||
| 768 | 0x07, 0x29, 0x75, 0x83, 0xBC, 0xE0, 0x44, 0x10, | ||
| 769 | /*16A0*/0x12, 0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x44, | ||
| 770 | 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0, | ||
| 771 | /*16B0*/0x44, 0x10, 0xF0, 0xAF, 0x58, 0xE5, 0x59, 0x12, | ||
| 772 | 0x08, 0x78, 0x02, 0x0A, 0xFF, 0xE4, 0xF5, 0x58, | ||
| 773 | /*16C0*/0x7D, 0x01, 0xF5, 0x59, 0xAF, 0x35, 0xFE, 0xFC, | ||
| 774 | 0x12, 0x09, 0x15, 0x12, 0x07, 0x2A, 0x75, 0x83, | ||
| 775 | /*16D0*/0xB6, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 776 | 0xB8, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 777 | /*16E0*/0xBA, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 778 | 0xBC, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 779 | /*16F0*/0xBE, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 780 | 0xC0, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, | ||
| 781 | /*1700*/0x90, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, | ||
| 782 | 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4, | ||
| 783 | /*1710*/0x12, 0x07, 0x29, 0x75, 0x83, 0x92, 0xE4, 0x12, | ||
| 784 | 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE4, 0x12, 0x07, | ||
| 785 | /*1720*/0x29, 0x75, 0x83, 0xC8, 0xE4, 0xF0, 0xAF, 0x58, | ||
| 786 | 0xFE, 0xE5, 0x59, 0x12, 0x08, 0x7A, 0x02, 0x0A, | ||
| 787 | /*1730*/0xFF, 0xE5, 0xE2, 0x30, 0xE4, 0x6C, 0xE5, 0xE7, | ||
| 788 | 0x54, 0xC0, 0x64, 0x40, 0x70, 0x64, 0xE5, 0x09, | ||
| 789 | /*1740*/0xC4, 0x54, 0x30, 0xFE, 0xE5, 0x08, 0x25, 0xE0, | ||
| 790 | 0x25, 0xE0, 0x54, 0xC0, 0x4E, 0xFE, 0xEF, 0x54, | ||
| 791 | /*1750*/0x3F, 0x4E, 0xFD, 0xE5, 0x2B, 0xAE, 0x2A, 0x78, | ||
| 792 | 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, | ||
| 793 | /*1760*/0xF5, 0x82, 0x8E, 0x83, 0xED, 0xF0, 0xE5, 0x2B, | ||
| 794 | 0xAE, 0x2A, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33, | ||
| 795 | /*1770*/0xCE, 0xD8, 0xF9, 0xFF, 0xF5, 0x82, 0x8E, 0x83, | ||
| 796 | 0xA3, 0xE5, 0xFE, 0xF0, 0x8F, 0x82, 0x8E, 0x83, | ||
| 797 | /*1780*/0xA3, 0xA3, 0xE5, 0xFD, 0xF0, 0x8F, 0x82, 0x8E, | ||
| 798 | 0x83, 0xA3, 0xA3, 0xA3, 0xE5, 0xFC, 0xF0, 0xC3, | ||
| 799 | /*1790*/0xE5, 0x2B, 0x94, 0xFA, 0xE5, 0x2A, 0x94, 0x00, | ||
| 800 | 0x50, 0x08, 0x05, 0x2B, 0xE5, 0x2B, 0x70, 0x02, | ||
| 801 | /*17A0*/0x05, 0x2A, 0x22, 0xE4, 0xFF, 0xE4, 0xF5, 0x58, | ||
| 802 | 0xF5, 0x56, 0xF5, 0x57, 0x74, 0x82, 0xFC, 0x12, | ||
| 803 | /*17B0*/0x0E, 0x04, 0x8C, 0x83, 0xE0, 0xF5, 0x10, 0x54, | ||
| 804 | 0x7F, 0xF0, 0xE5, 0x10, 0x44, 0x80, 0x12, 0x0E, | ||
| 805 | /*17C0*/0x98, 0xED, 0xF0, 0x7E, 0x0A, 0x12, 0x0E, 0x04, | ||
| 806 | 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0, 0x26, 0xDE, | ||
| 807 | /*17D0*/0xF4, 0x05, 0x57, 0xE5, 0x57, 0x70, 0x02, 0x05, | ||
| 808 | 0x56, 0xE5, 0x14, 0x24, 0x01, 0xFD, 0xE4, 0x33, | ||
| 809 | /*17E0*/0xFC, 0xD3, 0xE5, 0x57, 0x9D, 0xE5, 0x56, 0x9C, | ||
| 810 | 0x40, 0xD9, 0xE5, 0x0A, 0x94, 0x20, 0x50, 0x02, | ||
| 811 | /*17F0*/0x05, 0x0A, 0x43, 0xE1, 0x08, 0xC2, 0x31, 0x12, | ||
| 812 | 0x0E, 0x04, 0x75, 0x83, 0xA6, 0xE0, 0x55, 0x12, | ||
| 813 | /*1800*/0x65, 0x12, 0x70, 0x03, 0xD2, 0x31, 0x22, 0xC2, | ||
| 814 | 0x31, 0x22, 0x90, 0x07, 0x26, 0xE0, 0xFA, 0xA3, | ||
| 815 | /*1810*/0xE0, 0xF5, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0x41, | ||
| 816 | 0xE5, 0x39, 0xC3, 0x95, 0x41, 0x40, 0x26, 0xE5, | ||
| 817 | /*1820*/0x39, 0x95, 0x41, 0xC3, 0x9F, 0xEE, 0x12, 0x07, | ||
| 818 | 0x6B, 0x40, 0x04, 0x7C, 0x01, 0x80, 0x02, 0x7C, | ||
| 819 | /*1830*/0x00, 0xE5, 0x41, 0x64, 0x3F, 0x60, 0x04, 0x7B, | ||
| 820 | 0x01, 0x80, 0x02, 0x7B, 0x00, 0xEC, 0x5B, 0x60, | ||
| 821 | /*1840*/0x29, 0x05, 0x41, 0x80, 0x28, 0xC3, 0xE5, 0x41, | ||
| 822 | 0x95, 0x39, 0xC3, 0x9F, 0xEE, 0x12, 0x07, 0x6B, | ||
| 823 | /*1850*/0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, | ||
| 824 | 0xE5, 0x41, 0x60, 0x04, 0x7E, 0x01, 0x80, 0x02, | ||
| 825 | /*1860*/0x7E, 0x00, 0xEF, 0x5E, 0x60, 0x04, 0x15, 0x41, | ||
| 826 | 0x80, 0x03, 0x85, 0x39, 0x41, 0x85, 0x3A, 0x40, | ||
| 827 | /*1870*/0x22, 0xE5, 0xE2, 0x30, 0xE4, 0x60, 0xE5, 0xE1, | ||
| 828 | 0x30, 0xE2, 0x5B, 0xE5, 0x09, 0x70, 0x04, 0x7F, | ||
| 829 | /*1880*/0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x08, 0x70, | ||
| 830 | 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, | ||
| 831 | /*1890*/0x5F, 0x60, 0x43, 0x53, 0xF9, 0xF8, 0xE5, 0xE2, | ||
| 832 | 0x30, 0xE4, 0x3B, 0xE5, 0xE1, 0x30, 0xE2, 0x2E, | ||
| 833 | /*18A0*/0x43, 0xFA, 0x02, 0x53, 0xFA, 0xFB, 0xE4, 0xF5, | ||
| 834 | 0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0xE5, | ||
| 835 | /*18B0*/0xE1, 0x30, 0xE2, 0xE7, 0x90, 0x94, 0x70, 0xE0, | ||
| 836 | 0x65, 0x10, 0x60, 0x03, 0x43, 0xFA, 0x04, 0x05, | ||
| 837 | /*18C0*/0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0x70, | ||
| 838 | 0xE6, 0x12, 0x00, 0x06, 0x80, 0xE1, 0x53, 0xFA, | ||
| 839 | /*18D0*/0xFD, 0x53, 0xFA, 0xFB, 0x80, 0xC0, 0x22, 0x8F, | ||
| 840 | 0x54, 0x12, 0x00, 0x06, 0xE5, 0xE1, 0x30, 0xE0, | ||
| 841 | /*18E0*/0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, | ||
| 842 | 0x7E, 0xD3, 0x94, 0x05, 0x40, 0x04, 0x7E, 0x01, | ||
| 843 | /*18F0*/0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60, 0x3D, | ||
| 844 | 0x85, 0x54, 0x11, 0xE5, 0xE2, 0x20, 0xE1, 0x32, | ||
| 845 | /*1900*/0x74, 0xCE, 0x12, 0x1A, 0x05, 0x30, 0xE7, 0x04, | ||
| 846 | 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0x8F, 0x82, | ||
| 847 | /*1910*/0x8E, 0x83, 0xE0, 0x30, 0xE6, 0x04, 0x7F, 0x01, | ||
| 848 | 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x5D, 0x70, 0x15, | ||
| 849 | /*1920*/0x12, 0x15, 0xC6, 0x74, 0xCE, 0x12, 0x1A, 0x05, | ||
| 850 | 0x30, 0xE6, 0x07, 0xE0, 0x44, 0x80, 0xF0, 0x43, | ||
| 851 | /*1930*/0xF9, 0x80, 0x12, 0x18, 0x71, 0x22, 0x12, 0x0E, | ||
| 852 | 0x44, 0xE5, 0x16, 0x25, 0xE0, 0x25, 0xE0, 0x24, | ||
| 853 | /*1940*/0xB0, 0xF5, 0x82, 0xE4, 0x34, 0x1A, 0xF5, 0x83, | ||
| 854 | 0xE4, 0x93, 0xF5, 0x0F, 0xE5, 0x16, 0x25, 0xE0, | ||
| 855 | /*1950*/0x25, 0xE0, 0x24, 0xB1, 0xF5, 0x82, 0xE4, 0x34, | ||
| 856 | 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0E, 0x12, | ||
| 857 | /*1960*/0x0E, 0x65, 0xF5, 0x10, 0xE5, 0x0F, 0x54, 0xF0, | ||
| 858 | 0x12, 0x0E, 0x17, 0x75, 0x83, 0x8C, 0xEF, 0xF0, | ||
| 859 | /*1970*/0xE5, 0x0F, 0x30, 0xE0, 0x0C, 0x12, 0x0E, 0x04, | ||
| 860 | 0x75, 0x83, 0x86, 0xE0, 0x44, 0x40, 0xF0, 0x80, | ||
| 861 | /*1980*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x86, 0xE0, | ||
| 862 | 0x54, 0xBF, 0xF0, 0x12, 0x0E, 0x91, 0x75, 0x83, | ||
| 863 | /*1990*/0x82, 0xE5, 0x0E, 0xF0, 0x22, 0x7F, 0x05, 0x12, | ||
| 864 | 0x17, 0x31, 0x12, 0x0E, 0x04, 0x12, 0x0E, 0x33, | ||
| 865 | /*19A0*/0x74, 0x02, 0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E, | ||
| 866 | 0x04, 0x12, 0x0E, 0x0B, 0xEF, 0xF0, 0x75, 0x15, | ||
| 867 | /*19B0*/0x70, 0x12, 0x0F, 0xF7, 0x20, 0x34, 0x05, 0x75, | ||
| 868 | 0x15, 0x10, 0x80, 0x03, 0x75, 0x15, 0x50, 0x12, | ||
| 869 | /*19C0*/0x0F, 0xF7, 0x20, 0x34, 0x04, 0x74, 0x10, 0x80, | ||
| 870 | 0x02, 0x74, 0xF0, 0x25, 0x15, 0xF5, 0x15, 0x12, | ||
| 871 | /*19D0*/0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x20, | ||
| 872 | 0x34, 0x17, 0xE5, 0x15, 0x64, 0x30, 0x60, 0x0C, | ||
| 873 | /*19E0*/0x74, 0x10, 0x25, 0x15, 0xF5, 0x15, 0xB4, 0x80, | ||
| 874 | 0x03, 0xE4, 0xF5, 0x15, 0x12, 0x0E, 0x21, 0xEF, | ||
| 875 | /*19F0*/0xF0, 0x22, 0xF0, 0xE5, 0x0B, 0x25, 0xE0, 0x25, | ||
| 876 | 0xE0, 0x24, 0x82, 0xF5, 0x82, 0xE4, 0x34, 0x07, | ||
| 877 | /*1A00*/0xF5, 0x83, 0x22, 0x74, 0x88, 0xFE, 0xE5, 0x08, | ||
| 878 | 0x44, 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, | ||
| 879 | /*1A10*/0x22, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82, | ||
| 880 | 0x22, 0xF0, 0xE0, 0x54, 0xC0, 0x8F, 0x82, 0x8E, | ||
| 881 | /*1A20*/0x83, 0xF0, 0x22, 0xEF, 0x44, 0x07, 0xF5, 0x82, | ||
| 882 | 0x75, 0x83, 0x86, 0xE0, 0x54, 0x10, 0xD3, 0x94, | ||
| 883 | /*1A30*/0x00, 0x22, 0xF0, 0x90, 0x07, 0x15, 0xE0, 0x04, | ||
| 884 | 0xF0, 0x22, 0x44, 0x06, 0xF5, 0x82, 0x75, 0x83, | ||
| 885 | /*1A40*/0x9E, 0xE0, 0x22, 0xFE, 0xEF, 0x44, 0x07, 0xF5, | ||
| 886 | 0x82, 0x8E, 0x83, 0xE0, 0x22, 0xE4, 0x90, 0x07, | ||
| 887 | /*1A50*/0x2A, 0xF0, 0xA3, 0xF0, 0x12, 0x07, 0x2A, 0x75, | ||
| 888 | 0x83, 0x82, 0xE0, 0x54, 0x7F, 0x12, 0x07, 0x29, | ||
| 889 | /*1A60*/0xE0, 0x44, 0x80, 0xF0, 0x12, 0x10, 0xFC, 0x12, | ||
| 890 | 0x08, 0x1F, 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0, | ||
| 891 | /*1A70*/0x1A, 0x90, 0x07, 0x2B, 0xE0, 0x04, 0xF0, 0x70, | ||
| 892 | 0x06, 0x90, 0x07, 0x2A, 0xE0, 0x04, 0xF0, 0x90, | ||
| 893 | /*1A80*/0x07, 0x2A, 0xE0, 0xB4, 0x10, 0xE1, 0xA3, 0xE0, | ||
| 894 | 0xB4, 0x00, 0xDC, 0xEE, 0x44, 0xA6, 0xFC, 0xEF, | ||
| 895 | /*1A90*/0x44, 0x07, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0xF5, | ||
| 896 | 0x32, 0xEE, 0x44, 0xA8, 0xFE, 0xEF, 0x44, 0x07, | ||
| 897 | /*1AA0*/0xF5, 0x82, 0x8E, 0x83, 0xE0, 0xF5, 0x33, 0x22, | ||
| 898 | 0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x90, | ||
| 899 | /*1AB0*/0x00, 0x20, 0x0F, 0x92, 0x00, 0x21, 0x0F, 0x94, | ||
| 900 | 0x00, 0x22, 0x0F, 0x96, 0x00, 0x23, 0x0F, 0x98, | ||
| 901 | /*1AC0*/0x00, 0x24, 0x0F, 0x9A, 0x00, 0x25, 0x0F, 0x9C, | ||
| 902 | 0x00, 0x26, 0x0F, 0x9E, 0x00, 0x27, 0x0F, 0xA0, | ||
| 903 | /*1AD0*/0x01, 0x20, 0x01, 0xA2, 0x01, 0x21, 0x01, 0xA4, | ||
| 904 | 0x01, 0x22, 0x01, 0xA6, 0x01, 0x23, 0x01, 0xA8, | ||
| 905 | /*1AE0*/0x01, 0x24, 0x01, 0xAA, 0x01, 0x25, 0x01, 0xAC, | ||
| 906 | 0x01, 0x26, 0x01, 0xAE, 0x01, 0x27, 0x01, 0xB0, | ||
| 907 | /*1AF0*/0x01, 0x28, 0x01, 0xB4, 0x00, 0x28, 0x0F, 0xB6, | ||
| 908 | 0x40, 0x28, 0x0F, 0xB8, 0x61, 0x28, 0x01, 0xCB, | ||
| 909 | /*1B00*/0xEF, 0xCB, 0xCA, 0xEE, 0xCA, 0x7F, 0x01, 0xE4, | ||
| 910 | 0xFD, 0xEB, 0x4A, 0x70, 0x24, 0xE5, 0x08, 0xF5, | ||
| 911 | /*1B10*/0x82, 0x74, 0xB6, 0x12, 0x08, 0x29, 0xE5, 0x08, | ||
| 912 | 0xF5, 0x82, 0x74, 0xB8, 0x12, 0x08, 0x29, 0xE5, | ||
| 913 | /*1B20*/0x08, 0xF5, 0x82, 0x74, 0xBA, 0x12, 0x08, 0x29, | ||
| 914 | 0x7E, 0x00, 0x7C, 0x00, 0x12, 0x0A, 0xFF, 0x80, | ||
| 915 | /*1B30*/0x12, 0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE5, | ||
| 916 | 0x41, 0xF0, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35, | ||
| 917 | /*1B40*/0xE5, 0x40, 0xF0, 0x12, 0x07, 0x2A, 0x75, 0x83, | ||
| 918 | 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74, 0x01, 0x12, | ||
| 919 | /*1B50*/0x07, 0x29, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x26, | ||
| 920 | 0xF5, 0x27, 0x53, 0xE1, 0xFE, 0xF5, 0x2A, 0x75, | ||
| 921 | /*1B60*/0x2B, 0x01, 0xF5, 0x08, 0x7F, 0x01, 0x12, 0x17, | ||
| 922 | 0x31, 0x30, 0x30, 0x1C, 0x90, 0x1A, 0xA9, 0xE4, | ||
| 923 | /*1B70*/0x93, 0xF5, 0x10, 0x90, 0x1F, 0xF9, 0xE4, 0x93, | ||
| 924 | 0xF5, 0x10, 0x90, 0x00, 0x41, 0xE4, 0x93, 0xF5, | ||
| 925 | /*1B80*/0x10, 0x90, 0x1E, 0xCA, 0xE4, 0x93, 0xF5, 0x10, | ||
| 926 | 0x7F, 0x02, 0x12, 0x17, 0x31, 0x12, 0x0F, 0x54, | ||
| 927 | /*1B90*/0x7F, 0x03, 0x12, 0x17, 0x31, 0x12, 0x00, 0x06, | ||
| 928 | 0xE5, 0xE2, 0x30, 0xE7, 0x09, 0x12, 0x10, 0x00, | ||
| 929 | /*1BA0*/0x30, 0x30, 0x03, 0x12, 0x11, 0x00, 0x02, 0x00, | ||
| 930 | 0x47, 0x12, 0x08, 0x1F, 0x75, 0x83, 0xD0, 0xE0, | ||
| 931 | /*1BB0*/0xC4, 0x54, 0x0F, 0xFD, 0x75, 0x43, 0x01, 0x75, | ||
| 932 | 0x44, 0xFF, 0x12, 0x08, 0xAA, 0x74, 0x04, 0xF0, | ||
| 933 | /*1BC0*/0x75, 0x3B, 0x01, 0xED, 0x14, 0x60, 0x0C, 0x14, | ||
| 934 | 0x60, 0x0B, 0x14, 0x60, 0x0F, 0x24, 0x03, 0x70, | ||
| 935 | /*1BD0*/0x0B, 0x80, 0x09, 0x80, 0x00, 0x12, 0x08, 0xA7, | ||
| 936 | 0x04, 0xF0, 0x80, 0x06, 0x12, 0x08, 0xA7, 0x74, | ||
| 937 | /*1BE0*/0x04, 0xF0, 0xEE, 0x44, 0x82, 0xFE, 0xEF, 0x44, | ||
| 938 | 0x07, 0xF5, 0x82, 0x8E, 0x83, 0xE5, 0x45, 0x12, | ||
| 939 | /*1BF0*/0x08, 0xBE, 0x75, 0x83, 0x82, 0xE5, 0x31, 0xF0, | ||
| 940 | 0x02, 0x11, 0x4C, 0x8E, 0x60, 0x8F, 0x61, 0x12, | ||
| 941 | /*1C00*/0x1E, 0xA5, 0xE4, 0xFF, 0xCE, 0xED, 0xCE, 0xEE, | ||
| 942 | 0xD3, 0x95, 0x61, 0xE5, 0x60, 0x12, 0x07, 0x6B, | ||
| 943 | /*1C10*/0x40, 0x39, 0x74, 0x20, 0x2E, 0xF5, 0x82, 0xE4, | ||
| 944 | 0x34, 0x03, 0xF5, 0x83, 0xE0, 0x70, 0x03, 0xFF, | ||
| 945 | /*1C20*/0x80, 0x26, 0x12, 0x08, 0xE2, 0xFD, 0xC3, 0x9F, | ||
| 946 | 0x40, 0x1E, 0xCF, 0xED, 0xCF, 0xEB, 0x4A, 0x70, | ||
| 947 | /*1C30*/0x0B, 0x8D, 0x42, 0x12, 0x08, 0xEE, 0xF5, 0x41, | ||
| 948 | 0x8E, 0x40, 0x80, 0x0C, 0x12, 0x08, 0xE2, 0xF5, | ||
| 949 | /*1C40*/0x38, 0x12, 0x08, 0xEE, 0xF5, 0x39, 0x8E, 0x3A, | ||
| 950 | 0x1E, 0x80, 0xBC, 0x22, 0x75, 0x58, 0x01, 0xE5, | ||
| 951 | /*1C50*/0x35, 0x70, 0x0C, 0x12, 0x07, 0xCC, 0xE0, 0xF5, | ||
| 952 | 0x4A, 0x12, 0x07, 0xD8, 0xE0, 0xF5, 0x4C, 0xE5, | ||
| 953 | /*1C60*/0x35, 0xB4, 0x04, 0x0C, 0x12, 0x07, 0xE4, 0xE0, | ||
| 954 | 0xF5, 0x4A, 0x12, 0x07, 0xF0, 0xE0, 0xF5, 0x4C, | ||
| 955 | /*1C70*/0xE5, 0x35, 0xB4, 0x01, 0x04, 0x7F, 0x01, 0x80, | ||
| 956 | 0x02, 0x7F, 0x00, 0xE5, 0x35, 0xB4, 0x02, 0x04, | ||
| 957 | /*1C80*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, | ||
| 958 | 0x60, 0x0C, 0x12, 0x07, 0xFC, 0xE0, 0xF5, 0x4A, | ||
| 959 | /*1C90*/0x12, 0x08, 0x08, 0xE0, 0xF5, 0x4C, 0x85, 0x41, | ||
| 960 | 0x49, 0x85, 0x40, 0x4B, 0x22, 0x75, 0x5B, 0x01, | ||
| 961 | /*1CA0*/0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE0, 0x54, | ||
| 962 | 0x1F, 0xFF, 0xD3, 0x94, 0x02, 0x50, 0x04, 0x8F, | ||
| 963 | /*1CB0*/0x58, 0x80, 0x05, 0xEF, 0x24, 0xFE, 0xF5, 0x58, | ||
| 964 | 0xEF, 0xC3, 0x94, 0x18, 0x40, 0x05, 0x75, 0x59, | ||
| 965 | /*1CC0*/0x18, 0x80, 0x04, 0xEF, 0x04, 0xF5, 0x59, 0x85, | ||
| 966 | 0x43, 0x5A, 0xAF, 0x58, 0x7E, 0x00, 0xAD, 0x59, | ||
| 967 | /*1CD0*/0x7C, 0x00, 0xAB, 0x5B, 0x7A, 0x00, 0x12, 0x15, | ||
| 968 | 0x41, 0xAF, 0x5A, 0x7E, 0x00, 0x12, 0x18, 0x0A, | ||
| 969 | /*1CE0*/0xAF, 0x5B, 0x7E, 0x00, 0x02, 0x1A, 0xFF, 0xE5, | ||
| 970 | 0xE2, 0x30, 0xE7, 0x0E, 0x12, 0x10, 0x03, 0xC2, | ||
| 971 | /*1CF0*/0x30, 0x30, 0x30, 0x03, 0x12, 0x10, 0xFF, 0x20, | ||
| 972 | 0x33, 0x28, 0xE5, 0xE7, 0x30, 0xE7, 0x05, 0x12, | ||
| 973 | /*1D00*/0x0E, 0xA2, 0x80, 0x0D, 0xE5, 0xFE, 0xC3, 0x94, | ||
| 974 | 0x20, 0x50, 0x06, 0x12, 0x0E, 0xA2, 0x43, 0xF9, | ||
| 975 | /*1D10*/0x08, 0xE5, 0xF2, 0x30, 0xE7, 0x03, 0x53, 0xF9, | ||
| 976 | 0x7F, 0xE5, 0xF1, 0x54, 0x70, 0xD3, 0x94, 0x00, | ||
| 977 | /*1D20*/0x50, 0xD8, 0x22, 0x12, 0x0E, 0x04, 0x75, 0x83, | ||
| 978 | 0x80, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0x12, | ||
| 979 | /*1D30*/0x0D, 0xFD, 0x75, 0x83, 0x84, 0x12, 0x0E, 0x02, | ||
| 980 | 0x75, 0x83, 0x86, 0x12, 0x0E, 0x02, 0x75, 0x83, | ||
| 981 | /*1D40*/0x8C, 0xE0, 0x54, 0xF3, 0x12, 0x0E, 0x03, 0x75, | ||
| 982 | 0x83, 0x8E, 0x12, 0x0E, 0x02, 0x75, 0x83, 0x94, | ||
| 983 | /*1D50*/0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x12, 0x07, 0x2A, | ||
| 984 | 0x75, 0x83, 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74, | ||
| 985 | /*1D60*/0x01, 0x12, 0x07, 0x29, 0xE4, 0x12, 0x08, 0xBE, | ||
| 986 | 0x75, 0x83, 0x8C, 0xE0, 0x44, 0x20, 0x12, 0x08, | ||
| 987 | /*1D70*/0xBE, 0xE0, 0x54, 0xDF, 0xF0, 0x74, 0x84, 0x85, | ||
| 988 | 0x08, 0x82, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0xF0, | ||
| 989 | /*1D80*/0xE0, 0x44, 0x80, 0xF0, 0x22, 0x75, 0x56, 0x01, | ||
| 990 | 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE, 0xFC, | ||
| 991 | /*1D90*/0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12, 0x1E, | ||
| 992 | 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E, 0x00, | ||
| 993 | /*1DA0*/0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF, | ||
| 994 | 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0x75, 0x56, | ||
| 995 | /*1DB0*/0x01, 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE, | ||
| 996 | 0xFC, 0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12, | ||
| 997 | /*1DC0*/0x1E, 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E, | ||
| 998 | 0x00, 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, | ||
| 999 | /*1DD0*/0xAF, 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xE4, | ||
| 1000 | 0xF5, 0x16, 0x12, 0x0E, 0x44, 0xFE, 0xE5, 0x08, | ||
| 1001 | /*1DE0*/0x44, 0x05, 0xFF, 0x12, 0x0E, 0x65, 0x8F, 0x82, | ||
| 1002 | 0x8E, 0x83, 0xF0, 0x05, 0x16, 0xE5, 0x16, 0xC3, | ||
| 1003 | /*1DF0*/0x94, 0x14, 0x40, 0xE6, 0xE5, 0x08, 0x12, 0x0E, | ||
| 1004 | 0x2B, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5, | ||
| 1005 | /*1E00*/0x59, 0xF5, 0x5A, 0xFF, 0xFE, 0xAD, 0x58, 0xFC, | ||
| 1006 | 0x12, 0x09, 0x15, 0x7F, 0x04, 0x7E, 0x00, 0xAD, | ||
| 1007 | /*1E10*/0x58, 0x7C, 0x00, 0x12, 0x09, 0x15, 0x7F, 0x02, | ||
| 1008 | 0x7E, 0x00, 0xAD, 0x58, 0x7C, 0x00, 0x02, 0x09, | ||
| 1009 | /*1E20*/0x15, 0xE5, 0x3C, 0x25, 0x3E, 0xFC, 0xE5, 0x42, | ||
| 1010 | 0x24, 0x00, 0xFB, 0xE4, 0x33, 0xFA, 0xEC, 0xC3, | ||
| 1011 | /*1E30*/0x9B, 0xEA, 0x12, 0x07, 0x6B, 0x40, 0x0B, 0x8C, | ||
| 1012 | 0x42, 0xE5, 0x3D, 0x25, 0x3F, 0xF5, 0x41, 0x8F, | ||
| 1013 | /*1E40*/0x40, 0x22, 0x12, 0x09, 0x0B, 0x22, 0x74, 0x84, | ||
| 1014 | 0xF5, 0x18, 0x85, 0x08, 0x19, 0x85, 0x19, 0x82, | ||
| 1015 | /*1E50*/0x85, 0x18, 0x83, 0xE0, 0x54, 0x7F, 0xF0, 0xE0, | ||
| 1016 | 0x44, 0x80, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22, | ||
| 1017 | /*1E60*/0xEF, 0x4E, 0x70, 0x0B, 0x12, 0x07, 0x2A, 0x75, | ||
| 1018 | 0x83, 0xD2, 0xE0, 0x54, 0xDF, 0xF0, 0x22, 0x12, | ||
| 1019 | /*1E70*/0x07, 0x2A, 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x20, | ||
| 1020 | 0xF0, 0x22, 0x75, 0x58, 0x01, 0x90, 0x07, 0x26, | ||
| 1021 | /*1E80*/0x12, 0x07, 0x35, 0xE0, 0x54, 0x3F, 0xF5, 0x41, | ||
| 1022 | 0x12, 0x07, 0x32, 0xE0, 0x54, 0x3F, 0xF5, 0x40, | ||
| 1023 | /*1E90*/0x22, 0x75, 0x56, 0x02, 0xE4, 0xF5, 0x57, 0x12, | ||
| 1024 | 0x1D, 0xFC, 0xAF, 0x57, 0x7E, 0x00, 0xAD, 0x56, | ||
| 1025 | /*1EA0*/0x7C, 0x00, 0x02, 0x04, 0x44, 0xE4, 0xF5, 0x42, | ||
| 1026 | 0xF5, 0x41, 0xF5, 0x40, 0xF5, 0x38, 0xF5, 0x39, | ||
| 1027 | /*1EB0*/0xF5, 0x3A, 0x22, 0xEF, 0x54, 0x07, 0xFF, 0xE5, | ||
| 1028 | 0xF9, 0x54, 0xF8, 0x4F, 0xF5, 0xF9, 0x22, 0x7F, | ||
| 1029 | /*1EC0*/0x01, 0xE4, 0xFE, 0x0F, 0x0E, 0xBE, 0xFF, 0xFB, | ||
| 1030 | 0x22, 0x01, 0x20, 0x00, 0x01, 0x04, 0x20, 0x00, | ||
| 1031 | /*1ED0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1032 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1033 | /*1EE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1034 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1035 | /*1EF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1036 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1037 | /*1F00*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1038 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1039 | /*1F10*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1040 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1041 | /*1F20*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1042 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1043 | /*1F30*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1044 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1045 | /*1F40*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1046 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1047 | /*1F50*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1048 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1049 | /*1F60*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1050 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1051 | /*1F70*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1052 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1053 | /*1F80*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1054 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1055 | /*1F90*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1056 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1057 | /*1FA0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1058 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1059 | /*1FB0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1060 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1061 | /*1FC0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1062 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1063 | /*1FD0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1064 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1065 | /*1FE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1066 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1067 | /*1FF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 1068 | 0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x81 | ||
| 1069 | }; | ||
| 1070 | |||
| 1071 | int qib_sd7220_ib_load(struct qib_devdata *dd) | ||
| 1072 | { | ||
| 1073 | return qib_sd7220_prog_ld(dd, IB_7220_SERDES, qib_sd7220_ib_img, | ||
| 1074 | sizeof(qib_sd7220_ib_img), 0); | ||
| 1075 | } | ||
| 1076 | |||
| 1077 | int qib_sd7220_ib_vfy(struct qib_devdata *dd) | ||
| 1078 | { | ||
| 1079 | return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, qib_sd7220_ib_img, | ||
| 1080 | sizeof(qib_sd7220_ib_img), 0); | ||
| 1081 | } | ||
diff --git a/drivers/infiniband/hw/qib/qib_tx.c b/drivers/infiniband/hw/qib/qib_tx.c index f7eb1ddff5f3..af30232b6831 100644 --- a/drivers/infiniband/hw/qib/qib_tx.c +++ b/drivers/infiniband/hw/qib/qib_tx.c | |||
| @@ -340,9 +340,13 @@ rescan: | |||
| 340 | if (i < dd->piobcnt2k) | 340 | if (i < dd->piobcnt2k) |
| 341 | buf = (u32 __iomem *)(dd->pio2kbase + | 341 | buf = (u32 __iomem *)(dd->pio2kbase + |
| 342 | i * dd->palign); | 342 | i * dd->palign); |
| 343 | else | 343 | else if (i < dd->piobcnt2k + dd->piobcnt4k || !dd->piovl15base) |
| 344 | buf = (u32 __iomem *)(dd->pio4kbase + | 344 | buf = (u32 __iomem *)(dd->pio4kbase + |
| 345 | (i - dd->piobcnt2k) * dd->align4k); | 345 | (i - dd->piobcnt2k) * dd->align4k); |
| 346 | else | ||
| 347 | buf = (u32 __iomem *)(dd->piovl15base + | ||
| 348 | (i - (dd->piobcnt2k + dd->piobcnt4k)) * | ||
| 349 | dd->align4k); | ||
| 346 | if (pbufnum) | 350 | if (pbufnum) |
| 347 | *pbufnum = i; | 351 | *pbufnum = i; |
| 348 | dd->upd_pio_shadow = 0; | 352 | dd->upd_pio_shadow = 0; |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c index df3eb8c9fd96..b4b22576f12a 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_main.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c | |||
| @@ -1163,7 +1163,7 @@ static ssize_t create_child(struct device *dev, | |||
| 1163 | 1163 | ||
| 1164 | return ret ? ret : count; | 1164 | return ret ? ret : count; |
| 1165 | } | 1165 | } |
| 1166 | static DEVICE_ATTR(create_child, S_IWUGO, NULL, create_child); | 1166 | static DEVICE_ATTR(create_child, S_IWUSR, NULL, create_child); |
| 1167 | 1167 | ||
| 1168 | static ssize_t delete_child(struct device *dev, | 1168 | static ssize_t delete_child(struct device *dev, |
| 1169 | struct device_attribute *attr, | 1169 | struct device_attribute *attr, |
| @@ -1183,7 +1183,7 @@ static ssize_t delete_child(struct device *dev, | |||
| 1183 | return ret ? ret : count; | 1183 | return ret ? ret : count; |
| 1184 | 1184 | ||
| 1185 | } | 1185 | } |
| 1186 | static DEVICE_ATTR(delete_child, S_IWUGO, NULL, delete_child); | 1186 | static DEVICE_ATTR(delete_child, S_IWUSR, NULL, delete_child); |
| 1187 | 1187 | ||
| 1188 | int ipoib_add_pkey_attr(struct net_device *dev) | 1188 | int ipoib_add_pkey_attr(struct net_device *dev) |
| 1189 | { | 1189 | { |
