diff options
Diffstat (limited to 'drivers/infiniband')
-rw-r--r-- | drivers/infiniband/hw/ehca/ehca_classes_pSeries.h | 28 | ||||
-rw-r--r-- | drivers/infiniband/hw/ehca/ehca_qp.c | 18 |
2 files changed, 5 insertions, 41 deletions
diff --git a/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h b/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h index 1798e6466bd0..689c35786dd2 100644 --- a/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h +++ b/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h | |||
@@ -165,7 +165,6 @@ struct hcp_modify_qp_control_block { | |||
165 | #define MQPCB_MASK_ALT_P_KEY_IDX EHCA_BMASK_IBM( 7, 7) | 165 | #define MQPCB_MASK_ALT_P_KEY_IDX EHCA_BMASK_IBM( 7, 7) |
166 | #define MQPCB_MASK_RDMA_ATOMIC_CTRL EHCA_BMASK_IBM( 8, 8) | 166 | #define MQPCB_MASK_RDMA_ATOMIC_CTRL EHCA_BMASK_IBM( 8, 8) |
167 | #define MQPCB_MASK_QP_STATE EHCA_BMASK_IBM( 9, 9) | 167 | #define MQPCB_MASK_QP_STATE EHCA_BMASK_IBM( 9, 9) |
168 | #define MQPCB_QP_STATE EHCA_BMASK_IBM(24, 31) | ||
169 | #define MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES EHCA_BMASK_IBM(11, 11) | 168 | #define MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES EHCA_BMASK_IBM(11, 11) |
170 | #define MQPCB_MASK_PATH_MIGRATION_STATE EHCA_BMASK_IBM(12, 12) | 169 | #define MQPCB_MASK_PATH_MIGRATION_STATE EHCA_BMASK_IBM(12, 12) |
171 | #define MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP EHCA_BMASK_IBM(13, 13) | 170 | #define MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP EHCA_BMASK_IBM(13, 13) |
@@ -176,60 +175,33 @@ struct hcp_modify_qp_control_block { | |||
176 | #define MQPCB_MASK_RETRY_COUNT EHCA_BMASK_IBM(18, 18) | 175 | #define MQPCB_MASK_RETRY_COUNT EHCA_BMASK_IBM(18, 18) |
177 | #define MQPCB_MASK_TIMEOUT EHCA_BMASK_IBM(19, 19) | 176 | #define MQPCB_MASK_TIMEOUT EHCA_BMASK_IBM(19, 19) |
178 | #define MQPCB_MASK_PATH_MTU EHCA_BMASK_IBM(20, 20) | 177 | #define MQPCB_MASK_PATH_MTU EHCA_BMASK_IBM(20, 20) |
179 | #define MQPCB_PATH_MTU EHCA_BMASK_IBM(24, 31) | ||
180 | #define MQPCB_MASK_MAX_STATIC_RATE EHCA_BMASK_IBM(21, 21) | 178 | #define MQPCB_MASK_MAX_STATIC_RATE EHCA_BMASK_IBM(21, 21) |
181 | #define MQPCB_MAX_STATIC_RATE EHCA_BMASK_IBM(24, 31) | ||
182 | #define MQPCB_MASK_DLID EHCA_BMASK_IBM(22, 22) | 179 | #define MQPCB_MASK_DLID EHCA_BMASK_IBM(22, 22) |
183 | #define MQPCB_DLID EHCA_BMASK_IBM(16, 31) | ||
184 | #define MQPCB_MASK_RNR_RETRY_COUNT EHCA_BMASK_IBM(23, 23) | 180 | #define MQPCB_MASK_RNR_RETRY_COUNT EHCA_BMASK_IBM(23, 23) |
185 | #define MQPCB_RNR_RETRY_COUNT EHCA_BMASK_IBM(29, 31) | ||
186 | #define MQPCB_MASK_SOURCE_PATH_BITS EHCA_BMASK_IBM(24, 24) | 181 | #define MQPCB_MASK_SOURCE_PATH_BITS EHCA_BMASK_IBM(24, 24) |
187 | #define MQPCB_SOURCE_PATH_BITS EHCA_BMASK_IBM(25, 31) | ||
188 | #define MQPCB_MASK_TRAFFIC_CLASS EHCA_BMASK_IBM(25, 25) | 182 | #define MQPCB_MASK_TRAFFIC_CLASS EHCA_BMASK_IBM(25, 25) |
189 | #define MQPCB_TRAFFIC_CLASS EHCA_BMASK_IBM(24, 31) | ||
190 | #define MQPCB_MASK_HOP_LIMIT EHCA_BMASK_IBM(26, 26) | 183 | #define MQPCB_MASK_HOP_LIMIT EHCA_BMASK_IBM(26, 26) |
191 | #define MQPCB_HOP_LIMIT EHCA_BMASK_IBM(24, 31) | ||
192 | #define MQPCB_MASK_SOURCE_GID_IDX EHCA_BMASK_IBM(27, 27) | 184 | #define MQPCB_MASK_SOURCE_GID_IDX EHCA_BMASK_IBM(27, 27) |
193 | #define MQPCB_SOURCE_GID_IDX EHCA_BMASK_IBM(24, 31) | ||
194 | #define MQPCB_MASK_FLOW_LABEL EHCA_BMASK_IBM(28, 28) | 185 | #define MQPCB_MASK_FLOW_LABEL EHCA_BMASK_IBM(28, 28) |
195 | #define MQPCB_FLOW_LABEL EHCA_BMASK_IBM(12, 31) | ||
196 | #define MQPCB_MASK_DEST_GID EHCA_BMASK_IBM(30, 30) | 186 | #define MQPCB_MASK_DEST_GID EHCA_BMASK_IBM(30, 30) |
197 | #define MQPCB_MASK_SERVICE_LEVEL_AL EHCA_BMASK_IBM(31, 31) | 187 | #define MQPCB_MASK_SERVICE_LEVEL_AL EHCA_BMASK_IBM(31, 31) |
198 | #define MQPCB_SERVICE_LEVEL_AL EHCA_BMASK_IBM(28, 31) | ||
199 | #define MQPCB_MASK_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(32, 32) | 188 | #define MQPCB_MASK_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(32, 32) |
200 | #define MQPCB_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(31, 31) | ||
201 | #define MQPCB_MASK_RETRY_COUNT_AL EHCA_BMASK_IBM(33, 33) | 189 | #define MQPCB_MASK_RETRY_COUNT_AL EHCA_BMASK_IBM(33, 33) |
202 | #define MQPCB_RETRY_COUNT_AL EHCA_BMASK_IBM(29, 31) | ||
203 | #define MQPCB_MASK_TIMEOUT_AL EHCA_BMASK_IBM(34, 34) | 190 | #define MQPCB_MASK_TIMEOUT_AL EHCA_BMASK_IBM(34, 34) |
204 | #define MQPCB_TIMEOUT_AL EHCA_BMASK_IBM(27, 31) | ||
205 | #define MQPCB_MASK_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(35, 35) | 191 | #define MQPCB_MASK_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(35, 35) |
206 | #define MQPCB_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(24, 31) | ||
207 | #define MQPCB_MASK_DLID_AL EHCA_BMASK_IBM(36, 36) | 192 | #define MQPCB_MASK_DLID_AL EHCA_BMASK_IBM(36, 36) |
208 | #define MQPCB_DLID_AL EHCA_BMASK_IBM(16, 31) | ||
209 | #define MQPCB_MASK_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(37, 37) | 193 | #define MQPCB_MASK_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(37, 37) |
210 | #define MQPCB_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(29, 31) | ||
211 | #define MQPCB_MASK_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(38, 38) | 194 | #define MQPCB_MASK_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(38, 38) |
212 | #define MQPCB_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(25, 31) | ||
213 | #define MQPCB_MASK_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(39, 39) | 195 | #define MQPCB_MASK_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(39, 39) |
214 | #define MQPCB_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(24, 31) | ||
215 | #define MQPCB_MASK_HOP_LIMIT_AL EHCA_BMASK_IBM(40, 40) | 196 | #define MQPCB_MASK_HOP_LIMIT_AL EHCA_BMASK_IBM(40, 40) |
216 | #define MQPCB_HOP_LIMIT_AL EHCA_BMASK_IBM(24, 31) | ||
217 | #define MQPCB_MASK_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(41, 41) | 197 | #define MQPCB_MASK_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(41, 41) |
218 | #define MQPCB_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(24, 31) | ||
219 | #define MQPCB_MASK_FLOW_LABEL_AL EHCA_BMASK_IBM(42, 42) | 198 | #define MQPCB_MASK_FLOW_LABEL_AL EHCA_BMASK_IBM(42, 42) |
220 | #define MQPCB_FLOW_LABEL_AL EHCA_BMASK_IBM(12, 31) | ||
221 | #define MQPCB_MASK_DEST_GID_AL EHCA_BMASK_IBM(44, 44) | 199 | #define MQPCB_MASK_DEST_GID_AL EHCA_BMASK_IBM(44, 44) |
222 | #define MQPCB_MASK_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(45, 45) | 200 | #define MQPCB_MASK_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(45, 45) |
223 | #define MQPCB_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(16, 31) | ||
224 | #define MQPCB_MASK_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(46, 46) | 201 | #define MQPCB_MASK_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(46, 46) |
225 | #define MQPCB_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(16, 31) | ||
226 | #define MQPCB_MASK_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(47, 47) | 202 | #define MQPCB_MASK_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(47, 47) |
227 | #define MQPCB_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(31, 31) | ||
228 | #define MQPCB_QP_NUMBER EHCA_BMASK_IBM( 8, 31) | ||
229 | #define MQPCB_MASK_QP_ENABLE EHCA_BMASK_IBM(48, 48) | 203 | #define MQPCB_MASK_QP_ENABLE EHCA_BMASK_IBM(48, 48) |
230 | #define MQPCB_QP_ENABLE EHCA_BMASK_IBM(31, 31) | ||
231 | #define MQPCB_MASK_CURR_SRQ_LIMIT EHCA_BMASK_IBM(49, 49) | 204 | #define MQPCB_MASK_CURR_SRQ_LIMIT EHCA_BMASK_IBM(49, 49) |
232 | #define MQPCB_CURR_SRQ_LIMIT EHCA_BMASK_IBM(16, 31) | ||
233 | #define MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG EHCA_BMASK_IBM(50, 50) | 205 | #define MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG EHCA_BMASK_IBM(50, 50) |
234 | #define MQPCB_MASK_SHARED_RQ_HNDL EHCA_BMASK_IBM(51, 51) | 206 | #define MQPCB_MASK_SHARED_RQ_HNDL EHCA_BMASK_IBM(51, 51) |
235 | 207 | ||
diff --git a/drivers/infiniband/hw/ehca/ehca_qp.c b/drivers/infiniband/hw/ehca/ehca_qp.c index ead4e718c082..0338f1fabe8a 100644 --- a/drivers/infiniband/hw/ehca/ehca_qp.c +++ b/drivers/infiniband/hw/ehca/ehca_qp.c | |||
@@ -1962,19 +1962,13 @@ int ehca_query_qp(struct ib_qp *qp, | |||
1962 | qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size; | 1962 | qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size; |
1963 | qp_attr->dest_qp_num = qpcb->dest_qp_nr; | 1963 | qp_attr->dest_qp_num = qpcb->dest_qp_nr; |
1964 | 1964 | ||
1965 | qp_attr->pkey_index = | 1965 | qp_attr->pkey_index = qpcb->prim_p_key_idx; |
1966 | EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx); | 1966 | qp_attr->port_num = qpcb->prim_phys_port; |
1967 | |||
1968 | qp_attr->port_num = | ||
1969 | EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port); | ||
1970 | |||
1971 | qp_attr->timeout = qpcb->timeout; | 1967 | qp_attr->timeout = qpcb->timeout; |
1972 | qp_attr->retry_cnt = qpcb->retry_count; | 1968 | qp_attr->retry_cnt = qpcb->retry_count; |
1973 | qp_attr->rnr_retry = qpcb->rnr_retry_count; | 1969 | qp_attr->rnr_retry = qpcb->rnr_retry_count; |
1974 | 1970 | ||
1975 | qp_attr->alt_pkey_index = | 1971 | qp_attr->alt_pkey_index = qpcb->alt_p_key_idx; |
1976 | EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx); | ||
1977 | |||
1978 | qp_attr->alt_port_num = qpcb->alt_phys_port; | 1972 | qp_attr->alt_port_num = qpcb->alt_phys_port; |
1979 | qp_attr->alt_timeout = qpcb->timeout_al; | 1973 | qp_attr->alt_timeout = qpcb->timeout_al; |
1980 | 1974 | ||
@@ -2061,8 +2055,7 @@ int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, | |||
2061 | update_mask |= | 2055 | update_mask |= |
2062 | EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1) | 2056 | EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1) |
2063 | | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1); | 2057 | | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1); |
2064 | mqpcb->curr_srq_limit = | 2058 | mqpcb->curr_srq_limit = attr->srq_limit; |
2065 | EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit); | ||
2066 | mqpcb->qp_aff_asyn_ev_log_reg = | 2059 | mqpcb->qp_aff_asyn_ev_log_reg = |
2067 | EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1); | 2060 | EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1); |
2068 | } | 2061 | } |
@@ -2125,8 +2118,7 @@ int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr) | |||
2125 | 2118 | ||
2126 | srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1; | 2119 | srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1; |
2127 | srq_attr->max_sge = 3; | 2120 | srq_attr->max_sge = 3; |
2128 | srq_attr->srq_limit = EHCA_BMASK_GET( | 2121 | srq_attr->srq_limit = qpcb->curr_srq_limit; |
2129 | MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit); | ||
2130 | 2122 | ||
2131 | if (ehca_debug_level >= 2) | 2123 | if (ehca_debug_level >= 2) |
2132 | ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num); | 2124 | ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num); |