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-rw-r--r--drivers/infiniband/hw/nes/nes_cm.c8
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.c103
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.h2
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c96
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.c2
5 files changed, 109 insertions, 102 deletions
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index d940fc27129a..9a4b40fae40d 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -594,7 +594,7 @@ static void nes_cm_timer_tick(unsigned long pass)
594 continue; 594 continue;
595 } 595 }
596 /* this seems like the correct place, but leave send entry unprotected */ 596 /* this seems like the correct place, but leave send entry unprotected */
597 // spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); 597 /* spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); */
598 atomic_inc(&send_entry->skb->users); 598 atomic_inc(&send_entry->skb->users);
599 cm_packets_retrans++; 599 cm_packets_retrans++;
600 nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p," 600 nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p,"
@@ -1335,7 +1335,7 @@ static int process_packet(struct nes_cm_node *cm_node, struct sk_buff *skb,
1335 cm_node->loc_addr, cm_node->loc_port, 1335 cm_node->loc_addr, cm_node->loc_port,
1336 cm_node->rem_addr, cm_node->rem_port, 1336 cm_node->rem_addr, cm_node->rem_port,
1337 cm_node->state, atomic_read(&cm_node->ref_count)); 1337 cm_node->state, atomic_read(&cm_node->ref_count));
1338 // create event 1338 /* create event */
1339 cm_node->state = NES_CM_STATE_CLOSED; 1339 cm_node->state = NES_CM_STATE_CLOSED;
1340 1340
1341 create_event(cm_node, NES_CM_EVENT_ABORTED); 1341 create_event(cm_node, NES_CM_EVENT_ABORTED);
@@ -1669,7 +1669,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
1669 if (!cm_node) 1669 if (!cm_node)
1670 return NULL; 1670 return NULL;
1671 1671
1672 // set our node side to client (active) side 1672 /* set our node side to client (active) side */
1673 cm_node->tcp_cntxt.client = 1; 1673 cm_node->tcp_cntxt.client = 1;
1674 cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE; 1674 cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE;
1675 1675
@@ -1694,7 +1694,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
1694 loopbackremotenode->mpa_frame_size = mpa_frame_size - 1694 loopbackremotenode->mpa_frame_size = mpa_frame_size -
1695 sizeof(struct ietf_mpa_frame); 1695 sizeof(struct ietf_mpa_frame);
1696 1696
1697 // we are done handling this state, set node to a TSA state 1697 /* we are done handling this state, set node to a TSA state */
1698 cm_node->state = NES_CM_STATE_TSA; 1698 cm_node->state = NES_CM_STATE_TSA;
1699 cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num; 1699 cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num;
1700 loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num; 1700 loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num;
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index e9db6ef04ad8..8dc70f9bad2f 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -833,7 +833,7 @@ static void nes_init_csr_ne020(struct nes_device *nesdev, u8 hw_rev, u8 port_cou
833 nes_write_indexed(nesdev, 0x00000900, 0x20000001); 833 nes_write_indexed(nesdev, 0x00000900, 0x20000001);
834 nes_write_indexed(nesdev, 0x000060C0, 0x0000028e); 834 nes_write_indexed(nesdev, 0x000060C0, 0x0000028e);
835 nes_write_indexed(nesdev, 0x000060C8, 0x00000020); 835 nes_write_indexed(nesdev, 0x000060C8, 0x00000020);
836 // 836
837 nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0); 837 nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0);
838 /* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */ 838 /* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */
839 839
@@ -1229,7 +1229,7 @@ int nes_init_phy(struct nes_device *nesdev)
1229 nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data); 1229 nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data);
1230 nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n", 1230 nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n",
1231 nesadapter->phy_index[mac_index], phy_data); 1231 nesadapter->phy_index[mac_index], phy_data);
1232 nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000); 1232 nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000);
1233 1233
1234 /* Reset the PHY */ 1234 /* Reset the PHY */
1235 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000); 1235 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000);
@@ -1373,7 +1373,7 @@ int nes_init_phy(struct nes_device *nesdev)
1373 * the amcc phy is stable 1373 * the amcc phy is stable
1374 */ 1374 */
1375 1375
1376 sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0); 1376 sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0);
1377 sds_common_control0 |= 0x1; 1377 sds_common_control0 |= 0x1;
1378 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0); 1378 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0);
1379 1379
@@ -1382,7 +1382,7 @@ int nes_init_phy(struct nes_device *nesdev)
1382 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0); 1382 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0);
1383 1383
1384 i = 0; 1384 i = 0;
1385 while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040) 1385 while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040)
1386 && (i++ < 5000)) { 1386 && (i++ < 5000)) {
1387 /* mdelay(1); */ 1387 /* mdelay(1); */
1388 } 1388 }
@@ -1659,10 +1659,10 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
1659 } 1659 }
1660 1660
1661 u64temp = (u64)nesvnic->nic.sq_pbase; 1661 u64temp = (u64)nesvnic->nic.sq_pbase;
1662 nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1662 nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
1663 nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 1663 nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
1664 u64temp = (u64)nesvnic->nic.rq_pbase; 1664 u64temp = (u64)nesvnic->nic.rq_pbase;
1665 nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1665 nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
1666 nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 1666 nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
1667 1667
1668 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP | 1668 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP |
@@ -1714,7 +1714,7 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
1714 nic_rqe = &nesvnic->nic.rq_vbase[counter]; 1714 nic_rqe = &nesvnic->nic.rq_vbase[counter];
1715 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size); 1715 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size);
1716 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0; 1716 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0;
1717 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem); 1717 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem);
1718 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32)); 1718 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32));
1719 nesvnic->nic.rx_skb[counter] = skb; 1719 nesvnic->nic.rx_skb[counter] = skb;
1720 } 1720 }
@@ -1738,13 +1738,13 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
1738 jumbomode = 1; 1738 jumbomode = 1;
1739 nes_nic_init_timer_defaults(nesdev, jumbomode); 1739 nes_nic_init_timer_defaults(nesdev, jumbomode);
1740 } 1740 }
1741 nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR; 1741 nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR;
1742 nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS; 1742 nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS;
1743 nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc; 1743 nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc;
1744 nesvnic->lro_mgr.get_skb_header = nes_lro_get_skb_hdr; 1744 nesvnic->lro_mgr.get_skb_header = nes_lro_get_skb_hdr;
1745 nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID; 1745 nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1746 nesvnic->lro_mgr.dev = netdev; 1746 nesvnic->lro_mgr.dev = netdev;
1747 nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; 1747 nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1748 nesvnic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY; 1748 nesvnic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1749 return 0; 1749 return 0;
1750} 1750}
@@ -1765,8 +1765,8 @@ void nes_destroy_nic_qp(struct nes_vnic *nesvnic)
1765 1765
1766 /* Free remaining NIC receive buffers */ 1766 /* Free remaining NIC receive buffers */
1767 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) { 1767 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) {
1768 nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail]; 1768 nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail];
1769 wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]); 1769 wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]);
1770 wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32; 1770 wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32;
1771 pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag, 1771 pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag,
1772 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 1772 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
@@ -1849,17 +1849,17 @@ int nes_napi_isr(struct nes_device *nesdev)
1849 /* iff NIC, process here, else wait for DPC */ 1849 /* iff NIC, process here, else wait for DPC */
1850 if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) { 1850 if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) {
1851 nesdev->napi_isr_ran = 0; 1851 nesdev->napi_isr_ran = 0;
1852 nes_write32(nesdev->regs+NES_INT_STAT, 1852 nes_write32(nesdev->regs + NES_INT_STAT,
1853 (int_stat & 1853 (int_stat &
1854 ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3))); 1854 ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 | NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3)));
1855 1855
1856 /* Process the CEQs */ 1856 /* Process the CEQs */
1857 nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]); 1857 nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]);
1858 1858
1859 if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) && 1859 if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) &&
1860 (!nesadapter->et_use_adaptive_rx_coalesce)) || 1860 (!nesadapter->et_use_adaptive_rx_coalesce)) ||
1861 ((nesadapter->et_use_adaptive_rx_coalesce) && 1861 ((nesadapter->et_use_adaptive_rx_coalesce) &&
1862 (nesdev->deepcq_count > nesadapter->et_pkt_rate_low)))) ) { 1862 (nesdev->deepcq_count > nesadapter->et_pkt_rate_low))))) {
1863 if ((nesdev->int_req & NES_INT_TIMER) == 0) { 1863 if ((nesdev->int_req & NES_INT_TIMER) == 0) {
1864 /* Enable Periodic timer interrupts */ 1864 /* Enable Periodic timer interrupts */
1865 nesdev->int_req |= NES_INT_TIMER; 1865 nesdev->int_req |= NES_INT_TIMER;
@@ -1937,12 +1937,12 @@ void nes_dpc(unsigned long param)
1937 } 1937 }
1938 1938
1939 if (int_stat) { 1939 if (int_stat) {
1940 if (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 1940 if (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0|
1941 NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)) { 1941 NES_INT_MAC1|NES_INT_MAC2 | NES_INT_MAC3)) {
1942 /* Ack the interrupts */ 1942 /* Ack the interrupts */
1943 nes_write32(nesdev->regs+NES_INT_STAT, 1943 nes_write32(nesdev->regs+NES_INT_STAT,
1944 (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 1944 (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0|
1945 NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3))); 1945 NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3)));
1946 } 1946 }
1947 1947
1948 temp_int_stat = int_stat; 1948 temp_int_stat = int_stat;
@@ -2007,8 +2007,8 @@ void nes_dpc(unsigned long param)
2007 } 2007 }
2008 } 2008 }
2009 /* Don't use the interface interrupt bit stay in loop */ 2009 /* Don't use the interface interrupt bit stay in loop */
2010 int_stat &= ~NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 2010 int_stat &= ~NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 |
2011 NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3; 2011 NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3;
2012 } while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS)); 2012 } while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS));
2013 2013
2014 if (timer_ints == 1) { 2014 if (timer_ints == 1) {
@@ -2019,9 +2019,9 @@ void nes_dpc(unsigned long param)
2019 nesdev->timer_only_int_count = 0; 2019 nesdev->timer_only_int_count = 0;
2020 nesdev->int_req &= ~NES_INT_TIMER; 2020 nesdev->int_req &= ~NES_INT_TIMER;
2021 nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req)); 2021 nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
2022 nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req); 2022 nes_write32(nesdev->regs + NES_INT_MASK, ~nesdev->int_req);
2023 } else { 2023 } else {
2024 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req)); 2024 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
2025 } 2025 }
2026 } else { 2026 } else {
2027 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce)) 2027 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
@@ -2029,7 +2029,7 @@ void nes_dpc(unsigned long param)
2029 nes_nic_init_timer(nesdev); 2029 nes_nic_init_timer(nesdev);
2030 } 2030 }
2031 nesdev->timer_only_int_count = 0; 2031 nesdev->timer_only_int_count = 0;
2032 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req)); 2032 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
2033 } 2033 }
2034 } else { 2034 } else {
2035 nesdev->timer_only_int_count = 0; 2035 nesdev->timer_only_int_count = 0;
@@ -2078,7 +2078,7 @@ static void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
2078 do { 2078 do {
2079 if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) & 2079 if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) &
2080 NES_CEQE_VALID) { 2080 NES_CEQE_VALID) {
2081 u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX])))<<32) | 2081 u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]))) << 32) |
2082 ((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX]))); 2082 ((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX])));
2083 u64temp <<= 1; 2083 u64temp <<= 1;
2084 cq = *((struct nes_hw_cq **)&u64temp); 2084 cq = *((struct nes_hw_cq **)&u64temp);
@@ -2106,7 +2106,7 @@ static void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
2106 */ 2106 */
2107static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq) 2107static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
2108{ 2108{
2109// u64 u64temp; 2109 /* u64 u64temp; */
2110 u32 head; 2110 u32 head;
2111 u32 aeq_size; 2111 u32 aeq_size;
2112 u32 aeqe_misc; 2112 u32 aeqe_misc;
@@ -2125,8 +2125,10 @@ static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
2125 if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) { 2125 if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) {
2126 if (aeqe_cq_id >= NES_FIRST_QPN) { 2126 if (aeqe_cq_id >= NES_FIRST_QPN) {
2127 /* dealing with an accelerated QP related AE */ 2127 /* dealing with an accelerated QP related AE */
2128// u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])))<<32) | 2128 /*
2129// ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]))); 2129 * u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX]))) << 32) |
2130 * ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX])));
2131 */
2130 nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe); 2132 nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe);
2131 } else { 2133 } else {
2132 /* TODO: dealing with a CQP related AE */ 2134 /* TODO: dealing with a CQP related AE */
@@ -2474,8 +2476,10 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2474 /* bump past the vlan tag */ 2476 /* bump past the vlan tag */
2475 wqe_fragment_length++; 2477 wqe_fragment_length++;
2476 if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) { 2478 if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) {
2477 u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]); 2479 u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX +
2478 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32; 2480 wqe_fragment_index * 2]);
2481 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX +
2482 wqe_fragment_index * 2])) << 32;
2479 bus_address = (dma_addr_t)u64temp; 2483 bus_address = (dma_addr_t)u64temp;
2480 if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) { 2484 if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) {
2481 pci_unmap_single(nesdev->pcidev, 2485 pci_unmap_single(nesdev->pcidev,
@@ -2485,8 +2489,10 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2485 } 2489 }
2486 for (; wqe_fragment_index < 5; wqe_fragment_index++) { 2490 for (; wqe_fragment_index < 5; wqe_fragment_index++) {
2487 if (wqe_fragment_length[wqe_fragment_index]) { 2491 if (wqe_fragment_length[wqe_fragment_index]) {
2488 u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]); 2492 u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX +
2489 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32; 2493 wqe_fragment_index * 2]);
2494 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX
2495 + wqe_fragment_index * 2])) <<32;
2490 bus_address = (dma_addr_t)u64temp; 2496 bus_address = (dma_addr_t)u64temp;
2491 pci_unmap_page(nesdev->pcidev, 2497 pci_unmap_page(nesdev->pcidev,
2492 bus_address, 2498 bus_address,
@@ -2533,7 +2539,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2533 if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) { 2539 if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) {
2534 nes_write32(nesdev->regs+NES_CQE_ALLOC, 2540 nes_write32(nesdev->regs+NES_CQE_ALLOC,
2535 cq->cq_number | (cqe_count << 16)); 2541 cq->cq_number | (cqe_count << 16));
2536// nesadapter->tune_timer.cq_count += cqe_count; 2542 /* nesadapter->tune_timer.cq_count += cqe_count; */
2537 nesdev->currcq_count += cqe_count; 2543 nesdev->currcq_count += cqe_count;
2538 cqe_count = 0; 2544 cqe_count = 0;
2539 nes_replenish_nic_rq(nesvnic); 2545 nes_replenish_nic_rq(nesvnic);
@@ -2608,7 +2614,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2608 /* Replenish Nic CQ */ 2614 /* Replenish Nic CQ */
2609 nes_write32(nesdev->regs+NES_CQE_ALLOC, 2615 nes_write32(nesdev->regs+NES_CQE_ALLOC,
2610 cq->cq_number | (cqe_count << 16)); 2616 cq->cq_number | (cqe_count << 16));
2611// nesdev->nesadapter->tune_timer.cq_count += cqe_count; 2617 /* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */
2612 nesdev->currcq_count += cqe_count; 2618 nesdev->currcq_count += cqe_count;
2613 cqe_count = 0; 2619 cqe_count = 0;
2614 } 2620 }
@@ -2636,7 +2642,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2636 cq->cqe_allocs_pending = cqe_count; 2642 cq->cqe_allocs_pending = cqe_count;
2637 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce)) 2643 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
2638 { 2644 {
2639// nesdev->nesadapter->tune_timer.cq_count += cqe_count; 2645 /* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */
2640 nesdev->currcq_count += cqe_count; 2646 nesdev->currcq_count += cqe_count;
2641 nes_nic_tune_timer(nesdev); 2647 nes_nic_tune_timer(nesdev);
2642 } 2648 }
@@ -2671,7 +2677,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2671 2677
2672 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) { 2678 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) {
2673 u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head]. 2679 u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head].
2674 cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) | 2680 cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]))) << 32) |
2675 ((u64)(le32_to_cpu(cq->cq_vbase[head]. 2681 ((u64)(le32_to_cpu(cq->cq_vbase[head].
2676 cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]))); 2682 cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX])));
2677 cqp = *((struct nes_hw_cqp **)&u64temp); 2683 cqp = *((struct nes_hw_cqp **)&u64temp);
@@ -2688,7 +2694,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2688 } 2694 }
2689 2695
2690 u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 2696 u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
2691 wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX])))<<32) | 2697 wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) |
2692 ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 2698 ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
2693 wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]))); 2699 wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX])));
2694 cqp_request = *((struct nes_cqp_request **)&u64temp); 2700 cqp_request = *((struct nes_cqp_request **)&u64temp);
@@ -2725,7 +2731,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2725 } else { 2731 } else {
2726 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", 2732 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
2727 cqp_request, 2733 cqp_request,
2728 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f); 2734 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
2729 if (cqp_request->dynamic) { 2735 if (cqp_request->dynamic) {
2730 kfree(cqp_request); 2736 kfree(cqp_request);
2731 } else { 2737 } else {
@@ -2739,7 +2745,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2739 } 2745 }
2740 2746
2741 cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0; 2747 cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
2742 nes_write32(nesdev->regs+NES_CQE_ALLOC, cq->cq_number | (1 << 16)); 2748 nes_write32(nesdev->regs + NES_CQE_ALLOC, cq->cq_number | (1 << 16));
2743 if (++cqp->sq_tail >= cqp->sq_size) 2749 if (++cqp->sq_tail >= cqp->sq_size)
2744 cqp->sq_tail = 0; 2750 cqp->sq_tail = 0;
2745 2751
@@ -2808,13 +2814,13 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev,
2808 nes_debug(NES_DBG_AEQ, "\n"); 2814 nes_debug(NES_DBG_AEQ, "\n");
2809 aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]); 2815 aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]);
2810 if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) { 2816 if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) {
2811 context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2817 context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
2812 context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32; 2818 context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
2813 } else { 2819 } else {
2814 aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2820 aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
2815 aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32; 2821 aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
2816 context = (unsigned long)nesadapter->qp_table[le32_to_cpu( 2822 context = (unsigned long)nesadapter->qp_table[le32_to_cpu(
2817 aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN]; 2823 aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]) - NES_FIRST_QPN];
2818 BUG_ON(!context); 2824 BUG_ON(!context);
2819 } 2825 }
2820 2826
@@ -2827,7 +2833,6 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev,
2827 le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe, 2833 le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe,
2828 nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]); 2834 nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]);
2829 2835
2830
2831 switch (async_event_id) { 2836 switch (async_event_id) {
2832 case NES_AEQE_AEID_LLP_FIN_RECEIVED: 2837 case NES_AEQE_AEID_LLP_FIN_RECEIVED:
2833 nesqp = *((struct nes_qp **)&context); 2838 nesqp = *((struct nes_qp **)&context);
@@ -3231,7 +3236,7 @@ void nes_manage_arp_cache(struct net_device *netdev, unsigned char *mac_addr,
3231 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID); 3236 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID);
3232 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32( 3237 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32(
3233 (((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) | 3238 (((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) |
3234 (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]); 3239 (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]);
3235 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32( 3240 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32(
3236 (((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]); 3241 (((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]);
3237 } else { 3242 } else {
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
index 405b32ec3127..745bf94f3f07 100644
--- a/drivers/infiniband/hw/nes/nes_hw.h
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -969,7 +969,7 @@ struct nes_arp_entry {
969#define NES_NIC_CQ_DOWNWARD_TREND 16 969#define NES_NIC_CQ_DOWNWARD_TREND 16
970 970
971struct nes_hw_tune_timer { 971struct nes_hw_tune_timer {
972 //u16 cq_count; 972 /* u16 cq_count; */
973 u16 threshold_low; 973 u16 threshold_low;
974 u16 threshold_target; 974 u16 threshold_target;
975 u16 threshold_high; 975 u16 threshold_high;
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index d65a846f04be..1b0938c87774 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -185,12 +185,13 @@ static int nes_netdev_open(struct net_device *netdev)
185 nic_active |= nic_active_bit; 185 nic_active |= nic_active_bit;
186 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); 186 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
187 187
188 macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 188 macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
189 macaddr_high += (u16)netdev->dev_addr[1]; 189 macaddr_high += (u16)netdev->dev_addr[1];
190 macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 190
191 macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 191 macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
192 macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 192 macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
193 macaddr_low += (u32)netdev->dev_addr[5]; 193 macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
194 macaddr_low += (u32)netdev->dev_addr[5];
194 195
195 /* Program the various MAC regs */ 196 /* Program the various MAC regs */
196 for (i = 0; i < NES_MAX_PORT_COUNT; i++) { 197 for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
@@ -451,7 +452,7 @@ static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
451 __le16 *wqe_fragment_length; 452 __le16 *wqe_fragment_length;
452 u32 nr_frags; 453 u32 nr_frags;
453 u32 original_first_length; 454 u32 original_first_length;
454// u64 *wqe_fragment_address; 455 /* u64 *wqe_fragment_address; */
455 /* first fragment (0) is used by copy buffer */ 456 /* first fragment (0) is used by copy buffer */
456 u16 wqe_fragment_index=1; 457 u16 wqe_fragment_index=1;
457 u16 hoffset; 458 u16 hoffset;
@@ -461,11 +462,12 @@ static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
461 u32 old_head; 462 u32 old_head;
462 u32 wqe_misc; 463 u32 wqe_misc;
463 464
464 /* nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u," 465 /*
465 " (%u frags), tso_size=%u\n", 466 * nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
466 netdev->name, skb->len, skb_headlen(skb), 467 * " (%u frags), tso_size=%u\n",
467 skb_shinfo(skb)->nr_frags, skb_is_gso(skb)); 468 * netdev->name, skb->len, skb_headlen(skb),
468 */ 469 * skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
470 */
469 471
470 if (!netif_carrier_ok(netdev)) 472 if (!netif_carrier_ok(netdev))
471 return NETDEV_TX_OK; 473 return NETDEV_TX_OK;
@@ -795,12 +797,12 @@ static int nes_netdev_set_mac_address(struct net_device *netdev, void *p)
795 memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len); 797 memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len);
796 printk(PFX "%s: Address length = %d, Address = %s\n", 798 printk(PFX "%s: Address length = %d, Address = %s\n",
797 __func__, netdev->addr_len, print_mac(mac, mac_addr->sa_data)); 799 __func__, netdev->addr_len, print_mac(mac, mac_addr->sa_data));
798 macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 800 macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
799 macaddr_high += (u16)netdev->dev_addr[1]; 801 macaddr_high += (u16)netdev->dev_addr[1];
800 macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 802 macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
801 macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 803 macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
802 macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 804 macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
803 macaddr_low += (u32)netdev->dev_addr[5]; 805 macaddr_low += (u32)netdev->dev_addr[5];
804 806
805 for (i = 0; i < NES_MAX_PORT_COUNT; i++) { 807 for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
806 if (nesvnic->qp_nic_index[i] == 0xf) { 808 if (nesvnic->qp_nic_index[i] == 0xf) {
@@ -881,12 +883,12 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev)
881 print_mac(mac, multicast_addr->dmi_addr), 883 print_mac(mac, multicast_addr->dmi_addr),
882 perfect_filter_register_address+(mc_index * 8), 884 perfect_filter_register_address+(mc_index * 8),
883 mc_nic_index); 885 mc_nic_index);
884 macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8; 886 macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8;
885 macaddr_high += (u16)multicast_addr->dmi_addr[1]; 887 macaddr_high += (u16)multicast_addr->dmi_addr[1];
886 macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24; 888 macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24;
887 macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16; 889 macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16;
888 macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8; 890 macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8;
889 macaddr_low += (u32)multicast_addr->dmi_addr[5]; 891 macaddr_low += (u32)multicast_addr->dmi_addr[5];
890 nes_write_indexed(nesdev, 892 nes_write_indexed(nesdev,
891 perfect_filter_register_address+(mc_index * 8), 893 perfect_filter_register_address+(mc_index * 8),
892 macaddr_low); 894 macaddr_low);
@@ -910,23 +912,23 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev)
910/** 912/**
911 * nes_netdev_change_mtu 913 * nes_netdev_change_mtu
912 */ 914 */
913static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu) 915static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu)
914{ 916{
915 struct nes_vnic *nesvnic = netdev_priv(netdev); 917 struct nes_vnic *nesvnic = netdev_priv(netdev);
916 struct nes_device *nesdev = nesvnic->nesdev; 918 struct nes_device *nesdev = nesvnic->nesdev;
917 int ret = 0; 919 int ret = 0;
918 u8 jumbomode=0; 920 u8 jumbomode = 0;
919 921
920 if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu)) 922 if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu))
921 return -EINVAL; 923 return -EINVAL;
922 924
923 netdev->mtu = new_mtu; 925 netdev->mtu = new_mtu;
924 nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN; 926 nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN;
925 927
926 if (netdev->mtu > 1500) { 928 if (netdev->mtu > 1500) {
927 jumbomode=1; 929 jumbomode=1;
928 } 930 }
929 nes_nic_init_timer_defaults(nesdev, jumbomode); 931 nes_nic_init_timer_defaults(nesdev, jumbomode);
930 932
931 if (netif_running(netdev)) { 933 if (netif_running(netdev)) {
932 nes_netdev_stop(netdev); 934 nes_netdev_stop(netdev);
@@ -1225,14 +1227,14 @@ static int nes_netdev_set_coalesce(struct net_device *netdev,
1225 struct ethtool_coalesce *et_coalesce) 1227 struct ethtool_coalesce *et_coalesce)
1226{ 1228{
1227 struct nes_vnic *nesvnic = netdev_priv(netdev); 1229 struct nes_vnic *nesvnic = netdev_priv(netdev);
1228 struct nes_device *nesdev = nesvnic->nesdev; 1230 struct nes_device *nesdev = nesvnic->nesdev;
1229 struct nes_adapter *nesadapter = nesdev->nesadapter; 1231 struct nes_adapter *nesadapter = nesdev->nesadapter;
1230 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer; 1232 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
1231 unsigned long flags; 1233 unsigned long flags;
1232 1234
1233 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1235 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
1234 if (et_coalesce->rx_max_coalesced_frames_low) { 1236 if (et_coalesce->rx_max_coalesced_frames_low) {
1235 shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low; 1237 shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low;
1236 } 1238 }
1237 if (et_coalesce->rx_max_coalesced_frames_irq) { 1239 if (et_coalesce->rx_max_coalesced_frames_irq) {
1238 shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq; 1240 shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq;
@@ -1252,14 +1254,14 @@ static int nes_netdev_set_coalesce(struct net_device *netdev,
1252 nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq; 1254 nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq;
1253 if (et_coalesce->use_adaptive_rx_coalesce) { 1255 if (et_coalesce->use_adaptive_rx_coalesce) {
1254 nesadapter->et_use_adaptive_rx_coalesce = 1; 1256 nesadapter->et_use_adaptive_rx_coalesce = 1;
1255 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC; 1257 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC;
1256 nesadapter->et_rx_coalesce_usecs_irq = 0; 1258 nesadapter->et_rx_coalesce_usecs_irq = 0;
1257 if (et_coalesce->pkt_rate_low) { 1259 if (et_coalesce->pkt_rate_low) {
1258 nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low; 1260 nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low;
1259 } 1261 }
1260 } else { 1262 } else {
1261 nesadapter->et_use_adaptive_rx_coalesce = 0; 1263 nesadapter->et_use_adaptive_rx_coalesce = 0;
1262 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT; 1264 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT;
1263 if (nesadapter->et_rx_coalesce_usecs_irq) { 1265 if (nesadapter->et_rx_coalesce_usecs_irq) {
1264 nes_write32(nesdev->regs+NES_PERIODIC_CONTROL, 1266 nes_write32(nesdev->regs+NES_PERIODIC_CONTROL,
1265 0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8))); 1267 0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8)));
@@ -1276,28 +1278,28 @@ static int nes_netdev_get_coalesce(struct net_device *netdev,
1276 struct ethtool_coalesce *et_coalesce) 1278 struct ethtool_coalesce *et_coalesce)
1277{ 1279{
1278 struct nes_vnic *nesvnic = netdev_priv(netdev); 1280 struct nes_vnic *nesvnic = netdev_priv(netdev);
1279 struct nes_device *nesdev = nesvnic->nesdev; 1281 struct nes_device *nesdev = nesvnic->nesdev;
1280 struct nes_adapter *nesadapter = nesdev->nesadapter; 1282 struct nes_adapter *nesadapter = nesdev->nesadapter;
1281 struct ethtool_coalesce temp_et_coalesce; 1283 struct ethtool_coalesce temp_et_coalesce;
1282 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer; 1284 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
1283 unsigned long flags; 1285 unsigned long flags;
1284 1286
1285 memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce)); 1287 memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce));
1286 temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq; 1288 temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq;
1287 temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce; 1289 temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce;
1288 temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval; 1290 temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval;
1289 temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low; 1291 temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low;
1290 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1292 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
1291 temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low; 1293 temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low;
1292 temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target; 1294 temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target;
1293 temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high; 1295 temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high;
1294 temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min; 1296 temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min;
1295 temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max; 1297 temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max;
1296 if (nesadapter->et_use_adaptive_rx_coalesce) { 1298 if (nesadapter->et_use_adaptive_rx_coalesce) {
1297 temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use; 1299 temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use;
1298 } 1300 }
1299 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags); 1301 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
1300 memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce)); 1302 memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce));
1301 return 0; 1303 return 0;
1302} 1304}
1303 1305
@@ -1376,7 +1378,7 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd
1376 u16 phy_data; 1378 u16 phy_data;
1377 1379
1378 et_cmd->duplex = DUPLEX_FULL; 1380 et_cmd->duplex = DUPLEX_FULL;
1379 et_cmd->port = PORT_MII; 1381 et_cmd->port = PORT_MII;
1380 1382
1381 if (nesadapter->OneG_Mode) { 1383 if (nesadapter->OneG_Mode) {
1382 et_cmd->speed = SPEED_1000; 1384 et_cmd->speed = SPEED_1000;
@@ -1401,13 +1403,13 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd
1401 if ((nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) || 1403 if ((nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) ||
1402 (nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_ARGUS)) { 1404 (nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_ARGUS)) {
1403 et_cmd->transceiver = XCVR_EXTERNAL; 1405 et_cmd->transceiver = XCVR_EXTERNAL;
1404 et_cmd->port = PORT_FIBRE; 1406 et_cmd->port = PORT_FIBRE;
1405 et_cmd->supported = SUPPORTED_FIBRE; 1407 et_cmd->supported = SUPPORTED_FIBRE;
1406 et_cmd->advertising = ADVERTISED_FIBRE; 1408 et_cmd->advertising = ADVERTISED_FIBRE;
1407 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index]; 1409 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
1408 } else { 1410 } else {
1409 et_cmd->transceiver = XCVR_INTERNAL; 1411 et_cmd->transceiver = XCVR_INTERNAL;
1410 et_cmd->supported = SUPPORTED_10000baseT_Full; 1412 et_cmd->supported = SUPPORTED_10000baseT_Full;
1411 et_cmd->advertising = ADVERTISED_10000baseT_Full; 1413 et_cmd->advertising = ADVERTISED_10000baseT_Full;
1412 et_cmd->phy_address = nesdev->mac_index; 1414 et_cmd->phy_address = nesdev->mac_index;
1413 } 1415 }
@@ -1438,7 +1440,7 @@ static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd
1438 /* Turn on Full duplex, Autoneg, and restart autonegotiation */ 1440 /* Turn on Full duplex, Autoneg, and restart autonegotiation */
1439 phy_data |= 0x1300; 1441 phy_data |= 0x1300;
1440 } else { 1442 } else {
1441 // Turn off autoneg 1443 /* Turn off autoneg */
1442 phy_data &= ~0x1000; 1444 phy_data &= ~0x1000;
1443 } 1445 }
1444 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index], 1446 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index 9ae397a0ff7e..99b3c4ae86eb 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -1266,7 +1266,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
1266 sq_size = init_attr->cap.max_send_wr; 1266 sq_size = init_attr->cap.max_send_wr;
1267 rq_size = init_attr->cap.max_recv_wr; 1267 rq_size = init_attr->cap.max_recv_wr;
1268 1268
1269 // check if the encoded sizes are OK or not... 1269 /* check if the encoded sizes are OK or not... */
1270 sq_encoded_size = nes_get_encoded_size(&sq_size); 1270 sq_encoded_size = nes_get_encoded_size(&sq_size);
1271 rq_encoded_size = nes_get_encoded_size(&rq_size); 1271 rq_encoded_size = nes_get_encoded_size(&rq_size);
1272 1272
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 23:53:10 -0500